/* SPDX-License-Identifier: GPL-2.0 */
/*
* ATI PCI IDs from XFree86, kept here to make sync'ing with
* XFree much simpler. Currently, this list is only used by
* radeonfb
*/
#define PCI_CHIP_RV380_3150 0 x3150
#define PCI_CHIP_RV380_3151 0 x3151
#define PCI_CHIP_RV380_3152 0 x3152
#define PCI_CHIP_RV380_3153 0 x3153
#define PCI_CHIP_RV380_3154 0 x3154
#define PCI_CHIP_RV380_3156 0 x3156
#define PCI_CHIP_RV380_3E50 0 x3E50
#define PCI_CHIP_RV380_3E51 0 x3E51
#define PCI_CHIP_RV380_3E52 0 x3E52
#define PCI_CHIP_RV380_3E53 0 x3E53
#define PCI_CHIP_RV380_3E54 0 x3E54
#define PCI_CHIP_RV380_3E56 0 x3E56
#define PCI_CHIP_RS100_4136 0 x4136
#define PCI_CHIP_RS200_4137 0 x4137
#define PCI_CHIP_R300_AD 0 x4144
#define PCI_CHIP_R300_AE 0 x4145
#define PCI_CHIP_R300_AF 0 x4146
#define PCI_CHIP_R300_AG 0 x4147
#define PCI_CHIP_R350_AH 0 x4148
#define PCI_CHIP_R350_AI 0 x4149
#define PCI_CHIP_R350_AJ 0 x414A
#define PCI_CHIP_R350_AK 0 x414B
#define PCI_CHIP_RV350_AP 0 x4150
#define PCI_CHIP_RV350_AQ 0 x4151
#define PCI_CHIP_RV360_AR 0 x4152
#define PCI_CHIP_RV350_AS 0 x4153
#define PCI_CHIP_RV350_AT 0 x4154
#define PCI_CHIP_RV350_AV 0 x4156
#define PCI_CHIP_MACH32 0 x4158
#define PCI_CHIP_RS250_4237 0 x4237
#define PCI_CHIP_R200_BB 0 x4242
#define PCI_CHIP_R200_BC 0 x4243
#define PCI_CHIP_RS100_4336 0 x4336
#define PCI_CHIP_RS200_4337 0 x4337
#define PCI_CHIP_MACH64CT 0 x4354
#define PCI_CHIP_MACH64CX 0 x4358
#define PCI_CHIP_RS250_4437 0 x4437
#define PCI_CHIP_MACH64ET 0 x4554
#define PCI_CHIP_MACH64GB 0 x4742
#define PCI_CHIP_MACH64GD 0 x4744
#define PCI_CHIP_MACH64GI 0 x4749
#define PCI_CHIP_MACH64GL 0 x474C
#define PCI_CHIP_MACH64GM 0 x474D
#define PCI_CHIP_MACH64GN 0 x474E
#define PCI_CHIP_MACH64GO 0 x474F
#define PCI_CHIP_MACH64GP 0 x4750
#define PCI_CHIP_MACH64GQ 0 x4751
#define PCI_CHIP_MACH64GR 0 x4752
#define PCI_CHIP_MACH64GS 0 x4753
#define PCI_CHIP_MACH64GT 0 x4754
#define PCI_CHIP_MACH64GU 0 x4755
#define PCI_CHIP_MACH64GV 0 x4756
#define PCI_CHIP_MACH64GW 0 x4757
#define PCI_CHIP_MACH64GX 0 x4758
#define PCI_CHIP_MACH64GY 0 x4759
#define PCI_CHIP_MACH64GZ 0 x475A
#define PCI_CHIP_RV250_Id 0 x4964
#define PCI_CHIP_RV250_Ie 0 x4965
#define PCI_CHIP_RV250_If 0 x4966
#define PCI_CHIP_RV250_Ig 0 x4967
#define PCI_CHIP_R420_JH 0 x4A48
#define PCI_CHIP_R420_JI 0 x4A49
#define PCI_CHIP_R420_JJ 0 x4A4A
#define PCI_CHIP_R420_JK 0 x4A4B
#define PCI_CHIP_R420_JL 0 x4A4C
#define PCI_CHIP_R420_JM 0 x4A4D
#define PCI_CHIP_R420_JN 0 x4A4E
#define PCI_CHIP_R420_JP 0 x4A50
#define PCI_CHIP_MACH64LB 0 x4C42
#define PCI_CHIP_MACH64LD 0 x4C44
#define PCI_CHIP_RAGE128LE 0 x4C45
#define PCI_CHIP_RAGE128LF 0 x4C46
#define PCI_CHIP_MACH64LG 0 x4C47
#define PCI_CHIP_MACH64LI 0 x4C49
#define PCI_CHIP_MACH64LM 0 x4C4D
#define PCI_CHIP_MACH64LN 0 x4C4E
#define PCI_CHIP_MACH64LP 0 x4C50
#define PCI_CHIP_MACH64LQ 0 x4C51
#define PCI_CHIP_MACH64LR 0 x4C52
#define PCI_CHIP_MACH64LS 0 x4C53
#define PCI_CHIP_MACH64LT 0 x4C54
#define PCI_CHIP_RADEON_LW 0 x4C57
#define PCI_CHIP_RADEON_LX 0 x4C58
#define PCI_CHIP_RADEON_LY 0 x4C59
#define PCI_CHIP_RADEON_LZ 0 x4C5A
#define PCI_CHIP_RV250_Ld 0 x4C64
#define PCI_CHIP_RV250_Le 0 x4C65
#define PCI_CHIP_RV250_Lf 0 x4C66
#define PCI_CHIP_RV250_Lg 0 x4C67
#define PCI_CHIP_RV250_Ln 0 x4C6E
#define PCI_CHIP_RAGE128MF 0 x4D46
#define PCI_CHIP_RAGE128ML 0 x4D4C
#define PCI_CHIP_R300_ND 0 x4E44
#define PCI_CHIP_R300_NE 0 x4E45
#define PCI_CHIP_R300_NF 0 x4E46
#define PCI_CHIP_R300_NG 0 x4E47
#define PCI_CHIP_R350_NH 0 x4E48
#define PCI_CHIP_R350_NI 0 x4E49
#define PCI_CHIP_R360_NJ 0 x4E4A
#define PCI_CHIP_R350_NK 0 x4E4B
#define PCI_CHIP_RV350_NP 0 x4E50
#define PCI_CHIP_RV350_NQ 0 x4E51
#define PCI_CHIP_RV350_NR 0 x4E52
#define PCI_CHIP_RV350_NS 0 x4E53
#define PCI_CHIP_RV350_NT 0 x4E54
#define PCI_CHIP_RV350_NV 0 x4E56
#define PCI_CHIP_RAGE128PA 0 x5041
#define PCI_CHIP_RAGE128PB 0 x5042
#define PCI_CHIP_RAGE128PC 0 x5043
#define PCI_CHIP_RAGE128PD 0 x5044
#define PCI_CHIP_RAGE128PE 0 x5045
#define PCI_CHIP_RAGE128PF 0 x5046
#define PCI_CHIP_RAGE128PG 0 x5047
#define PCI_CHIP_RAGE128PH 0 x5048
#define PCI_CHIP_RAGE128PI 0 x5049
#define PCI_CHIP_RAGE128PJ 0 x504A
#define PCI_CHIP_RAGE128PK 0 x504B
#define PCI_CHIP_RAGE128PL 0 x504C
#define PCI_CHIP_RAGE128PM 0 x504D
#define PCI_CHIP_RAGE128PN 0 x504E
#define PCI_CHIP_RAGE128PO 0 x504F
#define PCI_CHIP_RAGE128PP 0 x5050
#define PCI_CHIP_RAGE128PQ 0 x5051
#define PCI_CHIP_RAGE128PR 0 x5052
#define PCI_CHIP_RAGE128PS 0 x5053
#define PCI_CHIP_RAGE128PT 0 x5054
#define PCI_CHIP_RAGE128PU 0 x5055
#define PCI_CHIP_RAGE128PV 0 x5056
#define PCI_CHIP_RAGE128PW 0 x5057
#define PCI_CHIP_RAGE128PX 0 x5058
#define PCI_CHIP_RADEON_QD 0 x5144
#define PCI_CHIP_RADEON_QE 0 x5145
#define PCI_CHIP_RADEON_QF 0 x5146
#define PCI_CHIP_RADEON_QG 0 x5147
#define PCI_CHIP_R200_QH 0 x5148
#define PCI_CHIP_R200_QI 0 x5149
#define PCI_CHIP_R200_QJ 0 x514A
#define PCI_CHIP_R200_QK 0 x514B
#define PCI_CHIP_R200_QL 0 x514C
#define PCI_CHIP_R200_QM 0 x514D
#define PCI_CHIP_R200_QN 0 x514E
#define PCI_CHIP_R200_QO 0 x514F
#define PCI_CHIP_RV200_QW 0 x5157
#define PCI_CHIP_RV200_QX 0 x5158
#define PCI_CHIP_RV100_QY 0 x5159
#define PCI_CHIP_RV100_QZ 0 x515A
#define PCI_CHIP_RN50 0 x515E
#define PCI_CHIP_RAGE128RE 0 x5245
#define PCI_CHIP_RAGE128RF 0 x5246
#define PCI_CHIP_RAGE128RG 0 x5247
#define PCI_CHIP_RAGE128RK 0 x524B
#define PCI_CHIP_RAGE128RL 0 x524C
#define PCI_CHIP_RAGE128SE 0 x5345
#define PCI_CHIP_RAGE128SF 0 x5346
#define PCI_CHIP_RAGE128SG 0 x5347
#define PCI_CHIP_RAGE128SH 0 x5348
#define PCI_CHIP_RAGE128SK 0 x534B
#define PCI_CHIP_RAGE128SL 0 x534C
#define PCI_CHIP_RAGE128SM 0 x534D
#define PCI_CHIP_RAGE128SN 0 x534E
#define PCI_CHIP_RAGE128TF 0 x5446
#define PCI_CHIP_RAGE128TL 0 x544C
#define PCI_CHIP_RAGE128TR 0 x5452
#define PCI_CHIP_RAGE128TS 0 x5453
#define PCI_CHIP_RAGE128TT 0 x5454
#define PCI_CHIP_RAGE128TU 0 x5455
#define PCI_CHIP_RV370_5460 0 x5460
#define PCI_CHIP_RV370_5461 0 x5461
#define PCI_CHIP_RV370_5462 0 x5462
#define PCI_CHIP_RV370_5463 0 x5463
#define PCI_CHIP_RV370_5464 0 x5464
#define PCI_CHIP_RV370_5465 0 x5465
#define PCI_CHIP_RV370_5466 0 x5466
#define PCI_CHIP_RV370_5467 0 x5467
#define PCI_CHIP_R423_UH 0 x5548
#define PCI_CHIP_R423_UI 0 x5549
#define PCI_CHIP_R423_UJ 0 x554A
#define PCI_CHIP_R423_UK 0 x554B
#define PCI_CHIP_R423_UQ 0 x5551
#define PCI_CHIP_R423_UR 0 x5552
#define PCI_CHIP_R423_UT 0 x5554
#define PCI_CHIP_MACH64VT 0 x5654
#define PCI_CHIP_MACH64VU 0 x5655
#define PCI_CHIP_MACH64VV 0 x5656
#define PCI_CHIP_RC410_5A62 0 x5A62
#define PCI_CHIP_RS300_5834 0 x5834
#define PCI_CHIP_RS300_5835 0 x5835
#define PCI_CHIP_RS300_5836 0 x5836
#define PCI_CHIP_RS300_5837 0 x5837
#define PCI_CHIP_RS480_5955 0 x5955
#define PCI_CHIP_RV280_5960 0 x5960
#define PCI_CHIP_RV280_5961 0 x5961
#define PCI_CHIP_RV280_5962 0 x5962
#define PCI_CHIP_RV280_5964 0 x5964
#define PCI_CHIP_RS482_5975 0 x5975
#define PCI_CHIP_RV370_5B60 0 x5B60
#define PCI_CHIP_RV370_5B61 0 x5B61
#define PCI_CHIP_RV370_5B62 0 x5B62
#define PCI_CHIP_RV370_5B63 0 x5B63
#define PCI_CHIP_RV370_5B64 0 x5B64
#define PCI_CHIP_RV370_5B65 0 x5B65
#define PCI_CHIP_RV370_5B66 0 x5B66
#define PCI_CHIP_RV370_5B67 0 x5B67
#define PCI_CHIP_RV280_5C61 0 x5C61
#define PCI_CHIP_RV280_5C63 0 x5C63
#define PCI_CHIP_R423_5D57 0 x5D57
#define PCI_CHIP_RS350_7834 0 x7834
#define PCI_CHIP_RS350_7835 0 x7835
Messung V0.5 in Prozent C=96 H=93 G=94
¤ Dauer der Verarbeitung: 0.1 Sekunden
(vorverarbeitet am 2026-06-07)
¤
*© Formatika GbR, Deutschland