/* SPDX-License-Identifier: GPL-2.0 */ /* floppy.h: Sparc specific parts of the Floppy driver. * * Copyright (C) 1996, 2007, 2008 David S. Miller (davem@davemloft.net) * Copyright (C) 1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz) * * Ultra/PCI support added: Sep 1997 Eddie C. Dost (ecd@skynet.be)
*/
/* Here is where we catch the floppy driver trying to initialize, * therefore this is where we call the PROM device tree probing * routine etc. on the Sparc.
*/ #define FLOPPY0_TYPE sun_floppy_init() #define FLOPPY1_TYPE sun_floppy_types[1]
#define FDC1 ((unsignedlong)sun_fdc)
#define N_FDC 1 #define N_DRIVE 8
/* No 64k boundary crossing problems on the Sparc. */ #define CROSS_64KB(a,s) (0)
staticunsignedchar sun_82077_fd_inb(unsignedlong base, unsignedint reg)
{
udelay(5); switch (reg) { default:
printk("floppy: Asked to read unknown port %x\n", reg);
panic("floppy: Port bolixed."); case FD_STATUS: return sbus_readb(&sun_fdc->status_82077) & ~STATUS_DMA; case FD_DATA: return sbus_readb(&sun_fdc->data_82077); case FD_DIR: /* XXX: Is DCL on 0x80 in sun4m? */ return sbus_readb(&sun_fdc->dir_82077);
}
panic("sun_82072_fd_inb: How did I get here?");
}
staticvoid sun_82077_fd_outb(unsignedchar value, unsignedlong base, unsignedint reg)
{
udelay(5); switch (reg) { default:
printk("floppy: Asked to write to unknown port %x\n", reg);
panic("floppy: Port bolixed."); case FD_DOR: /* Happily, the 82077 has a real DOR register. */
sbus_writeb(value, &sun_fdc->dor_82077); break; case FD_DATA:
sbus_writeb(value, &sun_fdc->data_82077); break; case FD_DCR:
sbus_writeb(value, &sun_fdc->dcr_82077); break; case FD_DSR:
sbus_writeb(value, &sun_fdc->status_82077); break;
} return;
}
/* For pseudo-dma (Sun floppy drives have no real DMA available to * them so we must eat the data fifo bytes directly ourselves) we have * three state variables. doing_pdma tells our inline low-level * assembly floppy interrupt entry point whether it should sit and eat * bytes from the fifo or just transfer control up to the higher level * floppy interrupt c-code. I tried very hard but I could not get the * pseudo-dma to work in c-code without getting many overruns and * underruns. If non-zero, doing_pdma encodes the direction of * the transfer for debugging. 1=read 2=write
*/ unsignedchar *pdma_vaddr; unsignedlong pdma_size; volatileint doing_pdma = 0;
/* This is software state */ char *pdma_base = NULL; unsignedlong pdma_areasize;
/* Common routines to all controller types on the Sparc. */ staticvoid sun_fd_disable_dma(void)
{
doing_pdma = 0;
pdma_base = NULL;
}
staticvoid sun_pci_fd_broken_outb(unsignedchar val, unsignedlong base, unsignedint reg)
{
udelay(5); /* * XXX: Due to SUN's broken floppy connector on AX and AXi * we need to turn on MOTOR_0 also, if the floppy is * jumpered to DS1 (like most PC floppies are). I hope * this does not hurt correct hardware like the AXmp. * (Eddie, Sep 12 1998).
*/ if (reg == FD_DOR) { if (((val & 0x03) == sun_pci_broken_drive) && (val & 0x20)) {
val |= 0x10;
}
}
outb(val, base + reg);
}
#ifdef PCI_FDC_SWAP_DRIVES staticvoid sun_pci_fd_lde_broken_outb(unsignedchar val, unsignedlong base, unsignedint reg)
{
udelay(5); /* * XXX: Due to SUN's broken floppy connector on AX and AXi * we need to turn on MOTOR_0 also, if the floppy is * jumpered to DS1 (like most PC floppies are). I hope * this does not hurt correct hardware like the AXmp. * (Eddie, Sep 12 1998).
*/ if (reg == FD_DOR) { if (((val & 0x03) == sun_pci_broken_drive) && (val & 0x10)) {
val &= ~(0x03);
val |= 0x21;
}
}
outb(val, base + reg);
} #endif/* PCI_FDC_SWAP_DRIVES */
/* * Floppy probing, we'd like to use /dev/fd0 for a single Floppy on PCI, * even if this is configured using DS1, thus looks like /dev/fd1 with * the cabling used in Ultras.
*/ #define DOR (port + 2) #define MSR (port + 4) #define FIFO (port + 5)
/* Make sure the high density bit is set, some systems * (most notably Ultra5/Ultra10) come up with it clear.
*/
auxio_reg = (void __iomem *) op->resource[2].start;
writel(readl(auxio_reg)|0x2, auxio_reg);
/* * Sanity check, is this really the NS87303?
*/ switch (config & 0x3ff) { case 0x02e: case 0x15c: case 0x26e: case 0x398: break; default:
config = 0;
}
#ifdef PCI_FDC_SWAP_DRIVES /* * If only Floppy 1 is present, swap drives.
*/ if (!sun_floppy_types[0] && sun_floppy_types[1]) { /* * Set the drive exchange bit in FCR on NS87303, * make sure other bits are sane before doing so.
*/
ns87303_modify(config, FER, FER_EDM, 0);
ns87303_modify(config, ASC, ASC_DRV2_SEL, 0);
ns87303_modify(config, FCR, 0, FCR_LDE);
/* * We cannot do of_ioremap here: it does request_region, * which the generic floppy driver tries to do once again. * But we must use the sdev resource values as they have * had parent ranges applied.
*/
sun_fdc = (struct sun_flpy_controller *)
(op->resource[0].start +
((op->resource[0].flags & 0x1ffUL) << 32UL));
/* Last minute sanity check... */ if (sbus_readb(&sun_fdc->status1_82077) == 0xff) {
sun_fdc = (struct sun_flpy_controller *)-1; return 0;
}
Die Informationen auf dieser Webseite wurden
nach bestem Wissen sorgfältig zusammengestellt. Es wird jedoch weder Vollständigkeit, noch Richtigkeit,
noch Qualität der bereit gestellten Informationen zugesichert.
Bemerkung:
Die farbliche Syntaxdarstellung und die Messung sind noch experimentell.