Quelle  imx8mm-emtop-baseboard.dts   Sprache: unbekannt

// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright 2023 Emtop Embedded Solutions
 *
 * Author: Himanshu Bhavani <himanshu.bhavani@siliconsignals.io>
 * Author: Tarang Raval <tarang.raval@siliconsignals.io>
 */

/dts-v1/;

#include "imx8mm-emtop-som.dtsi"

/ {
 model = "Emtop Embedded Solutions i.MX8M Mini Baseboard V1";
 compatible = "ees,imx8mm-emtop-baseboard", "ees,imx8mm-emtop-som",
  "fsl,imx8mm";

 connector {
  compatible = "usb-c-connector";
  label = "USB-C";
  pinctrl-names = "default";
  pinctrl-0 = <&pinctrl_usb_otg>;
  id-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;

  port {
   high_speed_ep: endpoint {
    remote-endpoint = <&usb_hs_ep>;
   };
  };
 };

 leds {
  compatible = "gpio-leds";
  pinctrl-names = "default";
  pinctrl-0 = <&pinctrl_gpio_led>;

  led-1 {
          label = "buzzer";
          gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
          default-state = "off";
  };
 };

 osc_can: clock-osc-can {
  compatible = "fixed-clock";
  #clock-cells = <0>;
  clock-frequency = <16000000>;
  clock-output-names = "osc-can";
 };

 reg_audio: regulator-audio {
         compatible = "regulator-fixed";
         regulator-name = "wm8904_supply";
         regulator-min-microvolt = <1800000>;
         regulator-max-microvolt = <1800000>;
         regulator-always-on;
 };

 reg_wifi_vmmc: regulator-wifi-vmmc {
  compatible = "regulator-fixed";
  regulator-name = "vmmc";
  regulator-min-microvolt = <3300000>;
  regulator-max-microvolt = <3300000>;
  gpio = <&gpio2 10 GPIO_ACTIVE_HIGH>;
  enable-active-high;
  startup-delay-us = <100>;
  off-on-delay-us = <20000>;
 };

 sound-wm8904 {
         compatible = "simple-audio-card";
         simple-audio-card,bitclock-master = <&dailink_master>;
         simple-audio-card,format = "i2s";
         simple-audio-card,frame-master = <&dailink_master>;
         simple-audio-card,name = "wm8904-audio";
         simple-audio-card,mclk-fs = <256>;
         simple-audio-card,routing =
   "Headphone Jack", "HPOUTL",
   "Headphone Jack", "HPOUTR",
   "IN2L", "Line In Jack",
   "IN2R", "Line In Jack",
   "Headphone Jack", "MICBIAS",
   "IN1L", "Headphone Jack";

         simple-audio-card,widgets =
                 "Microphone","Headphone Jack",
                 "Headphone", "Headphone Jack",
                 "Line", "Line In Jack";

         dailink_master: simple-audio-card,codec {
                 sound-dai = <&wm8904>;
         };

         simple-audio-card,cpu {
                 sound-dai = <&sai3>;
         };
 };

 sound-spdif {
         compatible = "fsl,imx-audio-spdif";
         model = "imx-spdif";
         spdif-controller = <&spdif1>;
         spdif-out;
         spdif-in;
 };
};

/* CAN BUS */
&ecspi2 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_ecspi2>;
        status = "okay";

        can: can@0 {
                compatible = "microchip,mcp2515";
                reg = <0>;
                pinctrl-names = "default";
                pinctrl-0 = <&pinctrl_canbus>;
                clocks = <&osc_can>;
                interrupt-parent = <&gpio1>;
                interrupts = <14 IRQ_TYPE_LEVEL_HIGH>;
                spi-max-frequency = <10000000>;
        };
};

&fec1 {
 pinctrl-names = "default";
 pinctrl-0 = <&pinctrl_fec1>;
 phy-mode = "rgmii-id";
 phy-handle = <ðphy0>;
 fsl,magic-packet;
 status = "okay";

 mdio {
  #address-cells = <1>;
  #size-cells = <0>;

  ethphy0: ethernet-phy@4 {
   compatible = "ethernet-phy-ieee802.3-c22";
   reg = <4>;
   reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
   reset-assert-us = <10000>;
   vddio-supply = <&vddio>;

   vddio: vddio-regulator {
    regulator-min-microvolt = <1800000>;
    regulator-max-microvolt = <1800000>;
   };
  };
 };
};

&i2c3 {
 clock-frequency = <100000>;
 pinctrl-names = "default";
 pinctrl-0 = <&pinctrl_i2c3>;
 status = "okay";

 wm8904: audio-codec@1a {
  compatible = "wlf,wm8904";
  reg = <0x1a>;
  #sound-dai-cells = <0>;
  clocks = <&clk IMX8MM_CLK_SAI3_ROOT>;
  clock-names = "mclk";
  DCVDD-supply = <®_audio>;
  DBVDD-supply = <®_audio>;
  AVDD-supply = <®_audio>;
  CPVDD-supply = <®_audio>;
  MICVDD-supply = <®_audio>;
 };

 rtc@32 {
  compatible = "epson,rx8025";
  reg = <0x32>;
 };
};

/* AUDIO */
&sai3 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_sai3>;
        assigned-clocks = <&clk IMX8MM_CLK_SAI3>;
        assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>;
        assigned-clock-rates = <24576000>;
        status = "okay";
};

&spdif1 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_spdif1>;
        assigned-clocks = <&clk IMX8MM_CLK_SPDIF1>;
        assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>;
        assigned-clock-rates = <24576000>;
        clocks = <&clk IMX8MM_CLK_AUDIO_AHB>, <&clk IMX8MM_CLK_24M>,
                <&clk IMX8MM_CLK_SPDIF1>, <&clk IMX8MM_CLK_DUMMY>,
                <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>,
                <&clk IMX8MM_CLK_AUDIO_AHB>, <&clk IMX8MM_CLK_DUMMY>,
                <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>,
                <&clk IMX8MM_AUDIO_PLL1_OUT>, <&clk IMX8MM_AUDIO_PLL2_OUT>;
        clock-names = "core", "rxtx0", "rxtx1", "rxtx2", "rxtx3",
                "rxtx4", "rxtx5", "rxtx6", "rxtx7", "spba", "pll8k", "pll11k";
        status = "okay";
};

/* USBOTG */
&usbotg1 {
 dr_mode = "otg";
 usb-role-switch;
 status = "okay";

 port {
  usb_hs_ep: endpoint {
   remote-endpoint = <&high_speed_ep>;
  };
 };
};

&usbotg2 {
        dr_mode = "host";
        status = "okay";
};

/* Wifi */
&usdhc1 {
 pinctrl-names = "default", "state_100mhz", "state_200mhz";
 pinctrl-0 = <&pinctrl_usdhc1>, <&pinctrl_usdhc1_gpio>;
 pinctrl-1 = <&pinctrl_usdhc1_100mhz>, <&pinctrl_usdhc1_gpio>;
 pinctrl-2 = <&pinctrl_usdhc1_200mhz>, <&pinctrl_usdhc1_gpio>;
 bus-width = <4>;
 vmmc-supply = <®_wifi_vmmc>;
 cap-power-off-card;
 keep-power-in-suspend;
 non-removable;
 #address-cells = <1>;
 #size-cells = <0>;
 status = "okay";

 wifi: wifi@1 {
  compatible = "brcm,bcm4329-fmac";
  reg = <1>;
  interrupt-parent = <&gpio2>;
  interrupts = <9 IRQ_TYPE_LEVEL_LOW>;
  interrupt-names = "host-wake";
 };
};

/* SD-card */
&usdhc2 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_usdhc2>;
        pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
        pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
        cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
        bus-width = <4>;
        status = "okay";
};

&iomuxc {

 pinctrl_canbus: canbusgrp {
         fsl,pins = <
          MX8MM_IOMUXC_GPIO1_IO14_GPIO1_IO14              0x14
  >;
 };

 pinctrl_ecspi2: ecspi2grp {
  fsl,pins = <
   MX8MM_IOMUXC_ECSPI2_SS0_ECSPI2_SS0    0x82
   MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI  0x82
   MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO  0x82
   MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK  0x82
  >;
 };

 pinctrl_usb_otg: usbotggrp {
  fsl,pins = <
   MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10  0x140   /* otg_id */
   MX8MM_IOMUXC_GPIO1_IO12_GPIO1_IO12  0x19    /* otg_vbus */
  >;
 };

 pinctrl_fec1: fec1grp {
  fsl,pins = <
   MX8MM_IOMUXC_ENET_MDC_ENET1_MDC                 0x3
   MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO               0x3
   MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3           0x1f
   MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2           0x1f
   MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1           0x1f
   MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0           0x1f
   MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3           0x91
   MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2           0x91
   MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1           0x91
   MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0           0x91
   MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC           0x1f
   MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC           0x91
   MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL     0x91
   MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL     0x1f
   MX8MM_IOMUXC_SAI2_RXC_GPIO4_IO22                0x19
  >;
 };

 pinctrl_i2c3: i2c3grp {
         fsl,pins = <
                 MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL                  0x400001c3
                 MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA                  0x400001c3
         >;
 };

 pinctrl_sai3: sai3grp {
         fsl,pins = <
                 MX8MM_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC             0xd6
                 MX8MM_IOMUXC_SAI3_TXC_SAI3_TX_BCLK              0xd6
                 MX8MM_IOMUXC_SAI3_MCLK_SAI3_MCLK                0xd6
                 MX8MM_IOMUXC_SAI3_TXD_SAI3_TX_DATA0             0xd6
                 MX8MM_IOMUXC_SAI3_RXD_SAI3_RX_DATA0             0xd6
         >;
 };

 pinctrl_spdif1: spdif1grp {
         fsl,pins = <
                 MX8MM_IOMUXC_SPDIF_TX_SPDIF1_OUT                0xd6
         >;
 };

 pinctrl_usdhc1: usdhc1grp {
  fsl,pins = <
   MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK                 0x190
   MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD                 0x1d0
   MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0             0x1d0
   MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1             0x1d0
   MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2             0x1d0
   MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3             0x1d0
  >;
 };

 pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp{
  fsl,pins = <
   MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK          0x194
   MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD          0x1d4
   MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0      0x1d4
   MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1      0x1d4
   MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2      0x1d4
   MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3      0x1d4
  >;
 };

 pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
  fsl,pins = <
   MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK          0x196
   MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD          0x1d6
   MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0      0x1d6
   MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1      0x1d6
   MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2      0x1d6
   MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3      0x1d6
  >;
 };

 pinctrl_usdhc1_gpio: usdhc1-gpiogrp {
  fsl,pins = <
   MX8MM_IOMUXC_SD1_RESET_B_GPIO2_IO10             0x41    /* wl_reg_on */
   MX8MM_IOMUXC_SD1_DATA7_GPIO2_IO9                0x41    /* wl_host_wake */
   MX8MM_IOMUXC_GPIO1_IO00_ANAMIX_REF_CLK_32K      0x141   /* LP0: 32KHz */
  >;
 };

 pinctrl_usdhc2: usdhc2grp {
         fsl,pins = <
                 MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK          0x190
                 MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD          0x1d0
                 MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0      0x1d0
                 MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1      0x1d0
                 MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2      0x1d0
                 MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3      0x1d0
         >;
 };

 pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
         fsl,pins = <
                 MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK          0x194
                 MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD          0x1d4
                 MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0      0x1d4
                 MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1      0x1d4
                 MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2      0x1d4
                 MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3      0x1d4
         >;
 };

 pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
         fsl,pins = <
                 MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK          0x196
                 MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD          0x1d6
                 MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0      0x1d6
                 MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1      0x1d6
                 MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2      0x1d6
                 MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3      0x1d6
         >;
 };
};