| Quellcodebibliothek Statistik Leitseite products/Sources/formale Sprachen/C/Linux/arch/arm/boot/dts/nxp/imx/ (Open Source Betriebssystem Version 6.17.9©) Datei vom 24.10.2025 mit Größe 17 kB |
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Quelle imx6qdl-emcon.dtsi Sprache: unbekannt |
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
// // Copyright (C) 2018 emtrion GmbH // #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/pwm/pwm.h> #include <dt-bindings/input/input.h> / { model = "emtrion SoM emCON-MX6"; compatible = "emtrion,emcon-mx6"; aliases { mmc0 = &usdhc3; mmc1 = &usdhc2; mmc2 = &usdhc1; rtc0 = &ds1307; }; chosen { stdout-path = &uart1; }; memory@10000000 { device_type = "memory"; reg = <0x10000000 0x40000000>; }; gpio-keys { compatible = "gpio-keys"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_emcon_wake>; wake { label = "Wake"; linux,code = <KEY_WAKEUP>; gpios = <&gpio3 2 GPIO_ACTIVE_LOW>; wakeup-source; }; }; som_leds: leds { compatible = "gpio-leds"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_som_leds>; led-green { label = "som:green"; gpios = <&gpio3 0 GPIO_ACTIVE_HIGH>; linux,default-trigger = "heartbeat"; default-state = "on"; }; led-red { label = "som:red"; gpios = <&gpio3 1 GPIO_ACTIVE_LOW>; default-state = "keep"; }; }; lvds_backlight: lvds-backlight { compatible = "pwm-backlight"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_lvds_bl>; enable-gpios = <&gpio6 9 GPIO_ACTIVE_HIGH>; pwms = <&pwm1 0 50000 0>; brightness-levels = < 0 4 8 16 32 64 80 96 112 128 144 160 176 250 >; default-brightness-level = <13>; status = "okay"; }; pwm_fan: pwm-fan { compatible = "pwm-fan"; #cooling-cells = <2>; pwms = <&pwm4 0 50000 0>; cooling-levels = <0 64 127 191 255>; status = "disabled"; }; rgb_encoder: display { compatible = "fsl,imx-parallel-display"; #address-cells = <1>; #size-cells = <0>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_rgb24_display>; status = "disabled"; port@0 { reg = <0>; rgb_encoder_in: endpoint { remote-endpoint = <&ipu1_di0_disp0>; }; }; port@1 { reg = <1>; rgb_encoder_out: endpoint { remote-endpoint = <&rgb_panel_in>; }; }; }; rgb_panel: lcd { backlight = <&rgb_backlight>; power-supply = <®_parallel_disp>; port { rgb_panel_in: endpoint { remote-endpoint = <&rgb_encoder_out>; }; }; }; reg_parallel_disp: reg-parallel-display { compatible = "regulator-fixed"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_rgb_bl_en>; regulator-name = "LCD-Supply"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; gpio = <&gpio7 9 GPIO_ACTIVE_HIGH>; enable-active-high; }; reg_lvds_disp: reg-lvds-display { compatible = "regulator-fixed"; regulator-name = "LVDS-Supply"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; gpio = <&gpio7 10 GPIO_ACTIVE_HIGH>; enable-active-high; }; rgb_backlight: rgb-backlight { compatible = "pwm-backlight"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_rgb_bl>; enable-gpios = <&gpio6 8 GPIO_ACTIVE_HIGH>; pwms = <&pwm3 0 5000000 0>; brightness-levels = < 250 176 160 144 128 112 96 80 64 48 32 16 8 1 >; default-brightness-level = <13>; status = "okay"; }; }; &can1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_can1>; }; &can2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_can2>; }; &ecspi2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ecspi2>; cs-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>, <&gpio2 27 GPIO_ACTIVE_LOW>; }; &ecspi4 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_nor_flash>; }; &fec { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii"; phy-reset-gpios = <&gpio5 20 GPIO_ACTIVE_LOW>; phy-reset-duration = <50>; phy-supply = <&vdd_1V8_reg>; phy-handle = <&ksz9031>; status = "okay"; mdio { #address-cells = <1>; #size-cells = <0>; ksz9031: phy@0 { compatible = "ethernet-phy-ieee802.3-c22"; reg = <0>; interrupt-parent = <&gpio1>; interrupts = <30 IRQ_TYPE_EDGE_FALLING>; rxdv-skew-ps = <480>; txen-skew-ps = <480>; rxd0-skew-ps = <480>; rxd1-skew-ps = <480>; rxd2-skew-ps = <480>; rxd3-skew-ps = <480>; txd0-skew-ps = <420>; txd1-skew-ps = <420>; txd2-skew-ps = <360>; txd3-skew-ps = <360>; txc-skew-ps = <1020>; rxc-skew-ps = <960>; }; }; }; &i2c1 { clock-frequency = <100000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c1>; status = "okay"; da9063: pmic@58 { compatible = "dlg,da9063"; reg = <0x58>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pmic>; interrupt-parent = <&gpio2>; interrupts = <8 IRQ_TYPE_LEVEL_LOW>; onkey { compatible = "dlg,da9063-onkey"; wakeup-source; }; watchdog { compatible = "dlg,da9063-watchdog"; timeout-sec = <0>; }; regulators { vddcore_reg: bcore1 { regulator-min-microvolt = <1100000>; regulator-max-microvolt = <1450000>; regulator-ramp-delay = <2>; regulator-name = "DA9063_CORE"; regulator-always-on; }; vddsoc_reg: bcore2 { regulator-min-microvolt = <1100000>; regulator-max-microvolt = <1450000>; regulator-ramp-delay = <2>; regulator-name = "DA9063_SOC"; regulator-always-on; }; vdd_ddr3_reg: bpro { regulator-min-microvolt = <1500000>; regulator-max-microvolt = <1500000>; regulator-ramp-delay = <2>; regulator-always-on; }; vdd_3v3_reg: bperi { regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-ramp-delay = <2>; regulator-always-on; }; vdd_sata_reg: ldo3 { regulator-min-microvolt = <2500000>; regulator-max-microvolt = <2500000>; regulator-always-on; }; vdd_mipi_reg: ldo4 { regulator-min-microvolt = <2500000>; regulator-max-microvolt = <2500000>; regulator-always-on; }; vdd_mx6_snvs_reg: ldo5 { regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-always-on; }; vdd_hdmi_reg: ldo6 { regulator-min-microvolt = <2500000>; regulator-max-microvolt = <2500000>; regulator-always-on; regulator-boot-on; }; vdd_pcie_reg: ldo7 { regulator-min-microvolt = <2500000>; regulator-max-microvolt = <2500000>; regulator-always-on; }; vdd_1V8_reg: ldo8 { regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-always-on; }; vdd_3V3_sdc_reg: ldo9 { regulator-min-microvolt = <1800000>; regulator-max-microvolt = <3300000>; regulator-always-on; }; vdd_1V2_reg: ldo10 { regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; regulator-always-on; }; }; }; ds1307: rtc@68 { compatible = "dallas,ds1307"; reg = <0x68>; }; }; &i2c2 { clock-frequency = <100000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c2>; }; &iomuxc { pinctrl_audmux: audmuxgrp { fsl,pins = < MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x1b060 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x130B0 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x1b060 >; }; pinctrl_can1: can1grp { fsl,pins = < MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b1 MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b1 >; }; pinctrl_can2: can2grp { fsl,pins = < MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x1b0b1 MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b0b1 >; }; pinctrl_cpi1: csi0grp { fsl,pins = < MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0xb0b1 MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC 0x1b0b1 MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC 0x1b0b1 MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x1b0b1 MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x1b0b1 MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x1b0b1 MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x1b0b1 MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x1b0b1 MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x1b0b1 MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0x1b0b1 MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0x1b0b1 >; }; /*camera2-pinctrl is in imx6q-emcon.dtsi or imx6dl-emcon.dtsi*/ pinctrl_ecspi2: ecspi2grp { fsl,pins = < MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1 MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x100b1 MX6QDL_PAD_EIM_OE__ECSPI2_MISO 0x100b1 MX6QDL_PAD_EIM_LBA__GPIO2_IO27 0x100b1 MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x100b1 >; }; pinctrl_emcon_gpio1: emcongpio1grp { fsl,pins = < MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x0b0b1 >; }; pinctrl_emcon_gpio2: emcongpio2grp { fsl,pins = < MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x0b0b1 >; }; pinctrl_emcon_gpio3: emcongpio3grp { fsl,pins = < MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x0b0b1 >; }; pinctrl_emcon_gpio4: emcongpio4grp { fsl,pins = < MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x0b0b1 >; }; pinctrl_emcon_gpio5: emcongpio5grp { fsl,pins = < MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x0b0b1 >; }; pinctrl_emcon_gpio6: emcongpio6grp { fsl,pins = < MX6QDL_PAD_NANDF_D5__GPIO2_IO05 0x0b0b1 >; }; pinctrl_emcon_gpio7: emcongpio7grp { fsl,pins = < MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x0b0b1 >; }; pinctrl_emcon_gpio8: emcongpio8grp { fsl,pins = < MX6QDL_PAD_NANDF_D7__GPIO2_IO07 0x0b0b1 >; }; pinctrl_emcon_irq_a: emconirqagrp { fsl,pins = < MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x0b0b1 >; }; pinctrl_emcon_irq_b: emconirqbgrp { fsl,pins = < MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x0b0b1 >; }; pinctrl_emcon_irq_c: emconirqcgrp { fsl,pins = < MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x0b0b1 >; }; pinctrl_emcon_irq_pwr: emconirqpwrgrp { fsl,pins = < MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x0b0b1 >; }; pinctrl_emcon_wake: emconwakegrp { fsl,pins = < MX6QDL_PAD_EIM_DA2__GPIO3_IO02 0x1b0b1 >; }; pinctrl_enet: enetgrp { fsl,pins = < MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b030 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b030 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x4001a0b1 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x1b058 MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x1b0b0 >; }; pinctrl_i2c1: i2c1grp { fsl,pins = < MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1 MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1 >; }; pinctrl_i2c2: i2c2grp { fsl,pins = < MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 >; }; pinctrl_i2c3: i2c3grp { fsl,pins = < MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4000b070 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b870 >; }; pinctrl_irq_touch1: irqtouch1grp { fsl,pins = < MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x0b0b1 >; }; pinctrl_irq_touch2: irqtouch2grp { fsl,pins = < MX6QDL_PAD_EIM_BCLK__GPIO6_IO31 0x0b0b1 >; }; pinctrl_lvds_bl: lvdsbacklightgrp { fsl,pins = < MX6QDL_PAD_GPIO_9__PWM1_OUT 0x0b0b1 MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09 0x0b0b1 >; }; pinctrl_lvds_reg: lvdsreggrp { fsl,pins = < MX6QDL_PAD_SD4_CLK__GPIO7_IO10 0x0b0b1 >; }; pinctrl_nor_flash: norflashgrp { fsl,pins = < MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x1b0b1 MX6QDL_PAD_EIM_D21__ECSPI4_SCLK 0x100b1 MX6QDL_PAD_EIM_D28__ECSPI4_MOSI 0x100b1 MX6QDL_PAD_EIM_D22__ECSPI4_MISO 0x100b1 MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x100b1 >; }; pinctrl_pcie_ctrl: pciegrp { fsl,pins = < MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x1b0b1 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b1 >; }; pinctrl_pmic: pmicgrp { fsl,pins = < MX6QDL_PAD_SD4_DAT0__GPIO2_IO08 0x0b0b1 >; }; pinctrl_pwm_fan: pwmfangrp { fsl,pins = < MX6QDL_PAD_SD4_DAT2__PWM4_OUT 0x0b0b1 >; }; pinctrl_rgb_bl: rgbbacklightgrp { fsl,pins = < MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x0b0b1 MX6QDL_PAD_NANDF_ALE__GPIO6_IO08 0x0b0b1 >; }; pinctrl_rgb_bl_en: rgbenablegrp { fsl,pins = < MX6QDL_PAD_SD4_CMD__GPIO7_IO09 0x0b0b1 >; }; pinctrl_rgb24_display: rgbgrp { fsl,pins = < MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10 MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10 MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x10 MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10 MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x10 MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x10 MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x10 MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x10 MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x10 MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x10 MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x10 MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x10 MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x10 MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x10 MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x10 MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x10 MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x10 MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x10 >; }; pinctrl_secure: securegrp { fsl,pins = < MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b1 >; }; pinctrl_som_leds: somledgrp { fsl,pins = < MX6QDL_PAD_EIM_DA0__GPIO3_IO00 0x0b0b1 MX6QDL_PAD_EIM_DA1__GPIO3_IO01 0x0b0b1 >; }; pinctrl_spdif_in: spdifingrp { fsl,pins = < MX6QDL_PAD_GPIO_16__SPDIF_IN 0x1b0b0 >; }; pinctrl_spdif_out: spdifoutgrp { fsl,pins = < MX6QDL_PAD_GPIO_19__SPDIF_OUT 0x13091 >; }; pinctrl_uart1: uart1grp { fsl,pins = < MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1 >; }; pinctrl_uart2: uart2grp { fsl,pins = < MX6QDL_PAD_SD4_DAT5__UART2_RTS_B 0x1b0b1 MX6QDL_PAD_SD4_DAT6__UART2_CTS_B 0x1b0b1 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1 MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1 >; }; pinctrl_uart3: uart3grp { fsl,pins = < MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 >; }; pinctrl_uart4: uart4grp { fsl,pins = < MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1 MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1 >; }; pinctrl_uart5: uart5grp { fsl,pins = < MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1 >; }; pinctrl_usb_host1: usbhgrp { fsl,pins = < MX6QDL_PAD_EIM_D31__USB_H1_PWR 0x1B058 MX6QDL_PAD_EIM_D30__USB_H1_OC 0x1B058 >; }; pinctrl_usb_otg: usbotggrp { fsl,pins = < MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059 MX6QDL_PAD_GPIO_7__GPIO1_IO07 0x17059 MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x17059 >; }; pinctrl_usdhc1: usdhc1grp { fsl,pins = < MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059 MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059 MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059 MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059 MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059 MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059 MX6QDL_PAD_GPIO_1__SD1_CD_B 0x1b0b1 MX6QDL_PAD_DI0_PIN4__SD1_WP 0x1b0b1 >; }; pinctrl_usdhc2: usdhc2grp { fsl,pins = < MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 MX6QDL_PAD_GPIO_4__SD2_CD_B 0x1b0b1 MX6QDL_PAD_GPIO_2__SD2_WP 0x1b0b1 >; }; pinctrl_usdhc3: usdhc3grp { fsl,pins = < MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059 MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059 MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059 MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059 MX6QDL_PAD_SD3_RST__SD3_RESET 0x1b0b1 >; }; }; &ipu1_di0_disp0 { remote-endpoint = <&rgb_encoder_in>; }; &pcie { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pcie_ctrl>; reset-gpio = <&gpio7 12 GPIO_ACTIVE_LOW>; disable-gpio = <&gpio2 22 GPIO_ACTIVE_LOW>; }; &pwm1 { status = "okay"; }; &pwm3 { status = "okay"; }; &pwm4 { status = "okay"; }; &uart1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1>; status = "okay"; }; &uart2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart2>; }; &uart3 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart3>; }; &uart4 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart4>; }; &uart5 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart5>; }; &usbh1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usb_host1>; }; &usbotg { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usb_otg>; vbus-supply = <®_usb_otg>; dr_mode = "peripheral"; }; &usdhc1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc1>; fsl,wp-controller; }; &usdhc2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc2>; fsl,wp-controller; }; &usdhc3 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc3>; non-removable; bus-width = <8>; status = "okay"; }; /******device power Management*********/ &cpu0 { voltage-tolerance = <2>; }; ®_arm { vin-supply = <&vddcore_reg>; }; ®_soc { vin-supply = <&vddsoc_reg>; }; ®_pu { vin-supply = <&vddsoc_reg>; }; /*******Disabled HW following***********/ &snvs_rtc { status = "disabled"; }; [ Dauer der Verarbeitung: 0.4 Sekunden (vorverarbeitet) ] |
2026-04-07