/* * Copyright (c) 2016, 2022, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2016, 2020 SAP SE. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License version 2 only, as * published by the Free Software Foundation. * * This code is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License * version 2 for more details (a copy is included in the LICENSE file that * accompanied this code). * * You should have received a copy of the GNU General Public License version * 2 along with this work; if not, write to the Free Software Foundation, * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. * * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA * or visit www.oracle.com if you need additional information or have any * questions. *
*/
// The assumed minimum size of a BranchTableBlock. // The actual size of each block heavily depends on the CPU capabilities and, // of course, on the logic implemented in each block. #ifdef ASSERT #define BTB_MINSIZE 256 #else #define BTB_MINSIZE 64 #endif
#ifdef ASSERT // Macro to open a BranchTableBlock (a piece of code that is branched to by a calculated branch). #define BTB_BEGIN(lbl, alignment, name) \
__ align_address(alignment); \
__ bind(lbl); \
{ unsignedint b_off = __ offset(); \
uintptr_t b_addr = (uintptr_t)__ pc(); \
__ z_larl(Z_R0, (int64_t)0); /* Check current address alignment. */ \
__ z_slgr(Z_R0, br_tab); /* Current Address must be equal */ \
__ z_slgr(Z_R0, flags); /* to calculated branch target. */ \
__ z_brc(Assembler::bcondLogZero, 3); /* skip trap if ok. */ \
__ z_illtrap(0x55); \
guarantee(b_addr%alignment == 0, "bad alignment at begin of block" name);
// Macro to close a BranchTableBlock (a piece of code that is branched to by a calculated branch). #define BTB_END(lbl, alignment, name) \
uintptr_t e_addr = (uintptr_t)__ pc(); \ unsignedint e_off = __ offset(); \ unsignedint len = e_off-b_off; \ if (len > alignment) { \
tty->print_cr("%4d of %4d @ " INTPTR_FORMAT ": Block len for %s", \
len, alignment, e_addr-len, name); \
guarantee(len <= alignment, "block too large"); \
} \
guarantee(len == e_addr-b_addr, "block len mismatch"); \
} #else // Macro to open a BranchTableBlock (a piece of code that is branched to by a calculated branch). #define BTB_BEGIN(lbl, alignment, name) \
__ align_address(alignment); \
__ bind(lbl); \
{ unsignedint b_off = __ offset(); \
uintptr_t b_addr = (uintptr_t)__ pc(); \
guarantee(b_addr%alignment == 0, "bad alignment at begin of block" name);
// Macro to close a BranchTableBlock (a piece of code that is branched to by a calculated branch). #define BTB_END(lbl, alignment, name) \
uintptr_t e_addr = (uintptr_t)__ pc(); \ unsignedint e_off = __ offset(); \ unsignedint len = e_off-b_off; \ if (len > alignment) { \
tty->print_cr("%4d of %4d @ " INTPTR_FORMAT ": Block len for %s", \
len, alignment, e_addr-len, name); \
guarantee(len <= alignment, "block too large"); \
} \
guarantee(len == e_addr-b_addr, "block len mismatch"); \
} #endif// ASSERT
// At top of Java expression stack which may be different than esp(). It // isn't for category 1 objects. staticinline Address at_tos(int slot = 0) { return Address(Z_esp, Interpreter::expr_offset_in_bytes(slot));
}
// Condition conversion static Assembler::branch_condition j_not(TemplateTable::Condition cc) { switch (cc) { case TemplateTable::equal : return Assembler::bcondNotEqual; case TemplateTable::not_equal : return Assembler::bcondEqual; case TemplateTable::less : return Assembler::bcondNotLow; case TemplateTable::less_equal : return Assembler::bcondHigh; case TemplateTable::greater : return Assembler::bcondNotHigh; case TemplateTable::greater_equal: return Assembler::bcondLow;
}
ShouldNotReachHere(); return Assembler::bcondZero;
}
// Do an oop store like *(base + offset) = val // offset can be a register or a constant. staticvoid do_oop_store(InterpreterMacroAssembler* _masm, const Address& addr, Register val, // Noreg means always null. Register tmp1, Register tmp2, Register tmp3,
DecoratorSet decorators) {
assert_different_registers(tmp1, tmp2, tmp3, val, addr.base());
__ store_heap_oop(val, addr, tmp1, tmp2, tmp3, decorators);
}
switch (bc) { case Bytecodes::_fast_aputfield: case Bytecodes::_fast_bputfield: case Bytecodes::_fast_zputfield: case Bytecodes::_fast_cputfield: case Bytecodes::_fast_dputfield: case Bytecodes::_fast_fputfield: case Bytecodes::_fast_iputfield: case Bytecodes::_fast_lputfield: case Bytecodes::_fast_sputfield:
{ // We skip bytecode quickening for putfield instructions when // the put_code written to the constant pool cache is zero. // This is required so that every execution of this instruction // calls out to InterpreterRuntime::resolve_get_put to do // additional, required work.
assert(byte_no == f1_byte || byte_no == f2_byte, "byte_no out of range");
assert(load_bc_into_bc_reg, "we use bc_reg as temp");
__ get_cache_and_index_and_bytecode_at_bcp(Z_R1_scratch, bc_reg,
temp_reg, byte_no, 1);
__ load_const_optimized(bc_reg, bc);
__ compareU32_and_branch(temp_reg, (intptr_t)0,
Assembler::bcondZero, L_patch_done);
} break; default:
assert(byte_no == -1, "sanity"); // The pair bytecodes have already done the load. if (load_bc_into_bc_reg) {
__ load_const_optimized(bc_reg, bc);
} break;
}
if (JvmtiExport::can_post_breakpoint()) {
Label L_fast_patch;
// If a breakpoint is present we can't rewrite the stream directly.
__ z_cli(at_bcp(0), Bytecodes::_breakpoint);
__ z_brne(L_fast_patch);
__ get_method(temp_reg); // Let breakpoint table handling rewrite to quicker bytecode.
__ call_VM_static(noreg,
CAST_FROM_FN_PTR(address, InterpreterRuntime::set_original_bytecode_at),
temp_reg, Z_R13, bc_reg);
__ z_bru(L_patch_done);
__ bind(L_fast_patch);
}
#ifdef ASSERT
NearLabel L_okay;
// We load into 64 bits, since this works on any CPU.
__ z_llgc(temp_reg, at_bcp(0));
__ compareU32_and_branch(temp_reg, Bytecodes::java_code(bc),
Assembler::bcondEqual, L_okay );
__ compareU32_and_branch(temp_reg, bc_reg, Assembler::bcondEqual, L_okay);
__ stop_static("patching the wrong bytecode");
__ bind(L_okay); #endif
void TemplateTable::iconst(int value) {
transition(vtos, itos); // Zero extension of the iconst makes zero extension at runtime obsolete.
__ load_const_optimized(Z_tos, ((unsignedlong)(unsignedint)value));
}
// Get address of type.
__ add2reg_with_index(Raddr_type, tags_offset, RcpIndex, Rtags);
__ z_cli(0, Raddr_type, JVM_CONSTANT_UnresolvedClass);
__ z_bre(call_ldc); // Unresolved class - get the resolved class.
__ z_cli(0, Raddr_type, JVM_CONSTANT_UnresolvedClassInError);
__ z_bre(call_ldc); // Unresolved class in error state - call into runtime // to throw the error from the first resolution attempt.
__ z_cli(0, Raddr_type, JVM_CONSTANT_Class);
__ z_brne(notClass); // Resolved class - need to call vm to get java // mirror of the class.
// We deal with a class. Call vm to do the appropriate.
__ bind(call_ldc);
__ load_const_optimized(Z_ARG2, is_ldc_wide(type) ? 1 : 0);
call_VM(Z_RET, CAST_FROM_FN_PTR(address, InterpreterRuntime::ldc), Z_ARG2);
__ push_ptr(Z_RET);
__ z_bru(Done);
// Not a class.
__ bind(notClass); Register RcpOffset = RcpIndex;
__ z_sllg(RcpOffset, RcpIndex, LogBytesPerWord); // Convert index to offset.
__ z_cli(0, Raddr_type, JVM_CONSTANT_Float);
__ z_brne(notFloat);
// assume the tag is for condy; if not, the VM runtime will tell us
__ bind(notInt);
condy_helper(Done);
__ bind(Done);
}
// Fast path for caching oop constants. // %%% We should use this to handle Class and String constants also. // %%% It will simplify the ldc/primitive path considerably. void TemplateTable::fast_aldc(LdcType type) {
transition(vtos, atos);
constRegister index = Z_tmp_2; int index_size = is_ldc_wide(type) ? sizeof(u2) : sizeof(u1);
Label L_do_resolve, L_resolved;
// We are resolved if the resolved reference cache entry contains a // non-null object (CallSite, etc.).
__ get_cache_index_at_bcp(index, 1, index_size); // Load index.
__ load_resolved_reference_at_index(Z_tos, index);
__ z_ltgr(Z_tos, Z_tos);
__ z_bre(L_do_resolve);
// VMr = obj = base address to find primitive value to push // VMr2 = flags = (tos, off) using format of CPCE::_flags
assert(ConstantPoolCacheEntry::field_index_mask == 0xffff, "or use other instructions");
__ z_llghr(off, flags); const Address field(obj, off);
// What sort of thing are we loading?
__ z_srl(flags, ConstantPoolCacheEntry::tos_state_shift); // Make sure we don't need to mask flags for tos_state after the above shift.
ConstantPoolCacheEntry::verify_tos_state_shift();
switch (bytecode()) { case Bytecodes::_ldc: case Bytecodes::_ldc_w:
{ // tos in (itos, ftos, stos, btos, ctos, ztos)
Label notInt, notFloat, notShort, notByte, notChar, notBool;
__ z_cghi(flags, itos);
__ z_brne(notInt); // itos
__ z_l(Z_tos, field);
__ push(itos);
__ z_bru(Done);
if (RewriteFrequentPairs && rc == may_rewrite) {
NearLabel rewrite, done; constRegister bc = Z_ARG4;
assert(Z_R1_scratch != bc, "register damaged");
// Get next byte.
__ z_llgc(Z_R1_scratch, at_bcp(Bytecodes::length_for (Bytecodes::_iload)));
// If _iload, wait to rewrite to iload2. We only want to rewrite the // last two iloads in a pair. Comparing against fast_iload means that // the next bytecode is neither an iload or a caload, and therefore // an iload pair.
__ compareU32_and_branch(Z_R1_scratch, Bytecodes::_iload,
Assembler::bcondEqual, done);
__ pop_ptr(Z_tmp_2); // Z_tos : index // Z_tmp_2 : array Register index = Z_tos;
index_check(Z_tmp_2, index, LogBytesPerShort); // Load into 64 bits, works on all CPUs.
__ z_llgh(Z_tos,
Address(Z_tmp_2, index, arrayOopDesc::base_offset_in_bytes(T_CHAR)));
}
// Iload followed by caload frequent pair. void TemplateTable::fast_icaload() {
transition(vtos, itos);
// Load index out of locals.
locals_index(Z_R1_scratch);
__ mem2reg_opt(Z_ARG3, iaddress(_masm, Z_R1_scratch), false); // Z_ARG3 : index // Z_tmp_2 : array
__ pop_ptr(Z_tmp_2);
index_check(Z_tmp_2, Z_ARG3, LogBytesPerShort); // Load into 64 bits, works on all CPUs.
__ z_llgh(Z_tos,
Address(Z_tmp_2, Z_ARG3, arrayOopDesc::base_offset_in_bytes(T_CHAR)));
}
// According to bytecode histograms, the pairs: // // _aload_0, _fast_igetfield // _aload_0, _fast_agetfield // _aload_0, _fast_fgetfield // // occur frequently. If RewriteFrequentPairs is set, the (slow) // _aload_0 bytecode checks if the next bytecode is either // _fast_igetfield, _fast_agetfield or _fast_fgetfield and then // rewrites the current bytecode into a pair bytecode; otherwise it // rewrites the current bytecode into _fast_aload_0 that doesn't do // the pair check anymore. // // Note: If the next bytecode is _getfield, the rewrite must be // delayed, otherwise we may miss an opportunity for a pair. // // Also rewrite frequent pairs // aload_0, aload_1 // aload_0, iload_1 // These bytecodes with a small amount of code are most profitable // to rewrite. if (!(RewriteFrequentPairs && (rc == may_rewrite))) {
aload(0); return;
}
NearLabel rewrite, done; constRegister bc = Z_ARG4;
assert(Z_R1_scratch != bc, "register damaged"); // Get next byte.
__ z_llgc(Z_R1_scratch, at_bcp(Bytecodes::length_for (Bytecodes::_aload_0)));
// Do actual aload_0.
aload(0);
// If _getfield then wait with rewrite.
__ compareU32_and_branch(Z_R1_scratch, Bytecodes::_getfield,
Assembler::bcondEqual, done);
// If _igetfield then rewrite to _fast_iaccess_0.
assert(Bytecodes::java_code(Bytecodes::_fast_iaccess_0)
== Bytecodes::_aload_0, "fix bytecode definition");
// If _agetfield then rewrite to _fast_aaccess_0.
assert(Bytecodes::java_code(Bytecodes::_fast_aaccess_0)
== Bytecodes::_aload_0, "fix bytecode definition");
// If _fgetfield then rewrite to _fast_faccess_0.
assert(Bytecodes::java_code(Bytecodes::_fast_faccess_0)
== Bytecodes::_aload_0, "fix bytecode definition");
patch_bytecode(Bytecodes::_aload_0, bc, Z_R1_scratch, false); // Reload local 0 because of VM call inside patch_bytecode(). // this may trigger GC and thus change the oop.
aload(0);
Register index = Z_ARG3; // Index_check expects index in Z_ARG3. // Value is in Z_tos ...
__ pop_i(index); // index
__ pop_ptr(Z_tmp_1); // array
index_check(Z_tmp_1, index, LogBytesPerInt); // ... and then move the value.
__ reg2mem_opt(Z_tos,
Address(Z_tmp_1, index, arrayOopDesc::base_offset_in_bytes(T_INT)), false);
}
// Generate a fast subtype check. Branch to ok_is_subtype if no failure. // Throw if failure. Register tmp1 = Z_tmp_1; Register tmp2 = Z_tmp_2;
__ gen_subtype_check(Rsub_klass, Rsuper_klass, tmp1, tmp2, ok_is_subtype);
// Fall through on failure. // Object is in Rvalue == Z_tos.
assert(Rvalue == Z_tos, "that's the expected location");
__ load_absolute_address(tmp1, Interpreter::_throw_ArrayStoreException_entry);
__ z_br(tmp1);
Register tmp3 = Rsub_klass;
// Have a NULL in Rvalue.
__ bind(is_null);
__ profile_null_seen(tmp1);
// Store a NULL.
do_oop_store(_masm, Address(Rstore_addr, (intptr_t)0), noreg,
tmp3, tmp2, tmp1, IS_ARRAY);
__ z_bru(done);
// Come here on success.
__ bind(ok_is_subtype);
// Now store using the appropriate barrier.
do_oop_store(_masm, Address(Rstore_addr, (intptr_t)0), Rvalue,
tmp3, tmp2, tmp1, IS_ARRAY | IS_NOT_NULL);
__ pop_i(Z_ARG3);
__ pop_ptr(Z_tmp_2); // Z_tos : value // Z_ARG3 : index // Z_tmp_2 : array
// Need to check whether array is boolean or byte // since both types share the bastore bytecode.
__ load_klass(Z_tmp_1, Z_tmp_2);
__ z_llgf(Z_tmp_1, Address(Z_tmp_1, Klass::layout_helper_offset()));
__ z_tmll(Z_tmp_1, Klass::layout_helper_boolean_diffbit());
Label L_skip;
__ z_bfalse(L_skip); // if it is a T_BOOLEAN array, mask the stored value to 0/1
__ z_nilf(Z_tos, 0x1);
__ bind(L_skip);
// No index shift necessary - pass 0.
index_check(Z_tmp_2, Z_ARG3, 0); // Prefer index in Z_ARG3.
__ z_stc(Z_tos,
Address(Z_tmp_2, Z_ARG3, arrayOopDesc::base_offset_in_bytes(T_BYTE)));
}
// stack: ..., a, b
__ load_ptr(0, Z_tos); // load b
__ load_ptr(1, Z_R0_scratch); // load a
__ store_ptr(1, Z_tos); // store b
__ store_ptr(0, Z_R0_scratch); // store a
__ push_ptr(Z_tos); // push b // stack: ..., b, a, b
}
// stack: ..., a, b, c
__ load_ptr(0, Z_R0_scratch); // load c
__ load_ptr(2, Z_R1_scratch); // load a
__ store_ptr(2, Z_R0_scratch); // store c in a
__ push_ptr(Z_R0_scratch); // push c // stack: ..., c, b, c, c
__ load_ptr(2, Z_R0_scratch); // load b
__ store_ptr(2, Z_R1_scratch); // store a in b // stack: ..., c, a, c, c
__ store_ptr(1, Z_R0_scratch); // store b in c // stack: ..., c, a, b, c
}
// stack: ..., a, b
__ load_ptr(1, Z_R0_scratch); // load a
__ push_ptr(Z_R0_scratch); // push a
__ load_ptr(1, Z_R0_scratch); // load b
__ push_ptr(Z_R0_scratch); // push b // stack: ..., a, b, a, b
}
// stack: ..., a, b, c
__ load_ptr(0, Z_R0_scratch); // load c
__ load_ptr(1, Z_R1_scratch); // load b
__ push_ptr(Z_R1_scratch); // push b
__ push_ptr(Z_R0_scratch); // push c // stack: ..., a, b, c, b, c
__ store_ptr(3, Z_R0_scratch); // store c in b // stack: ..., a, c, c, b, c
__ load_ptr( 4, Z_R0_scratch); // load a
__ store_ptr(2, Z_R0_scratch); // store a in 2nd c // stack: ..., a, c, a, b, c
__ store_ptr(4, Z_R1_scratch); // store b in a // stack: ..., b, c, a, b, c
}
// stack: ..., a, b, c, d
__ load_ptr(0, Z_R0_scratch); // load d
__ load_ptr(1, Z_R1_scratch); // load c
__ push_ptr(Z_R1_scratch); // push c
__ push_ptr(Z_R0_scratch); // push d // stack: ..., a, b, c, d, c, d
__ load_ptr(4, Z_R1_scratch); // load b
__ store_ptr(2, Z_R1_scratch); // store b in d
__ store_ptr(4, Z_R0_scratch); // store d in b // stack: ..., a, d, c, b, c, d
__ load_ptr(5, Z_R0_scratch); // load a
__ load_ptr(3, Z_R1_scratch); // load c
__ store_ptr(3, Z_R0_scratch); // store a in c
__ store_ptr(5, Z_R1_scratch); // store c in a // stack: ..., c, d, a, b, c, d
}
// stack: ..., a, b
__ load_ptr(1, Z_R0_scratch); // load a
__ load_ptr(0, Z_R1_scratch); // load b
__ store_ptr(0, Z_R0_scratch); // store a in b
__ store_ptr(1, Z_R1_scratch); // store b in a // stack: ..., b, a
}
__ bind(not_null); // Special case for dividend == 0x8000 and divisor == -1. if (is_ldiv) { // result := Z_tmp_2 := - dividend
__ z_lcgr(Z_tmp_2, Z_tmp_2);
} else { // result remainder := Z_tmp_1 := 0
__ clear_reg(Z_tmp_1, true, false); // Don't set CC.
}
// if divisor == -1 goto done
__ compare64_and_branch(Z_tos, -1, Assembler::bcondEqual, done); if (is_ldiv) // Restore sign, because divisor != -1.
__ z_lcgr(Z_tmp_2, Z_tmp_2);
__ z_dsgr(Z_tmp_1, Z_tos); // Do it.
__ bind(done);
}
// Z_tmp_1 := increment
__ get_2_byte_integer_at_bcp(Z_tmp_1, 4, InterpreterMacroAssembler::Signed); // Z_R1_scratch := index of local to increment
locals_index_wide(Z_tmp_2); // Load, increment, and store.
__ access_local_int(Z_tmp_2, Z_tos);
__ z_agr(Z_tos, Z_tmp_1); // Shifted index is still in Z_tmp_2.
__ reg2mem_opt(Z_tos, Address(Z_locals, Z_tmp_2), false);
}
switch (bytecode()) { case Bytecodes::_i2l: case Bytecodes::_i2f: case Bytecodes::_i2d: case Bytecodes::_i2b: case Bytecodes::_i2c: case Bytecodes::_i2s:
tos_in = itos; break; case Bytecodes::_l2i: case Bytecodes::_l2f: case Bytecodes::_l2d:
tos_in = ltos; break; case Bytecodes::_f2i: case Bytecodes::_f2l: case Bytecodes::_f2d:
tos_in = ftos; break; case Bytecodes::_d2i: case Bytecodes::_d2l: case Bytecodes::_d2f:
tos_in = dtos; break; default :
ShouldNotReachHere();
} switch (bytecode()) { case Bytecodes::_l2i: case Bytecodes::_f2i: case Bytecodes::_d2i: case Bytecodes::_i2b: case Bytecodes::_i2c: case Bytecodes::_i2s:
tos_out = itos; break; case Bytecodes::_i2l: case Bytecodes::_f2l: case Bytecodes::_d2l:
tos_out = ltos; break; case Bytecodes::_i2f: case Bytecodes::_l2f: case Bytecodes::_d2f:
tos_out = ftos; break; case Bytecodes::_i2d: case Bytecodes::_l2d: case Bytecodes::_f2d:
tos_out = dtos; break; default :
ShouldNotReachHere();
}
transition(tos_in, tos_out); #endif// ASSERT
// Conversion
Label done; switch (bytecode()) { case Bytecodes::_i2l:
__ z_lgfr(Z_tos, Z_tos); return; case Bytecodes::_i2f:
__ z_cefbr(Z_ftos, Z_tos); return; case Bytecodes::_i2d:
__ z_cdfbr(Z_ftos, Z_tos); return; case Bytecodes::_i2b: // Sign extend least significant byte.
__ move_reg_if_needed(Z_tos, T_BYTE, Z_tos, T_INT); return; case Bytecodes::_i2c: // Zero extend 2 least significant bytes.
__ move_reg_if_needed(Z_tos, T_CHAR, Z_tos, T_INT); return; case Bytecodes::_i2s: // Sign extend 2 least significant bytes.
__ move_reg_if_needed(Z_tos, T_SHORT, Z_tos, T_INT); return; case Bytecodes::_l2i: // Sign-extend not needed here, upper 4 bytes of int value in register are ignored. return; case Bytecodes::_l2f:
__ z_cegbr(Z_ftos, Z_tos); return; case Bytecodes::_l2d:
__ z_cdgbr(Z_ftos, Z_tos); return; case Bytecodes::_f2i: case Bytecodes::_f2l:
__ clear_reg(Z_tos, true, false); // Don't set CC.
__ z_cebr(Z_ftos, Z_ftos);
__ z_brno(done); // NaN -> 0 if (bytecode() == Bytecodes::_f2i)
__ z_cfebr(Z_tos, Z_ftos, Assembler::to_zero); else// bytecode() == Bytecodes::_f2l
__ z_cgebr(Z_tos, Z_ftos, Assembler::to_zero); break; case Bytecodes::_f2d:
__ move_freg_if_needed(Z_ftos, T_DOUBLE, Z_ftos, T_FLOAT); return; case Bytecodes::_d2i: case Bytecodes::_d2l:
__ clear_reg(Z_tos, true, false); // Ddon't set CC.
__ z_cdbr(Z_ftos, Z_ftos);
__ z_brno(done); // NaN -> 0 if (bytecode() == Bytecodes::_d2i)
__ z_cfdbr(Z_tos, Z_ftos, Assembler::to_zero); else// Bytecodes::_d2l
__ z_cgdbr(Z_tos, Z_ftos, Assembler::to_zero); break; case Bytecodes::_d2f:
__ move_freg_if_needed(Z_ftos, T_FLOAT, Z_ftos, T_DOUBLE); return; default:
ShouldNotReachHere();
}
__ bind(done);
}
if (VM_Version::has_LoadStoreConditional()) {
__ pop_l(val1); // pop value 1.
__ z_lghi(val2, -1); // lt value
__ z_cgr(val1, Z_tos); // Compare with Z_tos (value 2). Protect CC under all circumstances.
__ z_lghi(val1, 1); // gt value
__ z_lghi(Z_tos, 0); // eq value
__ z_locgr(Z_tos, val1, Assembler::bcondHigh);
__ z_locgr(Z_tos, val2, Assembler::bcondLow);
} else {
__ pop_l(val1); // Pop value 1.
__ z_cgr(val1, Z_tos); // Compare with Z_tos (value 2). Protect CC under all circumstances.
__ z_lghi(Z_tos, 0); // eq value
__ z_bre(done);
__ z_lghi(Z_tos, 1); // gt value
__ z_brh(done);
__ z_lghi(Z_tos, -1); // lt value
}
__ bind(done);
}
void TemplateTable::float_cmp(bool is_float, int unordered_result) {
Label done;
// Get (wide) offset to disp. constRegister disp = Z_ARG5; if (is_wide) {
__ get_4_byte_integer_at_bcp(disp, 1);
} else {
__ get_2_byte_integer_at_bcp(disp, 1, InterpreterMacroAssembler::Signed);
}
// Handle all the JSR stuff here, then exit. // It's much shorter and cleaner than intermingling with the // non-JSR normal-branch stuff occurring below. if (is_jsr) { // Compute return address as bci in Z_tos.
__ z_lgr(Z_R1_scratch, Z_bcp);
__ z_sg(Z_R1_scratch, Address(method, Method::const_offset()));
__ add2reg(Z_tos, (is_wide ? 5 : 3) - in_bytes(ConstMethod::codes_offset()), Z_R1_scratch);
// Bump bcp to target of JSR.
__ z_agr(Z_bcp, disp); // Push return address for "ret" on stack.
__ push_ptr(Z_tos); // And away we go!
__ dispatch_next(vtos, 0 , true); return;
}
// Normal (non-jsr) branch handling.
// Bump bytecode pointer by displacement (take the branch).
__ z_agr(Z_bcp, disp);
// Z_RET: osr nmethod (osr ok) or NULL (osr not possible).
__ compare64_and_branch(Z_RET, (intptr_t) 0, Assembler::bcondEqual, dispatch);
// Nmethod may have been invalidated (VM may block upon call_VM return).
__ z_cliy(nmethod::state_offset(), Z_RET, nmethod::in_use);
__ z_brne(dispatch);
// Migrate the interpreter frame off of the stack.
// Assume branch is more often taken than not (loops use backward branches).
NearLabel not_taken;
__ compare32_and_branch(Z_tos, (intptr_t) 0, j_not(cc), not_taken);
branch(false, false);
__ bind(not_taken);
__ profile_not_taken_branch(Z_tos);
}
// Assume branch is more often taken than not (loops use backward branches).
NearLabel not_taken;
__ pop_i(Z_R0_scratch);
__ compare32_and_branch(Z_R0_scratch, Z_tos, j_not(cc), not_taken);
branch(false, false);
__ bind(not_taken);
__ profile_not_taken_branch(Z_tos);
}
// Assume branch is more often taken than not (loops use backward branches) .
NearLabel not_taken;
__ compare64_and_branch(Z_tos, (intptr_t) 0, j_not(cc), not_taken);
branch(false, false);
__ bind(not_taken);
__ profile_not_taken_branch(Z_tos);
}
void TemplateTable::if_acmp(Condition cc) {
transition(atos, vtos); // Assume branch is more often taken than not (loops use backward branches).
NearLabel not_taken;
__ pop_ptr(Z_ARG2);
__ verify_oop(Z_ARG2);
__ verify_oop(Z_tos);
__ compareU64_and_branch(Z_tos, Z_ARG2, j_not(cc), not_taken);
branch(false, false);
__ bind(not_taken);
__ profile_not_taken_branch(Z_ARG3);
}