/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright 2014, Michael Ellerman, IBM Corp.
*/
#include <ppc-asm.h>
.text
FUNC_START(core_busy_loop)
stdu %r1, -168 (%r1)
std r14, 160 (%r1)
std r15, 152 (%r1)
std r16, 144 (%r1)
std r17, 136 (%r1)
std r18, 128 (%r1)
std r19, 120 (%r1)
std r20, 112 (%r1)
std r21, 104 (%r1)
std r22, 96 (%r1)
std r23, 88 (%r1)
std r24, 80 (%r1)
std r25, 72 (%r1)
std r26, 64 (%r1)
std r27, 56 (%r1)
std r28, 48 (%r1)
std r29, 40 (%r1)
std r30, 32 (%r1)
std r31, 24 (%r1)
li r3, 0 x3030
std r3, -96 (%r1)
li r4, 0 x4040
std r4, -104 (%r1)
li r5, 0 x5050
std r5, -112 (%r1)
li r6, 0 x6060
std r6, -120 (%r1)
li r7, 0 x7070
std r7, -128 (%r1)
li r8, 0 x0808
std r8, -136 (%r1)
li r9, 0 x0909
std r9, -144 (%r1)
li r10, 0 x1010
std r10, -152 (%r1)
li r11, 0 x1111
std r11, -160 (%r1)
li r14, 0 x1414
std r14, -168 (%r1)
li r15, 0 x1515
std r15, -176 (%r1)
li r16, 0 x1616
std r16, -184 (%r1)
li r17, 0 x1717
std r17, -192 (%r1)
li r18, 0 x1818
std r18, -200 (%r1)
li r19, 0 x1919
std r19, -208 (%r1)
li r20, 0 x2020
std r20, -216 (%r1)
li r21, 0 x2121
std r21, -224 (%r1)
li r22, 0 x2222
std r22, -232 (%r1)
li r23, 0 x2323
std r23, -240 (%r1)
li r24, 0 x2424
std r24, -248 (%r1)
li r25, 0 x2525
std r25, -256 (%r1)
li r26, 0 x2626
std r26, -264 (%r1)
li r27, 0 x2727
std r27, -272 (%r1)
li r28, 0 x2828
std r28, -280 (%r1)
li r29, 0 x2929
std r29, -288 (%r1)
li r30, 0 x3030
li r31, 0 x3131
li r3, 0
0 : addi r3, r3, 1
cmpwi r3, 100
blt 0 b
/* Return 1 (fail) unless we get through all the checks */
li r3, 1
/* Check none of our registers have been corrupted */
cmpwi r4, 0 x4040
bne 1 f
cmpwi r5, 0 x5050
bne 1 f
cmpwi r6, 0 x6060
bne 1 f
cmpwi r7, 0 x7070
bne 1 f
cmpwi r8, 0 x0808
bne 1 f
cmpwi r9, 0 x0909
bne 1 f
cmpwi r10, 0 x1010
bne 1 f
cmpwi r11, 0 x1111
bne 1 f
cmpwi r14, 0 x1414
bne 1 f
cmpwi r15, 0 x1515
bne 1 f
cmpwi r16, 0 x1616
bne 1 f
cmpwi r17, 0 x1717
bne 1 f
cmpwi r18, 0 x1818
bne 1 f
cmpwi r19, 0 x1919
bne 1 f
cmpwi r20, 0 x2020
bne 1 f
cmpwi r21, 0 x2121
bne 1 f
cmpwi r22, 0 x2222
bne 1 f
cmpwi r23, 0 x2323
bne 1 f
cmpwi r24, 0 x2424
bne 1 f
cmpwi r25, 0 x2525
bne 1 f
cmpwi r26, 0 x2626
bne 1 f
cmpwi r27, 0 x2727
bne 1 f
cmpwi r28, 0 x2828
bne 1 f
cmpwi r29, 0 x2929
bne 1 f
cmpwi r30, 0 x3030
bne 1 f
cmpwi r31, 0 x3131
bne 1 f
/* Load junk into all our registers before we reload them from the stack. */
li r3, 0 xde
li r4, 0 xad
li r5, 0 xbe
li r6, 0 xef
li r7, 0 xde
li r8, 0 xad
li r9, 0 xbe
li r10, 0 xef
li r11, 0 xde
li r14, 0 xad
li r15, 0 xbe
li r16, 0 xef
li r17, 0 xde
li r18, 0 xad
li r19, 0 xbe
li r20, 0 xef
li r21, 0 xde
li r22, 0 xad
li r23, 0 xbe
li r24, 0 xef
li r25, 0 xde
li r26, 0 xad
li r27, 0 xbe
li r28, 0 xef
li r29, 0 xdd
ld r3, -96 (%r1)
cmpwi r3, 0 x3030
bne 1 f
ld r4, -104 (%r1)
cmpwi r4, 0 x4040
bne 1 f
ld r5, -112 (%r1)
cmpwi r5, 0 x5050
bne 1 f
ld r6, -120 (%r1)
cmpwi r6, 0 x6060
bne 1 f
ld r7, -128 (%r1)
cmpwi r7, 0 x7070
bne 1 f
ld r8, -136 (%r1)
cmpwi r8, 0 x0808
bne 1 f
ld r9, -144 (%r1)
cmpwi r9, 0 x0909
bne 1 f
ld r10, -152 (%r1)
cmpwi r10, 0 x1010
bne 1 f
ld r11, -160 (%r1)
cmpwi r11, 0 x1111
bne 1 f
ld r14, -168 (%r1)
cmpwi r14, 0 x1414
bne 1 f
ld r15, -176 (%r1)
cmpwi r15, 0 x1515
bne 1 f
ld r16, -184 (%r1)
cmpwi r16, 0 x1616
bne 1 f
ld r17, -192 (%r1)
cmpwi r17, 0 x1717
bne 1 f
ld r18, -200 (%r1)
cmpwi r18, 0 x1818
bne 1 f
ld r19, -208 (%r1)
cmpwi r19, 0 x1919
bne 1 f
ld r20, -216 (%r1)
cmpwi r20, 0 x2020
bne 1 f
ld r21, -224 (%r1)
cmpwi r21, 0 x2121
bne 1 f
ld r22, -232 (%r1)
cmpwi r22, 0 x2222
bne 1 f
ld r23, -240 (%r1)
cmpwi r23, 0 x2323
bne 1 f
ld r24, -248 (%r1)
cmpwi r24, 0 x2424
bne 1 f
ld r25, -256 (%r1)
cmpwi r25, 0 x2525
bne 1 f
ld r26, -264 (%r1)
cmpwi r26, 0 x2626
bne 1 f
ld r27, -272 (%r1)
cmpwi r27, 0 x2727
bne 1 f
ld r28, -280 (%r1)
cmpwi r28, 0 x2828
bne 1 f
ld r29, -288 (%r1)
cmpwi r29, 0 x2929
bne 1 f
/* Load 0 (success) to return */
li r3, 0
1 : ld r14, 160 (%r1)
ld r15, 152 (%r1)
ld r16, 144 (%r1)
ld r17, 136 (%r1)
ld r18, 128 (%r1)
ld r19, 120 (%r1)
ld r20, 112 (%r1)
ld r21, 104 (%r1)
ld r22, 96 (%r1)
ld r23, 88 (%r1)
ld r24, 80 (%r1)
ld r25, 72 (%r1)
ld r26, 64 (%r1)
ld r27, 56 (%r1)
ld r28, 48 (%r1)
ld r29, 40 (%r1)
ld r30, 32 (%r1)
ld r31, 24 (%r1)
addi %r1, %r1, 168
blr
Messung V0.5 in Prozent C=95 H=88 G=91
¤ Dauer der Verarbeitung: 0.12 Sekunden
(vorverarbeitet am 2026-06-06)
¤
*© Formatika GbR, Deutschland