/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (c) 2017, The Linux Foundation. All rights reserved.
*/
#ifndef QCOM_PHY_QMP_QSERDES_TXRX_V4_H_
#define QCOM_PHY_QMP_QSERDES_TXRX_V4_H_
/* Only for QMP V4 PHY - TX registers */
#define QSERDES_V4_TX_BIST_MODE_LANENO 0 x000
#define QSERDES_V4_TX_BIST_INVERT 0 x004
#define QSERDES_V4_TX_CLKBUF_ENABLE 0 x008
#define QSERDES_V4_TX_TX_EMP_POST1_LVL 0 x00c
#define QSERDES_V4_TX_TX_IDLE_LVL_LARGE_AMP 0 x010
#define QSERDES_V4_TX_TX_DRV_LVL 0 x014
#define QSERDES_V4_TX_TX_DRV_LVL_OFFSET 0 x018
#define QSERDES_V4_TX_RESET_TSYNC_EN 0 x01c
#define QSERDES_V4_TX_PRE_STALL_LDO_BOOST_EN 0 x020
#define QSERDES_V4_TX_TX_BAND 0 x024
#define QSERDES_V4_TX_SLEW_CNTL 0 x028
#define QSERDES_V4_TX_INTERFACE_SELECT 0 x02c
#define QSERDES_V4_TX_LPB_EN 0 x030
#define QSERDES_V4_TX_RES_CODE_LANE_TX 0 x034
#define QSERDES_V4_TX_RES_CODE_LANE_RX 0 x038
#define QSERDES_V4_TX_RES_CODE_LANE_OFFSET_TX 0 x03c
#define QSERDES_V4_TX_RES_CODE_LANE_OFFSET_RX 0 x040
#define QSERDES_V4_TX_PERL_LENGTH1 0 x044
#define QSERDES_V4_TX_PERL_LENGTH2 0 x048
#define QSERDES_V4_TX_SERDES_BYP_EN_OUT 0 x04c
#define QSERDES_V4_TX_DEBUG_BUS_SEL 0 x050
#define QSERDES_V4_TX_TRANSCEIVER_BIAS_EN 0 x054
#define QSERDES_V4_TX_HIGHZ_DRVR_EN 0 x058
#define QSERDES_V4_TX_TX_POL_INV 0 x05c
#define QSERDES_V4_TX_PARRATE_REC_DETECT_IDLE_EN 0 x060
#define QSERDES_V4_TX_BIST_PATTERN1 0 x064
#define QSERDES_V4_TX_BIST_PATTERN2 0 x068
#define QSERDES_V4_TX_BIST_PATTERN3 0 x06c
#define QSERDES_V4_TX_BIST_PATTERN4 0 x070
#define QSERDES_V4_TX_BIST_PATTERN5 0 x074
#define QSERDES_V4_TX_BIST_PATTERN6 0 x078
#define QSERDES_V4_TX_BIST_PATTERN7 0 x07c
#define QSERDES_V4_TX_BIST_PATTERN8 0 x080
#define QSERDES_V4_TX_LANE_MODE_1 0 x084
#define QSERDES_V4_TX_LANE_MODE_2 0 x088
#define QSERDES_V4_TX_LANE_MODE_3 0 x08c
#define QSERDES_V4_TX_ATB_SEL1 0 x090
#define QSERDES_V4_TX_ATB_SEL2 0 x094
#define QSERDES_V4_TX_RCV_DETECT_LVL 0 x098
#define QSERDES_V4_TX_RCV_DETECT_LVL_2 0 x09c
#define QSERDES_V4_TX_PRBS_SEED1 0 x0a0
#define QSERDES_V4_TX_PRBS_SEED2 0 x0a4
#define QSERDES_V4_TX_PRBS_SEED3 0 x0a8
#define QSERDES_V4_TX_PRBS_SEED4 0 x0ac
#define QSERDES_V4_TX_RESET_GEN 0 x0b0
#define QSERDES_V4_TX_RESET_GEN_MUXES 0 x0b4
#define QSERDES_V4_TX_TRAN_DRVR_EMP_EN 0 x0b8
#define QSERDES_V4_TX_TX_INTERFACE_MODE 0 x0bc
#define QSERDES_V4_TX_PWM_CTRL 0 x0c0
#define QSERDES_V4_TX_PWM_ENCODED_OR_DATA 0 x0c4
#define QSERDES_V4_TX_PWM_GEAR_1_DIVIDER_BAND2 0 x0c8
#define QSERDES_V4_TX_PWM_GEAR_2_DIVIDER_BAND2 0 x0cc
#define QSERDES_V4_TX_PWM_GEAR_3_DIVIDER_BAND2 0 x0d0
#define QSERDES_V4_TX_PWM_GEAR_4_DIVIDER_BAND2 0 x0d4
#define QSERDES_V4_TX_PWM_GEAR_1_DIVIDER_BAND0_1 0 x0d8
#define QSERDES_V4_TX_PWM_GEAR_2_DIVIDER_BAND0_1 0 x0dc
#define QSERDES_V4_TX_PWM_GEAR_3_DIVIDER_BAND0_1 0 x0e0
#define QSERDES_V4_TX_PWM_GEAR_4_DIVIDER_BAND0_1 0 x0e4
#define QSERDES_V4_TX_VMODE_CTRL1 0 x0e8
#define QSERDES_V4_TX_ALOG_OBSV_BUS_CTRL_1 0 x0ec
#define QSERDES_V4_TX_BIST_STATUS 0 x0f0
#define QSERDES_V4_TX_BIST_ERROR_COUNT1 0 x0f4
#define QSERDES_V4_TX_BIST_ERROR_COUNT2 0 x0f8
#define QSERDES_V4_TX_ALOG_OBSV_BUS_STATUS_1 0 x0fc
#define QSERDES_V4_TX_LANE_DIG_CONFIG 0 x100
#define QSERDES_V4_TX_PI_QEC_CTRL 0 x104
#define QSERDES_V4_TX_PRE_EMPH 0 x108
#define QSERDES_V4_TX_SW_RESET 0 x10c
#define QSERDES_V4_TX_DCC_OFFSET 0 x110
#define QSERDES_V4_TX_DIG_BKUP_CTRL 0 x114
#define QSERDES_V4_TX_DEBUG_BUS0 0 x118
#define QSERDES_V4_TX_DEBUG_BUS1 0 x11c
#define QSERDES_V4_TX_DEBUG_BUS2 0 x120
#define QSERDES_V4_TX_DEBUG_BUS3 0 x124
#define QSERDES_V4_TX_READ_EQCODE 0 x128
#define QSERDES_V4_TX_READ_OFFSETCODE 0 x12c
#define QSERDES_V4_TX_IA_ERROR_COUNTER_LOW 0 x130
#define QSERDES_V4_TX_IA_ERROR_COUNTER_HIGH 0 x134
#define QSERDES_V4_TX_VGA_READ_CODE 0 x138
#define QSERDES_V4_TX_VTH_READ_CODE 0 x13c
#define QSERDES_V4_TX_DFE_TAP1_READ_CODE 0 x140
#define QSERDES_V4_TX_DFE_TAP2_READ_CODE 0 x144
#define QSERDES_V4_TX_IDAC_STATUS_I 0 x148
#define QSERDES_V4_TX_IDAC_STATUS_IBAR 0 x14c
#define QSERDES_V4_TX_IDAC_STATUS_Q 0 x150
#define QSERDES_V4_TX_IDAC_STATUS_QBAR 0 x154
#define QSERDES_V4_TX_IDAC_STATUS_A 0 x158
#define QSERDES_V4_TX_IDAC_STATUS_ABAR 0 x15c
#define QSERDES_V4_TX_IDAC_STATUS_SM_ON 0 x160
#define QSERDES_V4_TX_IDAC_STATUS_CAL_DONE 0 x164
#define QSERDES_V4_TX_IDAC_STATUS_SIGNERROR 0 x168
#define QSERDES_V4_TX_DCC_CAL_STATUS 0 x16c
/* Only for QMP V4 PHY - RX registers */
#define QSERDES_V4_RX_UCDR_FO_GAIN_HALF 0 x000
#define QSERDES_V4_RX_UCDR_FO_GAIN_QUARTER 0 x004
#define QSERDES_V4_RX_UCDR_FO_GAIN 0 x008
#define QSERDES_V4_RX_UCDR_SO_GAIN_HALF 0 x00c
#define QSERDES_V4_RX_UCDR_SO_GAIN_QUARTER 0 x010
#define QSERDES_V4_RX_UCDR_SO_GAIN 0 x014
#define QSERDES_V4_RX_UCDR_SVS_FO_GAIN_HALF 0 x018
#define QSERDES_V4_RX_UCDR_SVS_FO_GAIN_QUARTER 0 x01c
#define QSERDES_V4_RX_UCDR_SVS_FO_GAIN 0 x020
#define QSERDES_V4_RX_UCDR_SVS_SO_GAIN_HALF 0 x024
#define QSERDES_V4_RX_UCDR_SVS_SO_GAIN_QUARTER 0 x028
#define QSERDES_V4_RX_UCDR_SVS_SO_GAIN 0 x02c
#define QSERDES_V4_RX_UCDR_FASTLOCK_FO_GAIN 0 x030
#define QSERDES_V4_RX_UCDR_SO_SATURATION_AND_ENABLE 0 x034
#define QSERDES_V4_RX_UCDR_FO_TO_SO_DELAY 0 x038
#define QSERDES_V4_RX_UCDR_FASTLOCK_COUNT_LOW 0 x03c
#define QSERDES_V4_RX_UCDR_FASTLOCK_COUNT_HIGH 0 x040
#define QSERDES_V4_RX_UCDR_PI_CONTROLS 0 x044
#define QSERDES_V4_RX_UCDR_PI_CTRL2 0 x048
#define QSERDES_V4_RX_UCDR_SB2_THRESH1 0 x04c
#define QSERDES_V4_RX_UCDR_SB2_THRESH2 0 x050
#define QSERDES_V4_RX_UCDR_SB2_GAIN1 0 x054
#define QSERDES_V4_RX_UCDR_SB2_GAIN2 0 x058
#define QSERDES_V4_RX_AUX_CONTROL 0 x05c
#define QSERDES_V4_RX_AUX_DATA_TCOARSE_TFINE 0 x060
#define QSERDES_V4_RX_RCLK_AUXDATA_SEL 0 x064
#define QSERDES_V4_RX_AC_JTAG_ENABLE 0 x068
#define QSERDES_V4_RX_AC_JTAG_INITP 0 x06c
#define QSERDES_V4_RX_AC_JTAG_INITN 0 x070
#define QSERDES_V4_RX_AC_JTAG_LVL 0 x074
#define QSERDES_V4_RX_AC_JTAG_MODE 0 x078
#define QSERDES_V4_RX_AC_JTAG_RESET 0 x07c
#define QSERDES_V4_RX_RX_TERM_BW 0 x080
#define QSERDES_V4_RX_RX_RCVR_IQ_EN 0 x084
#define QSERDES_V4_RX_RX_IDAC_I_DC_OFFSETS 0 x088
#define QSERDES_V4_RX_RX_IDAC_IBAR_DC_OFFSETS 0 x08c
#define QSERDES_V4_RX_RX_IDAC_Q_DC_OFFSETS 0 x090
#define QSERDES_V4_RX_RX_IDAC_QBAR_DC_OFFSETS 0 x094
#define QSERDES_V4_RX_RX_IDAC_A_DC_OFFSETS 0 x098
#define QSERDES_V4_RX_RX_IDAC_ABAR_DC_OFFSETS 0 x09c
#define QSERDES_V4_RX_RX_IDAC_EN 0 x0a0
#define QSERDES_V4_RX_RX_IDAC_ENABLES 0 x0a4
#define QSERDES_V4_RX_RX_IDAC_SIGN 0 x0a8
#define QSERDES_V4_RX_RX_HIGHZ_HIGHRATE 0 x0ac
#define QSERDES_V4_RX_RX_TERM_AC_BYPASS_DC_COUPLE_OFFSET 0 x0b0
#define QSERDES_V4_RX_DFE_1 0 x0b4
#define QSERDES_V4_RX_DFE_2 0 x0b8
#define QSERDES_V4_RX_DFE_3 0 x0bc
#define QSERDES_V4_RX_DFE_4 0 x0c0
#define QSERDES_V4_RX_TX_ADAPT_PRE_THRESH1 0 x0c4
#define QSERDES_V4_RX_TX_ADAPT_PRE_THRESH2 0 x0c8
#define QSERDES_V4_RX_TX_ADAPT_POST_THRESH 0 x0cc
#define QSERDES_V4_RX_TX_ADAPT_MAIN_THRESH 0 x0d0
#define QSERDES_V4_RX_VGA_CAL_CNTRL1 0 x0d4
#define QSERDES_V4_RX_VGA_CAL_CNTRL2 0 x0d8
#define QSERDES_V4_RX_GM_CAL 0 x0dc
#define QSERDES_V4_RX_RX_VGA_GAIN2_LSB 0 x0e0
#define QSERDES_V4_RX_RX_VGA_GAIN2_MSB 0 x0e4
#define QSERDES_V4_RX_RX_EQU_ADAPTOR_CNTRL1 0 x0e8
#define QSERDES_V4_RX_RX_EQU_ADAPTOR_CNTRL2 0 x0ec
#define QSERDES_V4_RX_RX_EQU_ADAPTOR_CNTRL3 0 x0f0
#define QSERDES_V4_RX_RX_EQU_ADAPTOR_CNTRL4 0 x0f4
#define QSERDES_V4_RX_RX_IDAC_TSETTLE_LOW 0 x0f8
#define QSERDES_V4_RX_RX_IDAC_TSETTLE_HIGH 0 x0fc
#define QSERDES_V4_RX_RX_IDAC_MEASURE_TIME 0 x100
#define QSERDES_V4_RX_RX_IDAC_ACCUMULATOR 0 x104
#define QSERDES_V4_RX_RX_EQ_OFFSET_LSB 0 x108
#define QSERDES_V4_RX_RX_EQ_OFFSET_MSB 0 x10c
#define QSERDES_V4_RX_RX_EQ_OFFSET_ADAPTOR_CNTRL1 0 x110
#define QSERDES_V4_RX_RX_OFFSET_ADAPTOR_CNTRL2 0 x114
#define QSERDES_V4_RX_SIGDET_ENABLES 0 x118
#define QSERDES_V4_RX_SIGDET_CNTRL 0 x11c
#define QSERDES_V4_RX_SIGDET_LVL 0 x120
#define QSERDES_V4_RX_SIGDET_DEGLITCH_CNTRL 0 x124
#define QSERDES_V4_RX_RX_BAND 0 x128
#define QSERDES_V4_RX_CDR_FREEZE_UP_DN 0 x12c
#define QSERDES_V4_RX_CDR_RESET_OVERRIDE 0 x130
#define QSERDES_V4_RX_RX_INTERFACE_MODE 0 x134
#define QSERDES_V4_RX_JITTER_GEN_MODE 0 x138
#define QSERDES_V4_RX_SJ_AMP1 0 x13c
#define QSERDES_V4_RX_SJ_AMP2 0 x140
#define QSERDES_V4_RX_SJ_PER1 0 x144
#define QSERDES_V4_RX_SJ_PER2 0 x148
#define QSERDES_V4_RX_PPM_OFFSET1 0 x14c
#define QSERDES_V4_RX_PPM_OFFSET2 0 x150
#define QSERDES_V4_RX_SIGN_PPM_PERIOD1 0 x154
#define QSERDES_V4_RX_SIGN_PPM_PERIOD2 0 x158
#define QSERDES_V4_RX_RX_PWM_ENABLE_AND_DATA 0 x15c
#define QSERDES_V4_RX_RX_PWM_GEAR1_TIMEOUT_COUNT 0 x160
#define QSERDES_V4_RX_RX_PWM_GEAR2_TIMEOUT_COUNT 0 x164
#define QSERDES_V4_RX_RX_PWM_GEAR3_TIMEOUT_COUNT 0 x168
#define QSERDES_V4_RX_RX_PWM_GEAR4_TIMEOUT_COUNT 0 x16c
#define QSERDES_V4_RX_RX_MODE_00_LOW 0 x170
#define QSERDES_V4_RX_RX_MODE_00_HIGH 0 x174
#define QSERDES_V4_RX_RX_MODE_00_HIGH2 0 x178
#define QSERDES_V4_RX_RX_MODE_00_HIGH3 0 x17c
#define QSERDES_V4_RX_RX_MODE_00_HIGH4 0 x180
#define QSERDES_V4_RX_RX_MODE_01_LOW 0 x184
#define QSERDES_V4_RX_RX_MODE_01_HIGH 0 x188
#define QSERDES_V4_RX_RX_MODE_01_HIGH2 0 x18c
#define QSERDES_V4_RX_RX_MODE_01_HIGH3 0 x190
#define QSERDES_V4_RX_RX_MODE_01_HIGH4 0 x194
#define QSERDES_V4_RX_RX_MODE_10_LOW 0 x198
#define QSERDES_V4_RX_RX_MODE_10_HIGH 0 x19c
#define QSERDES_V4_RX_RX_MODE_10_HIGH2 0 x1a0
#define QSERDES_V4_RX_RX_MODE_10_HIGH3 0 x1a4
#define QSERDES_V4_RX_RX_MODE_10_HIGH4 0 x1a8
#define QSERDES_V4_RX_PHPRE_CTRL 0 x1ac
#define QSERDES_V4_RX_PHPRE_INITVAL 0 x1b0
#define QSERDES_V4_RX_DFE_EN_TIMER 0 x1b4
#define QSERDES_V4_RX_DFE_CTLE_POST_CAL_OFFSET 0 x1b8
#define QSERDES_V4_RX_DCC_CTRL1 0 x1bc
#define QSERDES_V4_RX_DCC_CTRL2 0 x1c0
#define QSERDES_V4_RX_VTH_CODE 0 x1c4
#define QSERDES_V4_RX_VTH_MIN_THRESH 0 x1c8
#define QSERDES_V4_RX_VTH_MAX_THRESH 0 x1cc
#define QSERDES_V4_RX_ALOG_OBSV_BUS_CTRL_1 0 x1d0
#define QSERDES_V4_RX_PI_CTRL1 0 x1d4
#define QSERDES_V4_RX_PI_CTRL2 0 x1d8
#define QSERDES_V4_RX_PI_QUAD 0 x1dc
#define QSERDES_V4_RX_IDATA1 0 x1e0
#define QSERDES_V4_RX_IDATA2 0 x1e4
#define QSERDES_V4_RX_AUX_DATA1 0 x1e8
#define QSERDES_V4_RX_AUX_DATA2 0 x1ec
#define QSERDES_V4_RX_AC_JTAG_OUTP 0 x1f0
#define QSERDES_V4_RX_AC_JTAG_OUTN 0 x1f4
#define QSERDES_V4_RX_RX_SIGDET 0 x1f8
#define QSERDES_V4_RX_ALOG_OBSV_BUS_STATUS_1 0 x1fc
#endif
Messung V0.5 in Prozent C=95 H=96 G=95
¤ Dauer der Verarbeitung: 0.0 Sekunden
(vorverarbeitet am 2026-06-07)
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