/* SPDX-License-Identifier: BSD-3-Clause-Clear */
/*
* Copyright ( c ) 2020 - 2021 The Linux Foundation . All rights reserved .
* Copyright ( c ) 2021 - 2022 , 2024 Qualcomm Innovation Center , Inc . All rights reserved .
*/
#ifndef _ATH12K_MHI_H
#define _ATH12K_MHI_H
#include "pci.h"
#define PCIE_TXVECDB 0 x360
#define PCIE_TXVECSTATUS 0 x368
#define PCIE_RXVECDB 0 x394
#define PCIE_RXVECSTATUS 0 x39C
#define MHISTATUS 0 x48
#define MHICTRL 0 x38
#define MHICTRL_RESET_MASK 0 x2
enum ath12k_mhi_state {
ATH12K_MHI_INIT,
ATH12K_MHI_DEINIT,
ATH12K_MHI_POWER_ON,
ATH12K_MHI_POWER_OFF,
ATH12K_MHI_POWER_OFF_KEEP_DEV,
ATH12K_MHI_FORCE_POWER_OFF,
ATH12K_MHI_SUSPEND,
ATH12K_MHI_RESUME,
ATH12K_MHI_TRIGGER_RDDM,
ATH12K_MHI_RDDM,
ATH12K_MHI_RDDM_DONE,
};
extern const struct mhi_controller_config ath12k_mhi_config_qcn9274;
extern const struct mhi_controller_config ath12k_mhi_config_wcn7850;
int ath12k_mhi_start(struct ath12k_pci *ar_pci);
void ath12k_mhi_stop(struct ath12k_pci *ar_pci, bool is_suspend);
int ath12k_mhi_register(struct ath12k_pci *ar_pci);
void ath12k_mhi_unregister(struct ath12k_pci *ar_pci);
void ath12k_mhi_set_mhictrl_reset(struct ath12k_base *ab);
void ath12k_mhi_clear_vector(struct ath12k_base *ab);
void ath12k_mhi_suspend(struct ath12k_pci *ar_pci);
void ath12k_mhi_resume(struct ath12k_pci *ar_pci);
void ath12k_mhi_coredump(struct mhi_controller *mhi_ctrl, bool in_panic);
#endif
Messung V0.5 in Prozent C=96 H=100 G=97
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(vorverarbeitet am 2026-10-02)
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