/*
* Copyright ( C ) 2010 Francisco Jerez .
* All Rights Reserved .
*
* Permission is hereby granted , free of charge , to any person obtaining
* a copy of this software and associated documentation files ( the
* " Software " ) , to deal in the Software without restriction , including
* without limitation the rights to use , copy , modify , merge , publish ,
* distribute , sublicense , and / or sell copies of the Software , and to
* permit persons to whom the Software is furnished to do so , subject to
* the following conditions :
*
* The above copyright notice and this permission notice ( including the
* next paragraph ) shall be included in all copies or substantial
* portions of the Software .
*
* THE SOFTWARE IS PROVIDED " AS IS " , WITHOUT WARRANTY OF ANY KIND ,
* EXPRESS OR IMPLIED , INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY , FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT .
* IN NO EVENT SHALL THE COPYRIGHT OWNER ( S ) AND / OR ITS SUPPLIERS BE
* LIABLE FOR ANY CLAIM , DAMAGES OR OTHER LIABILITY , WHETHER IN AN ACTION
* OF CONTRACT , TORT OR OTHERWISE , ARISING FROM , OUT OF OR IN CONNECTION
* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE .
*
*/
#include "nv04.h"
#include "fbmem.h"
#include <subdev/bios.h>
#include <subdev/bios/init.h>
static void
nv10_devinit_meminit(struct nvkm_devinit *init)
{
struct nvkm_subdev *subdev = &init->subdev;
struct nvkm_device *device = subdev->device;
static const int mem_width[] = { 0 x10, 0 x00, 0 x20 };
int mem_width_count;
uint32_t patt = 0 xdeadbeef;
struct io_mapping *fb;
int i, j, k;
if (device->card_type >= NV_11 && device->chipset >= 0 x17)
mem_width_count = 3 ;
else
mem_width_count = 2 ;
/* Map the framebuffer aperture */
fb = fbmem_init(device);
if (!fb) {
nvkm_error(subdev, "failed to map fb\n" );
return ;
}
nvkm_wr32(device, NV10_PFB_REFCTRL, NV10_PFB_REFCTRL_VALID_1);
/* Probe memory bus width */
for (i = 0 ; i < mem_width_count; i++) {
nvkm_mask(device, NV04_PFB_CFG0, 0 x30, mem_width[i]);
for (j = 0 ; j < 4 ; j++) {
for (k = 0 ; k < 4 ; k++)
fbmem_poke(fb, 0 x1c, 0 );
fbmem_poke(fb, 0 x1c, patt);
fbmem_poke(fb, 0 x3c, 0 );
if (fbmem_peek(fb, 0 x1c) == patt)
goto mem_width_found;
}
}
mem_width_found:
patt <<= 1 ;
/* Probe amount of installed memory */
for (i = 0 ; i < 4 ; i++) {
int off = nvkm_rd32(device, 0 x10020c) - 0 x100000;
fbmem_poke(fb, off, patt);
fbmem_poke(fb, 0 , 0 );
fbmem_peek(fb, 0 );
fbmem_peek(fb, 0 );
fbmem_peek(fb, 0 );
fbmem_peek(fb, 0 );
if (fbmem_peek(fb, off) == patt)
goto amount_found;
}
/* IC missing - disable the upper half memory space. */
nvkm_mask(device, NV04_PFB_CFG0, 0 x1000, 0 );
amount_found:
fbmem_fini(fb);
}
static const struct nvkm_devinit_func
nv10_devinit = {
.dtor = nv04_devinit_dtor,
.preinit = nv04_devinit_preinit,
.post = nv04_devinit_post,
.meminit = nv10_devinit_meminit,
.pll_set = nv04_devinit_pll_set,
};
int
nv10_devinit_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
struct nvkm_devinit **pinit)
{
return nv04_devinit_new_(&nv10_devinit, device, type, inst, pinit);
}
Messung V0.5 in Prozent C=96 H=64 G=81
¤ Dauer der Verarbeitung: 0.9 Sekunden
(vorverarbeitet am 2026-10-07)
¤
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