/*
*
* Copyright (C) 2016 Advanced Micro Devices, Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included
* in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
* AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#ifndef GFX_6_0_D_H
#define GFX_6_0_D_H
#define ixCLIPPER_DEBUG_REG00 0 x0000
#define ixCLIPPER_DEBUG_REG01 0 x0001
#define ixCLIPPER_DEBUG_REG02 0 x0002
#define ixCLIPPER_DEBUG_REG03 0 x0003
#define ixCLIPPER_DEBUG_REG04 0 x0004
#define ixCLIPPER_DEBUG_REG05 0 x0005
#define ixCLIPPER_DEBUG_REG06 0 x0006
#define ixCLIPPER_DEBUG_REG07 0 x0007
#define ixCLIPPER_DEBUG_REG08 0 x0008
#define ixCLIPPER_DEBUG_REG09 0 x0009
#define ixCLIPPER_DEBUG_REG10 0 x000A
#define ixCLIPPER_DEBUG_REG11 0 x000B
#define ixCLIPPER_DEBUG_REG12 0 x000C
#define ixCLIPPER_DEBUG_REG13 0 x000D
#define ixCLIPPER_DEBUG_REG14 0 x000E
#define ixCLIPPER_DEBUG_REG15 0 x000F
#define ixCLIPPER_DEBUG_REG16 0 x0010
#define ixCLIPPER_DEBUG_REG17 0 x0011
#define ixCLIPPER_DEBUG_REG18 0 x0012
#define ixCLIPPER_DEBUG_REG19 0 x0013
#define ixGDS_DEBUG_REG0 0 x0000
#define ixGDS_DEBUG_REG1 0 x0001
#define ixGDS_DEBUG_REG2 0 x0002
#define ixGDS_DEBUG_REG3 0 x0003
#define ixGDS_DEBUG_REG4 0 x0004
#define ixGDS_DEBUG_REG5 0 x0005
#define ixGDS_DEBUG_REG6 0 x0006
#define ixIA_DEBUG_REG0 0 x0000
#define ixIA_DEBUG_REG1 0 x0001
#define ixIA_DEBUG_REG2 0 x0002
#define ixIA_DEBUG_REG3 0 x0003
#define ixIA_DEBUG_REG4 0 x0004
#define ixIA_DEBUG_REG5 0 x0005
#define ixIA_DEBUG_REG6 0 x0006
#define ixIA_DEBUG_REG7 0 x0007
#define ixIA_DEBUG_REG8 0 x0008
#define ixIA_DEBUG_REG9 0 x0009
#define ixPA_SC_DEBUG_REG0 0 x0000
#define ixPA_SC_DEBUG_REG1 0 x0001
#define ixSETUP_DEBUG_REG0 0 x0018
#define ixSETUP_DEBUG_REG1 0 x0019
#define ixSETUP_DEBUG_REG2 0 x001A
#define ixSETUP_DEBUG_REG3 0 x001B
#define ixSETUP_DEBUG_REG4 0 x001C
#define ixSETUP_DEBUG_REG5 0 x001D
#define ixSQ_DEBUG_CTRL_LOCAL 0 x0009
#define ixSQ_DEBUG_STS_LOCAL 0 x0008
#define ixSQ_INTERRUPT_WORD_AUTO 0 x20C0
#define ixSQ_INTERRUPT_WORD_CMN 0 x20C0
#define ixSQ_INTERRUPT_WORD_WAVE 0 x20C0
#define ixSQ_WAVE_EXEC_HI 0 x027F
#define ixSQ_WAVE_EXEC_LO 0 x027E
#define ixSQ_WAVE_GPR_ALLOC 0 x0015
#define ixSQ_WAVE_HW_ID 0 x0014
#define ixSQ_WAVE_IB_DBG0 0 x001C
#define ixSQ_WAVE_IB_STS 0 x0017
#define ixSQ_WAVE_INST_DW0 0 x001A
#define ixSQ_WAVE_INST_DW1 0 x001B
#define ixSQ_WAVE_LDS_ALLOC 0 x0016
#define ixSQ_WAVE_M0 0 x027C
#define ixSQ_WAVE_MODE 0 x0011
#define ixSQ_WAVE_PC_HI 0 x0019
#define ixSQ_WAVE_PC_LO 0 x0018
#define ixSQ_WAVE_STATUS 0 x0012
#define ixSQ_WAVE_TBA_HI 0 x026D
#define ixSQ_WAVE_TBA_LO 0 x026C
#define ixSQ_WAVE_TMA_HI 0 x026F
#define ixSQ_WAVE_TMA_LO 0 x026E
#define ixSQ_WAVE_TRAPSTS 0 x0013
#define ixSQ_WAVE_TTMP0 0 x0270
#define ixSQ_WAVE_TTMP10 0 x027A
#define ixSQ_WAVE_TTMP1 0 x0271
#define ixSQ_WAVE_TTMP11 0 x027B
#define ixSQ_WAVE_TTMP2 0 x0272
#define ixSQ_WAVE_TTMP3 0 x0273
#define ixSQ_WAVE_TTMP4 0 x0274
#define ixSQ_WAVE_TTMP5 0 x0275
#define ixSQ_WAVE_TTMP6 0 x0276
#define ixSQ_WAVE_TTMP7 0 x0277
#define ixSQ_WAVE_TTMP8 0 x0278
#define ixSQ_WAVE_TTMP9 0 x0279
#define ixSXIFCCG_DEBUG_REG0 0 x0014
#define ixSXIFCCG_DEBUG_REG1 0 x0015
#define ixSXIFCCG_DEBUG_REG2 0 x0016
#define ixSXIFCCG_DEBUG_REG3 0 x0017
#define ixVGT_DEBUG_REG0 0 x0000
#define ixVGT_DEBUG_REG10 0 x000A
#define ixVGT_DEBUG_REG1 0 x0001
#define ixVGT_DEBUG_REG11 0 x000B
#define ixVGT_DEBUG_REG12 0 x000C
#define ixVGT_DEBUG_REG13 0 x000D
#define ixVGT_DEBUG_REG14 0 x000E
#define ixVGT_DEBUG_REG15 0 x000F
#define ixVGT_DEBUG_REG16 0 x0010
#define ixVGT_DEBUG_REG17 0 x0011
#define ixVGT_DEBUG_REG18 0 x0012
#define ixVGT_DEBUG_REG19 0 x0013
#define ixVGT_DEBUG_REG20 0 x0014
#define ixVGT_DEBUG_REG2 0 x0002
#define ixVGT_DEBUG_REG21 0 x0015
#define ixVGT_DEBUG_REG22 0 x0016
#define ixVGT_DEBUG_REG23 0 x0017
#define ixVGT_DEBUG_REG24 0 x0018
#define ixVGT_DEBUG_REG25 0 x0019
#define ixVGT_DEBUG_REG26 0 x001A
#define ixVGT_DEBUG_REG27 0 x001B
#define ixVGT_DEBUG_REG28 0 x001C
#define ixVGT_DEBUG_REG29 0 x001D
#define ixVGT_DEBUG_REG30 0 x001E
#define ixVGT_DEBUG_REG3 0 x0003
#define ixVGT_DEBUG_REG31 0 x001F
#define ixVGT_DEBUG_REG32 0 x0020
#define ixVGT_DEBUG_REG33 0 x0021
#define ixVGT_DEBUG_REG34 0 x0022
#define ixVGT_DEBUG_REG35 0 x0023
#define ixVGT_DEBUG_REG36 0 x0024
#define ixVGT_DEBUG_REG4 0 x0004
#define ixVGT_DEBUG_REG5 0 x0005
#define ixVGT_DEBUG_REG6 0 x0006
#define ixVGT_DEBUG_REG7 0 x0007
#define ixVGT_DEBUG_REG8 0 x0008
#define ixVGT_DEBUG_REG9 0 x0009
#define mmBCI_DEBUG_READ 0 x24E3
#define mmCB_BLEND0_CONTROL 0 xA1E0
#define mmCB_BLEND1_CONTROL 0 xA1E1
#define mmCB_BLEND2_CONTROL 0 xA1E2
#define mmCB_BLEND3_CONTROL 0 xA1E3
#define mmCB_BLEND4_CONTROL 0 xA1E4
#define mmCB_BLEND5_CONTROL 0 xA1E5
#define mmCB_BLEND6_CONTROL 0 xA1E6
#define mmCB_BLEND7_CONTROL 0 xA1E7
#define mmCB_BLEND_ALPHA 0 xA108
#define mmCB_BLEND_BLUE 0 xA107
#define mmCB_BLEND_GREEN 0 xA106
#define mmCB_BLEND_RED 0 xA105
#define mmCB_CGTT_SCLK_CTRL 0 x2698
#define mmCB_COLOR0_ATTRIB 0 xA31D
#define mmCB_COLOR0_BASE 0 xA318
#define mmCB_COLOR0_CLEAR_WORD0 0 xA323
#define mmCB_COLOR0_CLEAR_WORD1 0 xA324
#define mmCB_COLOR0_CMASK 0 xA31F
#define mmCB_COLOR0_CMASK_SLICE 0 xA320
#define mmCB_COLOR0_FMASK 0 xA321
#define mmCB_COLOR0_FMASK_SLICE 0 xA322
#define mmCB_COLOR0_INFO 0 xA31C
#define mmCB_COLOR0_PITCH 0 xA319
#define mmCB_COLOR0_SLICE 0 xA31A
#define mmCB_COLOR0_VIEW 0 xA31B
#define mmCB_COLOR1_ATTRIB 0 xA32C
#define mmCB_COLOR1_BASE 0 xA327
#define mmCB_COLOR1_CLEAR_WORD0 0 xA332
#define mmCB_COLOR1_CLEAR_WORD1 0 xA333
#define mmCB_COLOR1_CMASK 0 xA32E
#define mmCB_COLOR1_CMASK_SLICE 0 xA32F
#define mmCB_COLOR1_FMASK 0 xA330
#define mmCB_COLOR1_FMASK_SLICE 0 xA331
#define mmCB_COLOR1_INFO 0 xA32B
#define mmCB_COLOR1_PITCH 0 xA328
#define mmCB_COLOR1_SLICE 0 xA329
#define mmCB_COLOR1_VIEW 0 xA32A
#define mmCB_COLOR2_ATTRIB 0 xA33B
#define mmCB_COLOR2_BASE 0 xA336
#define mmCB_COLOR2_CLEAR_WORD0 0 xA341
#define mmCB_COLOR2_CLEAR_WORD1 0 xA342
#define mmCB_COLOR2_CMASK 0 xA33D
#define mmCB_COLOR2_CMASK_SLICE 0 xA33E
#define mmCB_COLOR2_FMASK 0 xA33F
#define mmCB_COLOR2_FMASK_SLICE 0 xA340
#define mmCB_COLOR2_INFO 0 xA33A
#define mmCB_COLOR2_PITCH 0 xA337
#define mmCB_COLOR2_SLICE 0 xA338
#define mmCB_COLOR2_VIEW 0 xA339
#define mmCB_COLOR3_ATTRIB 0 xA34A
#define mmCB_COLOR3_BASE 0 xA345
#define mmCB_COLOR3_CLEAR_WORD0 0 xA350
#define mmCB_COLOR3_CLEAR_WORD1 0 xA351
#define mmCB_COLOR3_CMASK 0 xA34C
#define mmCB_COLOR3_CMASK_SLICE 0 xA34D
#define mmCB_COLOR3_FMASK 0 xA34E
#define mmCB_COLOR3_FMASK_SLICE 0 xA34F
#define mmCB_COLOR3_INFO 0 xA349
#define mmCB_COLOR3_PITCH 0 xA346
#define mmCB_COLOR3_SLICE 0 xA347
#define mmCB_COLOR3_VIEW 0 xA348
#define mmCB_COLOR4_ATTRIB 0 xA359
#define mmCB_COLOR4_BASE 0 xA354
#define mmCB_COLOR4_CLEAR_WORD0 0 xA35F
#define mmCB_COLOR4_CLEAR_WORD1 0 xA360
#define mmCB_COLOR4_CMASK 0 xA35B
#define mmCB_COLOR4_CMASK_SLICE 0 xA35C
#define mmCB_COLOR4_FMASK 0 xA35D
#define mmCB_COLOR4_FMASK_SLICE 0 xA35E
#define mmCB_COLOR4_INFO 0 xA358
#define mmCB_COLOR4_PITCH 0 xA355
#define mmCB_COLOR4_SLICE 0 xA356
#define mmCB_COLOR4_VIEW 0 xA357
#define mmCB_COLOR5_ATTRIB 0 xA368
#define mmCB_COLOR5_BASE 0 xA363
#define mmCB_COLOR5_CLEAR_WORD0 0 xA36E
#define mmCB_COLOR5_CLEAR_WORD1 0 xA36F
#define mmCB_COLOR5_CMASK 0 xA36A
#define mmCB_COLOR5_CMASK_SLICE 0 xA36B
#define mmCB_COLOR5_FMASK 0 xA36C
#define mmCB_COLOR5_FMASK_SLICE 0 xA36D
#define mmCB_COLOR5_INFO 0 xA367
#define mmCB_COLOR5_PITCH 0 xA364
#define mmCB_COLOR5_SLICE 0 xA365
#define mmCB_COLOR5_VIEW 0 xA366
#define mmCB_COLOR6_ATTRIB 0 xA377
#define mmCB_COLOR6_BASE 0 xA372
#define mmCB_COLOR6_CLEAR_WORD0 0 xA37D
#define mmCB_COLOR6_CLEAR_WORD1 0 xA37E
#define mmCB_COLOR6_CMASK 0 xA379
#define mmCB_COLOR6_CMASK_SLICE 0 xA37A
#define mmCB_COLOR6_FMASK 0 xA37B
#define mmCB_COLOR6_FMASK_SLICE 0 xA37C
#define mmCB_COLOR6_INFO 0 xA376
#define mmCB_COLOR6_PITCH 0 xA373
#define mmCB_COLOR6_SLICE 0 xA374
#define mmCB_COLOR6_VIEW 0 xA375
#define mmCB_COLOR7_ATTRIB 0 xA386
#define mmCB_COLOR7_BASE 0 xA381
#define mmCB_COLOR7_CLEAR_WORD0 0 xA38C
#define mmCB_COLOR7_CLEAR_WORD1 0 xA38D
#define mmCB_COLOR7_CMASK 0 xA388
#define mmCB_COLOR7_CMASK_SLICE 0 xA389
#define mmCB_COLOR7_FMASK 0 xA38A
#define mmCB_COLOR7_FMASK_SLICE 0 xA38B
#define mmCB_COLOR7_INFO 0 xA385
#define mmCB_COLOR7_PITCH 0 xA382
#define mmCB_COLOR7_SLICE 0 xA383
#define mmCB_COLOR7_VIEW 0 xA384
#define mmCB_COLOR_CONTROL 0 xA202
#define mmCB_DEBUG_BUS_10 0 x26A2
#define mmCB_DEBUG_BUS_1 0 x2699
#define mmCB_DEBUG_BUS_11 0 x26A3
#define mmCB_DEBUG_BUS_12 0 x26A4
#define mmCB_DEBUG_BUS_13 0 x26A5
#define mmCB_DEBUG_BUS_14 0 x26A6
#define mmCB_DEBUG_BUS_15 0 x26A7
#define mmCB_DEBUG_BUS_16 0 x26A8
#define mmCB_DEBUG_BUS_17 0 x26A9
#define mmCB_DEBUG_BUS_18 0 x26AA
#define mmCB_DEBUG_BUS_2 0 x269A
#define mmCB_DEBUG_BUS_3 0 x269B
#define mmCB_DEBUG_BUS_4 0 x269C
#define mmCB_DEBUG_BUS_5 0 x269D
#define mmCB_DEBUG_BUS_6 0 x269E
#define mmCB_DEBUG_BUS_7 0 x269F
#define mmCB_DEBUG_BUS_8 0 x26A0
#define mmCB_DEBUG_BUS_9 0 x26A1
#define mmCB_HW_CONTROL 0 x2684
#define mmCB_HW_CONTROL_1 0 x2685
#define mmCB_HW_CONTROL_2 0 x2686
#define mmCB_PERFCOUNTER0_HI 0 x2691
#define mmCB_PERFCOUNTER0_LO 0 x2690
#define mmCB_PERFCOUNTER0_SELECT1 0 x2689
#define mmCB_PERFCOUNTER1_HI 0 x2693
#define mmCB_PERFCOUNTER1_LO 0 x2692
#define mmCB_PERFCOUNTER2_HI 0 x2695
#define mmCB_PERFCOUNTER2_LO 0 x2694
#define mmCB_PERFCOUNTER3_HI 0 x2697
#define mmCB_PERFCOUNTER3_LO 0 x2696
#define mmCB_SHADER_MASK 0 xA08F
#define mmCB_TARGET_MASK 0 xA08E
#define mmCC_GC_SHADER_ARRAY_CONFIG 0 x226F
#define mmCC_RB_BACKEND_DISABLE 0 x263D
#define mmCC_RB_DAISY_CHAIN 0 x2641
#define mmCC_RB_REDUNDANCY 0 x263C
#define mmCC_SQC_BANK_DISABLE 0 x2307
#define mmCGTS_RD_CTRL_REG 0 x2455
#define mmCGTS_RD_REG 0 x2456
#define mmCGTS_SM_CTRL_REG 0 x2454
#define mmCGTS_TCC_DISABLE 0 x2452
#define mmCGTS_USER_TCC_DISABLE 0 x2453
#define mmCGTT_BCI_CLK_CTRL 0 x24A9
#define mmCGTT_CP_CLK_CTRL 0 x3059
#define mmCGTT_GDS_CLK_CTRL 0 x25DD
#define mmCGTT_IA_CLK_CTRL 0 x2261
#define mmCGTT_PA_CLK_CTRL 0 x2286
#define mmCGTT_PC_CLK_CTRL 0 x24A8
#define mmCGTT_RLC_CLK_CTRL 0 x30E0
#define mmCGTT_SC_CLK_CTRL 0 x22CA
#define mmCGTT_SPI_CLK_CTRL 0 x2451
#define mmCGTT_SQ_CLK_CTRL 0 x2362
#define mmCGTT_SQG_CLK_CTRL 0 x2363
#define mmCGTT_SX_CLK_CTRL0 0 x240C
#define mmCGTT_SX_CLK_CTRL1 0 x240D
#define mmCGTT_SX_CLK_CTRL2 0 x240E
#define mmCGTT_SX_CLK_CTRL3 0 x240F
#define mmCGTT_SX_CLK_CTRL4 0 x2410
#define mmCGTT_TCI_CLK_CTRL 0 x2B60
#define mmCGTT_TCP_CLK_CTRL 0 x2B15
#define mmCGTT_VGT_CLK_CTRL 0 x225F
#define mmCOHER_DEST_BASE_0 0 xA092
#define mmCOHER_DEST_BASE_1 0 xA093
#define mmCOHER_DEST_BASE_2 0 xA07E
#define mmCOHER_DEST_BASE_3 0 xA07F
#define mmCOMPUTE_DIM_X 0 x2E01
#define mmCOMPUTE_DIM_Y 0 x2E02
#define mmCOMPUTE_DIM_Z 0 x2E03
#define mmCOMPUTE_DISPATCH_INITIATOR 0 x2E00
#define mmCOMPUTE_NUM_THREAD_X 0 x2E07
#define mmCOMPUTE_NUM_THREAD_Y 0 x2E08
#define mmCOMPUTE_NUM_THREAD_Z 0 x2E09
#define mmCOMPUTE_PGM_HI 0 x2E0D
#define mmCOMPUTE_PGM_LO 0 x2E0C
#define mmCOMPUTE_PGM_RSRC1 0 x2E12
#define mmCOMPUTE_PGM_RSRC2 0 x2E13
#define mmCOMPUTE_RESOURCE_LIMITS 0 x2E15
#define mmCOMPUTE_START_X 0 x2E04
#define mmCOMPUTE_START_Y 0 x2E05
#define mmCOMPUTE_START_Z 0 x2E06
#define mmCOMPUTE_STATIC_THREAD_MGMT_SE0 0 x2E16
#define mmCOMPUTE_STATIC_THREAD_MGMT_SE1 0 x2E17
#define mmCOMPUTE_TBA_HI 0 x2E0F
#define mmCOMPUTE_TBA_LO 0 x2E0E
#define mmCOMPUTE_TMA_HI 0 x2E11
#define mmCOMPUTE_TMA_LO 0 x2E10
#define mmCOMPUTE_TMPRING_SIZE 0 x2E18
#define mmCOMPUTE_USER_DATA_0 0 x2E40
#define mmCOMPUTE_USER_DATA_10 0 x2E4A
#define mmCOMPUTE_USER_DATA_1 0 x2E41
#define mmCOMPUTE_USER_DATA_11 0 x2E4B
#define mmCOMPUTE_USER_DATA_12 0 x2E4C
#define mmCOMPUTE_USER_DATA_13 0 x2E4D
#define mmCOMPUTE_USER_DATA_14 0 x2E4E
#define mmCOMPUTE_USER_DATA_15 0 x2E4F
#define mmCOMPUTE_USER_DATA_2 0 x2E42
#define mmCOMPUTE_USER_DATA_3 0 x2E43
#define mmCOMPUTE_USER_DATA_4 0 x2E44
#define mmCOMPUTE_USER_DATA_5 0 x2E45
#define mmCOMPUTE_USER_DATA_6 0 x2E46
#define mmCOMPUTE_USER_DATA_7 0 x2E47
#define mmCOMPUTE_USER_DATA_8 0 x2E48
#define mmCOMPUTE_USER_DATA_9 0 x2E49
#define mmCOMPUTE_VMID 0 x2E14
#define mmCP_APPEND_ADDR_HI 0 x2159
#define mmCP_APPEND_ADDR_LO 0 x2158
#define mmCP_APPEND_DATA 0 x215A
#define mmCP_APPEND_LAST_CS_FENCE 0 x215B
#define mmCP_APPEND_LAST_PS_FENCE 0 x215C
#define mmCP_ATOMIC_PREOP_HI 0 x215E
#define mmCP_ATOMIC_PREOP_LO 0 x215D
#define mmCP_BUSY_STAT 0 x219F
#define mmCP_CE_HEADER_DUMP 0 x21A4
#define mmCP_CE_IB1_BASE_HI 0 x21C7
#define mmCP_CE_IB1_BASE_LO 0 x21C6
#define mmCP_CE_IB1_BUFSZ 0 x21C8
#define mmCP_CE_IB2_BASE_HI 0 x21CA
#define mmCP_CE_IB2_BASE_LO 0 x21C9
#define mmCP_CE_IB2_BUFSZ 0 x21CB
#define mmCP_CE_INIT_BASE_HI 0 x21C4
#define mmCP_CE_INIT_BASE_LO 0 x21C3
#define mmCP_CE_INIT_BUFSZ 0 x21C5
#define mmCP_CEQ1_AVAIL 0 x21E6
#define mmCP_CEQ2_AVAIL 0 x21E7
#define mmCP_CE_ROQ_IB1_STAT 0 x21E9
#define mmCP_CE_ROQ_IB2_STAT 0 x21EA
#define mmCP_CE_ROQ_RB_STAT 0 x21E8
#define mmCP_CE_UCODE_ADDR 0 x305A
#define mmCP_CE_UCODE_DATA 0 x305B
#define mmCP_CMD_DATA 0 x21DF
#define mmCP_CMD_INDEX 0 x21DE
#define mmCP_CNTX_STAT 0 x21B8
#define mmCP_COHER_BASE 0 x217E
#define mmCP_COHER_CNTL 0 x217C
#define mmCP_COHER_SIZE 0 x217D
#define mmCP_COHER_START_DELAY 0 x217B
#define mmCP_COHER_STATUS 0 x217F
#define mmCP_CSF_CNTL 0 x21B5
#define mmCP_CSF_STAT 0 x21B4
#define mmCP_DMA_CNTL 0 x218A
#define mmCP_DMA_ME_COMMAND 0 x2184
#define mmCP_DMA_ME_DST_ADDR 0 x2182
#define mmCP_DMA_ME_DST_ADDR_HI 0 x2183
#define mmCP_DMA_ME_SRC_ADDR 0 x2180
#define mmCP_DMA_ME_SRC_ADDR_HI 0 x2181
#define mmCP_DMA_PFP_COMMAND 0 x2189
#define mmCP_DMA_PFP_DST_ADDR 0 x2187
#define mmCP_DMA_PFP_DST_ADDR_HI 0 x2188
#define mmCP_DMA_PFP_SRC_ADDR 0 x2185
#define mmCP_DMA_PFP_SRC_ADDR_HI 0 x2186
#define mmCP_DMA_READ_TAGS 0 x218B
#define mmCP_ECC_FIRSTOCCURRENCE 0 x307A
#define mmCP_ECC_FIRSTOCCURRENCE_RING0 0 x307B
#define mmCP_ECC_FIRSTOCCURRENCE_RING1 0 x307C
#define mmCP_ECC_FIRSTOCCURRENCE_RING2 0 x307D
#define mmCP_EOP_DONE_ADDR_HI 0 x2101
#define mmCP_EOP_DONE_ADDR_LO 0 x2100
#define mmCP_EOP_DONE_DATA_HI 0 x2103
#define mmCP_EOP_DONE_DATA_LO 0 x2102
#define mmCP_EOP_LAST_FENCE_HI 0 x2105
#define mmCP_EOP_LAST_FENCE_LO 0 x2104
#define mmCP_GDS_ATOMIC0_PREOP_HI 0 x2160
#define mmCP_GDS_ATOMIC0_PREOP_LO 0 x215F
#define mmCP_GDS_ATOMIC1_PREOP_HI 0 x2162
#define mmCP_GDS_ATOMIC1_PREOP_LO 0 x2161
#define mmCP_GRBM_FREE_COUNT 0 x21A3
#define mmCP_IB1_BASE_HI 0 x21CD
#define mmCP_IB1_BASE_LO 0 x21CC
#define mmCP_IB1_BUFSZ 0 x21CE
#define mmCP_IB1_OFFSET 0 x2192
#define mmCP_IB1_PREAMBLE_BEGIN 0 x2194
#define mmCP_IB1_PREAMBLE_END 0 x2195
#define mmCP_IB2_BASE_HI 0 x21D0
#define mmCP_IB2_BASE_LO 0 x21CF
#define mmCP_IB2_BUFSZ 0 x21D1
#define mmCP_IB2_OFFSET 0 x2193
#define mmCP_IB2_PREAMBLE_BEGIN 0 x2196
#define mmCP_IB2_PREAMBLE_END 0 x2197
#define mmCP_INT_CNTL 0 x3049
#define mmCP_INT_CNTL_RING0 0 x306A
#define mmCP_INT_CNTL_RING1 0 x306B
#define mmCP_INT_CNTL_RING2 0 x306C
#define mmCP_INT_STAT_DEBUG 0 x21F7
#define mmCP_INT_STATUS 0 x304A
#define mmCP_INT_STATUS_RING0 0 x306D
#define mmCP_INT_STATUS_RING1 0 x306E
#define mmCP_INT_STATUS_RING2 0 x306F
#define mmCP_MC_PACK_DELAY_CNT 0 x21A7
#define mmCP_ME_CNTL 0 x21B6
#define mmCP_ME_HEADER_DUMP 0 x21A1
#define mmCP_ME_MC_RADDR_HI 0 x216E
#define mmCP_ME_MC_RADDR_LO 0 x216D
#define mmCP_ME_MC_WADDR_HI 0 x216A
#define mmCP_ME_MC_WADDR_LO 0 x2169
#define mmCP_ME_MC_WDATA_HI 0 x216C
#define mmCP_ME_MC_WDATA_LO 0 x216B
#define mmCP_MEM_SLP_CNTL 0 x3079
#define mmCP_ME_PREEMPTION 0 x21B9
#define mmCP_MEQ_AVAIL 0 x21DD
#define mmCP_MEQ_STAT 0 x21E5
#define mmCP_MEQ_THRESHOLDS 0 x21D9
#define mmCP_ME_RAM_DATA 0 x3058
#define mmCP_ME_RAM_RADDR 0 x3056
#define mmCP_ME_RAM_WADDR 0 x3057
#define mmCP_NUM_PRIM_NEEDED_COUNT0_HI 0 x210B
#define mmCP_NUM_PRIM_NEEDED_COUNT0_LO 0 x210A
#define mmCP_NUM_PRIM_NEEDED_COUNT1_HI 0 x210F
#define mmCP_NUM_PRIM_NEEDED_COUNT1_LO 0 x210E
#define mmCP_NUM_PRIM_NEEDED_COUNT2_HI 0 x2113
#define mmCP_NUM_PRIM_NEEDED_COUNT2_LO 0 x2112
#define mmCP_NUM_PRIM_NEEDED_COUNT3_HI 0 x2117
#define mmCP_NUM_PRIM_NEEDED_COUNT3_LO 0 x2116
#define mmCP_NUM_PRIM_WRITTEN_COUNT0_HI 0 x2109
#define mmCP_NUM_PRIM_WRITTEN_COUNT0_LO 0 x2108
#define mmCP_NUM_PRIM_WRITTEN_COUNT1_HI 0 x210D
#define mmCP_NUM_PRIM_WRITTEN_COUNT1_LO 0 x210C
#define mmCP_NUM_PRIM_WRITTEN_COUNT2_HI 0 x2111
#define mmCP_NUM_PRIM_WRITTEN_COUNT2_LO 0 x2110
#define mmCP_NUM_PRIM_WRITTEN_COUNT3_HI 0 x2115
#define mmCP_NUM_PRIM_WRITTEN_COUNT3_LO 0 x2114
#define mmCP_PA_CINVOC_COUNT_HI 0 x2129
#define mmCP_PA_CINVOC_COUNT_LO 0 x2128
#define mmCP_PA_CPRIM_COUNT_HI 0 x212B
#define mmCP_PA_CPRIM_COUNT_LO 0 x212A
#define mmCP_PERFMON_CNTL 0 x21FF
#define mmCP_PERFMON_CNTX_CNTL 0 xA0D8
#define mmCP_PFP_HEADER_DUMP 0 x21A2
#define mmCP_PFP_IB_CONTROL 0 x218D
#define mmCP_PFP_LOAD_CONTROL 0 x218E
#define mmCP_PFP_UCODE_ADDR 0 x3054
#define mmCP_PFP_UCODE_DATA 0 x3055
#define mmCP_PIPE_STATS_ADDR_HI 0 x2119
#define mmCP_PIPE_STATS_ADDR_LO 0 x2118
#define mmCP_PWR_CNTL 0 x3078
#define mmCP_QUEUE_THRESHOLDS 0 x21D8
#define mmCP_RB0_BASE 0 x3040
#define mmCP_RB0_CNTL 0 x3041
#define mmCP_RB0_RPTR 0 x21C0
#define mmCP_RB0_RPTR_ADDR 0 x3043
#define mmCP_RB0_RPTR_ADDR_HI 0 x3044
#define mmCP_RB0_WPTR 0 x3045
#define mmCP_RB1_BASE 0 x3060
#define mmCP_RB1_CNTL 0 x3061
#define mmCP_RB1_RPTR 0 x21BF
#define mmCP_RB1_RPTR_ADDR 0 x3062
#define mmCP_RB1_RPTR_ADDR_HI 0 x3063
#define mmCP_RB1_WPTR 0 x3064
#define mmCP_RB2_BASE 0 x3065
#define mmCP_RB2_CNTL 0 x3066
#define mmCP_RB2_RPTR 0 x21BE
#define mmCP_RB2_RPTR_ADDR 0 x3067
#define mmCP_RB2_RPTR_ADDR_HI 0 x3068
#define mmCP_RB2_WPTR 0 x3069
#define mmCP_RB_BASE 0 x3040
#define mmCP_RB_CNTL 0 x3041
#define mmCP_RB_OFFSET 0 x2191
#define mmCP_RB_RPTR 0 x21C0
#define mmCP_RB_RPTR_ADDR 0 x3043
#define mmCP_RB_RPTR_ADDR_HI 0 x3044
#define mmCP_RB_RPTR_WR 0 x3042
#define mmCP_RB_VMID 0 x3051
#define mmCP_RB_WPTR 0 x3045
#define mmCP_RB_WPTR_DELAY 0 x21C1
#define mmCP_RB_WPTR_POLL_ADDR_HI 0 x3047
#define mmCP_RB_WPTR_POLL_ADDR_LO 0 x3046
#define mmCP_RB_WPTR_POLL_CNTL 0 x21C2
#define mmCP_RING0_PRIORITY 0 x304D
#define mmCP_RING1_PRIORITY 0 x304E
#define mmCP_RING2_PRIORITY 0 x304F
#define mmCP_RINGID 0 xA0D9
#define mmCP_RING_PRIORITY_CNTS 0 x304C
#define mmCP_ROQ1_THRESHOLDS 0 x21D5
#define mmCP_ROQ2_AVAIL 0 x21DC
#define mmCP_ROQ2_THRESHOLDS 0 x21D6
#define mmCP_ROQ_AVAIL 0 x21DA
#define mmCP_ROQ_IB1_STAT 0 x21E1
#define mmCP_ROQ_IB2_STAT 0 x21E2
#define mmCP_ROQ_RB_STAT 0 x21E0
#define mmCP_SC_PSINVOC_COUNT0_HI 0 x212D
#define mmCP_SC_PSINVOC_COUNT0_LO 0 x212C
#define mmCP_SC_PSINVOC_COUNT1_HI 0 x212F
#define mmCP_SC_PSINVOC_COUNT1_LO 0 x212E
#define mmCP_SCRATCH_DATA 0 x2190
#define mmCP_SCRATCH_INDEX 0 x218F
#define mmCP_SEM_INCOMPLETE_TIMER_CNTL 0 x2172
#define mmCP_SEM_WAIT_TIMER 0 x216F
#define mmCP_SIG_SEM_ADDR_HI 0 x2171
#define mmCP_SIG_SEM_ADDR_LO 0 x2170
#define mmCP_STALLED_STAT1 0 x219D
#define mmCP_STALLED_STAT2 0 x219E
#define mmCP_STALLED_STAT3 0 x219C
#define mmCP_STAT 0 x21A0
#define mmCP_ST_BASE_HI 0 x21D3
#define mmCP_ST_BASE_LO 0 x21D2
#define mmCP_ST_BUFSZ 0 x21D4
#define mmCP_STQ_AVAIL 0 x21DB
#define mmCP_STQ_STAT 0 x21E3
#define mmCP_STQ_THRESHOLDS 0 x21D7
#define mmCP_STREAM_OUT_ADDR_HI 0 x2107
#define mmCP_STREAM_OUT_ADDR_LO 0 x2106
#define mmCP_STRMOUT_CNTL 0 x213F
#define mmCP_VGT_CSINVOC_COUNT_HI 0 x2131
#define mmCP_VGT_CSINVOC_COUNT_LO 0 x2130
#define mmCP_VGT_DSINVOC_COUNT_HI 0 x2127
#define mmCP_VGT_DSINVOC_COUNT_LO 0 x2126
#define mmCP_VGT_GSINVOC_COUNT_HI 0 x2123
#define mmCP_VGT_GSINVOC_COUNT_LO 0 x2122
#define mmCP_VGT_GSPRIM_COUNT_HI 0 x211F
#define mmCP_VGT_GSPRIM_COUNT_LO 0 x211E
#define mmCP_VGT_HSINVOC_COUNT_HI 0 x2125
#define mmCP_VGT_HSINVOC_COUNT_LO 0 x2124
#define mmCP_VGT_IAPRIM_COUNT_HI 0 x211D
#define mmCP_VGT_IAPRIM_COUNT_LO 0 x211C
#define mmCP_VGT_IAVERT_COUNT_HI 0 x211B
#define mmCP_VGT_IAVERT_COUNT_LO 0 x211A
#define mmCP_VGT_VSINVOC_COUNT_HI 0 x2121
#define mmCP_VGT_VSINVOC_COUNT_LO 0 x2120
#define mmCP_VMID 0 xA0DA
#define mmCP_WAIT_REG_MEM_TIMEOUT 0 x2174
#define mmCP_WAIT_SEM_ADDR_HI 0 x2176
#define mmCP_WAIT_SEM_ADDR_LO 0 x2175
#define mmCS_COPY_STATE 0 xA1F3
#define mmDB_ALPHA_TO_MASK 0 xA2DC
#define mmDB_CGTT_CLK_CTRL_0 0 x261A
#define mmDB_COUNT_CONTROL 0 xA001
#define mmDB_CREDIT_LIMIT 0 x2614
#define mmDB_DEBUG 0 x260C
#define mmDB_DEBUG2 0 x260D
#define mmDB_DEBUG3 0 x260E
#define mmDB_DEBUG4 0 x260F
#define mmDB_DEPTH_BOUNDS_MAX 0 xA009
#define mmDB_DEPTH_BOUNDS_MIN 0 xA008
#define mmDB_DEPTH_CLEAR 0 xA00B
#define mmDB_DEPTH_CONTROL 0 xA200
#define mmDB_DEPTH_INFO 0 xA00F
#define mmDB_DEPTH_SIZE 0 xA016
#define mmDB_DEPTH_SLICE 0 xA017
#define mmDB_DEPTH_VIEW 0 xA002
#define mmDB_EQAA 0 xA201
#define mmDB_FIFO_DEPTH1 0 x2618
#define mmDB_FIFO_DEPTH2 0 x2619
#define mmDB_FREE_CACHELINES 0 x2617
#define mmDB_HTILE_DATA_BASE 0 xA005
#define mmDB_HTILE_SURFACE 0 xA2AF
#define mmDB_PERFCOUNTER0_HI 0 x2602
#define mmDB_PERFCOUNTER0_LO 0 x2601
#define mmDB_PERFCOUNTER0_SELECT 0 x2600
#define mmDB_PERFCOUNTER1_HI 0 x2605
#define mmDB_PERFCOUNTER1_LO 0 x2604
#define mmDB_PERFCOUNTER1_SELECT 0 x2603
#define mmDB_PERFCOUNTER2_HI 0 x2608
#define mmDB_PERFCOUNTER2_LO 0 x2607
#define mmDB_PERFCOUNTER2_SELECT 0 x2606
#define mmDB_PERFCOUNTER3_HI 0 x260B
#define mmDB_PERFCOUNTER3_LO 0 x260A
#define mmDB_PERFCOUNTER3_SELECT 0 x2609
#define mmDB_PRELOAD_CONTROL 0 xA2B2
#define mmDB_READ_DEBUG_0 0 x2620
#define mmDB_READ_DEBUG_1 0 x2621
#define mmDB_READ_DEBUG_2 0 x2622
#define mmDB_READ_DEBUG_3 0 x2623
#define mmDB_READ_DEBUG_4 0 x2624
#define mmDB_READ_DEBUG_5 0 x2625
#define mmDB_READ_DEBUG_6 0 x2626
#define mmDB_READ_DEBUG_7 0 x2627
#define mmDB_READ_DEBUG_8 0 x2628
#define mmDB_READ_DEBUG_9 0 x2629
#define mmDB_READ_DEBUG_A 0 x262A
#define mmDB_READ_DEBUG_B 0 x262B
#define mmDB_READ_DEBUG_C 0 x262C
#define mmDB_READ_DEBUG_D 0 x262D
#define mmDB_READ_DEBUG_E 0 x262E
#define mmDB_READ_DEBUG_F 0 x262F
#define mmDB_RENDER_CONTROL 0 xA000
#define mmDB_RENDER_OVERRIDE 0 xA003
#define mmDB_RENDER_OVERRIDE2 0 xA004
#define mmDB_SHADER_CONTROL 0 xA203
#define mmDB_SRESULTS_COMPARE_STATE0 0 xA2B0
#define mmDB_SRESULTS_COMPARE_STATE1 0 xA2B1
#define mmDB_STENCIL_CLEAR 0 xA00A
#define mmDB_STENCIL_CONTROL 0 xA10B
#define mmDB_STENCIL_INFO 0 xA011
#define mmDB_STENCIL_READ_BASE 0 xA013
#define mmDB_STENCILREFMASK 0 xA10C
#define mmDB_STENCILREFMASK_BF 0 xA10D
#define mmDB_STENCIL_WRITE_BASE 0 xA015
#define mmDB_SUBTILE_CONTROL 0 x2616
#define mmDB_WATERMARKS 0 x2615
#define mmDB_Z_INFO 0 xA010
#define mmDB_ZPASS_COUNT_HI 0 x261D
#define mmDB_ZPASS_COUNT_LOW 0 x261C
#define mmDB_Z_READ_BASE 0 xA012
#define mmDB_Z_WRITE_BASE 0 xA014
#define mmDEBUG_DATA 0 x203D
#define mmDEBUG_INDEX 0 x203C
#define mmGB_ADDR_CONFIG 0 x263E
#define mmGB_BACKEND_MAP 0 x263F
#define mmGB_EDC_MODE 0 x307E
#define mmGB_GPU_ID 0 x2640
#define mmGB_TILE_MODE0 0 x2644
#define mmGB_TILE_MODE10 0 x264E
#define mmGB_TILE_MODE1 0 x2645
#define mmGB_TILE_MODE11 0 x264F
#define mmGB_TILE_MODE12 0 x2650
#define mmGB_TILE_MODE13 0 x2651
#define mmGB_TILE_MODE14 0 x2652
#define mmGB_TILE_MODE15 0 x2653
#define mmGB_TILE_MODE16 0 x2654
#define mmGB_TILE_MODE17 0 x2655
#define mmGB_TILE_MODE18 0 x2656
#define mmGB_TILE_MODE19 0 x2657
#define mmGB_TILE_MODE20 0 x2658
#define mmGB_TILE_MODE2 0 x2646
#define mmGB_TILE_MODE21 0 x2659
#define mmGB_TILE_MODE22 0 x265A
#define mmGB_TILE_MODE23 0 x265B
#define mmGB_TILE_MODE24 0 x265C
#define mmGB_TILE_MODE25 0 x265D
#define mmGB_TILE_MODE26 0 x265E
#define mmGB_TILE_MODE27 0 x265F
#define mmGB_TILE_MODE28 0 x2660
#define mmGB_TILE_MODE29 0 x2661
#define mmGB_TILE_MODE30 0 x2662
#define mmGB_TILE_MODE3 0 x2647
#define mmGB_TILE_MODE31 0 x2663
#define mmGB_TILE_MODE4 0 x2648
#define mmGB_TILE_MODE5 0 x2649
#define mmGB_TILE_MODE6 0 x264A
#define mmGB_TILE_MODE7 0 x264B
#define mmGB_TILE_MODE8 0 x264C
#define mmGB_TILE_MODE9 0 x264D
#define mmGC_PRIV_MODE 0 x3048
#define mmGC_USER_RB_BACKEND_DISABLE 0 x26DF
#define mmGC_USER_SHADER_ARRAY_CONFIG 0 x2270
#define mmGDS_ATOM_BASE 0 x25CE
#define mmGDS_ATOM_CNTL 0 x25CC
#define mmGDS_ATOM_COMPLETE 0 x25CD
#define mmGDS_ATOM_DST 0 x25D2
#define mmGDS_ATOM_OFFSET0 0 x25D0
#define mmGDS_ATOM_OFFSET1 0 x25D1
#define mmGDS_ATOM_OP 0 x25D3
#define mmGDS_ATOM_READ0 0 x25D8
#define mmGDS_ATOM_READ0_U 0 x25D9
#define mmGDS_ATOM_READ1 0 x25DA
#define mmGDS_ATOM_READ1_U 0 x25DB
#define mmGDS_ATOM_SIZE 0 x25CF
#define mmGDS_ATOM_SRC0 0 x25D4
#define mmGDS_ATOM_SRC0_U 0 x25D5
#define mmGDS_ATOM_SRC1 0 x25D6
#define mmGDS_ATOM_SRC1_U 0 x25D7
#define mmGDS_CNTL_STATUS 0 x25C1
#define mmGDS_CONFIG 0 x25C0
#define mmGDS_DEBUG_CNTL 0 x25DE
#define mmGDS_DEBUG_DATA 0 x25DF
#define mmGDS_ENHANCE 0 x25DC
#define mmGDS_GRBM_SECDED_CNT 0 x25E3
#define mmGDS_GWS_RESOURCE 0 x25E1
#define mmGDS_GWS_RESOURCE_CNTL 0 x25E0
#define mmGDS_OA_DED 0 x25E4
#define mmGDS_PERFCOUNTER0_HI 0 x25E7
#define mmGDS_PERFCOUNTER0_LO 0 x25E6
#define mmGDS_PERFCOUNTER0_SELECT 0 x25E5
#define mmGDS_PERFCOUNTER1_HI 0 x25EA
#define mmGDS_PERFCOUNTER1_LO 0 x25E9
#define mmGDS_PERFCOUNTER1_SELECT 0 x25E8
#define mmGDS_PERFCOUNTER2_HI 0 x25ED
#define mmGDS_PERFCOUNTER2_LO 0 x25EC
#define mmGDS_PERFCOUNTER2_SELECT 0 x25EB
#define mmGDS_PERFCOUNTER3_HI 0 x25F0
#define mmGDS_PERFCOUNTER3_LO 0 x25EF
#define mmGDS_PERFCOUNTER3_SELECT 0 x25EE
#define mmGDS_RD_ADDR 0 x25C2
#define mmGDS_RD_BURST_ADDR 0 x25C4
#define mmGDS_RD_BURST_COUNT 0 x25C5
#define mmGDS_RD_BURST_DATA 0 x25C6
#define mmGDS_RD_DATA 0 x25C3
#define mmGDS_SECDED_CNT 0 x25E2
#define mmGDS_WR_ADDR 0 x25C7
#define mmGDS_WR_BURST_ADDR 0 x25C9
#define mmGDS_WR_BURST_DATA 0 x25CA
#define mmGDS_WR_DATA 0 x25C8
#define mmGDS_WRITE_COMPLETE 0 x25CB
#define mmGFX_COPY_STATE 0 xA1F4
#define mmGRBM_CAM_DATA 0 x3001
#define mmGRBM_CAM_INDEX 0 x3000
#define mmGRBM_CNTL 0 x2000
#define mmGRBM_DEBUG 0 x2014
#define mmGRBM_DEBUG_CNTL 0 x2009
#define mmGRBM_DEBUG_DATA 0 x200A
#define mmGRBM_DEBUG_SNAPSHOT 0 x2015
#define mmGRBM_GFX_CLKEN_CNTL 0 x200C
#define mmGRBM_GFX_INDEX 0 x200B
#define mmGRBM_INT_CNTL 0 x2018
#define mmGRBM_NOWHERE 0 x203F
#define mmGRBM_PERFCOUNTER0_HI 0 x201F
#define mmGRBM_PERFCOUNTER0_LO 0 x201E
#define mmGRBM_PERFCOUNTER0_SELECT 0 x201C
#define mmGRBM_PERFCOUNTER1_HI 0 x2021
#define mmGRBM_PERFCOUNTER1_LO 0 x2020
#define mmGRBM_PERFCOUNTER1_SELECT 0 x201D
#define mmGRBM_PWR_CNTL 0 x2003
#define mmGRBM_READ_ERROR 0 x2016
#define mmGRBM_SCRATCH_REG0 0 x2040
#define mmGRBM_SCRATCH_REG1 0 x2041
#define mmGRBM_SCRATCH_REG2 0 x2042
#define mmGRBM_SCRATCH_REG3 0 x2043
#define mmGRBM_SCRATCH_REG4 0 x2044
#define mmGRBM_SCRATCH_REG5 0 x2045
#define mmGRBM_SCRATCH_REG6 0 x2046
#define mmGRBM_SCRATCH_REG7 0 x2047
#define mmGRBM_SE0_PERFCOUNTER_HI 0 x202B
#define mmGRBM_SE0_PERFCOUNTER_LO 0 x202A
#define mmGRBM_SE0_PERFCOUNTER_SELECT 0 x2026
#define mmGRBM_SE1_PERFCOUNTER_HI 0 x202D
#define mmGRBM_SE1_PERFCOUNTER_LO 0 x202C
#define mmGRBM_SE1_PERFCOUNTER_SELECT 0 x2027
#define mmGRBM_SKEW_CNTL 0 x2001
#define mmGRBM_SOFT_RESET 0 x2008
#define mmGRBM_STATUS 0 x2004
#define mmGRBM_STATUS2 0 x2002
#define mmGRBM_STATUS_SE0 0 x2005
#define mmGRBM_STATUS_SE1 0 x2006
#define mmGRBM_WAIT_IDLE_CLOCKS 0 x200D
#define mmIA_CNTL_STATUS 0 x2237
#define mmIA_DEBUG_CNTL 0 x223A
#define mmIA_DEBUG_DATA 0 x223B
#define mmIA_ENHANCE 0 xA29C
#define mmIA_MULTI_VGT_PARAM 0 xA2AA
#define mmIA_PERFCOUNTER0_HI 0 x2225
#define mmIA_PERFCOUNTER0_LO 0 x2224
#define mmIA_PERFCOUNTER0_SELECT 0 x2220
#define mmIA_PERFCOUNTER1_HI 0 x2227
#define mmIA_PERFCOUNTER1_LO 0 x2226
#define mmIA_PERFCOUNTER1_SELECT 0 x2221
#define mmIA_PERFCOUNTER2_HI 0 x2229
#define mmIA_PERFCOUNTER2_LO 0 x2228
#define mmIA_PERFCOUNTER2_SELECT 0 x2222
#define mmIA_PERFCOUNTER3_HI 0 x222B
#define mmIA_PERFCOUNTER3_LO 0 x222A
#define mmIA_PERFCOUNTER3_SELECT 0 x2223
#define mmIA_VMID_OVERRIDE 0 x2260
#define mmPA_CL_CLIP_CNTL 0 xA204
#define mmPA_CL_CNTL_STATUS 0 x2284
#define mmPA_CL_ENHANCE 0 x2285
#define mmPA_CL_GB_HORZ_CLIP_ADJ 0 xA2FC
#define mmPA_CL_GB_HORZ_DISC_ADJ 0 xA2FD
#define mmPA_CL_GB_VERT_CLIP_ADJ 0 xA2FA
#define mmPA_CL_GB_VERT_DISC_ADJ 0 xA2FB
#define mmPA_CL_NANINF_CNTL 0 xA208
#define mmPA_CL_POINT_CULL_RAD 0 xA1F8
#define mmPA_CL_POINT_SIZE 0 xA1F7
#define mmPA_CL_POINT_X_RAD 0 xA1F5
#define mmPA_CL_POINT_Y_RAD 0 xA1F6
#define mmPA_CL_UCP_0_W 0 xA172
#define mmPA_CL_UCP_0_X 0 xA16F
#define mmPA_CL_UCP_0_Y 0 xA170
#define mmPA_CL_UCP_0_Z 0 xA171
#define mmPA_CL_UCP_1_W 0 xA176
#define mmPA_CL_UCP_1_X 0 xA173
#define mmPA_CL_UCP_1_Y 0 xA174
#define mmPA_CL_UCP_1_Z 0 xA175
#define mmPA_CL_UCP_2_W 0 xA17A
#define mmPA_CL_UCP_2_X 0 xA177
#define mmPA_CL_UCP_2_Y 0 xA178
#define mmPA_CL_UCP_2_Z 0 xA179
#define mmPA_CL_UCP_3_W 0 xA17E
#define mmPA_CL_UCP_3_X 0 xA17B
#define mmPA_CL_UCP_3_Y 0 xA17C
#define mmPA_CL_UCP_3_Z 0 xA17D
#define mmPA_CL_UCP_4_W 0 xA182
#define mmPA_CL_UCP_4_X 0 xA17F
#define mmPA_CL_UCP_4_Y 0 xA180
#define mmPA_CL_UCP_4_Z 0 xA181
#define mmPA_CL_UCP_5_W 0 xA186
#define mmPA_CL_UCP_5_X 0 xA183
#define mmPA_CL_UCP_5_Y 0 xA184
#define mmPA_CL_UCP_5_Z 0 xA185
#define mmPA_CL_VPORT_XOFFSET 0 xA110
#define mmPA_CL_VPORT_XOFFSET_10 0 xA14C
#define mmPA_CL_VPORT_XOFFSET_1 0 xA116
#define mmPA_CL_VPORT_XOFFSET_11 0 xA152
#define mmPA_CL_VPORT_XOFFSET_12 0 xA158
#define mmPA_CL_VPORT_XOFFSET_13 0 xA15E
#define mmPA_CL_VPORT_XOFFSET_14 0 xA164
#define mmPA_CL_VPORT_XOFFSET_15 0 xA16A
#define mmPA_CL_VPORT_XOFFSET_2 0 xA11C
#define mmPA_CL_VPORT_XOFFSET_3 0 xA122
#define mmPA_CL_VPORT_XOFFSET_4 0 xA128
#define mmPA_CL_VPORT_XOFFSET_5 0 xA12E
#define mmPA_CL_VPORT_XOFFSET_6 0 xA134
#define mmPA_CL_VPORT_XOFFSET_7 0 xA13A
#define mmPA_CL_VPORT_XOFFSET_8 0 xA140
#define mmPA_CL_VPORT_XOFFSET_9 0 xA146
#define mmPA_CL_VPORT_XSCALE 0 xA10F
#define mmPA_CL_VPORT_XSCALE_10 0 xA14B
#define mmPA_CL_VPORT_XSCALE_1 0 xA115
#define mmPA_CL_VPORT_XSCALE_11 0 xA151
#define mmPA_CL_VPORT_XSCALE_12 0 xA157
#define mmPA_CL_VPORT_XSCALE_13 0 xA15D
#define mmPA_CL_VPORT_XSCALE_14 0 xA163
#define mmPA_CL_VPORT_XSCALE_15 0 xA169
#define mmPA_CL_VPORT_XSCALE_2 0 xA11B
#define mmPA_CL_VPORT_XSCALE_3 0 xA121
#define mmPA_CL_VPORT_XSCALE_4 0 xA127
#define mmPA_CL_VPORT_XSCALE_5 0 xA12D
#define mmPA_CL_VPORT_XSCALE_6 0 xA133
#define mmPA_CL_VPORT_XSCALE_7 0 xA139
#define mmPA_CL_VPORT_XSCALE_8 0 xA13F
#define mmPA_CL_VPORT_XSCALE_9 0 xA145
#define mmPA_CL_VPORT_YOFFSET 0 xA112
#define mmPA_CL_VPORT_YOFFSET_10 0 xA14E
#define mmPA_CL_VPORT_YOFFSET_1 0 xA118
#define mmPA_CL_VPORT_YOFFSET_11 0 xA154
#define mmPA_CL_VPORT_YOFFSET_12 0 xA15A
#define mmPA_CL_VPORT_YOFFSET_13 0 xA160
#define mmPA_CL_VPORT_YOFFSET_14 0 xA166
#define mmPA_CL_VPORT_YOFFSET_15 0 xA16C
#define mmPA_CL_VPORT_YOFFSET_2 0 xA11E
#define mmPA_CL_VPORT_YOFFSET_3 0 xA124
#define mmPA_CL_VPORT_YOFFSET_4 0 xA12A
#define mmPA_CL_VPORT_YOFFSET_5 0 xA130
#define mmPA_CL_VPORT_YOFFSET_6 0 xA136
#define mmPA_CL_VPORT_YOFFSET_7 0 xA13C
#define mmPA_CL_VPORT_YOFFSET_8 0 xA142
#define mmPA_CL_VPORT_YOFFSET_9 0 xA148
#define mmPA_CL_VPORT_YSCALE 0 xA111
#define mmPA_CL_VPORT_YSCALE_10 0 xA14D
#define mmPA_CL_VPORT_YSCALE_1 0 xA117
#define mmPA_CL_VPORT_YSCALE_11 0 xA153
#define mmPA_CL_VPORT_YSCALE_12 0 xA159
#define mmPA_CL_VPORT_YSCALE_13 0 xA15F
#define mmPA_CL_VPORT_YSCALE_14 0 xA165
#define mmPA_CL_VPORT_YSCALE_15 0 xA16B
#define mmPA_CL_VPORT_YSCALE_2 0 xA11D
#define mmPA_CL_VPORT_YSCALE_3 0 xA123
#define mmPA_CL_VPORT_YSCALE_4 0 xA129
#define mmPA_CL_VPORT_YSCALE_5 0 xA12F
#define mmPA_CL_VPORT_YSCALE_6 0 xA135
#define mmPA_CL_VPORT_YSCALE_7 0 xA13B
#define mmPA_CL_VPORT_YSCALE_8 0 xA141
#define mmPA_CL_VPORT_YSCALE_9 0 xA147
#define mmPA_CL_VPORT_ZOFFSET 0 xA114
#define mmPA_CL_VPORT_ZOFFSET_10 0 xA150
#define mmPA_CL_VPORT_ZOFFSET_1 0 xA11A
#define mmPA_CL_VPORT_ZOFFSET_11 0 xA156
#define mmPA_CL_VPORT_ZOFFSET_12 0 xA15C
#define mmPA_CL_VPORT_ZOFFSET_13 0 xA162
#define mmPA_CL_VPORT_ZOFFSET_14 0 xA168
#define mmPA_CL_VPORT_ZOFFSET_15 0 xA16E
#define mmPA_CL_VPORT_ZOFFSET_2 0 xA120
#define mmPA_CL_VPORT_ZOFFSET_3 0 xA126
#define mmPA_CL_VPORT_ZOFFSET_4 0 xA12C
#define mmPA_CL_VPORT_ZOFFSET_5 0 xA132
#define mmPA_CL_VPORT_ZOFFSET_6 0 xA138
#define mmPA_CL_VPORT_ZOFFSET_7 0 xA13E
#define mmPA_CL_VPORT_ZOFFSET_8 0 xA144
#define mmPA_CL_VPORT_ZOFFSET_9 0 xA14A
#define mmPA_CL_VPORT_ZSCALE 0 xA113
#define mmPA_CL_VPORT_ZSCALE_10 0 xA14F
#define mmPA_CL_VPORT_ZSCALE_1 0 xA119
#define mmPA_CL_VPORT_ZSCALE_11 0 xA155
#define mmPA_CL_VPORT_ZSCALE_12 0 xA15B
#define mmPA_CL_VPORT_ZSCALE_13 0 xA161
#define mmPA_CL_VPORT_ZSCALE_14 0 xA167
#define mmPA_CL_VPORT_ZSCALE_15 0 xA16D
#define mmPA_CL_VPORT_ZSCALE_2 0 xA11F
#define mmPA_CL_VPORT_ZSCALE_3 0 xA125
#define mmPA_CL_VPORT_ZSCALE_4 0 xA12B
#define mmPA_CL_VPORT_ZSCALE_5 0 xA131
#define mmPA_CL_VPORT_ZSCALE_6 0 xA137
#define mmPA_CL_VPORT_ZSCALE_7 0 xA13D
#define mmPA_CL_VPORT_ZSCALE_8 0 xA143
#define mmPA_CL_VPORT_ZSCALE_9 0 xA149
#define mmPA_CL_VS_OUT_CNTL 0 xA207
#define mmPA_CL_VTE_CNTL 0 xA206
#define mmPA_SC_AA_CONFIG 0 xA2F8
#define mmPA_SC_AA_MASK_X0Y0_X1Y0 0 xA30E
#define mmPA_SC_AA_MASK_X0Y1_X1Y1 0 xA30F
#define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0 0 xA2FE
#define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1 0 xA2FF
#define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2 0 xA300
#define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3 0 xA301
#define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0 0 xA306
#define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_1 0 xA307
#define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_2 0 xA308
#define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_3 0 xA309
#define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0 0 xA302
#define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_1 0 xA303
#define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_2 0 xA304
#define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_3 0 xA305
#define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0 0 xA30A
#define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_1 0 xA30B
#define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_2 0 xA30C
#define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_3 0 xA30D
#define mmPA_SC_CENTROID_PRIORITY_0 0 xA2F5
#define mmPA_SC_CENTROID_PRIORITY_1 0 xA2F6
#define mmPA_SC_CLIPRECT_0_BR 0 xA085
#define mmPA_SC_CLIPRECT_0_TL 0 xA084
#define mmPA_SC_CLIPRECT_1_BR 0 xA087
#define mmPA_SC_CLIPRECT_1_TL 0 xA086
#define mmPA_SC_CLIPRECT_2_BR 0 xA089
#define mmPA_SC_CLIPRECT_2_TL 0 xA088
#define mmPA_SC_CLIPRECT_3_BR 0 xA08B
#define mmPA_SC_CLIPRECT_3_TL 0 xA08A
#define mmPA_SC_CLIPRECT_RULE 0 xA083
#define mmPA_SC_DEBUG_CNTL 0 x22F6
#define mmPA_SC_DEBUG_DATA 0 x22F7
#define mmPA_SC_EDGERULE 0 xA08C
#define mmPA_SC_ENHANCE 0 x22FC
#define mmPA_SC_FIFO_DEPTH_CNTL 0 x2295
#define mmPA_SC_FIFO_SIZE 0 x22F3
#define mmPA_SC_FORCE_EOV_MAX_CNTS 0 x22C9
#define mmPA_SC_GENERIC_SCISSOR_BR 0 xA091
#define mmPA_SC_GENERIC_SCISSOR_TL 0 xA090
#define mmPA_SC_IF_FIFO_SIZE 0 x22F5
#define mmPA_SC_LINE_CNTL 0 xA2F7
#define mmPA_SC_LINE_STIPPLE 0 xA283
#define mmPA_SC_LINE_STIPPLE_STATE 0 x22C4
#define mmPA_SC_MODE_CNTL_0 0 xA292
#define mmPA_SC_MODE_CNTL_1 0 xA293
#define mmPA_SC_PERFCOUNTER0_HI 0 x22A9
#define mmPA_SC_PERFCOUNTER0_LO 0 x22A8
#define mmPA_SC_PERFCOUNTER0_SELECT 0 x22A0
#define mmPA_SC_PERFCOUNTER1_HI 0 x22AB
#define mmPA_SC_PERFCOUNTER1_LO 0 x22AA
#define mmPA_SC_PERFCOUNTER1_SELECT 0 x22A1
#define mmPA_SC_PERFCOUNTER2_HI 0 x22AD
#define mmPA_SC_PERFCOUNTER2_LO 0 x22AC
#define mmPA_SC_PERFCOUNTER2_SELECT 0 x22A2
#define mmPA_SC_PERFCOUNTER3_HI 0 x22AF
#define mmPA_SC_PERFCOUNTER3_LO 0 x22AE
#define mmPA_SC_PERFCOUNTER3_SELECT 0 x22A3
#define mmPA_SC_PERFCOUNTER4_HI 0 x22B1
#define mmPA_SC_PERFCOUNTER4_LO 0 x22B0
#define mmPA_SC_PERFCOUNTER4_SELECT 0 x22A4
#define mmPA_SC_PERFCOUNTER5_HI 0 x22B3
#define mmPA_SC_PERFCOUNTER5_LO 0 x22B2
#define mmPA_SC_PERFCOUNTER5_SELECT 0 x22A5
#define mmPA_SC_PERFCOUNTER6_HI 0 x22B5
#define mmPA_SC_PERFCOUNTER6_LO 0 x22B4
#define mmPA_SC_PERFCOUNTER6_SELECT 0 x22A6
#define mmPA_SC_PERFCOUNTER7_HI 0 x22B7
#define mmPA_SC_PERFCOUNTER7_LO 0 x22B6
#define mmPA_SC_PERFCOUNTER7_SELECT 0 x22A7
#define mmPA_SC_RASTER_CONFIG 0 xA0D4
#define mmPA_SC_SCREEN_SCISSOR_BR 0 xA00D
#define mmPA_SC_SCREEN_SCISSOR_TL 0 xA00C
#define mmPA_SC_VPORT_SCISSOR_0_BR 0 xA095
#define mmPA_SC_VPORT_SCISSOR_0_TL 0 xA094
#define mmPA_SC_VPORT_SCISSOR_10_BR 0 xA0A9
#define mmPA_SC_VPORT_SCISSOR_10_TL 0 xA0A8
#define mmPA_SC_VPORT_SCISSOR_11_BR 0 xA0AB
#define mmPA_SC_VPORT_SCISSOR_11_TL 0 xA0AA
#define mmPA_SC_VPORT_SCISSOR_12_BR 0 xA0AD
#define mmPA_SC_VPORT_SCISSOR_12_TL 0 xA0AC
#define mmPA_SC_VPORT_SCISSOR_13_BR 0 xA0AF
#define mmPA_SC_VPORT_SCISSOR_13_TL 0 xA0AE
#define mmPA_SC_VPORT_SCISSOR_14_BR 0 xA0B1
#define mmPA_SC_VPORT_SCISSOR_14_TL 0 xA0B0
#define mmPA_SC_VPORT_SCISSOR_15_BR 0 xA0B3
#define mmPA_SC_VPORT_SCISSOR_15_TL 0 xA0B2
#define mmPA_SC_VPORT_SCISSOR_1_BR 0 xA097
#define mmPA_SC_VPORT_SCISSOR_1_TL 0 xA096
#define mmPA_SC_VPORT_SCISSOR_2_BR 0 xA099
#define mmPA_SC_VPORT_SCISSOR_2_TL 0 xA098
#define mmPA_SC_VPORT_SCISSOR_3_BR 0 xA09B
#define mmPA_SC_VPORT_SCISSOR_3_TL 0 xA09A
#define mmPA_SC_VPORT_SCISSOR_4_BR 0 xA09D
#define mmPA_SC_VPORT_SCISSOR_4_TL 0 xA09C
#define mmPA_SC_VPORT_SCISSOR_5_BR 0 xA09F
#define mmPA_SC_VPORT_SCISSOR_5_TL 0 xA09E
#define mmPA_SC_VPORT_SCISSOR_6_BR 0 xA0A1
#define mmPA_SC_VPORT_SCISSOR_6_TL 0 xA0A0
#define mmPA_SC_VPORT_SCISSOR_7_BR 0 xA0A3
#define mmPA_SC_VPORT_SCISSOR_7_TL 0 xA0A2
#define mmPA_SC_VPORT_SCISSOR_8_BR 0 xA0A5
#define mmPA_SC_VPORT_SCISSOR_8_TL 0 xA0A4
#define mmPA_SC_VPORT_SCISSOR_9_BR 0 xA0A7
#define mmPA_SC_VPORT_SCISSOR_9_TL 0 xA0A6
#define mmPA_SC_VPORT_ZMAX_0 0 xA0B5
#define mmPA_SC_VPORT_ZMAX_10 0 xA0C9
#define mmPA_SC_VPORT_ZMAX_1 0 xA0B7
#define mmPA_SC_VPORT_ZMAX_11 0 xA0CB
#define mmPA_SC_VPORT_ZMAX_12 0 xA0CD
#define mmPA_SC_VPORT_ZMAX_13 0 xA0CF
#define mmPA_SC_VPORT_ZMAX_14 0 xA0D1
#define mmPA_SC_VPORT_ZMAX_15 0 xA0D3
#define mmPA_SC_VPORT_ZMAX_2 0 xA0B9
#define mmPA_SC_VPORT_ZMAX_3 0 xA0BB
#define mmPA_SC_VPORT_ZMAX_4 0 xA0BD
#define mmPA_SC_VPORT_ZMAX_5 0 xA0BF
#define mmPA_SC_VPORT_ZMAX_6 0 xA0C1
#define mmPA_SC_VPORT_ZMAX_7 0 xA0C3
#define mmPA_SC_VPORT_ZMAX_8 0 xA0C5
#define mmPA_SC_VPORT_ZMAX_9 0 xA0C7
#define mmPA_SC_VPORT_ZMIN_0 0 xA0B4
#define mmPA_SC_VPORT_ZMIN_10 0 xA0C8
#define mmPA_SC_VPORT_ZMIN_1 0 xA0B6
#define mmPA_SC_VPORT_ZMIN_11 0 xA0CA
#define mmPA_SC_VPORT_ZMIN_12 0 xA0CC
#define mmPA_SC_VPORT_ZMIN_13 0 xA0CE
#define mmPA_SC_VPORT_ZMIN_14 0 xA0D0
#define mmPA_SC_VPORT_ZMIN_15 0 xA0D2
#define mmPA_SC_VPORT_ZMIN_2 0 xA0B8
#define mmPA_SC_VPORT_ZMIN_3 0 xA0BA
#define mmPA_SC_VPORT_ZMIN_4 0 xA0BC
#define mmPA_SC_VPORT_ZMIN_5 0 xA0BE
#define mmPA_SC_VPORT_ZMIN_6 0 xA0C0
#define mmPA_SC_VPORT_ZMIN_7 0 xA0C2
#define mmPA_SC_VPORT_ZMIN_8 0 xA0C4
#define mmPA_SC_VPORT_ZMIN_9 0 xA0C6
#define mmPA_SC_WINDOW_OFFSET 0 xA080
#define mmPA_SC_WINDOW_SCISSOR_BR 0 xA082
#define mmPA_SC_WINDOW_SCISSOR_TL 0 xA081
#define mmPA_SU_CNTL_STATUS 0 x2294
#define mmPA_SU_DEBUG_CNTL 0 x2280
#define mmPA_SU_DEBUG_DATA 0 x2281
#define mmPA_SU_HARDWARE_SCREEN_OFFSET 0 xA08D
#define mmPA_SU_LINE_CNTL 0 xA282
#define mmPA_SU_LINE_STIPPLE_CNTL 0 xA209
#define mmPA_SU_LINE_STIPPLE_SCALE 0 xA20A
#define mmPA_SU_LINE_STIPPLE_VALUE 0 x2298
#define mmPA_SU_PERFCOUNTER0_HI 0 x228D
#define mmPA_SU_PERFCOUNTER0_LO 0 x228C
#define mmPA_SU_PERFCOUNTER0_SELECT 0 x2288
#define mmPA_SU_PERFCOUNTER1_HI 0 x228F
#define mmPA_SU_PERFCOUNTER1_LO 0 x228E
#define mmPA_SU_PERFCOUNTER1_SELECT 0 x2289
#define mmPA_SU_PERFCOUNTER2_HI 0 x2291
#define mmPA_SU_PERFCOUNTER2_LO 0 x2290
#define mmPA_SU_PERFCOUNTER2_SELECT 0 x228A
#define mmPA_SU_PERFCOUNTER3_HI 0 x2293
#define mmPA_SU_PERFCOUNTER3_LO 0 x2292
#define mmPA_SU_PERFCOUNTER3_SELECT 0 x228B
#define mmPA_SU_POINT_MINMAX 0 xA281
#define mmPA_SU_POINT_SIZE 0 xA280
#define mmPA_SU_POLY_OFFSET_BACK_OFFSET 0 xA2E3
#define mmPA_SU_POLY_OFFSET_BACK_SCALE 0 xA2E2
#define mmPA_SU_POLY_OFFSET_CLAMP 0 xA2DF
#define mmPA_SU_POLY_OFFSET_DB_FMT_CNTL 0 xA2DE
#define mmPA_SU_POLY_OFFSET_FRONT_OFFSET 0 xA2E1
#define mmPA_SU_POLY_OFFSET_FRONT_SCALE 0 xA2E0
#define mmPA_SU_PRIM_FILTER_CNTL 0 xA20B
#define mmPA_SU_SC_MODE_CNTL 0 xA205
#define mmPA_SU_VTX_CNTL 0 xA2F9
#define mmRAS_BCI_SIGNATURE0 0 x339E
#define mmRAS_BCI_SIGNATURE1 0 x339F
#define mmRAS_CB_SIGNATURE0 0 x339D
#define mmRAS_DB_SIGNATURE0 0 x338B
#define mmRAS_IA_SIGNATURE0 0 x3397
#define mmRAS_IA_SIGNATURE1 0 x3398
#define mmRAS_PA_SIGNATURE0 0 x338C
#define mmRAS_SC_SIGNATURE0 0 x338F
#define mmRAS_SC_SIGNATURE1 0 x3390
#define mmRAS_SC_SIGNATURE2 0 x3391
#define mmRAS_SC_SIGNATURE3 0 x3392
#define mmRAS_SC_SIGNATURE4 0 x3393
#define mmRAS_SC_SIGNATURE5 0 x3394
#define mmRAS_SC_SIGNATURE6 0 x3395
#define mmRAS_SC_SIGNATURE7 0 x3396
#define mmRAS_SIGNATURE_CONTROL 0 x3380
#define mmRAS_SIGNATURE_MASK 0 x3381
#define mmRAS_SPI_SIGNATURE0 0 x3399
#define mmRAS_SPI_SIGNATURE1 0 x339A
#define mmRAS_SQ_SIGNATURE0 0 x338E
#define mmRAS_SX_SIGNATURE0 0 x3382
#define mmRAS_SX_SIGNATURE1 0 x3383
#define mmRAS_SX_SIGNATURE2 0 x3384
#define mmRAS_SX_SIGNATURE3 0 x3385
#define mmRAS_TA_SIGNATURE0 0 x339B
#define mmRAS_TD_SIGNATURE0 0 x339C
#define mmRAS_VGT_SIGNATURE0 0 x338D
#define mmRLC_AUTO_PG_CTRL 0 x310D
#define mmRLC_CAPTURE_GPU_CLOCK_COUNT 0 x30D0
#define mmRLC_CGCG_CGLS_CTRL 0 x3101
#define mmRLC_CGCG_RAMP_CTRL 0 x3102
#define mmRLC_CGTT_MGCG_OVERRIDE 0 x3100
#define mmRLC_CNTL 0 x30C0
#define mmRLC_CU_STATUS 0 x3106
#define mmRLC_DEBUG 0 x30CA
#define mmRLC_DEBUG_SELECT 0 x30C9
#define mmRLC_DRIVER_CPDMA_STATUS 0 x30C7
#define mmRLC_DYN_PG_REQUEST 0 x3104
#define mmRLC_DYN_PG_STATUS 0 x3103
#define mmRLC_GPU_CLOCK_32 0 x30D5
#define mmRLC_GPU_CLOCK_32_RES_SEL 0 x30D4
#define mmRLC_GPU_CLOCK_COUNT_LSB 0 x30CE
#define mmRLC_GPU_CLOCK_COUNT_MSB 0 x30CF
#define mmRLC_LB_ALWAYS_ACTIVE_CU_MASK 0 x3108
#define mmRLC_LB_CNTL 0 x30C3
#define mmRLC_LB_CNTR_INIT 0 x30C6
#define mmRLC_LB_CNTR_MAX 0 x30C5
#define mmRLC_LB_INIT_CU_MASK 0 x3107
#define mmRLC_LB_PARAMS 0 x3109
#define mmRLC_LOAD_BALANCE_CNTR 0 x30F6
#define mmRLC_MAX_PG_CU 0 x310C
#define mmRLC_MC_CNTL 0 x30D1
#define mmRLC_MEM_SLP_CNTL 0 x30D8
#define mmRLC_PERFCOUNTER0_HI 0 x30DC
#define mmRLC_PERFCOUNTER0_LO 0 x30DB
#define mmRLC_PERFCOUNTER0_SELECT 0 x30DA
#define mmRLC_PERFCOUNTER1_HI 0 x30DF
#define mmRLC_PERFCOUNTER1_LO 0 x30DE
#define mmRLC_PERFCOUNTER1_SELECT 0 x30DD
#define mmRLC_PERFMON_CNTL 0 x30D9
#define mmRLC_PG_ALWAYS_ON_CU_MASK 0 x310B
#define mmRLC_PG_CNTL 0 x30D7
#define mmRLC_SAVE_AND_RESTORE_BASE 0 x30C4
#define mmRLC_SERDES_RD_DATA_0 0 x3112
#define mmRLC_SERDES_RD_DATA_1 0 x3113
#define mmRLC_SERDES_RD_DATA_2 0 x3114
#define mmRLC_SERDES_RD_MASTER_INDEX 0 x3111
#define mmRLC_SERDES_WR_CTRL 0 x3117
#define mmRLC_SERDES_WR_DATA 0 x3118
#define mmRLC_SMU_GRBM_REG_SAVE_CTRL 0 x310E
#define mmRLC_SMU_PG_CTRL 0 x310F
#define mmRLC_SMU_PG_WAKE_UP_CTRL 0 x3110
#define mmRLC_SOFT_RESET_GPU 0 x30D6
#define mmRLC_STAT 0 x30D3
#define mmRLC_THREAD1_DELAY 0 x310A
#define mmRLC_UCODE_CNTL 0 x30D2
#define mmSCRATCH_ADDR 0 x2151
#define mmSCRATCH_REG0 0 x2140
#define mmSCRATCH_REG1 0 x2141
#define mmSCRATCH_REG2 0 x2142
#define mmSCRATCH_REG3 0 x2143
#define mmSCRATCH_REG4 0 x2144
#define mmSCRATCH_REG5 0 x2145
#define mmSCRATCH_REG6 0 x2146
#define mmSCRATCH_REG7 0 x2147
#define mmSCRATCH_UMSK 0 x2150
#define mmSPI_ARB_CYCLES_0 0 x243D
#define mmSPI_ARB_CYCLES_1 0 x243E
#define mmSPI_ARB_PRIORITY 0 x243C
#define mmSPI_BARYC_CNTL 0 xA1B8
#define mmSPI_CONFIG_CNTL 0 x2440
#define mmSPI_CONFIG_CNTL_1 0 x244F
#define mmSPI_DEBUG_BUSY 0 x2450
#define mmSPI_DEBUG_CNTL 0 x2441
#define mmSPI_DEBUG_READ 0 x2442
#define mmSPI_GDS_CREDITS 0 x24D8
#define mmSPI_INTERP_CONTROL_0 0 xA1B5
#define mmSPI_LB_CTR_CTRL 0 x24D4
#define mmSPI_LB_CU_MASK 0 x24D5
#define mmSPI_LB_DATA_REG 0 x24D6
#define mmSPI_PERFCOUNTER0_HI 0 x2447
#define mmSPI_PERFCOUNTER0_LO 0 x2448
#define mmSPI_PERFCOUNTER0_SELECT 0 x2443
#define mmSPI_PERFCOUNTER1_HI 0 x2449
#define mmSPI_PERFCOUNTER1_LO 0 x244A
#define mmSPI_PERFCOUNTER1_SELECT 0 x2444
#define mmSPI_PERFCOUNTER2_HI 0 x244B
#define mmSPI_PERFCOUNTER2_LO 0 x244C
#define mmSPI_PERFCOUNTER2_SELECT 0 x2445
#define mmSPI_PERFCOUNTER3_HI 0 x244D
#define mmSPI_PERFCOUNTER3_LO 0 x244E
#define mmSPI_PERFCOUNTER3_SELECT 0 x2446
#define mmSPI_PERFCOUNTER_BINS 0 x243F
#define mmSPI_PG_ENABLE_STATIC_CU_MASK 0 x24D7
#define mmSPI_PS_IN_CONTROL 0 xA1B6
#define mmSPI_PS_INPUT_ADDR 0 xA1B4
#define mmSPI_PS_INPUT_CNTL_0 0 xA191
#define mmSPI_PS_INPUT_CNTL_10 0 xA19B
#define mmSPI_PS_INPUT_CNTL_1 0 xA192
#define mmSPI_PS_INPUT_CNTL_11 0 xA19C
#define mmSPI_PS_INPUT_CNTL_12 0 xA19D
#define mmSPI_PS_INPUT_CNTL_13 0 xA19E
#define mmSPI_PS_INPUT_CNTL_14 0 xA19F
#define mmSPI_PS_INPUT_CNTL_15 0 xA1A0
#define mmSPI_PS_INPUT_CNTL_16 0 xA1A1
#define mmSPI_PS_INPUT_CNTL_17 0 xA1A2
#define mmSPI_PS_INPUT_CNTL_18 0 xA1A3
#define mmSPI_PS_INPUT_CNTL_19 0 xA1A4
#define mmSPI_PS_INPUT_CNTL_20 0 xA1A5
#define mmSPI_PS_INPUT_CNTL_2 0 xA193
#define mmSPI_PS_INPUT_CNTL_21 0 xA1A6
#define mmSPI_PS_INPUT_CNTL_22 0 xA1A7
#define mmSPI_PS_INPUT_CNTL_23 0 xA1A8
#define mmSPI_PS_INPUT_CNTL_24 0 xA1A9
#define mmSPI_PS_INPUT_CNTL_25 0 xA1AA
#define mmSPI_PS_INPUT_CNTL_26 0 xA1AB
#define mmSPI_PS_INPUT_CNTL_27 0 xA1AC
#define mmSPI_PS_INPUT_CNTL_28 0 xA1AD
#define mmSPI_PS_INPUT_CNTL_29 0 xA1AE
#define mmSPI_PS_INPUT_CNTL_30 0 xA1AF
#define mmSPI_PS_INPUT_CNTL_3 0 xA194
#define mmSPI_PS_INPUT_CNTL_31 0 xA1B0
#define mmSPI_PS_INPUT_CNTL_4 0 xA195
#define mmSPI_PS_INPUT_CNTL_5 0 xA196
#define mmSPI_PS_INPUT_CNTL_6 0 xA197
#define mmSPI_PS_INPUT_CNTL_7 0 xA198
#define mmSPI_PS_INPUT_CNTL_8 0 xA199
#define mmSPI_PS_INPUT_CNTL_9 0 xA19A
#define mmSPI_PS_INPUT_ENA 0 xA1B3
#define mmSPI_PS_MAX_WAVE_ID 0 x243B
#define mmSPI_SHADER_COL_FORMAT 0 xA1C5
#define mmSPI_SHADER_PGM_HI_ES 0 x2CC9
#define mmSPI_SHADER_PGM_HI_GS 0 x2C89
#define mmSPI_SHADER_PGM_HI_HS 0 x2D09
#define mmSPI_SHADER_PGM_HI_LS 0 x2D49
#define mmSPI_SHADER_PGM_HI_PS 0 x2C09
#define mmSPI_SHADER_PGM_HI_VS 0 x2C49
#define mmSPI_SHADER_PGM_LO_ES 0 x2CC8
#define mmSPI_SHADER_PGM_LO_GS 0 x2C88
#define mmSPI_SHADER_PGM_LO_HS 0 x2D08
#define mmSPI_SHADER_PGM_LO_LS 0 x2D48
#define mmSPI_SHADER_PGM_LO_PS 0 x2C08
#define mmSPI_SHADER_PGM_LO_VS 0 x2C48
#define mmSPI_SHADER_PGM_RSRC1_ES 0 x2CCA
#define mmSPI_SHADER_PGM_RSRC1_GS 0 x2C8A
#define mmSPI_SHADER_PGM_RSRC1_HS 0 x2D0A
#define mmSPI_SHADER_PGM_RSRC1_LS 0 x2D4A
#define mmSPI_SHADER_PGM_RSRC1_PS 0 x2C0A
#define mmSPI_SHADER_PGM_RSRC1_VS 0 x2C4A
#define mmSPI_SHADER_PGM_RSRC2_ES 0 x2CCB
#define mmSPI_SHADER_PGM_RSRC2_GS 0 x2C8B
#define mmSPI_SHADER_PGM_RSRC2_HS 0 x2D0B
#define mmSPI_SHADER_PGM_RSRC2_LS 0 x2D4B
#define mmSPI_SHADER_PGM_RSRC2_PS 0 x2C0B
#define mmSPI_SHADER_PGM_RSRC2_VS 0 x2C4B
#define mmSPI_SHADER_POS_FORMAT 0 xA1C3
#define mmSPI_SHADER_TBA_HI_ES 0 x2CC1
#define mmSPI_SHADER_TBA_HI_GS 0 x2C81
#define mmSPI_SHADER_TBA_HI_HS 0 x2D01
#define mmSPI_SHADER_TBA_HI_LS 0 x2D41
#define mmSPI_SHADER_TBA_HI_PS 0 x2C01
#define mmSPI_SHADER_TBA_HI_VS 0 x2C41
#define mmSPI_SHADER_TBA_LO_ES 0 x2CC0
#define mmSPI_SHADER_TBA_LO_GS 0 x2C80
#define mmSPI_SHADER_TBA_LO_HS 0 x2D00
#define mmSPI_SHADER_TBA_LO_LS 0 x2D40
#define mmSPI_SHADER_TBA_LO_PS 0 x2C00
#define mmSPI_SHADER_TBA_LO_VS 0 x2C40
#define mmSPI_SHADER_TMA_HI_ES 0 x2CC3
#define mmSPI_SHADER_TMA_HI_GS 0 x2C83
#define mmSPI_SHADER_TMA_HI_HS 0 x2D03
#define mmSPI_SHADER_TMA_HI_LS 0 x2D43
#define mmSPI_SHADER_TMA_HI_PS 0 x2C03
#define mmSPI_SHADER_TMA_HI_VS 0 x2C43
#define mmSPI_SHADER_TMA_LO_ES 0 x2CC2
#define mmSPI_SHADER_TMA_LO_GS 0 x2C82
#define mmSPI_SHADER_TMA_LO_HS 0 x2D02
#define mmSPI_SHADER_TMA_LO_LS 0 x2D42
#define mmSPI_SHADER_TMA_LO_PS 0 x2C02
#define mmSPI_SHADER_TMA_LO_VS 0 x2C42
#define mmSPI_SHADER_USER_DATA_ES_0 0 x2CCC
#define mmSPI_SHADER_USER_DATA_ES_10 0 x2CD6
#define mmSPI_SHADER_USER_DATA_ES_1 0 x2CCD
#define mmSPI_SHADER_USER_DATA_ES_11 0 x2CD7
#define mmSPI_SHADER_USER_DATA_ES_12 0 x2CD8
#define mmSPI_SHADER_USER_DATA_ES_13 0 x2CD9
#define mmSPI_SHADER_USER_DATA_ES_14 0 x2CDA
#define mmSPI_SHADER_USER_DATA_ES_15 0 x2CDB
#define mmSPI_SHADER_USER_DATA_ES_2 0 x2CCE
#define mmSPI_SHADER_USER_DATA_ES_3 0 x2CCF
#define mmSPI_SHADER_USER_DATA_ES_4 0 x2CD0
#define mmSPI_SHADER_USER_DATA_ES_5 0 x2CD1
#define mmSPI_SHADER_USER_DATA_ES_6 0 x2CD2
#define mmSPI_SHADER_USER_DATA_ES_7 0 x2CD3
#define mmSPI_SHADER_USER_DATA_ES_8 0 x2CD4
#define mmSPI_SHADER_USER_DATA_ES_9 0 x2CD5
#define mmSPI_SHADER_USER_DATA_GS_0 0 x2C8C
#define mmSPI_SHADER_USER_DATA_GS_10 0 x2C96
#define mmSPI_SHADER_USER_DATA_GS_1 0 x2C8D
#define mmSPI_SHADER_USER_DATA_GS_11 0 x2C97
#define mmSPI_SHADER_USER_DATA_GS_12 0 x2C98
#define mmSPI_SHADER_USER_DATA_GS_13 0 x2C99
#define mmSPI_SHADER_USER_DATA_GS_14 0 x2C9A
#define mmSPI_SHADER_USER_DATA_GS_15 0 x2C9B
#define mmSPI_SHADER_USER_DATA_GS_2 0 x2C8E
#define mmSPI_SHADER_USER_DATA_GS_3 0 x2C8F
#define mmSPI_SHADER_USER_DATA_GS_4 0 x2C90
#define mmSPI_SHADER_USER_DATA_GS_5 0 x2C91
#define mmSPI_SHADER_USER_DATA_GS_6 0 x2C92
#define mmSPI_SHADER_USER_DATA_GS_7 0 x2C93
#define mmSPI_SHADER_USER_DATA_GS_8 0 x2C94
#define mmSPI_SHADER_USER_DATA_GS_9 0 x2C95
#define mmSPI_SHADER_USER_DATA_HS_0 0 x2D0C
#define mmSPI_SHADER_USER_DATA_HS_10 0 x2D16
#define mmSPI_SHADER_USER_DATA_HS_1 0 x2D0D
#define mmSPI_SHADER_USER_DATA_HS_11 0 x2D17
#define mmSPI_SHADER_USER_DATA_HS_12 0 x2D18
#define mmSPI_SHADER_USER_DATA_HS_13 0 x2D19
#define mmSPI_SHADER_USER_DATA_HS_14 0 x2D1A
#define mmSPI_SHADER_USER_DATA_HS_15 0 x2D1B
#define mmSPI_SHADER_USER_DATA_HS_2 0 x2D0E
#define mmSPI_SHADER_USER_DATA_HS_3 0 x2D0F
#define mmSPI_SHADER_USER_DATA_HS_4 0 x2D10
#define mmSPI_SHADER_USER_DATA_HS_5 0 x2D11
#define mmSPI_SHADER_USER_DATA_HS_6 0 x2D12
#define mmSPI_SHADER_USER_DATA_HS_7 0 x2D13
#define mmSPI_SHADER_USER_DATA_HS_8 0 x2D14
#define mmSPI_SHADER_USER_DATA_HS_9 0 x2D15
#define mmSPI_SHADER_USER_DATA_LS_0 0 x2D4C
#define mmSPI_SHADER_USER_DATA_LS_10 0 x2D56
#define mmSPI_SHADER_USER_DATA_LS_1 0 x2D4D
#define mmSPI_SHADER_USER_DATA_LS_11 0 x2D57
#define mmSPI_SHADER_USER_DATA_LS_12 0 x2D58
#define mmSPI_SHADER_USER_DATA_LS_13 0 x2D59
#define mmSPI_SHADER_USER_DATA_LS_14 0 x2D5A
#define mmSPI_SHADER_USER_DATA_LS_15 0 x2D5B
#define mmSPI_SHADER_USER_DATA_LS_2 0 x2D4E
#define mmSPI_SHADER_USER_DATA_LS_3 0 x2D4F
#define mmSPI_SHADER_USER_DATA_LS_4 0 x2D50
#define mmSPI_SHADER_USER_DATA_LS_5 0 x2D51
#define mmSPI_SHADER_USER_DATA_LS_6 0 x2D52
#define mmSPI_SHADER_USER_DATA_LS_7 0 x2D53
#define mmSPI_SHADER_USER_DATA_LS_8 0 x2D54
#define mmSPI_SHADER_USER_DATA_LS_9 0 x2D55
#define mmSPI_SHADER_USER_DATA_PS_0 0 x2C0C
#define mmSPI_SHADER_USER_DATA_PS_10 0 x2C16
#define mmSPI_SHADER_USER_DATA_PS_1 0 x2C0D
#define mmSPI_SHADER_USER_DATA_PS_11 0 x2C17
#define mmSPI_SHADER_USER_DATA_PS_12 0 x2C18
#define mmSPI_SHADER_USER_DATA_PS_13 0 x2C19
#define mmSPI_SHADER_USER_DATA_PS_14 0 x2C1A
#define mmSPI_SHADER_USER_DATA_PS_15 0 x2C1B
#define mmSPI_SHADER_USER_DATA_PS_2 0 x2C0E
#define mmSPI_SHADER_USER_DATA_PS_3 0 x2C0F
#define mmSPI_SHADER_USER_DATA_PS_4 0 x2C10
#define mmSPI_SHADER_USER_DATA_PS_5 0 x2C11
#define mmSPI_SHADER_USER_DATA_PS_6 0 x2C12
#define mmSPI_SHADER_USER_DATA_PS_7 0 x2C13
#define mmSPI_SHADER_USER_DATA_PS_8 0 x2C14
#define mmSPI_SHADER_USER_DATA_PS_9 0 x2C15
#define mmSPI_SHADER_USER_DATA_VS_0 0 x2C4C
#define mmSPI_SHADER_USER_DATA_VS_10 0 x2C56
#define mmSPI_SHADER_USER_DATA_VS_1 0 x2C4D
#define mmSPI_SHADER_USER_DATA_VS_11 0 x2C57
#define mmSPI_SHADER_USER_DATA_VS_12 0 x2C58
#define mmSPI_SHADER_USER_DATA_VS_13 0 x2C59
#define mmSPI_SHADER_USER_DATA_VS_14 0 x2C5A
#define mmSPI_SHADER_USER_DATA_VS_15 0 x2C5B
#define mmSPI_SHADER_USER_DATA_VS_2 0 x2C4E
#define mmSPI_SHADER_USER_DATA_VS_3 0 x2C4F
#define mmSPI_SHADER_USER_DATA_VS_4 0 x2C50
#define mmSPI_SHADER_USER_DATA_VS_5 0 x2C51
#define mmSPI_SHADER_USER_DATA_VS_6 0 x2C52
#define mmSPI_SHADER_USER_DATA_VS_7 0 x2C53
#define mmSPI_SHADER_USER_DATA_VS_8 0 x2C54
#define mmSPI_SHADER_USER_DATA_VS_9 0 x2C55
#define mmSPI_SHADER_Z_FORMAT 0 xA1C4
#define mmSPI_SLAVE_DEBUG_BUSY 0 x24D3
#define mmSPI_SX_EXPORT_BUFFER_SIZES 0 x24D9
#define mmSPI_SX_SCOREBOARD_BUFFER_SIZES 0 x24DA
#define mmSPI_TMPRING_SIZE 0 xA1BA
#define mmSPI_VS_OUT_CONFIG 0 xA1B1
#define mmSQ_ALU_CLK_CTRL 0 x2360
#define mmSQ_BUF_RSRC_WORD0 0 x23C0
#define mmSQ_BUF_RSRC_WORD1 0 x23C1
#define mmSQ_BUF_RSRC_WORD2 0 x23C2
#define mmSQ_BUF_RSRC_WORD3 0 x23C3
#define mmSQC_CACHES 0 x2302
#define mmSQC_CONFIG 0 x2301
#define mmSQ_CONFIG 0 x2300
#define mmSQC_SECDED_CNT 0 x23A0
#define mmSQ_DEBUG_STS_GLOBAL 0 x2309
#define mmSQ_DED_CNT 0 x23A2
#define mmSQ_DED_INFO 0 x23A3
#define mmSQ_DS_0 0 x237F
#define mmSQ_DS_1 0 x237F
#define mmSQ_EXP_0 0 x237F
#define mmSQ_EXP_1 0 x237F
#define mmSQ_FIFO_SIZES 0 x2305
#define mmSQ_IMG_RSRC_WORD0 0 x23C4
#define mmSQ_IMG_RSRC_WORD1 0 x23C5
#define mmSQ_IMG_RSRC_WORD2 0 x23C6
#define mmSQ_IMG_RSRC_WORD3 0 x23C7
#define mmSQ_IMG_RSRC_WORD4 0 x23C8
#define mmSQ_IMG_RSRC_WORD5 0 x23C9
#define mmSQ_IMG_RSRC_WORD6 0 x23CA
#define mmSQ_IMG_RSRC_WORD7 0 x23CB
#define mmSQ_IMG_SAMP_WORD0 0 x23CC
#define mmSQ_IMG_SAMP_WORD1 0 x23CD
#define mmSQ_IMG_SAMP_WORD2 0 x23CE
#define mmSQ_IMG_SAMP_WORD3 0 x23CF
#define mmSQ_IND_CMD 0 x237A
#define mmSQ_IND_DATA 0 x2379
#define mmSQ_IND_INDEX 0 x2378
#define mmSQ_INST 0 x237F
#define mmSQ_LB_CTR_CTRL 0 x2398
#define mmSQ_LB_DATA_ALU_CYCLES 0 x2399
#define mmSQ_LB_DATA_ALU_STALLS 0 x239B
#define mmSQ_LB_DATA_TEX_CYCLES 0 x239A
#define mmSQ_LB_DATA_TEX_STALLS 0 x239C
#define mmSQ_MIMG_0 0 x237F
#define mmSQ_MIMG_1 0 x237F
#define mmSQ_MTBUF_0 0 x237F
#define mmSQ_MTBUF_1 0 x237F
#define mmSQ_MUBUF_0 0 x237F
#define mmSQ_MUBUF_1 0 x237F
#define mmSQ_PERFCOUNTER0_HI 0 x2321
#define mmSQ_PERFCOUNTER0_LO 0 x2320
#define mmSQ_PERFCOUNTER0_SELECT 0 x2340
#define mmSQ_PERFCOUNTER10_HI 0 x2335
#define mmSQ_PERFCOUNTER10_LO 0 x2334
#define mmSQ_PERFCOUNTER10_SELECT 0 x234A
#define mmSQ_PERFCOUNTER11_HI 0 x2337
#define mmSQ_PERFCOUNTER11_LO 0 x2336
#define mmSQ_PERFCOUNTER11_SELECT 0 x234B
#define mmSQ_PERFCOUNTER12_HI 0 x2339
#define mmSQ_PERFCOUNTER12_LO 0 x2338
#define mmSQ_PERFCOUNTER12_SELECT 0 x234C
#define mmSQ_PERFCOUNTER13_HI 0 x233B
#define mmSQ_PERFCOUNTER13_LO 0 x233A
#define mmSQ_PERFCOUNTER13_SELECT 0 x234D
#define mmSQ_PERFCOUNTER14_HI 0 x233D
#define mmSQ_PERFCOUNTER14_LO 0 x233C
#define mmSQ_PERFCOUNTER14_SELECT 0 x234E
#define mmSQ_PERFCOUNTER15_HI 0 x233F
#define mmSQ_PERFCOUNTER15_LO 0 x233E
#define mmSQ_PERFCOUNTER15_SELECT 0 x234F
#define mmSQ_PERFCOUNTER1_HI 0 x2323
#define mmSQ_PERFCOUNTER1_LO 0 x2322
#define mmSQ_PERFCOUNTER1_SELECT 0 x2341
#define mmSQ_PERFCOUNTER2_HI 0 x2325
#define mmSQ_PERFCOUNTER2_LO 0 x2324
#define mmSQ_PERFCOUNTER2_SELECT 0 x2342
#define mmSQ_PERFCOUNTER3_HI 0 x2327
#define mmSQ_PERFCOUNTER3_LO 0 x2326
#define mmSQ_PERFCOUNTER3_SELECT 0 x2343
#define mmSQ_PERFCOUNTER4_HI 0 x2329
#define mmSQ_PERFCOUNTER4_LO 0 x2328
#define mmSQ_PERFCOUNTER4_SELECT 0 x2344
#define mmSQ_PERFCOUNTER5_HI 0 x232B
#define mmSQ_PERFCOUNTER5_LO 0 x232A
#define mmSQ_PERFCOUNTER5_SELECT 0 x2345
#define mmSQ_PERFCOUNTER6_HI 0 x232D
#define mmSQ_PERFCOUNTER6_LO 0 x232C
#define mmSQ_PERFCOUNTER6_SELECT 0 x2346
#define mmSQ_PERFCOUNTER7_HI 0 x232F
#define mmSQ_PERFCOUNTER7_LO 0 x232E
#define mmSQ_PERFCOUNTER7_SELECT 0 x2347
#define mmSQ_PERFCOUNTER8_HI 0 x2331
#define mmSQ_PERFCOUNTER8_LO 0 x2330
#define mmSQ_PERFCOUNTER8_SELECT 0 x2348
#define mmSQ_PERFCOUNTER9_HI 0 x2333
#define mmSQ_PERFCOUNTER9_LO 0 x2332
#define mmSQ_PERFCOUNTER9_SELECT 0 x2349
#define mmSQ_PERFCOUNTER_CTRL 0 x2306
#define mmSQ_POWER_THROTTLE 0 x2396
#define mmSQ_POWER_THROTTLE2 0 x2397
#define mmSQ_RANDOM_WAVE_PRI 0 x2303
#define mmSQ_REG_CREDITS 0 x2304
#define mmSQ_SEC_CNT 0 x23A1
#define mmSQ_SMRD 0 x237F
#define mmSQ_SOP1 0 x237F
#define mmSQ_SOP2 0 x237F
#define mmSQ_SOPC 0 x237F
#define mmSQ_SOPK 0 x237F
#define mmSQ_SOPP 0 x237F
#define mmSQ_TEX_CLK_CTRL 0 x2361
#define mmSQ_THREAD_TRACE_BASE 0 x2380
#define mmSQ_THREAD_TRACE_CNTR 0 x2390
#define mmSQ_THREAD_TRACE_CTRL 0 x238F
#define mmSQ_THREAD_TRACE_HIWATER 0 x2392
#define mmSQ_THREAD_TRACE_MASK 0 x2382
#define mmSQ_THREAD_TRACE_MODE 0 x238E
#define mmSQ_THREAD_TRACE_PERF_MASK 0 x2384
#define mmSQ_THREAD_TRACE_SIZE 0 x2381
#define mmSQ_THREAD_TRACE_STATUS 0 x238D
#define mmSQ_THREAD_TRACE_TOKEN_MASK 0 x2383
#define mmSQ_THREAD_TRACE_USERDATA_0 0 x2388
#define mmSQ_THREAD_TRACE_USERDATA_1 0 x2389
#define mmSQ_THREAD_TRACE_USERDATA_2 0 x238A
#define mmSQ_THREAD_TRACE_USERDATA_3 0 x238B
#define mmSQ_THREAD_TRACE_WORD_CMN 0 x23B0
#define mmSQ_THREAD_TRACE_WORD_EVENT 0 x23B0
#define mmSQ_THREAD_TRACE_WORD_INST 0 x23B0
#define mmSQ_THREAD_TRACE_WORD_INST_PC_1_OF_2 0 x23B0
#define mmSQ_THREAD_TRACE_WORD_INST_PC_2_OF_2 0 x23B1
#define mmSQ_THREAD_TRACE_WORD_INST_USERDATA_1_OF_2 0 x23B0
#define mmSQ_THREAD_TRACE_WORD_INST_USERDATA_2_OF_2 0 x23B1
#define mmSQ_THREAD_TRACE_WORD_ISSUE 0 x23B0
#define mmSQ_THREAD_TRACE_WORD_MISC 0 x23B0
#define mmSQ_THREAD_TRACE_WORD_PERF_1_OF_2 0 x23B0
#define mmSQ_THREAD_TRACE_WORD_PERF_2_OF_2 0 x23B1
#define mmSQ_THREAD_TRACE_WORD_REG_1_OF_2 0 x23B0
#define mmSQ_THREAD_TRACE_WORD_REG_2_OF_2 0 x23B0
#define mmSQ_THREAD_TRACE_WORD_TIME 0 x23B0
#define mmSQ_THREAD_TRACE_WORD_TIMESTAMP_1_OF_2 0 x23B0
#define mmSQ_THREAD_TRACE_WORD_TIMESTAMP_2_OF_2 0 x23B1
#define mmSQ_THREAD_TRACE_WORD_WAVE 0 x23B0
#define mmSQ_THREAD_TRACE_WORD_WAVE_START 0 x23B0
#define mmSQ_THREAD_TRACE_WPTR 0 x238C
#define mmSQ_TIME_HI 0 x237C
#define mmSQ_TIME_LO 0 x237D
#define mmSQ_VINTRP 0 x237F
#define mmSQ_VOP1 0 x237F
#define mmSQ_VOP2 0 x237F
#define mmSQ_VOP3_0 0 x237F
#define mmSQ_VOP3_0_SDST_ENC 0 x237F
#define mmSQ_VOP3_1 0 x237F
#define mmSQ_VOPC 0 x237F
#define mmSX_DEBUG_1 0 x2418
#define mmSX_DEBUG_BUSY 0 x2414
#define mmSX_DEBUG_BUSY_2 0 x2415
#define mmSX_DEBUG_BUSY_3 0 x2416
#define mmSX_DEBUG_BUSY_4 0 x2417
#define mmSX_PERFCOUNTER0_HI 0 x2421
#define mmSX_PERFCOUNTER0_LO 0 x2420
#define mmSX_PERFCOUNTER0_SELECT 0 x241C
#define mmSX_PERFCOUNTER1_HI 0 x2423
#define mmSX_PERFCOUNTER1_LO 0 x2422
#define mmSX_PERFCOUNTER1_SELECT 0 x241D
#define mmSX_PERFCOUNTER2_HI 0 x2425
#define mmSX_PERFCOUNTER2_LO 0 x2424
#define mmSX_PERFCOUNTER2_SELECT 0 x241E
#define mmSX_PERFCOUNTER3_HI 0 x2427
#define mmSX_PERFCOUNTER3_LO 0 x2426
#define mmSX_PERFCOUNTER3_SELECT 0 x241F
#define mmTA_BC_BASE_ADDR 0 xA020
#define mmTA_CGTT_CTRL 0 x2544
#define mmTA_CNTL 0 x2541
#define mmTA_CNTL_AUX 0 x2542
#define mmTA_CS_BC_BASE_ADDR 0 x2543
#define mmTA_DEBUG_DATA 0 x254D
#define mmTA_DEBUG_INDEX 0 x254C
#define mmTA_PERFCOUNTER0_HI 0 x2556
#define mmTA_PERFCOUNTER0_LO 0 x2555
#define mmTA_PERFCOUNTER0_SELECT 0 x2554
#define mmTA_PERFCOUNTER1_HI 0 x2562
#define mmTA_PERFCOUNTER1_LO 0 x2561
#define mmTA_PERFCOUNTER1_SELECT 0 x2560
#define mmTA_SCRATCH 0 x2564
#define mmTA_STATUS 0 x2548
#define mmTCA_CGTT_SCLK_CTRL 0 x2BC1
#define mmTCA_CTRL 0 x2BC0
#define mmTCA_PERFCOUNTER0_HI 0 x2BD2
#define mmTCA_PERFCOUNTER0_LO 0 x2BD1
#define mmTCA_PERFCOUNTER0_SELECT 0 x2BD0
#define mmTCA_PERFCOUNTER1_HI 0 x2BD5
#define mmTCA_PERFCOUNTER1_LO 0 x2BD4
#define mmTCA_PERFCOUNTER1_SELECT 0 x2BD3
#define mmTCA_PERFCOUNTER2_HI 0 x2BD8
#define mmTCA_PERFCOUNTER2_LO 0 x2BD7
#define mmTCA_PERFCOUNTER2_SELECT 0 x2BD6
#define mmTCA_PERFCOUNTER3_HI 0 x2BDB
#define mmTCA_PERFCOUNTER3_LO 0 x2BDA
#define mmTCA_PERFCOUNTER3_SELECT 0 x2BD9
#define mmTCC_CGTT_SCLK_CTRL 0 x2B81
#define mmTCC_CTRL 0 x2B80
#define mmTCC_EDC_COUNTER 0 x2B82
#define mmTCC_PERFCOUNTER0_HI 0 x2B92
#define mmTCC_PERFCOUNTER0_LO 0 x2B91
#define mmTCC_PERFCOUNTER0_SELECT 0 x2B90
#define mmTCC_PERFCOUNTER1_HI 0 x2B95
#define mmTCC_PERFCOUNTER1_LO 0 x2B94
#define mmTCC_PERFCOUNTER1_SELECT 0 x2B93
#define mmTCC_PERFCOUNTER2_HI 0 x2B98
#define mmTCC_PERFCOUNTER2_LO 0 x2B97
#define mmTCC_PERFCOUNTER2_SELECT 0 x2B96
#define mmTCC_PERFCOUNTER3_HI 0 x2B9B
#define mmTCC_PERFCOUNTER3_LO 0 x2B9A
#define mmTCC_PERFCOUNTER3_SELECT 0 x2B99
#define mmTCI_CNTL_1 0 x2B62
#define mmTCI_CNTL_2 0 x2B63
#define mmTCI_STATUS 0 x2B61
#define mmTCP_ADDR_CONFIG 0 x2B05
#define mmTCP_BUFFER_ADDR_HASH_CNTL 0 x2B16
#define mmTCP_CHAN_STEER_HI 0 x2B04
#define mmTCP_CHAN_STEER_LO 0 x2B03
#define mmTCP_CNTL 0 x2B02
#define mmTCP_CREDIT 0 x2B06
#define mmTCP_EDC_COUNTER 0 x2B17
#define mmTCP_INVALIDATE 0 x2B00
#define mmTCP_PERFCOUNTER0_HI 0 x2B0A
#define mmTCP_PERFCOUNTER0_LO 0 x2B0B
#define mmTCP_PERFCOUNTER0_SELECT 0 x2B09
#define mmTCP_PERFCOUNTER1_HI 0 x2B0D
#define mmTCP_PERFCOUNTER1_LO 0 x2B0E
#define mmTCP_PERFCOUNTER1_SELECT 0 x2B0C
#define mmTCP_PERFCOUNTER2_HI 0 x2B10
#define mmTCP_PERFCOUNTER2_LO 0 x2B11
#define mmTCP_PERFCOUNTER2_SELECT 0 x2B0F
#define mmTCP_PERFCOUNTER3_HI 0 x2B13
#define mmTCP_PERFCOUNTER3_LO 0 x2B14
#define mmTCP_PERFCOUNTER3_SELECT 0 x2B12
#define mmTCP_STATUS 0 x2B01
#define mmTD_CGTT_CTRL 0 x2527
#define mmTD_CNTL 0 x2525
#define mmTD_DEBUG_DATA 0 x2529
#define mmTD_DEBUG_INDEX 0 x2528
#define mmTD_PERFCOUNTER0_HI 0 x252E
#define mmTD_PERFCOUNTER0_LO 0 x252D
#define mmTD_PERFCOUNTER0_SELECT 0 x252C
#define mmTD_SCRATCH 0 x2530
#define mmTD_STATUS 0 x2526
#define mmUSER_SQC_BANK_DISABLE 0 x2308
#define mmVGT_CACHE_INVALIDATION 0 x2231
#define mmVGT_CNTL_STATUS 0 x223C
#define mmVGT_DEBUG_CNTL 0 x2238
#define mmVGT_DEBUG_DATA 0 x2239
#define mmVGT_DMA_BASE 0 xA1FA
#define mmVGT_DMA_BASE_HI 0 xA1F9
#define mmVGT_DMA_DATA_FIFO_DEPTH 0 x222D
#define mmVGT_DMA_INDEX_TYPE 0 xA29F
#define mmVGT_DMA_MAX_SIZE 0 xA29E
#define mmVGT_DMA_NUM_INSTANCES 0 xA2A2
#define mmVGT_DMA_REQ_FIFO_DEPTH 0 x222E
#define mmVGT_DMA_SIZE 0 xA29D
#define mmVGT_DRAW_INIT_FIFO_DEPTH 0 x222F
#define mmVGT_DRAW_INITIATOR 0 xA1FC
#define mmVGT_ENHANCE 0 xA294
#define mmVGT_ESGS_RING_ITEMSIZE 0 xA2AB
#define mmVGT_ESGS_RING_SIZE 0 x2232
#define mmVGT_ES_PER_GS 0 xA296
#define mmVGT_EVENT_ADDRESS_REG 0 xA1FE
#define mmVGT_EVENT_INITIATOR 0 xA2A4
#define mmVGT_FIFO_DEPTHS 0 x2234
#define mmVGT_GROUP_DECR 0 xA28B
#define mmVGT_GROUP_FIRST_DECR 0 xA28A
#define mmVGT_GROUP_PRIM_TYPE 0 xA289
#define mmVGT_GROUP_VECT_0_CNTL 0 xA28C
#define mmVGT_GROUP_VECT_0_FMT_CNTL 0 xA28E
#define mmVGT_GROUP_VECT_1_CNTL 0 xA28D
#define mmVGT_GROUP_VECT_1_FMT_CNTL 0 xA28F
#define mmVGT_GS_INSTANCE_CNT 0 xA2E4
#define mmVGT_GS_MAX_VERT_OUT 0 xA2CE
#define mmVGT_GS_MODE 0 xA290
#define mmVGT_GS_OUT_PRIM_TYPE 0 xA29B
#define mmVGT_GS_PER_ES 0 xA295
#define mmVGT_GS_PER_VS 0 xA297
#define mmVGT_GS_VERTEX_REUSE 0 x2235
#define mmVGT_GS_VERT_ITEMSIZE 0 xA2D7
#define mmVGT_GS_VERT_ITEMSIZE_1 0 xA2D8
#define mmVGT_GS_VERT_ITEMSIZE_2 0 xA2D9
#define mmVGT_GS_VERT_ITEMSIZE_3 0 xA2DA
#define mmVGT_GSVS_RING_ITEMSIZE 0 xA2AC
#define mmVGT_GSVS_RING_OFFSET_1 0 xA298
#define mmVGT_GSVS_RING_OFFSET_2 0 xA299
#define mmVGT_GSVS_RING_OFFSET_3 0 xA29A
#define mmVGT_GSVS_RING_SIZE 0 x2233
#define mmVGT_HOS_CNTL 0 xA285
#define mmVGT_HOS_MAX_TESS_LEVEL 0 xA286
#define mmVGT_HOS_MIN_TESS_LEVEL 0 xA287
#define mmVGT_HOS_REUSE_DEPTH 0 xA288
#define mmVGT_HS_OFFCHIP_PARAM 0 x226C
#define mmVGT_IMMED_DATA 0 xA1FD
#define mmVGT_INDEX_TYPE 0 x2257
#define mmVGT_INDX_OFFSET 0 xA102
#define mmVGT_INSTANCE_STEP_RATE_0 0 xA2A8
#define mmVGT_INSTANCE_STEP_RATE_1 0 xA2A9
#define mmVGT_LAST_COPY_STATE 0 x2230
#define mmVGT_LS_HS_CONFIG 0 xA2D6
#define mmVGT_MAX_VTX_INDX 0 xA100
#define mmVGT_MC_LAT_CNTL 0 x2236
#define mmVGT_MIN_VTX_INDX 0 xA101
#define mmVGT_MULTI_PRIM_IB_RESET_EN 0 xA2A5
#define mmVGT_MULTI_PRIM_IB_RESET_INDX 0 xA103
#define mmVGT_NUM_INDICES 0 x225C
#define mmVGT_NUM_INSTANCES 0 x225D
#define mmVGT_OUT_DEALLOC_CNTL 0 xA317
#define mmVGT_OUTPUT_PATH_CNTL 0 xA284
#define mmVGT_PERFCOUNTER0_HI 0 x224D
#define mmVGT_PERFCOUNTER0_LO 0 x224C
#define mmVGT_PERFCOUNTER0_SELECT 0 x2248
#define mmVGT_PERFCOUNTER1_HI 0 x224F
#define mmVGT_PERFCOUNTER1_LO 0 x224E
#define mmVGT_PERFCOUNTER1_SELECT 0 x2249
#define mmVGT_PERFCOUNTER2_HI 0 x2251
#define mmVGT_PERFCOUNTER2_LO 0 x2250
#define mmVGT_PERFCOUNTER2_SELECT 0 x224A
#define mmVGT_PERFCOUNTER3_HI 0 x2253
#define mmVGT_PERFCOUNTER3_LO 0 x2252
#define mmVGT_PERFCOUNTER3_SELECT 0 x224B
#define mmVGT_PERFCOUNTER_SEID_MASK 0 x2247
#define mmVGT_PRIMITIVEID_EN 0 xA2A1
#define mmVGT_PRIMITIVEID_RESET 0 xA2A3
#define mmVGT_PRIMITIVE_TYPE 0 x2256
#define mmVGT_REUSE_OFF 0 xA2AD
#define mmVGT_SHADER_STAGES_EN 0 xA2D5
#define mmVGT_STRMOUT_BUFFER_CONFIG 0 xA2E6
#define mmVGT_STRMOUT_BUFFER_FILLED_SIZE_0 0 x2258
#define mmVGT_STRMOUT_BUFFER_FILLED_SIZE_1 0 x2259
#define mmVGT_STRMOUT_BUFFER_FILLED_SIZE_2 0 x225A
#define mmVGT_STRMOUT_BUFFER_FILLED_SIZE_3 0 x225B
#define mmVGT_STRMOUT_BUFFER_OFFSET_0 0 xA2B7
#define mmVGT_STRMOUT_BUFFER_OFFSET_1 0 xA2BB
#define mmVGT_STRMOUT_BUFFER_OFFSET_2 0 xA2BF
#define mmVGT_STRMOUT_BUFFER_OFFSET_3 0 xA2C3
#define mmVGT_STRMOUT_BUFFER_SIZE_0 0 xA2B4
#define mmVGT_STRMOUT_BUFFER_SIZE_1 0 xA2B8
#define mmVGT_STRMOUT_BUFFER_SIZE_2 0 xA2BC
#define mmVGT_STRMOUT_BUFFER_SIZE_3 0 xA2C0
#define mmVGT_STRMOUT_CONFIG 0 xA2E5
#define mmVGT_STRMOUT_DRAW_OPAQUE_BUFFER_FILLED_SIZE 0 xA2CB
#define mmVGT_STRMOUT_DRAW_OPAQUE_OFFSET 0 xA2CA
#define mmVGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDE 0 xA2CC
#define mmVGT_STRMOUT_VTX_STRIDE_0 0 xA2B5
#define mmVGT_STRMOUT_VTX_STRIDE_1 0 xA2B9
#define mmVGT_STRMOUT_VTX_STRIDE_2 0 xA2BD
#define mmVGT_STRMOUT_VTX_STRIDE_3 0 xA2C1
#define mmVGT_SYS_CONFIG 0 x2263
#define mmVGT_TF_MEMORY_BASE 0 x226E
#define mmVGT_TF_PARAM 0 xA2DB
#define mmVGT_TF_RING_SIZE 0 x2262
#define mmVGT_VERTEX_REUSE_BLOCK_CNTL 0 xA316
#define mmVGT_VTX_CNT_EN 0 xA2AE
#define mmVGT_VTX_VECT_EJECT_REG 0 x222C
/* manually added from old sid.h */
#define mmCB_PERFCOUNTER0_SELECT0 0 x2688
#define mmCB_PERFCOUNTER1_SELECT0 0 x268A
#define mmCB_PERFCOUNTER1_SELECT1 0 x268B
#define mmCB_PERFCOUNTER2_SELECT0 0 x268C
#define mmCB_PERFCOUNTER2_SELECT1 0 x268D
#define mmCB_PERFCOUNTER3_SELECT0 0 x268E
#define mmCB_PERFCOUNTER3_SELECT1 0 x268F
#define mmCP_COHER_CNTL2 0 x217A
#define mmCP_DEBUG 0 x307F
#define mmRLC_SERDES_MASTER_BUSY_0 0 x3119
#define mmRLC_SERDES_MASTER_BUSY_1 0 x311A
#define mmRLC_RL_BASE 0 x30C1
#define mmRLC_RL_SIZE 0 x30C2
#define mmRLC_UCODE_ADDR 0 x30CB
#define mmRLC_UCODE_DATA 0 x30CC
#define mmRLC_GCPM_GENERAL_3 0 x311E
#define mmRLC_SERDES_WR_MASTER_MASK_0 0 x3115
#define mmRLC_SERDES_WR_MASTER_MASK_1 0 x3116
#define mmRLC_TTOP_D 0 x3105
#define mmRLC_CLEAR_STATE_RESTORE_BASE 0 x30C8
#define mmRLC_PG_AO_CU_MASK 0 x310B
#define mmSPI_STATIC_THREAD_MGMT_1 0 x2438
#define mmSPI_STATIC_THREAD_MGMT_2 0 x2439
#define mmSPI_STATIC_THREAD_MGMT_3 0 x243A
#endif
Messung V0.5 in Prozent C=85 H=97 G=91
¤ Dauer der Verarbeitung: 0.21 Sekunden
(vorverarbeitet am 2026-06-06)
¤
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