/** * struct ocs_hcu_dev - OCS HCU device context. * @list: List of device contexts. * @dev: OCS HCU device. * @io_base: Base address of OCS HCU registers. * @engine: Crypto engine for the device. * @irq: IRQ number. * @irq_done: Completion for IRQ. * @irq_err: Flag indicating an IRQ error has happened.
*/ struct ocs_hcu_dev { struct list_head list; struct device *dev; void __iomem *io_base; struct crypto_engine *engine; int irq; struct completion irq_done; bool irq_err;
};
/** * struct ocs_hcu_idata - Intermediate data generated by the HCU. * @msg_len_lo: Length of data the HCU has operated on in bits, low 32b. * @msg_len_hi: Length of data the HCU has operated on in bits, high 32b. * @digest: The digest read from the HCU. If the HCU is terminated, it will * contain the actual hash digest. Otherwise it is the intermediate * state.
*/ struct ocs_hcu_idata {
u32 msg_len_lo;
u32 msg_len_hi;
u8 digest[SHA512_DIGEST_SIZE];
};
/** * struct ocs_hcu_hash_ctx - Context for OCS HCU hashing operation. * @algo: The hashing algorithm being used. * @idata: The current intermediate data.
*/ struct ocs_hcu_hash_ctx { enum ocs_hcu_algo algo; struct ocs_hcu_idata idata;
};
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