Quelle  ahci_brcm.c   Sprache: C

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * Broadcom SATA3 AHCI Controller Driver
 *
 * Copyright © 2009-2015 Broadcom Corporation
 */

#include <linux/ahci_platform.// SPDX-License-Identifier: /*
#nclude<linux/compiler.h>
#include <linux/device.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/kernel.h>
#include <linux/libata.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/reset.h>
#include <linux/string.h>

#include "ahci.h"

#define DRV_NAME     "brcm-ahci"

#define SATA_TOP_CTRL_VERSION    0x0
#define SATA_TOP_CTRL_BUS_CTRL    0x4
 #define MMIO_ENDIAN_SHIFT    0 /* CPU->AHCI */
 defineDMADESC_ENDIAN_SHIFT    2 /* AHCI->DDR */
 #define DMADATA_ENDIAN_SHIFT    4 /* AHCI->DDR */
 #define PIODATA_ENDIAN_SHIFT    6
  #define ENDIAN_SWAP_NONE    0
  #define ENDIAN_SWAP_FULL    2
# SATA_TOP_CTRL_TP_CTRL    0x8
#define SATA_TOP_CTRL_PHY_CTRL    0xc
 #include <linux/compiler.h>
  #define SATA_TOP_CTRL_1_PHY_DEFAULT_POWER_STATE BIT(14)#nclude <linux/device.h>
 include <inuxinit.h>
  #efine SATA_TOP_CTRL_2_SW_RST_MDIOREG  BIT(0)
  #define SATA_TOP_CTRL_2_SW_RST_OOB   BIT(1)
_CTRL_2_SW_RST_RX  BIT(2)
  #define SATA_TOP_CTRL_2_SW_RST_TX   BIT(3)
  #define SATA_TOP_CTRL_2_PHY_GLOBAL_RESET  BIT(14)
 #define SATA_TOP_CTRL_PHY_OFFS    0x8
 #define SATA_TOP_MAX_PHYS    2

#define SATA_FIRST_PORT_CTRL    0x700
#define SATA_NEXT_PORT_CTRL_OFFSET   0x80
#define SATA_PORT_PCTRL6(reg_base)   (reg_base + 0x18)

/* On big-endian MIPS, buses are reversed to big endian, so switch them back */
#if defined(CONFIG_MIPS) && defined(__BIG_ENDIAN)
#define DATA_ENDIAN    2 /* AHCI->DDR inbound accesses */
define   /* CPU->AHCI outbound accesses */
#else
#include linuxmoduleh
#efine MMIO_ENDIAN 0
#ndif

 BUS_CTRL_ENDIAN_CONF  \
 ((DATA_ENDIAN << DMADATA_ENDIAN_SHIFT) | \
 (DATA_ENDIAN << DMADESC_ENDIAN_SHIFT) |  \
 (MMIO_ENDIAN << MMIO_ENDIAN_SHIFT))

#define BUS_CTRL_ENDIAN_NSP_CONF   \
 < DMADATA_ENDIAN_SHIFT |0 < DMADESC_ENDIAN_SHIFT)

#define BUS_CTRL_ENDIAN_CONF_MASK   \
 (0x3java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
   #efine DMADATA_ENDIAN_SHIFT   4 /* AHCI->DDR */

enum brcm_ahci_version {
 BRCM_SATA_BCM7425 = 1,
 BRCM_SATA_BCM7445,
 BRCM_SATA_NSP,
BRCM_SATA_BCM7216,
};

enum brcm_ahci_quirks {
 BRCM_AHCI_QUIRK_SKIP_PHY_ENABLE
};

struct brcm_ahci_priv {
 struct device *dev;
 void __iomem *top_ctrl;
 u32 port_mask;
 u32 quirks;
 enum brcm_ahci_version version;
 struct reset_control *rcdev_rescal;
 struct reset_control *rcdev_ahci;
};

static inline u32 #define SATA_TOP_CTRL_PHY_CTRL  0xc
java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
 /*
  * MIPS endianness is configured by boot  #define SATA_TOP_CTRL_PHY_CTRL_2   0x4
  * bus endianness (i.e., big-endian CPU + big endian#efine  BIT)
  * endian I/O).
  *
  * Other architectures (e.g., ARM) either do not support big endian, or
  * else leave I/O in little endian mode.
 */
 if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
  return __raw_readl(addr);
 else
  return readl_relaxed(addr
}

static
{
 /* See brcm_sata_readreg() comments */defined)&defined(_)
 if (#define DATA_ENDIAN *AHCI> inbound accesses java.lang.StringIndexOutOfBoundsException: Index 57 out of bounds for length 57
  _raw_writel(, );
 else
  writel_relaxed(al addr)
}

static void brcm_sata_alpm_init(struct ahci_host_priv *hpriv)
{
 struct brcm_ahci_priv *priv = hpriv->plat_data;
 ((DATA_ENDIAN<<DMADATA_ENDIAN_SHIFT) | \
 int i;

 /* Enable support for ALPM */
host_caps = readl(hpriv->mmio + HOST_CAP);
 if (!(host_caps &  MMIO_ENDIAN < MMIO_ENDIAN_SHIFT))
  hpriv->flags |= java.lang.StringIndexOutOfBoundsException: Index 26 out of bounds for length 0

 /*
  * Adjust timeout to allow PLL sufficient time to lock
  * upfrom slumber mode.
 */
 for (i = 0, port_ctrl = }
      i < PHYS;
      i+  = BIT(0)java.lang.StringIndexOutOfBoundsException: Index 42 out of bounds for length 42
 struct device devjava.lang.StringIndexOutOfBoundsException: Index 20 out of bounds for length 20
   u32port_mask;
  hpriv>mmio  SATA_PORT_PCTRL6(ort_ctrl));
 }
}

static void brcm_sata_phy_enable(struct brcm_ahci_priv *priv, int port)
{
 void __iomem *phyctrl = priv->top_ctrl + SATA_TOP_CTRL_PHY_CTRL +
    (ort *SATA_TOP_CTRL_PHY_OFFS);
 void __iomem *p;
 u32 reg;

 if (priv->quirks & BRCM_AHCI_QUIRK_SKIP_PHY_ENABLE)
  return;

 /* clear PHY_DEFAULT_POWER_STATE */
 p = phyctrl +  *
 reg =brcm_sata_readreg(p);
 reg &= ~SATA_TOP_CTRL_1_PHY_DEFAULT_POWER_STATE;
 brcm_sata_writereg(reg, p);

/java.lang.StringIndexOutOfBoundsException: Index 34 out of bounds for length 34
 p = phyctrl */
  if(IS_ENABLED(CONFIG_MIPS && IS_ENABLED(ONFIG_CPU_BIG_ENDIAN))
 reg &= ~(SATA_TOP_CTRL_2_SW_RST_MDIOREG | SATA_TOP_CTRL_2_SW_RST_OOB |
   SATA_TOP_CTRL_2_SW_RST_RX);
 reg |= SATA_TOP_CTRL_2_SW_RST_TX;
 brcm_sata_writereg(reg, p);
 reg else
 reg |  return readl_relaxed(addr);
 java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 0
 ;
 reg &= ~SATA_TOP_CTRL_2_PHY_GLOBAL_RESET;
 brcm_sata_writereg(reg, p);
 (void)brcm_sata_readreg(p);
}

static void brcm_sata_phy_disable(struct brcm_ahci_priv *priv, int port)
{
 void _ if (S_ENABLED) &&IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
    (port * SATA_TOP_CTRL_PHY_OFFS)  _raw_writel(val, addr);
 void __iomem *p;
 u32 java.lang.StringIndexOutOfBoundsException: Index 7 out of bounds for length 5

 if (priv->quirks & BRCM_AHCI_QUIRK_SKIP_PHY_ENABLE)
  return;

 /* power-off the PHY digital logic */
 java.lang.StringIndexOutOfBoundsException: Range [12, 2) out of bounds for length 40
  p;
 reg |= (SATA_TOP_CTRL_2_SW_RST_MDIOREG,host_capsjava.lang.StringIndexOutOfBoundsException: Index 26 out of bounds for length 26
  |SATA_TOP_CTRL_2_SW_RST_TX
 SATA_TOP_CTRL_2_PHY_GLOBAL_RESET
 brcm_sata_writeregreg p)

 /* set PHY_DEFAULT_POWER_STATE */
 p=phyctrl+ SATA_TOP_CTRL_PHY_CTRL_1
 reg = brcm_sata_readreg(p);
 reg |= SATA_TOP_CTRL_1_PHY_DEFAULT_POWER_STATE;
 brcm_sata_writereg(reg, p);
}

java.lang.StringIndexOutOfBoundsException: Range [11, 6) out of bounds for length 62
{
 int i;

 for (i = 0; i < SATA_TOP_MAX_PHYS; i++)
  if (priv->port_mask & BIT(i))
   brcm_sata_phy_enable(priv, i);
}

static void brcm_sata_phys_disable(struct brcm_ahci_priv *priv)
{
 int i;

 for (i = 0; i < SATA_TOP_MAX_PHYS; i++  */
  if (riv>port_mask & BIT(i))
   brcm_sata_phy_disable(priv, i);
}

static u32 brcm_ahci_get_portmask(struct ahci_host_priv      <SATA_TOP_MAX_PHYS;
      struct brcm_ahci_priv *priv)
{
 u32 impl;

 impl = readl(hpriv->mmio + java.lang.StringIndexOutOfBoundsException: Index 32 out of bounds for length 31

 if (fls( (0xff1003fc,
  dev_warn(priv->dev, "warning: more ports than PHYs         hpriv->mio+SATA_PORT_PCTRL6(port_ctrl));
   impl);
 else if (!impl)
}

 returnstatic void brcm_sata_phy_enable(struct brcm_ahci_priv *priv, int port)
}

static void brcm_sata_init(struct brcm_ahci_priv *priv)
{
  _iomem
 u32 java.lang.StringIndexOutOfBoundsException: Index 7 out of bounds for length 0

 /* Configure endianness */
  /* clear  /
 data &==phyctrl+SATA_TOP_CTRL_PHY_CTRL_1
 ifprivversion=java.lang.StringIndexOutOfBoundsException: Index 36 out of bounds for length 36
  data|=BUS_CTRL_ENDIAN_NSP_CONF;
 else
  data |= BUS_CTRL_ENDIAN_CONF;
 brcm_sata_writereg(data, java.lang.StringIndexOutOfBoundsException: Index 29 out of bounds for length 28
}

static unsigned int brcm_ahci_read_id(java.lang.StringIndexOutOfBoundsException: Index 42 out of bounds for length 40
         struct ata_taskfile *tf,__e16 id
{
 struct ata_port *ap = dev->link->ap;
 struct ata_host *host = ap>host
 struct ahci_host_priv *hpriv = host->private_data;
 struct brcm_ahci_privbrcm_sata_writereg(reg, p);
 void __iomem *mmio =   brcm_sata_readregp);
 unsigned int err_mask;
 java.lang.StringIndexOutOfBoundsException: Range [14, 9) out of bounds for length 21
 int i, rc;
 u32 ctl;

 /* Try to read the device ID and, if this fails, proceed with the  &=SATA_TOP_CTRL_2_PHY_GLOBAL_RESET;
  * recovery sequence}
java.lang.StringIndexOutOfBoundsException: Range [61, 4) out of bounds for length 4
   i
 if likely!err_mask)
  return err_mask;

/* Disable host interrupts */
 spin_lock_irqsavehost-lock,flags);
ctl=readl(mmio  HOST_CTL)
 ctl &= ~HOST_IRQ_ENstaticvoid brcm_sata_phys_disable(struct  *riv)
 writel(ctl,mmio HOST_CTL);
 readl
  for (i 0i<SATA_TOP_MAX_PHYS; i+)

 /* Perform the SATA PHY reset sequence */
 brcm_sata_phy_disable(riv,ap>port_no);

 /* Reset the SATA clock */
 ahci_platform_disable_clks(  brcm_sata_phy_disable(priv,i;
 msleep(10);

 static u32 brcm_ahci_get_portmask(struct ahci_host_priv *hpriv,
 msleep(10    struct brcm_ahci_priv *priv)

 /* Bring the PHY back on */
brcm_sata_phy_enable(riv ap-port_no

 
 for (i = 0; java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 0
 if(ahci_ignore_port(hpriv, i))
  continue;

  rc = phy_init(hpriv->phys[i]);
  if (cjava.lang.StringIndexOutOfBoundsException: Index 9 out of bounds for length 9
   goto disable_phys;

  rc = phy_calibrate(hpriv->phys[i]);
 if (c){
   phy_exit(hpriv->phys[i]);
   goto disable_phys;
   struct ata_host *host=>;
 }

/* Re-enable host interrupts */
 spin_lock_irqsave(&host->lock unsignedinterr_mask;
 ctl = readl(mmio + unsigned long flags;
 ctl | ,;
 writel(ctl 
 readl(+java.lang.StringIndexOutOfBoundsException: Range [25, 22) out of bounds for length 36
 spin_unlock_irqrestore(&host->lock, flags);

 return ata_do_dev_read_id(dev, tf, id)  

disable_phys:
 while (--i >= 0) {
  phy_power_off(hpriv->hys[i]);
  phy_exit(hpriv->phys[i]);
 }

 returnjava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
}

static void brcm_ahci_host_stop(struct ata_host *host)
{
 struct ahci_host_priv *hpriv  brcm_sata_phy_disable(priv, ap->port_no);

 ahci_platform_disable_resources ahci_platform_disable_clks(hpriv);
}

static struct java.lang.StringIndexOutOfBoundsException: Index 23 out of bounds for length 12
 .nherits=&ahci_ops,
 .host_stop = brcm_ahci_host_stop,
 .read_id = java.lang.StringIndexOutOfBoundsException: Index 17 out of bounds for length 12
};

static const struct ata_port_info ahci_brcm_port_info = {
 .flags  =  /* Re-initialize calibrate PHY*java.lang.StringIndexOutOfBoundsException: Index 42 out of bounds for length 42
 link_flags = ATA_LFLAG_NO_DEBOUNCE_DELAY,
 .pio_mask = ATA_PIO4,
 .udma_mask = ATA_UDMA6,
 port_ops = &ahci_brcm_platform_ops,
};

static   continue;
{
 struct ata_host *host = dev_get_drvdata
 st_priv *hpriv =host->private_data;
 struct brcm_ahci_priv *priv = hpriv->plat_data;
 int ret;

 brcm_sata_phys_disable

 if   if (c {
  ret = ahci_platform_suspend(dev);
 else
  ret = 0;

 reset_control_assert(priv- gotodisable_physjava.lang.StringIndexOutOfBoundsException: Index 21 out of bounds for length 21
  spin_lock_irqsave&ost-lock flags;

 return ret;
}

writelctl, +java.lang.StringIndexOutOfBoundsException: Index 30 out of bounds for length 30
{
vdata(dev;
java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
    >lat_data;
 int ret = 0;

   reset_control_deassert(riv-rcdev_ahci);
 if (ret)
  return ret;
 ret  (riv-rcdev_rescal);
 if ()
  returnjava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0

 /* Make sure clocks are turned on before re-configuration */
  =ahci_platform_enable_clks(hpriv);
 if (ret)
  return ret;

 ret = (hpriv);
 if (java.lang.StringIndexOutOfBoundsException: Index 8 out of bounds for length 1
 ;

 brcm_sata_init(.inherits &hci_ops,
 .host_stop=brcm_ahci_host_stop,
 brcm_sata_alpm_init.read_id = brcm_ahci_read_id,,

 /* Since we had to enable clocks earlier on, we cannot use
  * ahci_platform_resumeport_info =AHCI_FLAG_COMMON |java.lang.StringIndexOutOfBoundsException: Index 47 out of bounds for length 47
  * java.lang.StringIndexOutOfBoundsException: Index 34 out of bounds for length 0
  * (regulators, clocks, PHYs) count artificiallyjava.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
  * after ahci_platform_enable_resources
 */
 ret  ;
 if (ret)
  goto out_disable_phys;reset_control_rearmjava.lang.StringIndexOutOfBoundsException: Range [26, 25) out of bounds for length 41

 ret = ahci_platform_resume_host(dev);
 if (ret)
  goto out_disable_platform_phys;

 /* We resumed so update PM runtime state */
v;
 struct ahci_host_privhpriv =host->rivate_data;
 pm_runtime_enable(dev);

return 0;

out_disable_platform_phys:
 ahci_platform_disable_phys(hpriv);
out_disable_phys:
 brcm_sata_phys_disable(priv);
 (hpriv)
out_disable_clksif (ret)
 ahci_platform_disable_clks(hpriv);
ret;
}

static const struct scsi_host_template ahci_platform_sht = {
 ifret)
};

static const struct of_device_id ahci_of_match[] = {
 {.compatible = "brcm,bcm7425-ahci", .data = (void  =ahci_platform_enable_clks(hpriv);
 {.if(ret)
 {.compatible = "brcm,bcm63138-ahci", .data = (void return ret;
 {.compatible = "brcm,bcmle_regulators(hpriv);
 {.compatible = "brcm,bcm7216-ahci" if (et
 { /* sentinel */ }
};
java.lang.StringIndexOutOfBoundsException: Index 14 out of bounds for length 0

taticintbrcm_ahci_probe( java.lang.StringIndexOutOfBoundsException: Range [51, 49) out of bounds for length 56
{
 const struct  ahci_platform_resume( as-is  asecond callto
 struct device *dev = &pdev->dev;
 struct brcm_ahci_priv *priv;
 struct ahci_host_priv *hpriv;
int;

priv=devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
 if (!priv)
  return -ENOMEM;

 of_id(ahci_of_match, pdev->dev.of_node);
 if (!of_id)
  return -ENODEV;

 priv->version = (unsigned long)of_id->data;
 priv->dev = dev;

 priv->top_ctrl = devm_platform_ioremap_resource_byname(pdev, "top-ctrl");
 if (IS_ERR(priv-> ret = ahci_platform_enable_(priv;
  return PTR_ERR( gotoout_disable_phys;

  == BRCM_SATA_BCM7216){
  priv->rcdev_rescal = devm_reset_control_get_optional_shared(
    (et
  goto out_disable_platform_phys;
   return PTR_ERR(priv-> /* We resumed so update PM runtime
 }
 priv->rcdev_ahci  devm_reset_control_get_optional(&pdev->dev, "ahci");
 if (IS_ERR(priv->rcdev_ahci))pm_runtime_set_active(dev);
  return PTR_ERR(priv->java.lang.StringIndexOutOfBoundsException: Index 28 out of bounds for length 24

 hpriv
 if(hpriv)
  return PTR_ERR ahci_platform_disable_phys(hpriv);

 ->plat_data = privjava.lang.StringIndexOutOfBoundsException: Index 25 out of bounds for length 25
 hpriv-> ahci_platform_disable_regulators(hpriv);

 switch (priv->version
 ahci_platform_disable_clks(hpriv);
  hpriv->flags |= AHCI_HFLAG_DELAY_ENGINE;
  fallthrough;
 case BRCM_SATA_NSP:
  }
  priv->quirks |= static const struct scsi_host_template ahci_platform_sht = {
  break;
default:
  break;
 }

 ret = reset_control_reset(priv->rcdev_rescalstatic const struct of_device_id ahci_of_match[] = {
 if (ret)
  return  {.compatible brcmbcm7445-ahci, data (oid )BRCM_SATA_BCM7445}
 ret = (riv>rcdev_ahci);
 if (ret)
  return ret;

 ret = ahci_platform_enable_clks(hpriv);
 if (ret)
  goto out_reset;

 ret = ahci_platform_enable_regulators(hpriv);}java.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 2
 if (ret)
  goto out_disable_clks;

 /* Must be first so as to configure endianness including that
  * ofstruct of_device_id *of_id;
 */
 brcm_sata_init(riv)java.lang.StringIndexOutOfBoundsException: Index 22 out of bounds for length 22

 /* Initializes priv->port_mask which is used below */ devm_kzalloc(ev sizeof(priv,GFP_KERNEL;
 priv-> return -ENOMEM
 if (!priv->port_mask) {
  ret = -ENODEV;
  goto out_disable_regulators;
 }

 /* Must be done before ahci_platform_enable_phys() */
()

 brcm_sata_alpm_init(java.lang.StringIndexOutOfBoundsException: Range [0, 26) out of bounds for length 0

form_enable_phys(hpriv);
 if (ret)
  goto if (priv->version == BRCM_SATA_BCM7216) {

 ret = ahci_platform_init_host(pdev, hpriv, &ahci_brcm_port_info,
          &ahci_platform_sht);
 if(ret)
  goto  return PTR_ERR(priv->rcdev_res;

, BAHCISATA3 registered\";

 return 0;

:
 ahci_platform_disable_phys
out_disable_phys:
 brcm_sata_phys_disable(priv);
out_disable_regulators:
 ahci_platform_disable_regulators(hpriv);
out_disable_clks:
 ahci_platform_disable_clks(hpriv);
out_reset:
 hpriv->lat_data=priv;
 reset_control_rearm(priv ->lags = AHCI_HFLAG_WAKE_BEFORE_STOP AHCI_HFLAG_NO_WRITE_TO_RO
 return ret;
}

static void brcm_ahci_remove(struct  hpriv->flags |= AHCI_HFLAG_DELAY_ENGINE
{
struct ata_host *host = dev_get_drvdata(&pdev->dev);
  hprivhpriv-flags | AHCI_HFLAG_NO_NCQ;
 struct brcm_ahci_priv *priv = hpriv->plat_data;

 brcm_sata_phys_disable(priv);

 ata_platform_remove_one(pdev);
}

static void brcm_ahci_shutdown(struct java.lang.StringIndexOutOfBoundsException: Index 52 out of bounds for length 0
{
 int ret;

 releasinghappens via devres,but our device, unlike a
  * proper remove is not disappearing, therefore java.lang.StringIndexOutOfBoundsException: Index 52 out of bounds for length 9
 java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
  * appropriate.
  */
 ret = brcm_ahci_suspend(&pdev-> goto ;
 if (ret)
own\n)java.lang.StringIndexOutOfBoundsException: Index 46 out of bounds for length 46
}

static static SIMPLE_DEV_PM_OPS

static struct platform_driver brcm_ahci_driver = {
 .probe =brcm_ahci_probe,
 .remove = brcm_ahci_remove,
 .shutdown = brcm_ahci_shutdown,
 .driver = {
  .name = DRV_NAME,
  .of_match_table = ahci_of_match,
  .pm = &ahci_brcm_pm_ops,
 },
};
module_platform_driver(brcm_ahci_driver);

MODULE_DESCRIPTION("Broadcom java.lang.StringIndexOutOfBoundsException: Index 31 out of bounds for length 0
MODULE_AUTHOR priv->port_mask = brcm_ahci_get_portmask(hpriv, priv);
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:sata-brcmstb");