/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
* Copyright 2013 Markus Pargmann <mpa@pengutronix.de>, Pengutronix
*/
#ifndef __DTS_IMX27_PINFUNC_H
#define __DTS_IMX27_PINFUNC_H
/*
* The pin function ID is a tuple of
* <pin mux_id>
* mux_id consists of
* function + (direction << 2) + (gpio_oconf << 4) + (gpio_iconfa << 8) + (gpio_iconfb << 10)
*
* function: 0 - Primary function
* 1 - Alternate function
* 2 - GPIO
* direction: 0 - Input
* 1 - Output
* gpio_oconf: 0 - A_IN
* 1 - B_IN
* 2 - C_IN
* 3 - Data Register
* gpio_iconfa/b: 0 - GPIO_IN
* 1 - Interrupt Status Register
* 2 - 0
* 3 - 1
*
* 'pin' is an integer between 0 and 0xbf. imx27 has 6 ports with 32
* configurable pins each. 'pin' is PORT * 32 + PORT_PIN, PORT_PIN is
* the pin number on the specific port (between 0 and 31).
*/
#define MX27_PAD_USBH2_CLK__USBH2_CLK 0 x00 0 x000
#define MX27_PAD_USBH2_CLK__GPIO1_0 0 x00 0 x032
#define MX27_PAD_USBH2_DIR__USBH2_DIR 0 x01 0 x000
#define MX27_PAD_USBH2_DIR__GPIO1_1 0 x01 0 x032
#define MX27_PAD_USBH2_DATA7__USBH2_DATA7 0 x02 0 x004
#define MX27_PAD_USBH2_DATA7__GPIO1_2 0 x02 0 x032
#define MX27_PAD_USBH2_NXT__USBH2_NXT 0 x03 0 x000
#define MX27_PAD_USBH2_NXT__GPIO1_3 0 x03 0 x032
#define MX27_PAD_USBH2_STP__USBH2_STP 0 x04 0 x004
#define MX27_PAD_USBH2_STP__GPIO1_4 0 x04 0 x032
#define MX27_PAD_LSCLK__LSCLK 0 x05 0 x004
#define MX27_PAD_LSCLK__GPIO1_5 0 x05 0 x032
#define MX27_PAD_LD0__LD0 0 x06 0 x004
#define MX27_PAD_LD0__GPIO1_6 0 x06 0 x032
#define MX27_PAD_LD1__LD1 0 x07 0 x004
#define MX27_PAD_LD1__GPIO1_7 0 x07 0 x032
#define MX27_PAD_LD2__LD2 0 x08 0 x004
#define MX27_PAD_LD2__GPIO1_8 0 x08 0 x032
#define MX27_PAD_LD3__LD3 0 x09 0 x004
#define MX27_PAD_LD3__GPIO1_9 0 x09 0 x032
#define MX27_PAD_LD4__LD4 0 x0a 0 x004
#define MX27_PAD_LD4__GPIO1_10 0 x0a 0 x032
#define MX27_PAD_LD5__LD5 0 x0b 0 x004
#define MX27_PAD_LD5__GPIO1_11 0 x0b 0 x032
#define MX27_PAD_LD6__LD6 0 x0c 0 x004
#define MX27_PAD_LD6__GPIO1_12 0 x0c 0 x032
#define MX27_PAD_LD7__LD7 0 x0d 0 x004
#define MX27_PAD_LD7__GPIO1_13 0 x0d 0 x032
#define MX27_PAD_LD8__LD8 0 x0e 0 x004
#define MX27_PAD_LD8__GPIO1_14 0 x0e 0 x032
#define MX27_PAD_LD9__LD9 0 x0f 0 x004
#define MX27_PAD_LD9__GPIO1_15 0 x0f 0 x032
#define MX27_PAD_LD10__LD10 0 x10 0 x004
#define MX27_PAD_LD10__GPIO1_16 0 x10 0 x032
#define MX27_PAD_LD11__LD11 0 x11 0 x004
#define MX27_PAD_LD11__GPIO1_17 0 x11 0 x032
#define MX27_PAD_LD12__LD12 0 x12 0 x004
#define MX27_PAD_LD12__GPIO1_18 0 x12 0 x032
#define MX27_PAD_LD13__LD13 0 x13 0 x004
#define MX27_PAD_LD13__GPIO1_19 0 x13 0 x032
#define MX27_PAD_LD14__LD14 0 x14 0 x004
#define MX27_PAD_LD14__GPIO1_20 0 x14 0 x032
#define MX27_PAD_LD15__LD15 0 x15 0 x004
#define MX27_PAD_LD15__GPIO1_21 0 x15 0 x032
#define MX27_PAD_LD16__LD16 0 x16 0 x004
#define MX27_PAD_LD16__GPIO1_22 0 x16 0 x032
#define MX27_PAD_LD17__LD17 0 x17 0 x004
#define MX27_PAD_LD17__GPIO1_23 0 x17 0 x032
#define MX27_PAD_REV__REV 0 x18 0 x004
#define MX27_PAD_REV__GPIO1_24 0 x18 0 x032
#define MX27_PAD_CLS__CLS 0 x19 0 x004
#define MX27_PAD_CLS__GPIO1_25 0 x19 0 x032
#define MX27_PAD_PS__PS 0 x1a 0 x004
#define MX27_PAD_PS__GPIO1_26 0 x1a 0 x032
#define MX27_PAD_SPL_SPR__SPL_SPR 0 x1b 0 x004
#define MX27_PAD_SPL_SPR__GPIO1_27 0 x1b 0 x032
#define MX27_PAD_HSYNC__HSYNC 0 x1c 0 x004
#define MX27_PAD_HSYNC__GPIO1_28 0 x1c 0 x032
#define MX27_PAD_VSYNC__VSYNC 0 x1d 0 x004
#define MX27_PAD_VSYNC__GPIO1_29 0 x1d 0 x032
#define MX27_PAD_CONTRAST__CONTRAST 0 x1e 0 x004
#define MX27_PAD_CONTRAST__GPIO1_30 0 x1e 0 x032
#define MX27_PAD_OE_ACD__OE_ACD 0 x1f 0 x004
#define MX27_PAD_OE_ACD__GPIO1_31 0 x1f 0 x032
#define MX27_PAD_SD2_D0__SD2_D0 0 x24 0 x004
#define MX27_PAD_SD2_D0__MSHC_DATA0 0 x24 0 x005
#define MX27_PAD_SD2_D0__GPIO2_4 0 x24 0 x032
#define MX27_PAD_SD2_D1__SD2_D1 0 x25 0 x004
#define MX27_PAD_SD2_D1__MSHC_DATA1 0 x25 0 x005
#define MX27_PAD_SD2_D1__GPIO2_5 0 x25 0 x032
#define MX27_PAD_SD2_D2__SD2_D2 0 x26 0 x004
#define MX27_PAD_SD2_D2__MSHC_DATA2 0 x26 0 x005
#define MX27_PAD_SD2_D2__GPIO2_6 0 x26 0 x032
#define MX27_PAD_SD2_D3__SD2_D3 0 x27 0 x004
#define MX27_PAD_SD2_D3__MSHC_DATA3 0 x27 0 x005
#define MX27_PAD_SD2_D3__GPIO2_7 0 x27 0 x032
#define MX27_PAD_SD2_CMD__SD2_CMD 0 x28 0 x004
#define MX27_PAD_SD2_CMD__MSHC_BS 0 x28 0 x005
#define MX27_PAD_SD2_CMD__GPIO2_8 0 x28 0 x032
#define MX27_PAD_SD2_CLK__SD2_CLK 0 x29 0 x004
#define MX27_PAD_SD2_CLK__MSHC_SCLK 0 x29 0 x005
#define MX27_PAD_SD2_CLK__GPIO2_9 0 x29 0 x032
#define MX27_PAD_CSI_D0__CSI_D0 0 x2a 0 x000
#define MX27_PAD_CSI_D0__UART6_TXD 0 x2a 0 x005
#define MX27_PAD_CSI_D0__GPIO2_10 0 x2a 0 x032
#define MX27_PAD_CSI_D1__CSI_D1 0 x2b 0 x000
#define MX27_PAD_CSI_D1__UART6_RXD 0 x2b 0 x001
#define MX27_PAD_CSI_D1__GPIO2_11 0 x2b 0 x032
#define MX27_PAD_CSI_D2__CSI_D2 0 x2c 0 x000
#define MX27_PAD_CSI_D2__UART6_CTS 0 x2c 0 x005
#define MX27_PAD_CSI_D2__GPIO2_12 0 x2c 0 x032
#define MX27_PAD_CSI_D3__CSI_D3 0 x2d 0 x000
#define MX27_PAD_CSI_D3__UART6_RTS 0 x2d 0 x001
#define MX27_PAD_CSI_D3__GPIO2_13 0 x2d 0 x032
#define MX27_PAD_CSI_D4__CSI_D4 0 x2e 0 x000
#define MX27_PAD_CSI_D4__GPIO2_14 0 x2e 0 x032
#define MX27_PAD_CSI_MCLK__CSI_MCLK 0 x2f 0 x004
#define MX27_PAD_CSI_MCLK__GPIO2_15 0 x2f 0 x032
#define MX27_PAD_CSI_PIXCLK__CSI_PIXCLK 0 x30 0 x000
#define MX27_PAD_CSI_PIXCLK__GPIO2_16 0 x30 0 x032
#define MX27_PAD_CSI_D5__CSI_D5 0 x31 0 x000
#define MX27_PAD_CSI_D5__GPIO2_17 0 x31 0 x032
#define MX27_PAD_CSI_D6__CSI_D6 0 x32 0 x000
#define MX27_PAD_CSI_D6__UART5_TXD 0 x32 0 x005
#define MX27_PAD_CSI_D6__GPIO2_18 0 x32 0 x032
#define MX27_PAD_CSI_D7__CSI_D7 0 x33 0 x000
#define MX27_PAD_CSI_D7__UART5_RXD 0 x33 0 x001
#define MX27_PAD_CSI_D7__GPIO2_19 0 x33 0 x032
#define MX27_PAD_CSI_VSYNC__CSI_VSYNC 0 x34 0 x000
#define MX27_PAD_CSI_VSYNC__UART5_CTS 0 x34 0 x005
#define MX27_PAD_CSI_VSYNC__GPIO2_20 0 x34 0 x032
#define MX27_PAD_CSI_HSYNC__CSI_HSYNC 0 x35 0 x000
#define MX27_PAD_CSI_HSYNC__UART5_RTS 0 x35 0 x001
#define MX27_PAD_CSI_HSYNC__GPIO2_21 0 x35 0 x032
#define MX27_PAD_USBH1_SUSP__USBH1_SUSP 0 x36 0 x004
#define MX27_PAD_USBH1_SUSP__GPIO2_22 0 x36 0 x032
#define MX27_PAD_USB_PWR__USB_PWR 0 x37 0 x004
#define MX27_PAD_USB_PWR__GPIO2_23 0 x37 0 x032
#define MX27_PAD_USB_OC_B__USB_OC_B 0 x38 0 x000
#define MX27_PAD_USB_OC_B__GPIO2_24 0 x38 0 x032
#define MX27_PAD_USBH1_RCV__USBH1_RCV 0 x39 0 x004
#define MX27_PAD_USBH1_RCV__GPIO2_25 0 x39 0 x032
#define MX27_PAD_USBH1_FS__USBH1_FS 0 x3a 0 x004
#define MX27_PAD_USBH1_FS__UART4_RTS 0 x3a 0 x001
#define MX27_PAD_USBH1_FS__GPIO2_26 0 x3a 0 x032
#define MX27_PAD_USBH1_OE_B__USBH1_OE_B 0 x3b 0 x004
#define MX27_PAD_USBH1_OE_B__GPIO2_27 0 x3b 0 x032
#define MX27_PAD_USBH1_TXDM__USBH1_TXDM 0 x3c 0 x004
#define MX27_PAD_USBH1_TXDM__UART4_TXD 0 x3c 0 x005
#define MX27_PAD_USBH1_TXDM__GPIO2_28 0 x3c 0 x032
#define MX27_PAD_USBH1_TXDP__USBH1_TXDP 0 x3d 0 x004
#define MX27_PAD_USBH1_TXDP__UART4_CTS 0 x3d 0 x005
#define MX27_PAD_USBH1_TXDP__GPIO2_29 0 x3d 0 x032
#define MX27_PAD_USBH1_RXDM__USBH1_RXDM 0 x3e 0 x004
#define MX27_PAD_USBH1_RXDM__GPIO2_30 0 x3e 0 x032
#define MX27_PAD_USBH1_RXDP__USBH1_RXDP 0 x3f 0 x004
#define MX27_PAD_USBH1_RXDP__UART4_RXD 0 x3f 0 x001
#define MX27_PAD_USBH1_RXDP__GPIO2_31 0 x3f 0 x032
#define MX27_PAD_I2C2_SDA__I2C2_SDA 0 x45 0 x004
#define MX27_PAD_I2C2_SDA__GPIO3_5 0 x45 0 x032
#define MX27_PAD_I2C2_SCL__I2C2_SCL 0 x46 0 x004
#define MX27_PAD_I2C2_SCL__GPIO3_6 0 x46 0 x032
#define MX27_PAD_USBOTG_DATA5__USBOTG_DATA5 0 x47 0 x004
#define MX27_PAD_USBOTG_DATA5__GPIO3_7 0 x47 0 x032
#define MX27_PAD_USBOTG_DATA6__USBOTG_DATA6 0 x48 0 x004
#define MX27_PAD_USBOTG_DATA6__GPIO3_8 0 x48 0 x032
#define MX27_PAD_USBOTG_DATA0__USBOTG_DATA0 0 x49 0 x004
#define MX27_PAD_USBOTG_DATA0__GPIO3_9 0 x49 0 x032
#define MX27_PAD_USBOTG_DATA2__USBOTG_DATA2 0 x4a 0 x004
#define MX27_PAD_USBOTG_DATA2__GPIO3_10 0 x4a 0 x032
#define MX27_PAD_USBOTG_DATA1__USBOTG_DATA1 0 x4b 0 x004
#define MX27_PAD_USBOTG_DATA1__GPIO3_11 0 x4b 0 x032
#define MX27_PAD_USBOTG_DATA4__USBOTG_DATA4 0 x4c 0 x004
#define MX27_PAD_USBOTG_DATA4__GPIO3_12 0 x4c 0 x032
#define MX27_PAD_USBOTG_DATA3__USBOTG_DATA3 0 x4d 0 x004
#define MX27_PAD_USBOTG_DATA3__GPIO3_13 0 x4d 0 x032
#define MX27_PAD_TOUT__TOUT 0 x4e 0 x004
#define MX27_PAD_TOUT__GPIO3_14 0 x4e 0 x032
#define MX27_PAD_TIN__TIN 0 x4f 0 x000
#define MX27_PAD_TIN__GPIO3_15 0 x4f 0 x032
#define MX27_PAD_SSI4_FS__SSI4_FS 0 x50 0 x004
#define MX27_PAD_SSI4_FS__GPIO3_16 0 x50 0 x032
#define MX27_PAD_SSI4_RXDAT__SSI4_RXDAT 0 x51 0 x004
#define MX27_PAD_SSI4_RXDAT__GPIO3_17 0 x51 0 x032
#define MX27_PAD_SSI4_TXDAT__SSI4_TXDAT 0 x52 0 x004
#define MX27_PAD_SSI4_TXDAT__GPIO3_18 0 x52 0 x032
#define MX27_PAD_SSI4_CLK__SSI4_CLK 0 x53 0 x004
#define MX27_PAD_SSI4_CLK__GPIO3_19 0 x53 0 x032
#define MX27_PAD_SSI1_FS__SSI1_FS 0 x54 0 x004
#define MX27_PAD_SSI1_FS__GPIO3_20 0 x54 0 x032
#define MX27_PAD_SSI1_RXDAT__SSI1_RXDAT 0 x55 0 x004
#define MX27_PAD_SSI1_RXDAT__GPIO3_21 0 x55 0 x032
#define MX27_PAD_SSI1_TXDAT__SSI1_TXDAT 0 x56 0 x004
#define MX27_PAD_SSI1_TXDAT__GPIO3_22 0 x56 0 x032
#define MX27_PAD_SSI1_CLK__SSI1_CLK 0 x57 0 x004
#define MX27_PAD_SSI1_CLK__GPIO3_23 0 x57 0 x032
#define MX27_PAD_SSI2_FS__SSI2_FS 0 x58 0 x004
#define MX27_PAD_SSI2_FS__GPT5_TOUT 0 x58 0 x005
#define MX27_PAD_SSI2_FS__GPIO3_24 0 x58 0 x032
#define MX27_PAD_SSI2_RXDAT__SSI2_RXDAT 0 x59 0 x004
#define MX27_PAD_SSI2_RXDAT__GPTS_TIN 0 x59 0 x001
#define MX27_PAD_SSI2_RXDAT__GPIO3_25 0 x59 0 x032
#define MX27_PAD_SSI2_TXDAT__SSI2_TXDAT 0 x5a 0 x004
#define MX27_PAD_SSI2_TXDAT__GPT4_TOUT 0 x5a 0 x005
#define MX27_PAD_SSI2_TXDAT__GPIO3_26 0 x5a 0 x032
#define MX27_PAD_SSI2_CLK__SSI2_CLK 0 x5b 0 x004
#define MX27_PAD_SSI2_CLK__GPT4_TIN 0 x5b 0 x001
#define MX27_PAD_SSI2_CLK__GPIO3_27 0 x5b 0 x032
#define MX27_PAD_SSI3_FS__SSI3_FS 0 x5c 0 x004
#define MX27_PAD_SSI3_FS__SLCDC2_D0 0 x5c 0 x001
#define MX27_PAD_SSI3_FS__GPIO3_28 0 x5c 0 x032
#define MX27_PAD_SSI3_RXDAT__SSI3_RXDAT 0 x5d 0 x004
#define MX27_PAD_SSI3_RXDAT__SLCDC2_RS 0 x5d 0 x001
#define MX27_PAD_SSI3_RXDAT__GPIO3_29 0 x5d 0 x032
#define MX27_PAD_SSI3_TXDAT__SSI3_TXDAT 0 x5e 0 x004
#define MX27_PAD_SSI3_TXDAT__SLCDC2_CS 0 x5e 0 x001
#define MX27_PAD_SSI3_TXDAT__GPIO3_30 0 x5e 0 x032
#define MX27_PAD_SSI3_CLK__SSI3_CLK 0 x5f 0 x004
#define MX27_PAD_SSI3_CLK__SLCDC2_CLK 0 x5f 0 x001
#define MX27_PAD_SSI3_CLK__GPIO3_31 0 x5f 0 x032
#define MX27_PAD_SD3_CMD__SD3_CMD 0 x60 0 x004
#define MX27_PAD_SD3_CMD__FEC_TXD0 0 x60 0 x006
#define MX27_PAD_SD3_CMD__GPIO4_0 0 x60 0 x032
#define MX27_PAD_SD3_CLK__SD3_CLK 0 x61 0 x004
#define MX27_PAD_SD3_CLK__ETMTRACEPKT15 0 x61 0 x005
#define MX27_PAD_SD3_CLK__FEC_TXD1 0 x61 0 x006
#define MX27_PAD_SD3_CLK__GPIO4_1 0 x61 0 x032
#define MX27_PAD_ATA_DATA0__ATA_DATA0 0 x62 0 x004
#define MX27_PAD_ATA_DATA0__SD3_D0 0 x62 0 x005
#define MX27_PAD_ATA_DATA0__FEC_TXD2 0 x62 0 x006
#define MX27_PAD_ATA_DATA0__GPIO4_2 0 x62 0 x032
#define MX27_PAD_ATA_DATA1__ATA_DATA1 0 x63 0 x004
#define MX27_PAD_ATA_DATA1__SD3_D1 0 x63 0 x005
#define MX27_PAD_ATA_DATA1__FEC_TXD3 0 x63 0 x006
#define MX27_PAD_ATA_DATA1__GPIO4_3 0 x63 0 x032
#define MX27_PAD_ATA_DATA2__ATA_DATA2 0 x64 0 x004
#define MX27_PAD_ATA_DATA2__SD3_D2 0 x64 0 x005
#define MX27_PAD_ATA_DATA2__FEC_RX_ER 0 x64 0 x002
#define MX27_PAD_ATA_DATA2__GPIO4_4 0 x64 0 x032
#define MX27_PAD_ATA_DATA3__ATA_DATA3 0 x65 0 x004
#define MX27_PAD_ATA_DATA3__SD3_D3 0 x65 0 x005
#define MX27_PAD_ATA_DATA3__FEC_RXD1 0 x65 0 x002
#define MX27_PAD_ATA_DATA3__GPIO4_5 0 x65 0 x032
#define MX27_PAD_ATA_DATA4__ATA_DATA4 0 x66 0 x004
#define MX27_PAD_ATA_DATA4__ETMTRACEPKT14 0 x66 0 x005
#define MX27_PAD_ATA_DATA4__FEC_RXD2 0 x66 0 x002
#define MX27_PAD_ATA_DATA4__GPIO4_6 0 x66 0 x032
#define MX27_PAD_ATA_DATA5__ATA_DATA5 0 x67 0 x004
#define MX27_PAD_ATA_DATA5__ETMTRACEPKT13 0 x67 0 x005
#define MX27_PAD_ATA_DATA5__FEC_RXD3 0 x67 0 x002
#define MX27_PAD_ATA_DATA5__GPIO4_7 0 x67 0 x032
#define MX27_PAD_ATA_DATA6__ATA_DATA6 0 x68 0 x004
#define MX27_PAD_ATA_DATA6__FEC_MDIO 0 x68 0 x005
#define MX27_PAD_ATA_DATA6__GPIO4_8 0 x68 0 x032
#define MX27_PAD_ATA_DATA7__ATA_DATA7 0 x69 0 x004
#define MX27_PAD_ATA_DATA7__ETMTRACEPKT12 0 x69 0 x005
#define MX27_PAD_ATA_DATA7__FEC_MDC 0 x69 0 x006
#define MX27_PAD_ATA_DATA7__GPIO4_9 0 x69 0 x032
#define MX27_PAD_ATA_DATA8__ATA_DATA8 0 x6a 0 x004
#define MX27_PAD_ATA_DATA8__ETMTRACEPKT11 0 x6a 0 x005
#define MX27_PAD_ATA_DATA8__FEC_CRS 0 x6a 0 x002
#define MX27_PAD_ATA_DATA8__GPIO4_10 0 x6a 0 x032
#define MX27_PAD_ATA_DATA9__ATA_DATA9 0 x6b 0 x004
#define MX27_PAD_ATA_DATA9__ETMTRACEPKT10 0 x6b 0 x005
#define MX27_PAD_ATA_DATA9__FEC_TX_CLK 0 x6b 0 x002
#define MX27_PAD_ATA_DATA9__GPIO4_11 0 x6b 0 x032
#define MX27_PAD_ATA_DATA10__ATA_DATA10 0 x6c 0 x004
#define MX27_PAD_ATA_DATA10__ETMTRACEPKT9 0 x6c 0 x005
#define MX27_PAD_ATA_DATA10__FEC_RXD0 0 x6c 0 x002
#define MX27_PAD_ATA_DATA10__GPIO4_12 0 x6c 0 x032
#define MX27_PAD_ATA_DATA11__ATA_DATA11 0 x6d 0 x004
#define MX27_PAD_ATA_DATA11__ETMTRACEPKT8 0 x6d 0 x005
#define MX27_PAD_ATA_DATA11__FEC_RX_DV 0 x6d 0 x002
#define MX27_PAD_ATA_DATA11__GPIO4_13 0 x6d 0 x032
#define MX27_PAD_ATA_DATA12__ATA_DATA12 0 x6e 0 x004
#define MX27_PAD_ATA_DATA12__ETMTRACEPKT7 0 x6e 0 x005
#define MX27_PAD_ATA_DATA12__FEC_RX_CLK 0 x6e 0 x002
#define MX27_PAD_ATA_DATA12__GPIO4_14 0 x6e 0 x032
#define MX27_PAD_ATA_DATA13__ATA_DATA13 0 x6f 0 x004
#define MX27_PAD_ATA_DATA13__ETMTRACEPKT6 0 x6f 0 x005
#define MX27_PAD_ATA_DATA13__FEC_COL 0 x6f 0 x002
#define MX27_PAD_ATA_DATA13__GPIO4_15 0 x6f 0 x032
#define MX27_PAD_ATA_DATA14__ATA_DATA14 0 x70 0 x004
#define MX27_PAD_ATA_DATA14__ETMTRACEPKT5 0 x70 0 x005
#define MX27_PAD_ATA_DATA14__FEC_TX_ER 0 x70 0 x006
#define MX27_PAD_ATA_DATA14__GPIO4_16 0 x70 0 x032
#define MX27_PAD_I2C_DATA__I2C_DATA 0 x71 0 x004
#define MX27_PAD_I2C_DATA__GPIO4_17 0 x71 0 x032
#define MX27_PAD_I2C_CLK__I2C_CLK 0 x72 0 x004
#define MX27_PAD_I2C_CLK__GPIO4_18 0 x72 0 x032
#define MX27_PAD_CSPI2_SS2__CSPI2_SS2 0 x73 0 x004
#define MX27_PAD_CSPI2_SS2__USBH2_DATA4 0 x73 0 x005
#define MX27_PAD_CSPI2_SS2__GPIO4_19 0 x73 0 x032
#define MX27_PAD_CSPI2_SS1__CSPI2_SS1 0 x74 0 x004
#define MX27_PAD_CSPI2_SS1__USBH2_DATA3 0 x74 0 x005
#define MX27_PAD_CSPI2_SS1__GPIO4_20 0 x74 0 x032
#define MX27_PAD_CSPI2_SS0__CSPI2_SS0 0 x75 0 x004
#define MX27_PAD_CSPI2_SS0__USBH2_DATA6 0 x75 0 x005
#define MX27_PAD_CSPI2_SS0__GPIO4_21 0 x75 0 x032
#define MX27_PAD_CSPI2_SCLK__CSPI2_SCLK 0 x76 0 x004
#define MX27_PAD_CSPI2_SCLK__USBH2_DATA0 0 x76 0 x005
#define MX27_PAD_CSPI2_SCLK__GPIO4_22 0 x76 0 x032
#define MX27_PAD_CSPI2_MISO__CSPI2_MISO 0 x77 0 x004
#define MX27_PAD_CSPI2_MISO__USBH2_DATA2 0 x77 0 x005
#define MX27_PAD_CSPI2_MISO__GPIO4_23 0 x77 0 x032
#define MX27_PAD_CSPI2_MOSI__CSPI2_MOSI 0 x78 0 x004
#define MX27_PAD_CSPI2_MOSI__USBH2_DATA1 0 x78 0 x005
#define MX27_PAD_CSPI2_MOSI__GPIO4_24 0 x78 0 x032
#define MX27_PAD_CSPI1_RDY__CSPI1_RDY 0 x79 0 x000
#define MX27_PAD_CSPI1_RDY__GPIO4_25 0 x79 0 x032
#define MX27_PAD_CSPI1_SS2__CSPI1_SS2 0 x7a 0 x004
#define MX27_PAD_CSPI1_SS2__USBH2_DATA5 0 x7a 0 x005
#define MX27_PAD_CSPI1_SS2__GPIO4_26 0 x7a 0 x032
#define MX27_PAD_CSPI1_SS1__CSPI1_SS1 0 x7b 0 x004
#define MX27_PAD_CSPI1_SS1__GPIO4_27 0 x7b 0 x032
#define MX27_PAD_CSPI1_SS0__CSPI1_SS0 0 x7c 0 x004
#define MX27_PAD_CSPI1_SS0__GPIO4_28 0 x7c 0 x032
#define MX27_PAD_CSPI1_SCLK__CSPI1_SCLK 0 x7d 0 x004
#define MX27_PAD_CSPI1_SCLK__GPIO4_29 0 x7d 0 x032
#define MX27_PAD_CSPI1_MISO__CSPI1_MISO 0 x7e 0 x004
#define MX27_PAD_CSPI1_MISO__GPIO4_30 0 x7e 0 x032
#define MX27_PAD_CSPI1_MOSI__CSPI1_MOSI 0 x7f 0 x004
#define MX27_PAD_CSPI1_MOSI__GPIO4_31 0 x7f 0 x032
#define MX27_PAD_USBOTG_NXT__USBOTG_NXT 0 x80 0 x000
#define MX27_PAD_USBOTG_NXT__KP_COL6A 0 x80 0 x005
#define MX27_PAD_USBOTG_NXT__GPIO5_0 0 x80 0 x032
#define MX27_PAD_USBOTG_STP__USBOTG_STP 0 x81 0 x004
#define MX27_PAD_USBOTG_STP__KP_ROW6A 0 x81 0 x005
#define MX27_PAD_USBOTG_STP__GPIO5_1 0 x81 0 x032
#define MX27_PAD_USBOTG_DIR__USBOTG_DIR 0 x82 0 x000
#define MX27_PAD_USBOTG_DIR__KP_ROW7A 0 x82 0 x005
#define MX27_PAD_USBOTG_DIR__GPIO5_2 0 x82 0 x032
#define MX27_PAD_UART2_CTS__UART2_CTS 0 x83 0 x004
#define MX27_PAD_UART2_CTS__KP_COL7 0 x83 0 x005
#define MX27_PAD_UART2_CTS__GPIO5_3 0 x83 0 x032
#define MX27_PAD_UART2_RTS__UART2_RTS 0 x84 0 x000
#define MX27_PAD_UART2_RTS__KP_ROW7 0 x84 0 x005
#define MX27_PAD_UART2_RTS__GPIO5_4 0 x84 0 x032
#define MX27_PAD_PWMO__PWMO 0 x85 0 x004
#define MX27_PAD_PWMO__GPIO5_5 0 x85 0 x032
#define MX27_PAD_UART2_TXD__UART2_TXD 0 x86 0 x004
#define MX27_PAD_UART2_TXD__KP_COL6 0 x86 0 x005
#define MX27_PAD_UART2_TXD__GPIO5_6 0 x86 0 x032
#define MX27_PAD_UART2_RXD__UART2_RXD 0 x87 0 x000
#define MX27_PAD_UART2_RXD__KP_ROW6 0 x87 0 x005
#define MX27_PAD_UART2_RXD__GPIO5_7 0 x87 0 x032
#define MX27_PAD_UART3_TXD__UART3_TXD 0 x88 0 x004
#define MX27_PAD_UART3_TXD__GPIO5_8 0 x88 0 x032
#define MX27_PAD_UART3_RXD__UART3_RXD 0 x89 0 x000
#define MX27_PAD_UART3_RXD__GPIO5_9 0 x89 0 x032
#define MX27_PAD_UART3_CTS__UART3_CTS 0 x8a 0 x004
#define MX27_PAD_UART3_CTS__GPIO5_10 0 x8a 0 x032
#define MX27_PAD_UART3_RTS__UART3_RTS 0 x8b 0 x000
#define MX27_PAD_UART3_RTS__GPIO5_11 0 x8b 0 x032
#define MX27_PAD_UART1_TXD__UART1_TXD 0 x8c 0 x004
#define MX27_PAD_UART1_TXD__GPIO5_12 0 x8c 0 x032
#define MX27_PAD_UART1_RXD__UART1_RXD 0 x8d 0 x000
#define MX27_PAD_UART1_RXD__GPIO5_13 0 x8d 0 x032
#define MX27_PAD_UART1_CTS__UART1_CTS 0 x8e 0 x004
#define MX27_PAD_UART1_CTS__GPIO5_14 0 x8e 0 x032
#define MX27_PAD_UART1_RTS__UART1_RTS 0 x8f 0 x000
#define MX27_PAD_UART1_RTS__GPIO5_15 0 x8f 0 x032
#define MX27_PAD_RTCK__RTCK 0 x90 0 x004
#define MX27_PAD_RTCK__OWIRE 0 x90 0 x005
#define MX27_PAD_RTCK__GPIO5_16 0 x90 0 x032
#define MX27_PAD_RESET_OUT_B__RESET_OUT_B 0 x91 0 x004
#define MX27_PAD_RESET_OUT_B__GPIO5_17 0 x91 0 x032
#define MX27_PAD_SD1_D0__SD1_D0 0 x92 0 x004
#define MX27_PAD_SD1_D0__CSPI3_MISO 0 x92 0 x001
#define MX27_PAD_SD1_D0__GPIO5_18 0 x92 0 x032
#define MX27_PAD_SD1_D1__SD1_D1 0 x93 0 x004
#define MX27_PAD_SD1_D1__GPIO5_19 0 x93 0 x032
#define MX27_PAD_SD1_D2__SD1_D2 0 x94 0 x004
#define MX27_PAD_SD1_D2__GPIO5_20 0 x94 0 x032
#define MX27_PAD_SD1_D3__SD1_D3 0 x95 0 x004
#define MX27_PAD_SD1_D3__CSPI3_SS 0 x95 0 x005
#define MX27_PAD_SD1_D3__GPIO5_21 0 x95 0 x032
#define MX27_PAD_SD1_CMD__SD1_CMD 0 x96 0 x004
#define MX27_PAD_SD1_CMD__CSPI3_MOSI 0 x96 0 x005
#define MX27_PAD_SD1_CMD__GPIO5_22 0 x96 0 x032
#define MX27_PAD_SD1_CLK__SD1_CLK 0 x97 0 x004
#define MX27_PAD_SD1_CLK__CSPI3_SCLK 0 x97 0 x005
#define MX27_PAD_SD1_CLK__GPIO5_23 0 x97 0 x032
#define MX27_PAD_USBOTG_CLK__USBOTG_CLK 0 x98 0 x000
#define MX27_PAD_USBOTG_CLK__GPIO5_24 0 x98 0 x032
#define MX27_PAD_USBOTG_DATA7__USBOTG_DATA7 0 x99 0 x004
#define MX27_PAD_USBOTG_DATA7__GPIO5_25 0 x99 0 x032
#define MX27_PAD_NFRB__NFRB 0 xa0 0 x000
#define MX27_PAD_NFRB__ETMTRACEPKT3 0 xa0 0 x005
#define MX27_PAD_NFRB__GPIO6_0 0 xa0 0 x032
#define MX27_PAD_NFCLE__NFCLE 0 xa1 0 x004
#define MX27_PAD_NFCLE__ETMTRACEPKT0 0 xa1 0 x005
#define MX27_PAD_NFCLE__GPIO6_1 0 xa1 0 x032
#define MX27_PAD_NFWP_B__NFWP_B 0 xa2 0 x004
#define MX27_PAD_NFWP_B__ETMTRACEPKT1 0 xa2 0 x005
#define MX27_PAD_NFWP_B__GPIO6_2 0 xa2 0 x032
#define MX27_PAD_NFCE_B__NFCE_B 0 xa3 0 x004
#define MX27_PAD_NFCE_B__ETMTRACEPKT2 0 xa3 0 x005
#define MX27_PAD_NFCE_B__GPIO6_3 0 xa3 0 x032
#define MX27_PAD_NFALE__NFALE 0 xa4 0 x004
#define MX27_PAD_NFALE__ETMPIPESTAT0 0 xa4 0 x005
#define MX27_PAD_NFALE__GPIO6_4 0 xa4 0 x032
#define MX27_PAD_NFRE_B__NFRE_B 0 xa5 0 x004
#define MX27_PAD_NFRE_B__ETMPIPESTAT1 0 xa5 0 x005
#define MX27_PAD_NFRE_B__GPIO6_5 0 xa5 0 x032
#define MX27_PAD_NFWE_B__NFWE_B 0 xa6 0 x004
#define MX27_PAD_NFWE_B__ETMPIPESTAT2 0 xa6 0 x005
#define MX27_PAD_NFWE_B__GPIO6_6 0 xa6 0 x032
#define MX27_PAD_PC_POE__PC_POE 0 xa7 0 x004
#define MX27_PAD_PC_POE__ATA_BUFFER_EN 0 xa7 0 x005
#define MX27_PAD_PC_POE__GPIO6_7 0 xa7 0 x032
#define MX27_PAD_PC_RW_B__PC_RW_B 0 xa8 0 x004
#define MX27_PAD_PC_RW_B__ATA_IORDY 0 xa8 0 x001
#define MX27_PAD_PC_RW_B__GPIO6_8 0 xa8 0 x032
#define MX27_PAD_IOIS16__IOIS16 0 xa9 0 x000
#define MX27_PAD_IOIS16__ATA_INTRQ 0 xa9 0 x001
#define MX27_PAD_IOIS16__GPIO6_9 0 xa9 0 x032
#define MX27_PAD_PC_RST__PC_RST 0 xaa 0 x004
#define MX27_PAD_PC_RST__ATA_RESET_B 0 xaa 0 x005
#define MX27_PAD_PC_RST__GPIO6_10 0 xaa 0 x032
#define MX27_PAD_PC_BVD2__PC_BVD2 0 xab 0 x000
#define MX27_PAD_PC_BVD2__ATA_DMACK 0 xab 0 x005
#define MX27_PAD_PC_BVD2__GPIO6_11 0 xab 0 x032
#define MX27_PAD_PC_BVD1__PC_BVD1 0 xac 0 x000
#define MX27_PAD_PC_BVD1__ATA_DMARQ 0 xac 0 x001
#define MX27_PAD_PC_BVD1__GPIO6_12 0 xac 0 x032
#define MX27_PAD_PC_VS2__PC_VS2 0 xad 0 x000
#define MX27_PAD_PC_VS2__ATA_DA0 0 xad 0 x005
#define MX27_PAD_PC_VS2__GPIO6_13 0 xad 0 x032
#define MX27_PAD_PC_VS1__PC_VS1 0 xae 0 x000
#define MX27_PAD_PC_VS1__ATA_DA1 0 xae 0 x005
#define MX27_PAD_PC_VS1__GPIO6_14 0 xae 0 x032
#define MX27_PAD_CLKO__CLKO 0 xaf 0 x004
#define MX27_PAD_CLKO__GPIO6_15 0 xaf 0 x032
#define MX27_PAD_PC_PWRON__PC_PWRON 0 xb0 0 x000
#define MX27_PAD_PC_PWRON__ATA_DA2 0 xb0 0 x005
#define MX27_PAD_PC_PWRON__GPIO6_16 0 xb0 0 x032
#define MX27_PAD_PC_READY__PC_READY 0 xb1 0 x000
#define MX27_PAD_PC_READY__ATA_CS0 0 xb1 0 x005
#define MX27_PAD_PC_READY__GPIO6_17 0 xb1 0 x032
#define MX27_PAD_PC_WAIT_B__PC_WAIT_B 0 xb2 0 x000
#define MX27_PAD_PC_WAIT_B__ATA_CS1 0 xb2 0 x005
#define MX27_PAD_PC_WAIT_B__GPIO6_18 0 xb2 0 x032
#define MX27_PAD_PC_CD2_B__PC_CD2_B 0 xb3 0 x000
#define MX27_PAD_PC_CD2_B__ATA_DIOW 0 xb3 0 x005
#define MX27_PAD_PC_CD2_B__GPIO6_19 0 xb3 0 x032
#define MX27_PAD_PC_CD1_B__PC_CD1_B 0 xb4 0 x000
#define MX27_PAD_PC_CD1_B__ATA_DIOR 0 xb4 0 x005
#define MX27_PAD_PC_CD1_B__GPIO6_20 0 xb4 0 x032
#define MX27_PAD_CS4_B__CS4_B 0 xb5 0 x004
#define MX27_PAD_CS4_B__ETMTRACESYNC 0 xb5 0 x005
#define MX27_PAD_CS4_B__GPIO6_21 0 xb5 0 x032
#define MX27_PAD_CS5_B__CS5_B 0 xb6 0 x004
#define MX27_PAD_CS5_B__ETMTRACECLK 0 xb6 0 x005
#define MX27_PAD_CS5_B__GPIO6_22 0 xb6 0 x032
#define MX27_PAD_ATA_DATA15__ATA_DATA15 0 xb7 0 x004
#define MX27_PAD_ATA_DATA15__ETMTRACEPKT4 0 xb7 0 x005
#define MX27_PAD_ATA_DATA15__FEC_TX_EN 0 xb7 0 x006
#define MX27_PAD_ATA_DATA15__GPIO6_23 0 xb7 0 x032
#endif /* __DTS_IMX27_PINFUNC_H */
Messung V0.5 in Prozent C=96 H=94 G=94
¤ Dauer der Verarbeitung: 0.12 Sekunden
(vorverarbeitet am 2026-06-08)
¤
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