| Quellcodebibliothek Statistik Leitseite products/Sources/formale Sprachen/C/Linux/arch/arm/boot/dts/nvidia/ (Open Source Betriebssystem Version 6.17.9©) Datei vom 24.10.2025 mit Größe 241 kB |
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Quelle tegra124-nyan-big-emc.dtsi Sprache: unbekannt |
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// SPDX-License-Identifier: GPL-2.0
#include <dt-bindings/clock/tegra124-car.h> / { clock@60006000 { emc-timings-1 { nvidia,ram-code = <1>; timing-12750000 { clock-frequency = <12750000>; nvidia,parent-clock-frequency = <408000000>; clocks = <&tegra_car TEGRA124_CLK_PLL_P>; clock-names = "emc-parent"; }; timing-20400000 { clock-frequency = <20400000>; nvidia,parent-clock-frequency = <408000000>; clocks = <&tegra_car TEGRA124_CLK_PLL_P>; clock-names = "emc-parent"; }; timing-40800000 { clock-frequency = <40800000>; nvidia,parent-clock-frequency = <408000000>; clocks = <&tegra_car TEGRA124_CLK_PLL_P>; clock-names = "emc-parent"; }; timing-68000000 { clock-frequency = <68000000>; nvidia,parent-clock-frequency = <408000000>; clocks = <&tegra_car TEGRA124_CLK_PLL_P>; clock-names = "emc-parent"; }; timing-102000000 { clock-frequency = <102000000>; nvidia,parent-clock-frequency = <408000000>; clocks = <&tegra_car TEGRA124_CLK_PLL_P>; clock-names = "emc-parent"; }; timing-204000000 { clock-frequency = <204000000>; nvidia,parent-clock-frequency = <408000000>; clocks = <&tegra_car TEGRA124_CLK_PLL_P>; clock-names = "emc-parent"; }; timing-300000000 { clock-frequency = <300000000>; nvidia,parent-clock-frequency = <600000000>; clocks = <&tegra_car TEGRA124_CLK_PLL_C>; clock-names = "emc-parent"; }; timing-396000000 { clock-frequency = <396000000>; nvidia,parent-clock-frequency = <792000000>; clocks = <&tegra_car TEGRA124_CLK_PLL_M>; clock-names = "emc-parent"; }; timing-528000000 { clock-frequency = <528000000>; nvidia,parent-clock-frequency = <528000000>; clocks = <&tegra_car TEGRA124_CLK_PLL_M_UD>; clock-names = "emc-parent"; }; timing-600000000 { clock-frequency = <600000000>; nvidia,parent-clock-frequency = <600000000>; clocks = <&tegra_car TEGRA124_CLK_PLL_C_UD>; clock-names = "emc-parent"; }; timing-792000000 { clock-frequency = <792000000>; nvidia,parent-clock-frequency = <792000000>; clocks = <&tegra_car TEGRA124_CLK_PLL_M_UD>; clock-names = "emc-parent"; }; }; emc-timings-4 { nvidia,ram-code = <4>; timing-12750000 { clock-frequency = <12750000>; nvidia,parent-clock-frequency = <408000000>; clocks = <&tegra_car TEGRA124_CLK_PLL_P>; clock-names = "emc-parent"; }; timing-20400000 { clock-frequency = <20400000>; nvidia,parent-clock-frequency = <408000000>; clocks = <&tegra_car TEGRA124_CLK_PLL_P>; clock-names = "emc-parent"; }; timing-40800000 { clock-frequency = <40800000>; nvidia,parent-clock-frequency = <408000000>; clocks = <&tegra_car TEGRA124_CLK_PLL_P>; clock-names = "emc-parent"; }; timing-68000000 { clock-frequency = <68000000>; nvidia,parent-clock-frequency = <408000000>; clocks = <&tegra_car TEGRA124_CLK_PLL_P>; clock-names = "emc-parent"; }; timing-102000000 { clock-frequency = <102000000>; nvidia,parent-clock-frequency = <408000000>; clocks = <&tegra_car TEGRA124_CLK_PLL_P>; clock-names = "emc-parent"; }; timing-204000000 { clock-frequency = <204000000>; nvidia,parent-clock-frequency = <408000000>; clocks = <&tegra_car TEGRA124_CLK_PLL_P>; clock-names = "emc-parent"; }; timing-300000000 { clock-frequency = <300000000>; nvidia,parent-clock-frequency = <600000000>; clocks = <&tegra_car TEGRA124_CLK_PLL_C>; clock-names = "emc-parent"; }; timing-396000000 { clock-frequency = <396000000>; nvidia,parent-clock-frequency = <792000000>; clocks = <&tegra_car TEGRA124_CLK_PLL_M>; clock-names = "emc-parent"; }; timing-528000000 { clock-frequency = <528000000>; nvidia,parent-clock-frequency = <528000000>; clocks = <&tegra_car TEGRA124_CLK_PLL_M_UD>; clock-names = "emc-parent"; }; timing-600000000 { clock-frequency = <600000000>; nvidia,parent-clock-frequency = <600000000>; clocks = <&tegra_car TEGRA124_CLK_PLL_C_UD>; clock-names = "emc-parent"; }; timing-792000000 { clock-frequency = <792000000>; nvidia,parent-clock-frequency = <792000000>; clocks = <&tegra_car TEGRA124_CLK_PLL_M_UD>; clock-names = "emc-parent"; }; }; emc-timings-6 { nvidia,ram-code = <6>; timing-12750000 { clock-frequency = <12750000>; nvidia,parent-clock-frequency = <408000000>; clocks = <&tegra_car TEGRA124_CLK_PLL_P>; clock-names = "emc-parent"; }; timing-20400000 { clock-frequency = <20400000>; nvidia,parent-clock-frequency = <408000000>; clocks = <&tegra_car TEGRA124_CLK_PLL_P>; clock-names = "emc-parent"; }; timing-40800000 { clock-frequency = <40800000>; nvidia,parent-clock-frequency = <408000000>; clocks = <&tegra_car TEGRA124_CLK_PLL_P>; clock-names = "emc-parent"; }; timing-68000000 { clock-frequency = <68000000>; nvidia,parent-clock-frequency = <408000000>; clocks = <&tegra_car TEGRA124_CLK_PLL_P>; clock-names = "emc-parent"; }; timing-102000000 { clock-frequency = <102000000>; nvidia,parent-clock-frequency = <408000000>; clocks = <&tegra_car TEGRA124_CLK_PLL_P>; clock-names = "emc-parent"; }; timing-204000000 { clock-frequency = <204000000>; nvidia,parent-clock-frequency = <408000000>; clocks = <&tegra_car TEGRA124_CLK_PLL_P>; clock-names = "emc-parent"; }; timing-300000000 { clock-frequency = <300000000>; nvidia,parent-clock-frequency = <600000000>; clocks = <&tegra_car TEGRA124_CLK_PLL_C>; clock-names = "emc-parent"; }; timing-396000000 { clock-frequency = <396000000>; nvidia,parent-clock-frequency = <792000000>; clocks = <&tegra_car TEGRA124_CLK_PLL_M>; clock-names = "emc-parent"; }; timing-528000000 { clock-frequency = <528000000>; nvidia,parent-clock-frequency = <528000000>; clocks = <&tegra_car TEGRA124_CLK_PLL_M_UD>; clock-names = "emc-parent"; }; timing-600000000 { clock-frequency = <600000000>; nvidia,parent-clock-frequency = <600000000>; clocks = <&tegra_car TEGRA124_CLK_PLL_C_UD>; clock-names = "emc-parent"; }; timing-792000000 { clock-frequency = <792000000>; nvidia,parent-clock-frequency = <792000000>; clocks = <&tegra_car TEGRA124_CLK_PLL_M_UD>; clock-names = "emc-parent"; }; }; }; apbmisc@70000800 { nvidia,long-ram-code; }; memory-controller@70019000 { emc-timings-1 { nvidia,ram-code = <1>; timing-12750000 { clock-frequency = <12750000>; nvidia,emem-configuration = < 0x40040001 /* MC_EMEM_ARB_CFG */ 0x8000000a /* MC_EMEM_ARB_OUTSTANDING_REQ */ 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */ 0x00000001 /* MC_EMEM_ARB_TIMING_RP */ 0x00000002 /* MC_EMEM_ARB_TIMING_RC */ 0x00000000 /* MC_EMEM_ARB_TIMING_RAS */ 0x00000002 /* MC_EMEM_ARB_TIMING_FAW */ 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */ 0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */ 0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */ 0x00000003 /* MC_EMEM_ARB_TIMING_R2R */ 0x00000002 /* MC_EMEM_ARB_TIMING_W2W */ 0x00000003 /* MC_EMEM_ARB_TIMING_R2W */ 0x00000006 /* MC_EMEM_ARB_TIMING_W2R */ 0x06030203 /* MC_EMEM_ARB_DA_TURNS */ 0x000a0402 /* MC_EMEM_ARB_DA_COVERS */ 0x77e30303 /* MC_EMEM_ARB_MISC0 */ 0x70000f03 /* MC_EMEM_ARB_MISC1 */ 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */ >; }; timing-20400000 { clock-frequency = <20400000>; nvidia,emem-configuration = < 0x40020001 /* MC_EMEM_ARB_CFG */ 0x80000012 /* MC_EMEM_ARB_OUTSTANDING_REQ */ 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */ 0x00000001 /* MC_EMEM_ARB_TIMING_RP */ 0x00000002 /* MC_EMEM_ARB_TIMING_RC */ 0x00000000 /* MC_EMEM_ARB_TIMING_RAS */ 0x00000002 /* MC_EMEM_ARB_TIMING_FAW */ 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */ 0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */ 0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */ 0x00000003 /* MC_EMEM_ARB_TIMING_R2R */ 0x00000002 /* MC_EMEM_ARB_TIMING_W2W */ 0x00000003 /* MC_EMEM_ARB_TIMING_R2W */ 0x00000006 /* MC_EMEM_ARB_TIMING_W2R */ 0x06030203 /* MC_EMEM_ARB_DA_TURNS */ 0x000a0402 /* MC_EMEM_ARB_DA_COVERS */ 0x76230303 /* MC_EMEM_ARB_MISC0 */ 0x70000f03 /* MC_EMEM_ARB_MISC1 */ 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */ >; }; timing-40800000 { clock-frequency = <40800000>; nvidia,emem-configuration = < 0xa0000001 /* MC_EMEM_ARB_CFG */ 0x80000017 /* MC_EMEM_ARB_OUTSTANDING_REQ */ 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */ 0x00000001 /* MC_EMEM_ARB_TIMING_RP */ 0x00000002 /* MC_EMEM_ARB_TIMING_RC */ 0x00000000 /* MC_EMEM_ARB_TIMING_RAS */ 0x00000002 /* MC_EMEM_ARB_TIMING_FAW */ 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */ 0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */ 0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */ 0x00000003 /* MC_EMEM_ARB_TIMING_R2R */ 0x00000002 /* MC_EMEM_ARB_TIMING_W2W */ 0x00000003 /* MC_EMEM_ARB_TIMING_R2W */ 0x00000006 /* MC_EMEM_ARB_TIMING_W2R */ 0x06030203 /* MC_EMEM_ARB_DA_TURNS */ 0x000a0402 /* MC_EMEM_ARB_DA_COVERS */ 0x74a30303 /* MC_EMEM_ARB_MISC0 */ 0x70000f03 /* MC_EMEM_ARB_MISC1 */ 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */ >; }; timing-68000000 { clock-frequency = <68000000>; nvidia,emem-configuration = < 0x00000001 /* MC_EMEM_ARB_CFG */ 0x8000001e /* MC_EMEM_ARB_OUTSTANDING_REQ */ 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */ 0x00000001 /* MC_EMEM_ARB_TIMING_RP */ 0x00000002 /* MC_EMEM_ARB_TIMING_RC */ 0x00000000 /* MC_EMEM_ARB_TIMING_RAS */ 0x00000002 /* MC_EMEM_ARB_TIMING_FAW */ 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */ 0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */ 0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */ 0x00000003 /* MC_EMEM_ARB_TIMING_R2R */ 0x00000002 /* MC_EMEM_ARB_TIMING_W2W */ 0x00000003 /* MC_EMEM_ARB_TIMING_R2W */ 0x00000006 /* MC_EMEM_ARB_TIMING_W2R */ 0x06030203 /* MC_EMEM_ARB_DA_TURNS */ 0x000a0402 /* MC_EMEM_ARB_DA_COVERS */ 0x74230403 /* MC_EMEM_ARB_MISC0 */ 0x70000f03 /* MC_EMEM_ARB_MISC1 */ 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */ >; }; timing-102000000 { clock-frequency = <102000000>; nvidia,emem-configuration = < 0x08000001 /* MC_EMEM_ARB_CFG */ 0x80000026 /* MC_EMEM_ARB_OUTSTANDING_REQ */ 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */ 0x00000001 /* MC_EMEM_ARB_TIMING_RP */ 0x00000003 /* MC_EMEM_ARB_TIMING_RC */ 0x00000000 /* MC_EMEM_ARB_TIMING_RAS */ 0x00000002 /* MC_EMEM_ARB_TIMING_FAW */ 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */ 0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */ 0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */ 0x00000003 /* MC_EMEM_ARB_TIMING_R2R */ 0x00000002 /* MC_EMEM_ARB_TIMING_W2W */ 0x00000003 /* MC_EMEM_ARB_TIMING_R2W */ 0x00000006 /* MC_EMEM_ARB_TIMING_W2R */ 0x06030203 /* MC_EMEM_ARB_DA_TURNS */ 0x000a0403 /* MC_EMEM_ARB_DA_COVERS */ 0x73c30504 /* MC_EMEM_ARB_MISC0 */ 0x70000f03 /* MC_EMEM_ARB_MISC1 */ 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */ >; }; timing-204000000 { clock-frequency = <204000000>; nvidia,emem-configuration = < 0x01000003 /* MC_EMEM_ARB_CFG */ 0x80000040 /* MC_EMEM_ARB_OUTSTANDING_REQ */ 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */ 0x00000001 /* MC_EMEM_ARB_TIMING_RP */ 0x00000005 /* MC_EMEM_ARB_TIMING_RC */ 0x00000002 /* MC_EMEM_ARB_TIMING_RAS */ 0x00000004 /* MC_EMEM_ARB_TIMING_FAW */ 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */ 0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */ 0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */ 0x00000003 /* MC_EMEM_ARB_TIMING_R2R */ 0x00000002 /* MC_EMEM_ARB_TIMING_W2W */ 0x00000004 /* MC_EMEM_ARB_TIMING_R2W */ 0x00000006 /* MC_EMEM_ARB_TIMING_W2R */ 0x06040203 /* MC_EMEM_ARB_DA_TURNS */ 0x000a0405 /* MC_EMEM_ARB_DA_COVERS */ 0x73840a06 /* MC_EMEM_ARB_MISC0 */ 0x70000f03 /* MC_EMEM_ARB_MISC1 */ 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */ >; }; timing-300000000 { clock-frequency = <300000000>; nvidia,emem-configuration = < 0x08000004 /* MC_EMEM_ARB_CFG */ 0x80000040 /* MC_EMEM_ARB_OUTSTANDING_REQ */ 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */ 0x00000002 /* MC_EMEM_ARB_TIMING_RP */ 0x00000007 /* MC_EMEM_ARB_TIMING_RC */ 0x00000004 /* MC_EMEM_ARB_TIMING_RAS */ 0x00000005 /* MC_EMEM_ARB_TIMING_FAW */ 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */ 0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */ 0x00000007 /* MC_EMEM_ARB_TIMING_WAP2PRE */ 0x00000002 /* MC_EMEM_ARB_TIMING_R2R */ 0x00000002 /* MC_EMEM_ARB_TIMING_W2W */ 0x00000004 /* MC_EMEM_ARB_TIMING_R2W */ 0x00000006 /* MC_EMEM_ARB_TIMING_W2R */ 0x06040202 /* MC_EMEM_ARB_DA_TURNS */ 0x000b0607 /* MC_EMEM_ARB_DA_COVERS */ 0x77450e08 /* MC_EMEM_ARB_MISC0 */ 0x70000f03 /* MC_EMEM_ARB_MISC1 */ 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */ >; }; timing-396000000 { clock-frequency = <396000000>; nvidia,emem-configuration = < 0x0f000005 /* MC_EMEM_ARB_CFG */ 0x80000040 /* MC_EMEM_ARB_OUTSTANDING_REQ */ 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */ 0x00000002 /* MC_EMEM_ARB_TIMING_RP */ 0x00000009 /* MC_EMEM_ARB_TIMING_RC */ 0x00000005 /* MC_EMEM_ARB_TIMING_RAS */ 0x00000007 /* MC_EMEM_ARB_TIMING_FAW */ 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */ 0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */ 0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */ 0x00000002 /* MC_EMEM_ARB_TIMING_R2R */ 0x00000002 /* MC_EMEM_ARB_TIMING_W2W */ 0x00000004 /* MC_EMEM_ARB_TIMING_R2W */ 0x00000006 /* MC_EMEM_ARB_TIMING_W2R */ 0x06040202 /* MC_EMEM_ARB_DA_TURNS */ 0x000d0709 /* MC_EMEM_ARB_DA_COVERS */ 0x7586120a /* MC_EMEM_ARB_MISC0 */ 0x70000f03 /* MC_EMEM_ARB_MISC1 */ 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */ >; }; timing-528000000 { clock-frequency = <528000000>; nvidia,emem-configuration = < 0x0f000007 /* MC_EMEM_ARB_CFG */ 0x80000040 /* MC_EMEM_ARB_OUTSTANDING_REQ */ 0x00000002 /* MC_EMEM_ARB_TIMING_RCD */ 0x00000003 /* MC_EMEM_ARB_TIMING_RP */ 0x0000000d /* MC_EMEM_ARB_TIMING_RC */ 0x00000008 /* MC_EMEM_ARB_TIMING_RAS */ 0x0000000a /* MC_EMEM_ARB_TIMING_FAW */ 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */ 0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */ 0x00000009 /* MC_EMEM_ARB_TIMING_WAP2PRE */ 0x00000002 /* MC_EMEM_ARB_TIMING_R2R */ 0x00000002 /* MC_EMEM_ARB_TIMING_W2W */ 0x00000005 /* MC_EMEM_ARB_TIMING_R2W */ 0x00000006 /* MC_EMEM_ARB_TIMING_W2R */ 0x06050202 /* MC_EMEM_ARB_DA_TURNS */ 0x0010090d /* MC_EMEM_ARB_DA_COVERS */ 0x7428180e /* MC_EMEM_ARB_MISC0 */ 0x70000f03 /* MC_EMEM_ARB_MISC1 */ 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */ >; }; timing-600000000 { clock-frequency = <600000000>; nvidia,emem-configuration = < 0x00000009 /* MC_EMEM_ARB_CFG */ 0x80000040 /* MC_EMEM_ARB_OUTSTANDING_REQ */ 0x00000003 /* MC_EMEM_ARB_TIMING_RCD */ 0x00000004 /* MC_EMEM_ARB_TIMING_RP */ 0x0000000e /* MC_EMEM_ARB_TIMING_RC */ 0x00000009 /* MC_EMEM_ARB_TIMING_RAS */ 0x0000000b /* MC_EMEM_ARB_TIMING_FAW */ 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */ 0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */ 0x0000000b /* MC_EMEM_ARB_TIMING_WAP2PRE */ 0x00000002 /* MC_EMEM_ARB_TIMING_R2R */ 0x00000002 /* MC_EMEM_ARB_TIMING_W2W */ 0x00000005 /* MC_EMEM_ARB_TIMING_R2W */ 0x00000007 /* MC_EMEM_ARB_TIMING_W2R */ 0x07050202 /* MC_EMEM_ARB_DA_TURNS */ 0x00130b0e /* MC_EMEM_ARB_DA_COVERS */ 0x73a91b0f /* MC_EMEM_ARB_MISC0 */ 0x70000f03 /* MC_EMEM_ARB_MISC1 */ 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */ >; }; timing-792000000 { clock-frequency = <792000000>; nvidia,emem-configuration = < 0x0e00000b /* MC_EMEM_ARB_CFG */ 0x80000040 /* MC_EMEM_ARB_OUTSTANDING_REQ */ 0x00000004 /* MC_EMEM_ARB_TIMING_RCD */ 0x00000005 /* MC_EMEM_ARB_TIMING_RP */ 0x00000013 /* MC_EMEM_ARB_TIMING_RC */ 0x0000000c /* MC_EMEM_ARB_TIMING_RAS */ 0x0000000f /* MC_EMEM_ARB_TIMING_FAW */ 0x00000002 /* MC_EMEM_ARB_TIMING_RRD */ 0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */ 0x0000000c /* MC_EMEM_ARB_TIMING_WAP2PRE */ 0x00000002 /* MC_EMEM_ARB_TIMING_R2R */ 0x00000002 /* MC_EMEM_ARB_TIMING_W2W */ 0x00000006 /* MC_EMEM_ARB_TIMING_R2W */ 0x00000008 /* MC_EMEM_ARB_TIMING_W2R */ 0x08060202 /* MC_EMEM_ARB_DA_TURNS */ 0x00160d13 /* MC_EMEM_ARB_DA_COVERS */ 0x734c2414 /* MC_EMEM_ARB_MISC0 */ 0x70000f02 /* MC_EMEM_ARB_MISC1 */ 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */ >; }; }; emc-timings-4 { nvidia,ram-code = <4>; timing-12750000 { clock-frequency = <12750000>; nvidia,emem-configuration = < 0x40040001 /* MC_EMEM_ARB_CFG */ 0x8000000a /* MC_EMEM_ARB_OUTSTANDING_REQ */ 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */ 0x00000001 /* MC_EMEM_ARB_TIMING_RP */ 0x00000002 /* MC_EMEM_ARB_TIMING_RC */ 0x00000000 /* MC_EMEM_ARB_TIMING_RAS */ 0x00000002 /* MC_EMEM_ARB_TIMING_FAW */ 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */ 0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */ 0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */ 0x00000003 /* MC_EMEM_ARB_TIMING_R2R */ 0x00000002 /* MC_EMEM_ARB_TIMING_W2W */ 0x00000003 /* MC_EMEM_ARB_TIMING_R2W */ 0x00000006 /* MC_EMEM_ARB_TIMING_W2R */ 0x06030203 /* MC_EMEM_ARB_DA_TURNS */ 0x000a0502 /* MC_EMEM_ARB_DA_COVERS */ 0x77e30303 /* MC_EMEM_ARB_MISC0 */ 0x70000f03 /* MC_EMEM_ARB_MISC1 */ 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */ >; }; timing-20400000 { clock-frequency = <20400000>; nvidia,emem-configuration = < 0x40020001 /* MC_EMEM_ARB_CFG */ 0x80000012 /* MC_EMEM_ARB_OUTSTANDING_REQ */ 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */ 0x00000001 /* MC_EMEM_ARB_TIMING_RP */ 0x00000002 /* MC_EMEM_ARB_TIMING_RC */ 0x00000000 /* MC_EMEM_ARB_TIMING_RAS */ 0x00000002 /* MC_EMEM_ARB_TIMING_FAW */ 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */ 0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */ 0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */ 0x00000003 /* MC_EMEM_ARB_TIMING_R2R */ 0x00000002 /* MC_EMEM_ARB_TIMING_W2W */ 0x00000003 /* MC_EMEM_ARB_TIMING_R2W */ 0x00000006 /* MC_EMEM_ARB_TIMING_W2R */ 0x06030203 /* MC_EMEM_ARB_DA_TURNS */ 0x000a0502 /* MC_EMEM_ARB_DA_COVERS */ 0x77430303 /* MC_EMEM_ARB_MISC0 */ 0x70000f03 /* MC_EMEM_ARB_MISC1 */ 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */ >; }; timing-40800000 { clock-frequency = <40800000>; nvidia,emem-configuration = < 0xa0000001 /* MC_EMEM_ARB_CFG */ 0x80000017 /* MC_EMEM_ARB_OUTSTANDING_REQ */ 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */ 0x00000001 /* MC_EMEM_ARB_TIMING_RP */ 0x00000002 /* MC_EMEM_ARB_TIMING_RC */ 0x00000000 /* MC_EMEM_ARB_TIMING_RAS */ 0x00000002 /* MC_EMEM_ARB_TIMING_FAW */ 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */ 0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */ 0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */ 0x00000003 /* MC_EMEM_ARB_TIMING_R2R */ 0x00000002 /* MC_EMEM_ARB_TIMING_W2W */ 0x00000003 /* MC_EMEM_ARB_TIMING_R2W */ 0x00000006 /* MC_EMEM_ARB_TIMING_W2R */ 0x06030203 /* MC_EMEM_ARB_DA_TURNS */ 0x000a0502 /* MC_EMEM_ARB_DA_COVERS */ 0x75e30303 /* MC_EMEM_ARB_MISC0 */ 0x70000f03 /* MC_EMEM_ARB_MISC1 */ 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */ >; }; timing-68000000 { clock-frequency = <68000000>; nvidia,emem-configuration = < 0x00000001 /* MC_EMEM_ARB_CFG */ 0x8000001e /* MC_EMEM_ARB_OUTSTANDING_REQ */ 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */ 0x00000001 /* MC_EMEM_ARB_TIMING_RP */ 0x00000002 /* MC_EMEM_ARB_TIMING_RC */ 0x00000000 /* MC_EMEM_ARB_TIMING_RAS */ 0x00000002 /* MC_EMEM_ARB_TIMING_FAW */ 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */ 0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */ 0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */ 0x00000003 /* MC_EMEM_ARB_TIMING_R2R */ 0x00000002 /* MC_EMEM_ARB_TIMING_W2W */ 0x00000003 /* MC_EMEM_ARB_TIMING_R2W */ 0x00000006 /* MC_EMEM_ARB_TIMING_W2R */ 0x06030203 /* MC_EMEM_ARB_DA_TURNS */ 0x000a0502 /* MC_EMEM_ARB_DA_COVERS */ 0x75430403 /* MC_EMEM_ARB_MISC0 */ 0x70000f03 /* MC_EMEM_ARB_MISC1 */ 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */ >; }; timing-102000000 { clock-frequency = <102000000>; nvidia,emem-configuration = < 0x08000001 /* MC_EMEM_ARB_CFG */ 0x80000026 /* MC_EMEM_ARB_OUTSTANDING_REQ */ 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */ 0x00000001 /* MC_EMEM_ARB_TIMING_RP */ 0x00000003 /* MC_EMEM_ARB_TIMING_RC */ 0x00000000 /* MC_EMEM_ARB_TIMING_RAS */ 0x00000002 /* MC_EMEM_ARB_TIMING_FAW */ 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */ 0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */ 0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */ 0x00000003 /* MC_EMEM_ARB_TIMING_R2R */ 0x00000002 /* MC_EMEM_ARB_TIMING_W2W */ 0x00000003 /* MC_EMEM_ARB_TIMING_R2W */ 0x00000006 /* MC_EMEM_ARB_TIMING_W2R */ 0x06030203 /* MC_EMEM_ARB_DA_TURNS */ 0x000a0503 /* MC_EMEM_ARB_DA_COVERS */ 0x74e30504 /* MC_EMEM_ARB_MISC0 */ 0x70000f03 /* MC_EMEM_ARB_MISC1 */ 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */ >; }; timing-204000000 { clock-frequency = <204000000>; nvidia,emem-configuration = < 0x01000003 /* MC_EMEM_ARB_CFG */ 0x80000040 /* MC_EMEM_ARB_OUTSTANDING_REQ */ 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */ 0x00000001 /* MC_EMEM_ARB_TIMING_RP */ 0x00000004 /* MC_EMEM_ARB_TIMING_RC */ 0x00000002 /* MC_EMEM_ARB_TIMING_RAS */ 0x00000004 /* MC_EMEM_ARB_TIMING_FAW */ 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */ 0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */ 0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */ 0x00000003 /* MC_EMEM_ARB_TIMING_R2R */ 0x00000002 /* MC_EMEM_ARB_TIMING_W2W */ 0x00000004 /* MC_EMEM_ARB_TIMING_R2W */ 0x00000006 /* MC_EMEM_ARB_TIMING_W2R */ 0x06040203 /* MC_EMEM_ARB_DA_TURNS */ 0x000a0504 /* MC_EMEM_ARB_DA_COVERS */ 0x74a40a05 /* MC_EMEM_ARB_MISC0 */ 0x70000f03 /* MC_EMEM_ARB_MISC1 */ 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */ >; }; timing-300000000 { clock-frequency = <300000000>; nvidia,emem-configuration = < 0x08000004 /* MC_EMEM_ARB_CFG */ 0x80000040 /* MC_EMEM_ARB_OUTSTANDING_REQ */ 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */ 0x00000002 /* MC_EMEM_ARB_TIMING_RP */ 0x00000007 /* MC_EMEM_ARB_TIMING_RC */ 0x00000004 /* MC_EMEM_ARB_TIMING_RAS */ 0x00000005 /* MC_EMEM_ARB_TIMING_FAW */ 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */ 0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */ 0x00000007 /* MC_EMEM_ARB_TIMING_WAP2PRE */ 0x00000002 /* MC_EMEM_ARB_TIMING_R2R */ 0x00000002 /* MC_EMEM_ARB_TIMING_W2W */ 0x00000004 /* MC_EMEM_ARB_TIMING_R2W */ 0x00000006 /* MC_EMEM_ARB_TIMING_W2R */ 0x06040202 /* MC_EMEM_ARB_DA_TURNS */ 0x000b0607 /* MC_EMEM_ARB_DA_COVERS */ 0x77450e08 /* MC_EMEM_ARB_MISC0 */ 0x70000f03 /* MC_EMEM_ARB_MISC1 */ 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */ >; }; timing-396000000 { clock-frequency = <396000000>; nvidia,emem-configuration = < 0x0f000005 /* MC_EMEM_ARB_CFG */ 0x80000040 /* MC_EMEM_ARB_OUTSTANDING_REQ */ 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */ 0x00000002 /* MC_EMEM_ARB_TIMING_RP */ 0x00000009 /* MC_EMEM_ARB_TIMING_RC */ 0x00000005 /* MC_EMEM_ARB_TIMING_RAS */ 0x00000007 /* MC_EMEM_ARB_TIMING_FAW */ 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */ 0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */ 0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */ 0x00000002 /* MC_EMEM_ARB_TIMING_R2R */ 0x00000002 /* MC_EMEM_ARB_TIMING_W2W */ 0x00000004 /* MC_EMEM_ARB_TIMING_R2W */ 0x00000006 /* MC_EMEM_ARB_TIMING_W2R */ 0x06040202 /* MC_EMEM_ARB_DA_TURNS */ 0x000d0709 /* MC_EMEM_ARB_DA_COVERS */ 0x7586120a /* MC_EMEM_ARB_MISC0 */ 0x70000f03 /* MC_EMEM_ARB_MISC1 */ 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */ >; }; timing-528000000 { clock-frequency = <528000000>; nvidia,emem-configuration = < 0x0f000007 /* MC_EMEM_ARB_CFG */ 0x80000040 /* MC_EMEM_ARB_OUTSTANDING_REQ */ 0x00000002 /* MC_EMEM_ARB_TIMING_RCD */ 0x00000003 /* MC_EMEM_ARB_TIMING_RP */ 0x0000000c /* MC_EMEM_ARB_TIMING_RC */ 0x00000007 /* MC_EMEM_ARB_TIMING_RAS */ 0x0000000a /* MC_EMEM_ARB_TIMING_FAW */ 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */ 0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */ 0x00000009 /* MC_EMEM_ARB_TIMING_WAP2PRE */ 0x00000002 /* MC_EMEM_ARB_TIMING_R2R */ 0x00000002 /* MC_EMEM_ARB_TIMING_W2W */ 0x00000005 /* MC_EMEM_ARB_TIMING_R2W */ 0x00000006 /* MC_EMEM_ARB_TIMING_W2R */ 0x06050202 /* MC_EMEM_ARB_DA_TURNS */ 0x0010090c /* MC_EMEM_ARB_DA_COVERS */ 0x7488180d /* MC_EMEM_ARB_MISC0 */ 0x70000f03 /* MC_EMEM_ARB_MISC1 */ 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */ >; }; timing-600000000 { clock-frequency = <600000000>; nvidia,emem-configuration = < 0x00000009 /* MC_EMEM_ARB_CFG */ 0x80000040 /* MC_EMEM_ARB_OUTSTANDING_REQ */ 0x00000003 /* MC_EMEM_ARB_TIMING_RCD */ 0x00000004 /* MC_EMEM_ARB_TIMING_RP */ 0x0000000e /* MC_EMEM_ARB_TIMING_RC */ 0x00000009 /* MC_EMEM_ARB_TIMING_RAS */ 0x0000000b /* MC_EMEM_ARB_TIMING_FAW */ 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */ 0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */ 0x0000000b /* MC_EMEM_ARB_TIMING_WAP2PRE */ 0x00000002 /* MC_EMEM_ARB_TIMING_R2R */ 0x00000002 /* MC_EMEM_ARB_TIMING_W2W */ 0x00000005 /* MC_EMEM_ARB_TIMING_R2W */ 0x00000007 /* MC_EMEM_ARB_TIMING_W2R */ 0x07050202 /* MC_EMEM_ARB_DA_TURNS */ 0x00130b0e /* MC_EMEM_ARB_DA_COVERS */ 0x74691b0f /* MC_EMEM_ARB_MISC0 */ 0x70000f03 /* MC_EMEM_ARB_MISC1 */ 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */ >; }; timing-792000000 { clock-frequency = <792000000>; nvidia,emem-configuration = < 0x0e00000b /* MC_EMEM_ARB_CFG */ 0x80000040 /* MC_EMEM_ARB_OUTSTANDING_REQ */ 0x00000004 /* MC_EMEM_ARB_TIMING_RCD */ 0x00000005 /* MC_EMEM_ARB_TIMING_RP */ 0x00000013 /* MC_EMEM_ARB_TIMING_RC */ 0x0000000c /* MC_EMEM_ARB_TIMING_RAS */ 0x0000000f /* MC_EMEM_ARB_TIMING_FAW */ 0x00000002 /* MC_EMEM_ARB_TIMING_RRD */ 0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */ 0x0000000c /* MC_EMEM_ARB_TIMING_WAP2PRE */ 0x00000002 /* MC_EMEM_ARB_TIMING_R2R */ 0x00000002 /* MC_EMEM_ARB_TIMING_W2W */ 0x00000006 /* MC_EMEM_ARB_TIMING_R2W */ 0x00000008 /* MC_EMEM_ARB_TIMING_W2R */ 0x08060202 /* MC_EMEM_ARB_DA_TURNS */ 0x00170e13 /* MC_EMEM_ARB_DA_COVERS */ 0x746c2414 /* MC_EMEM_ARB_MISC0 */ 0x70000f02 /* MC_EMEM_ARB_MISC1 */ 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */ >; }; }; emc-timings-6 { nvidia,ram-code = <6>; timing-12750000 { clock-frequency = <12750000>; nvidia,emem-configuration = < 0x40040001 /* MC_EMEM_ARB_CFG */ 0x8000000a /* MC_EMEM_ARB_OUTSTANDING_REQ */ 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */ 0x00000001 /* MC_EMEM_ARB_TIMING_RP */ 0x00000002 /* MC_EMEM_ARB_TIMING_RC */ 0x00000000 /* MC_EMEM_ARB_TIMING_RAS */ 0x00000002 /* MC_EMEM_ARB_TIMING_FAW */ 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */ 0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */ 0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */ 0x00000003 /* MC_EMEM_ARB_TIMING_R2R */ 0x00000002 /* MC_EMEM_ARB_TIMING_W2W */ 0x00000003 /* MC_EMEM_ARB_TIMING_R2W */ 0x00000006 /* MC_EMEM_ARB_TIMING_W2R */ 0x06030203 /* MC_EMEM_ARB_DA_TURNS */ 0x000a0402 /* MC_EMEM_ARB_DA_COVERS */ 0x77e30303 /* MC_EMEM_ARB_MISC0 */ 0x70000f03 /* MC_EMEM_ARB_MISC1 */ 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */ >; }; timing-20400000 { clock-frequency = <20400000>; nvidia,emem-configuration = < 0x40020001 /* MC_EMEM_ARB_CFG */ 0x80000012 /* MC_EMEM_ARB_OUTSTANDING_REQ */ 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */ 0x00000001 /* MC_EMEM_ARB_TIMING_RP */ 0x00000002 /* MC_EMEM_ARB_TIMING_RC */ 0x00000000 /* MC_EMEM_ARB_TIMING_RAS */ 0x00000002 /* MC_EMEM_ARB_TIMING_FAW */ 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */ 0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */ 0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */ 0x00000003 /* MC_EMEM_ARB_TIMING_R2R */ 0x00000002 /* MC_EMEM_ARB_TIMING_W2W */ 0x00000003 /* MC_EMEM_ARB_TIMING_R2W */ 0x00000006 /* MC_EMEM_ARB_TIMING_W2R */ 0x06030203 /* MC_EMEM_ARB_DA_TURNS */ 0x000a0402 /* MC_EMEM_ARB_DA_COVERS */ 0x76230303 /* MC_EMEM_ARB_MISC0 */ 0x70000f03 /* MC_EMEM_ARB_MISC1 */ 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */ >; }; timing-40800000 { clock-frequency = <40800000>; nvidia,emem-configuration = < 0xa0000001 /* MC_EMEM_ARB_CFG */ 0x80000017 /* MC_EMEM_ARB_OUTSTANDING_REQ */ 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */ 0x00000001 /* MC_EMEM_ARB_TIMING_RP */ 0x00000002 /* MC_EMEM_ARB_TIMING_RC */ 0x00000000 /* MC_EMEM_ARB_TIMING_RAS */ 0x00000002 /* MC_EMEM_ARB_TIMING_FAW */ 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */ 0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */ 0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */ 0x00000003 /* MC_EMEM_ARB_TIMING_R2R */ 0x00000002 /* MC_EMEM_ARB_TIMING_W2W */ 0x00000003 /* MC_EMEM_ARB_TIMING_R2W */ 0x00000006 /* MC_EMEM_ARB_TIMING_W2R */ 0x06030203 /* MC_EMEM_ARB_DA_TURNS */ 0x000a0402 /* MC_EMEM_ARB_DA_COVERS */ 0x74a30303 /* MC_EMEM_ARB_MISC0 */ 0x70000f03 /* MC_EMEM_ARB_MISC1 */ 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */ >; }; timing-68000000 { clock-frequency = <68000000>; nvidia,emem-configuration = < 0x00000001 /* MC_EMEM_ARB_CFG */ 0x8000001e /* MC_EMEM_ARB_OUTSTANDING_REQ */ 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */ 0x00000001 /* MC_EMEM_ARB_TIMING_RP */ 0x00000002 /* MC_EMEM_ARB_TIMING_RC */ 0x00000000 /* MC_EMEM_ARB_TIMING_RAS */ 0x00000002 /* MC_EMEM_ARB_TIMING_FAW */ 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */ 0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */ 0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */ 0x00000003 /* MC_EMEM_ARB_TIMING_R2R */ 0x00000002 /* MC_EMEM_ARB_TIMING_W2W */ 0x00000003 /* MC_EMEM_ARB_TIMING_R2W */ 0x00000006 /* MC_EMEM_ARB_TIMING_W2R */ 0x06030203 /* MC_EMEM_ARB_DA_TURNS */ 0x000a0402 /* MC_EMEM_ARB_DA_COVERS */ 0x74230403 /* MC_EMEM_ARB_MISC0 */ 0x70000f03 /* MC_EMEM_ARB_MISC1 */ 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */ >; }; timing-102000000 { clock-frequency = <102000000>; nvidia,emem-configuration = < 0x08000001 /* MC_EMEM_ARB_CFG */ 0x80000026 /* MC_EMEM_ARB_OUTSTANDING_REQ */ 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */ 0x00000001 /* MC_EMEM_ARB_TIMING_RP */ 0x00000003 /* MC_EMEM_ARB_TIMING_RC */ 0x00000000 /* MC_EMEM_ARB_TIMING_RAS */ 0x00000002 /* MC_EMEM_ARB_TIMING_FAW */ 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */ 0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */ 0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */ 0x00000003 /* MC_EMEM_ARB_TIMING_R2R */ 0x00000002 /* MC_EMEM_ARB_TIMING_W2W */ 0x00000003 /* MC_EMEM_ARB_TIMING_R2W */ 0x00000006 /* MC_EMEM_ARB_TIMING_W2R */ 0x06030203 /* MC_EMEM_ARB_DA_TURNS */ 0x000a0403 /* MC_EMEM_ARB_DA_COVERS */ 0x73c30504 /* MC_EMEM_ARB_MISC0 */ 0x70000f03 /* MC_EMEM_ARB_MISC1 */ 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */ >; }; timing-204000000 { clock-frequency = <204000000>; nvidia,emem-configuration = < 0x01000003 /* MC_EMEM_ARB_CFG */ 0x80000040 /* MC_EMEM_ARB_OUTSTANDING_REQ */ 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */ 0x00000001 /* MC_EMEM_ARB_TIMING_RP */ 0x00000005 /* MC_EMEM_ARB_TIMING_RC */ 0x00000002 /* MC_EMEM_ARB_TIMING_RAS */ 0x00000004 /* MC_EMEM_ARB_TIMING_FAW */ 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */ 0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */ 0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */ 0x00000003 /* MC_EMEM_ARB_TIMING_R2R */ 0x00000002 /* MC_EMEM_ARB_TIMING_W2W */ 0x00000004 /* MC_EMEM_ARB_TIMING_R2W */ 0x00000006 /* MC_EMEM_ARB_TIMING_W2R */ 0x06040203 /* MC_EMEM_ARB_DA_TURNS */ 0x000a0405 /* MC_EMEM_ARB_DA_COVERS */ 0x73840a06 /* MC_EMEM_ARB_MISC0 */ 0x70000f03 /* MC_EMEM_ARB_MISC1 */ 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */ >; }; timing-300000000 { clock-frequency = <300000000>; nvidia,emem-configuration = < 0x08000004 /* MC_EMEM_ARB_CFG */ 0x80000040 /* MC_EMEM_ARB_OUTSTANDING_REQ */ 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */ 0x00000002 /* MC_EMEM_ARB_TIMING_RP */ 0x00000007 /* MC_EMEM_ARB_TIMING_RC */ 0x00000004 /* MC_EMEM_ARB_TIMING_RAS */ 0x00000005 /* MC_EMEM_ARB_TIMING_FAW */ 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */ 0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */ 0x00000007 /* MC_EMEM_ARB_TIMING_WAP2PRE */ 0x00000002 /* MC_EMEM_ARB_TIMING_R2R */ 0x00000002 /* MC_EMEM_ARB_TIMING_W2W */ 0x00000004 /* MC_EMEM_ARB_TIMING_R2W */ 0x00000006 /* MC_EMEM_ARB_TIMING_W2R */ 0x06040202 /* MC_EMEM_ARB_DA_TURNS */ 0x000b0607 /* MC_EMEM_ARB_DA_COVERS */ 0x77450e08 /* MC_EMEM_ARB_MISC0 */ 0x70000f03 /* MC_EMEM_ARB_MISC1 */ 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */ >; }; timing-396000000 { clock-frequency = <396000000>; nvidia,emem-configuration = < 0x0f000005 /* MC_EMEM_ARB_CFG */ 0x80000040 /* MC_EMEM_ARB_OUTSTANDING_REQ */ 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */ 0x00000002 /* MC_EMEM_ARB_TIMING_RP */ 0x00000009 /* MC_EMEM_ARB_TIMING_RC */ 0x00000005 /* MC_EMEM_ARB_TIMING_RAS */ 0x00000007 /* MC_EMEM_ARB_TIMING_FAW */ 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */ 0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */ 0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */ 0x00000002 /* MC_EMEM_ARB_TIMING_R2R */ 0x00000002 /* MC_EMEM_ARB_TIMING_W2W */ 0x00000004 /* MC_EMEM_ARB_TIMING_R2W */ 0x00000006 /* MC_EMEM_ARB_TIMING_W2R */ 0x06040202 /* MC_EMEM_ARB_DA_TURNS */ 0x000d0709 /* MC_EMEM_ARB_DA_COVERS */ 0x7586120a /* MC_EMEM_ARB_MISC0 */ 0x70000f03 /* MC_EMEM_ARB_MISC1 */ 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */ >; }; timing-528000000 { clock-frequency = <528000000>; nvidia,emem-configuration = < 0x0f000007 /* MC_EMEM_ARB_CFG */ 0x80000040 /* MC_EMEM_ARB_OUTSTANDING_REQ */ 0x00000002 /* MC_EMEM_ARB_TIMING_RCD */ 0x00000003 /* MC_EMEM_ARB_TIMING_RP */ 0x0000000d /* MC_EMEM_ARB_TIMING_RC */ 0x00000008 /* MC_EMEM_ARB_TIMING_RAS */ 0x0000000a /* MC_EMEM_ARB_TIMING_FAW */ 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */ 0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */ 0x00000009 /* MC_EMEM_ARB_TIMING_WAP2PRE */ 0x00000002 /* MC_EMEM_ARB_TIMING_R2R */ 0x00000002 /* MC_EMEM_ARB_TIMING_W2W */ 0x00000005 /* MC_EMEM_ARB_TIMING_R2W */ 0x00000006 /* MC_EMEM_ARB_TIMING_W2R */ 0x06050202 /* MC_EMEM_ARB_DA_TURNS */ 0x0010090d /* MC_EMEM_ARB_DA_COVERS */ 0x7428180e /* MC_EMEM_ARB_MISC0 */ 0x70000f03 /* MC_EMEM_ARB_MISC1 */ 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */ >; }; timing-600000000 { clock-frequency = <600000000>; nvidia,emem-configuration = < 0x00000009 /* MC_EMEM_ARB_CFG */ 0x80000040 /* MC_EMEM_ARB_OUTSTANDING_REQ */ 0x00000003 /* MC_EMEM_ARB_TIMING_RCD */ 0x00000004 /* MC_EMEM_ARB_TIMING_RP */ 0x0000000e /* MC_EMEM_ARB_TIMING_RC */ 0x00000009 /* MC_EMEM_ARB_TIMING_RAS */ 0x0000000b /* MC_EMEM_ARB_TIMING_FAW */ 0x00000002 /* MC_EMEM_ARB_TIMING_RRD */ 0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */ 0x0000000b /* MC_EMEM_ARB_TIMING_WAP2PRE */ 0x00000002 /* MC_EMEM_ARB_TIMING_R2R */ 0x00000002 /* MC_EMEM_ARB_TIMING_W2W */ 0x00000005 /* MC_EMEM_ARB_TIMING_R2W */ 0x00000007 /* MC_EMEM_ARB_TIMING_W2R */ 0x07050202 /* MC_EMEM_ARB_DA_TURNS */ 0x00130b0e /* MC_EMEM_ARB_DA_COVERS */ 0x73a91b0f /* MC_EMEM_ARB_MISC0 */ 0x70000f03 /* MC_EMEM_ARB_MISC1 */ 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */ >; }; timing-792000000 { clock-frequency = <792000000>; nvidia,emem-configuration = < 0x0e00000b /* MC_EMEM_ARB_CFG */ 0x80000040 /* MC_EMEM_ARB_OUTSTANDING_REQ */ 0x00000004 /* MC_EMEM_ARB_TIMING_RCD */ 0x00000005 /* MC_EMEM_ARB_TIMING_RP */ 0x00000013 /* MC_EMEM_ARB_TIMING_RC */ 0x0000000c /* MC_EMEM_ARB_TIMING_RAS */ 0x0000000f /* MC_EMEM_ARB_TIMING_FAW */ 0x00000002 /* MC_EMEM_ARB_TIMING_RRD */ 0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */ 0x0000000c /* MC_EMEM_ARB_TIMING_WAP2PRE */ 0x00000002 /* MC_EMEM_ARB_TIMING_R2R */ 0x00000002 /* MC_EMEM_ARB_TIMING_W2W */ 0x00000006 /* MC_EMEM_ARB_TIMING_R2W */ 0x00000008 /* MC_EMEM_ARB_TIMING_W2R */ 0x08060202 /* MC_EMEM_ARB_DA_TURNS */ 0x00160d13 /* MC_EMEM_ARB_DA_COVERS */ 0x734c2414 /* MC_EMEM_ARB_MISC0 */ 0x70000f02 /* MC_EMEM_ARB_MISC1 */ 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */ >; }; }; }; external-memory-controller@7001b000 { emc-timings-1 { nvidia,ram-code = <1>; timing-12750000 { clock-frequency = <12750000>; nvidia,emc-auto-cal-config = <0xa1430000>; nvidia,emc-auto-cal-config2 = <0x00000000>; nvidia,emc-auto-cal-config3 = <0x00000000>; nvidia,emc-auto-cal-interval = <0x001fffff>; nvidia,emc-bgbias-ctl0 = <0x00000008>; nvidia,emc-cfg = <0x73240000>; nvidia,emc-cfg-2 = <0x000008c5>; nvidia,emc-ctt-term-ctrl = <0x00000802>; nvidia,emc-mode-1 = <0x80100003>; nvidia,emc-mode-2 = <0x80200008>; nvidia,emc-mode-4 = <0x00000000>; nvidia,emc-mode-reset = <0x80001221>; nvidia,emc-mrs-wait-cnt = <0x000c000c>; nvidia,emc-sel-dpd-ctrl = <0x00040128>; nvidia,emc-xm2dqspadctrl2 = <0x0130b118>; nvidia,emc-zcal-cnt-long = <0x00000042>; nvidia,emc-zcal-interval = <0x00000000>; nvidia,emc-configuration = < 0x00000000 /* EMC_RC */ 0x00000003 /* EMC_RFC */ 0x00000000 /* EMC_RFC_SLR */ 0x00000000 /* EMC_RAS */ 0x00000000 /* EMC_RP */ 0x00000004 /* EMC_R2W */ 0x0000000a /* EMC_W2R */ 0x00000003 /* EMC_R2P */ 0x0000000b /* EMC_W2P */ 0x00000000 /* EMC_RD_RCD */ 0x00000000 /* EMC_WR_RCD */ 0x00000003 /* EMC_RRD */ 0x00000003 /* EMC_REXT */ 0x00000000 /* EMC_WEXT */ 0x00000006 /* EMC_WDV */ 0x00000006 /* EMC_WDV_MASK */ 0x00000006 /* EMC_QUSE */ 0x00000002 /* EMC_QUSE_WIDTH */ 0x00000000 /* EMC_IBDLY */ 0x00000005 /* EMC_EINPUT */ 0x00000005 /* EMC_EINPUT_DURATION */ 0x00010000 /* EMC_PUTERM_EXTRA */ 0x00000003 /* EMC_PUTERM_WIDTH */ 0x00000000 /* EMC_PUTERM_ADJ */ 0x00000000 /* EMC_CDB_CNTL_1 */ 0x00000000 /* EMC_CDB_CNTL_2 */ 0x00000000 /* EMC_CDB_CNTL_3 */ 0x00000004 /* EMC_QRST */ 0x0000000c /* EMC_QSAFE */ 0x0000000d /* EMC_RDV */ 0x0000000f /* EMC_RDV_MASK */ 0x00000060 /* EMC_REFRESH */ 0x00000000 /* EMC_BURST_REFRESH_NUM */ 0x00000018 /* EMC_PRE_REFRESH_REQ_CNT */ 0x00000002 /* EMC_PDEX2WR */ 0x00000002 /* EMC_PDEX2RD */ 0x00000001 /* EMC_PCHG2PDEN */ 0x00000000 /* EMC_ACT2PDEN */ 0x00000007 /* EMC_AR2PDEN */ 0x0000000f /* EMC_RW2PDEN */ 0x00000005 /* EMC_TXSR */ 0x00000005 /* EMC_TXSRDLL */ 0x00000004 /* EMC_TCKE */ 0x00000005 /* EMC_TCKESR */ 0x00000004 /* EMC_TPD */ 0x00000000 /* EMC_TFAW */ 0x00000000 /* EMC_TRPAB */ 0x00000005 /* EMC_TCLKSTABLE */ 0x00000005 /* EMC_TCLKSTOP */ 0x00000064 /* EMC_TREFBW */ 0x00000000 /* EMC_FBIO_CFG6 */ 0x00000000 /* EMC_ODT_WRITE */ 0x00000000 /* EMC_ODT_READ */ 0x106aa298 /* EMC_FBIO_CFG5 */ 0x002c00a0 /* EMC_CFG_DIG_DLL */ 0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */ 0x00064000 /* EMC_DLL_XFORM_DQS0 */ 0x00064000 /* EMC_DLL_XFORM_DQS1 */ 0x00064000 /* EMC_DLL_XFORM_DQS2 */ 0x00064000 /* EMC_DLL_XFORM_DQS3 */ 0x00064000 /* EMC_DLL_XFORM_DQS4 */ 0x00064000 /* EMC_DLL_XFORM_DQS5 */ 0x00064000 /* EMC_DLL_XFORM_DQS6 */ 0x00064000 /* EMC_DLL_XFORM_DQS7 */ 0x00064000 /* EMC_DLL_XFORM_DQS8 */ 0x00064000 /* EMC_DLL_XFORM_DQS9 */ 0x00064000 /* EMC_DLL_XFORM_DQS10 */ 0x00064000 /* EMC_DLL_XFORM_DQS11 */ 0x00064000 /* EMC_DLL_XFORM_DQS12 */ 0x00064000 /* EMC_DLL_XFORM_DQS13 */ 0x00064000 /* EMC_DLL_XFORM_DQS14 */ 0x00064000 /* EMC_DLL_XFORM_DQS15 */ 0x00000000 /* EMC_DLL_XFORM_QUSE0 */ 0x00000000 /* EMC_DLL_XFORM_QUSE1 */ 0x00000000 /* EMC_DLL_XFORM_QUSE2 */ 0x00000000 /* EMC_DLL_XFORM_QUSE3 */ 0x00000000 /* EMC_DLL_XFORM_QUSE4 */ 0x00000000 /* EMC_DLL_XFORM_QUSE5 */ 0x00000000 /* EMC_DLL_XFORM_QUSE6 */ 0x00000000 /* EMC_DLL_XFORM_QUSE7 */ 0x00000000 /* EMC_DLL_XFORM_ADDR0 */ 0x00000000 /* EMC_DLL_XFORM_ADDR1 */ 0x00004000 /* EMC_DLL_XFORM_ADDR2 */ 0x00000000 /* EMC_DLL_XFORM_ADDR3 */ 0x00000000 /* EMC_DLL_XFORM_ADDR4 */ 0x00004000 /* EMC_DLL_XFORM_ADDR5 */ 0x00000000 /* EMC_DLL_XFORM_QUSE8 */ 0x00000000 /* EMC_DLL_XFORM_QUSE9 */ 0x00000000 /* EMC_DLL_XFORM_QUSE10 */ 0x00000000 /* EMC_DLL_XFORM_QUSE11 */ 0x00000000 /* EMC_DLL_XFORM_QUSE12 */ 0x00000000 /* EMC_DLL_XFORM_QUSE13 */ 0x00000000 /* EMC_DLL_XFORM_QUSE14 */ 0x00000000 /* EMC_DLL_XFORM_QUSE15 */ 0x00000000 /* EMC_DLI_TRIM_TXDQS0 */ 0x00000000 /* EMC_DLI_TRIM_TXDQS1 */ 0x00000000 /* EMC_DLI_TRIM_TXDQS2 */ 0x00000000 /* EMC_DLI_TRIM_TXDQS3 */ 0x00000000 /* EMC_DLI_TRIM_TXDQS4 */ 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */ 0x00000000 /* EMC_DLI_TRIM_TXDQS6 */ 0x00000000 /* EMC_DLI_TRIM_TXDQS7 */ 0x00000000 /* EMC_DLI_TRIM_TXDQS8 */ 0x00000000 /* EMC_DLI_TRIM_TXDQS9 */ 0x00000000 /* EMC_DLI_TRIM_TXDQS10 */ 0x00000000 /* EMC_DLI_TRIM_TXDQS11 */ 0x00000000 /* EMC_DLI_TRIM_TXDQS12 */ 0x00000000 /* EMC_DLI_TRIM_TXDQS13 */ 0x00000000 /* EMC_DLI_TRIM_TXDQS14 */ 0x00000000 /* EMC_DLI_TRIM_TXDQS15 */ 0x000fc000 /* EMC_DLL_XFORM_DQ0 */ 0x000fc000 /* EMC_DLL_XFORM_DQ1 */ 0x000fc000 /* EMC_DLL_XFORM_DQ2 */ 0x000fc000 /* EMC_DLL_XFORM_DQ3 */ 0x0000fc00 /* EMC_DLL_XFORM_DQ4 */ 0x0000fc00 /* EMC_DLL_XFORM_DQ5 */ 0x0000fc00 /* EMC_DLL_XFORM_DQ6 */ 0x0000fc00 /* EMC_DLL_XFORM_DQ7 */ 0x10000280 /* EMC_XM2CMDPADCTRL */ 0x00000000 /* EMC_XM2CMDPADCTRL4 */ 0x00111111 /* EMC_XM2CMDPADCTRL5 */ 0x00000000 /* EMC_XM2DQPADCTRL2 */ 0x00000000 /* EMC_XM2DQPADCTRL3 */ 0x77ffc081 /* EMC_XM2CLKPADCTRL */ 0x00000303 /* EMC_XM2CLKPADCTRL2 */ 0x81f1f108 /* EMC_XM2COMPPADCTRL */ 0x07070004 /* EMC_XM2VTTGENPADCTRL */ 0x0000003f /* EMC_XM2VTTGENPADCTRL2 */ 0x016eeeee /* EMC_XM2VTTGENPADCTRL3 */ 0x51451400 /* EMC_XM2DQSPADCTRL3 */ 0x00514514 /* EMC_XM2DQSPADCTRL4 */ 0x00514514 /* EMC_XM2DQSPADCTRL5 */ 0x51451400 /* EMC_XM2DQSPADCTRL6 */ 0x0000003f /* EMC_DSR_VTTGEN_DRV */ 0x00000007 /* EMC_TXDSRVTTGEN */ 0x00000000 /* EMC_FBIO_SPARE */ 0x00000042 /* EMC_ZCAL_WAIT_CNT */ 0x000c000c /* EMC_MRS_WAIT_CNT2 */ 0x00000000 /* EMC_CTT */ 0x00000003 /* EMC_CTT_DURATION */ 0x0000f2f3 /* EMC_CFG_PIPE */ 0x800001c5 /* EMC_DYN_SELF_REF_CONTROL */ 0x0000000a /* EMC_QPOP */ >; }; timing-20400000 { clock-frequency = <20400000>; nvidia,emc-auto-cal-config = <0xa1430000>; nvidia,emc-auto-cal-config2 = <0x00000000>; nvidia,emc-auto-cal-config3 = <0x00000000>; nvidia,emc-auto-cal-interval = <0x001fffff>; nvidia,emc-bgbias-ctl0 = <0x00000008>; nvidia,emc-cfg = <0x73240000>; nvidia,emc-cfg-2 = <0x000008c5>; nvidia,emc-ctt-term-ctrl = <0x00000802>; nvidia,emc-mode-1 = <0x80100003>; nvidia,emc-mode-2 = <0x80200008>; nvidia,emc-mode-4 = <0x00000000>; nvidia,emc-mode-reset = <0x80001221>; nvidia,emc-mrs-wait-cnt = <0x000c000c>; nvidia,emc-sel-dpd-ctrl = <0x00040128>; nvidia,emc-xm2dqspadctrl2 = <0x0130b118>; nvidia,emc-zcal-cnt-long = <0x00000042>; nvidia,emc-zcal-interval = <0x00000000>; nvidia,emc-configuration = < 0x00000000 /* EMC_RC */ 0x00000005 /* EMC_RFC */ 0x00000000 /* EMC_RFC_SLR */ 0x00000000 /* EMC_RAS */ 0x00000000 /* EMC_RP */ 0x00000004 /* EMC_R2W */ 0x0000000a /* EMC_W2R */ 0x00000003 /* EMC_R2P */ 0x0000000b /* EMC_W2P */ 0x00000000 /* EMC_RD_RCD */ 0x00000000 /* EMC_WR_RCD */ 0x00000003 /* EMC_RRD */ 0x00000003 /* EMC_REXT */ 0x00000000 /* EMC_WEXT */ 0x00000006 /* EMC_WDV */ 0x00000006 /* EMC_WDV_MASK */ 0x00000006 /* EMC_QUSE */ 0x00000002 /* EMC_QUSE_WIDTH */ 0x00000000 /* EMC_IBDLY */ 0x00000005 /* EMC_EINPUT */ 0x00000005 /* EMC_EINPUT_DURATION */ 0x00010000 /* EMC_PUTERM_EXTRA */ 0x00000003 /* EMC_PUTERM_WIDTH */ 0x00000000 /* EMC_PUTERM_ADJ */ 0x00000000 /* EMC_CDB_CNTL_1 */ 0x00000000 /* EMC_CDB_CNTL_2 */ 0x00000000 /* EMC_CDB_CNTL_3 */ 0x00000004 /* EMC_QRST */ 0x0000000c /* EMC_QSAFE */ 0x0000000d /* EMC_RDV */ 0x0000000f /* EMC_RDV_MASK */ 0x0000009a /* EMC_REFRESH */ 0x00000000 /* EMC_BURST_REFRESH_NUM */ 0x00000026 /* EMC_PRE_REFRESH_REQ_CNT */ 0x00000002 /* EMC_PDEX2WR */ 0x00000002 /* EMC_PDEX2RD */ 0x00000001 /* EMC_PCHG2PDEN */ 0x00000000 /* EMC_ACT2PDEN */ 0x00000007 /* EMC_AR2PDEN */ 0x0000000f /* EMC_RW2PDEN */ 0x00000006 /* EMC_TXSR */ 0x00000006 /* EMC_TXSRDLL */ 0x00000004 /* EMC_TCKE */ 0x00000005 /* EMC_TCKESR */ 0x00000004 /* EMC_TPD */ 0x00000000 /* EMC_TFAW */ 0x00000000 /* EMC_TRPAB */ 0x00000005 /* EMC_TCLKSTABLE */ 0x00000005 /* EMC_TCLKSTOP */ 0x000000a0 /* EMC_TREFBW */ 0x00000000 /* EMC_FBIO_CFG6 */ 0x00000000 /* EMC_ODT_WRITE */ 0x00000000 /* EMC_ODT_READ */ 0x106aa298 /* EMC_FBIO_CFG5 */ 0x002c00a0 /* EMC_CFG_DIG_DLL */ 0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */ 0x00064000 /* EMC_DLL_XFORM_DQS0 */ 0x00064000 /* EMC_DLL_XFORM_DQS1 */ 0x00064000 /* EMC_DLL_XFORM_DQS2 */ 0x00064000 /* EMC_DLL_XFORM_DQS3 */ 0x00064000 /* EMC_DLL_XFORM_DQS4 */ 0x00064000 /* EMC_DLL_XFORM_DQS5 */ 0x00064000 /* EMC_DLL_XFORM_DQS6 */ 0x00064000 /* EMC_DLL_XFORM_DQS7 */ 0x00064000 /* EMC_DLL_XFORM_DQS8 */ 0x00064000 /* EMC_DLL_XFORM_DQS9 */ 0x00064000 /* EMC_DLL_XFORM_DQS10 */ 0x00064000 /* EMC_DLL_XFORM_DQS11 */ 0x00064000 /* EMC_DLL_XFORM_DQS12 */ 0x00064000 /* EMC_DLL_XFORM_DQS13 */ 0x00064000 /* EMC_DLL_XFORM_DQS14 */ 0x00064000 /* EMC_DLL_XFORM_DQS15 */ 0x00000000 /* EMC_DLL_XFORM_QUSE0 */ 0x00000000 /* EMC_DLL_XFORM_QUSE1 */ 0x00000000 /* EMC_DLL_XFORM_QUSE2 */ 0x00000000 /* EMC_DLL_XFORM_QUSE3 */ 0x00000000 /* EMC_DLL_XFORM_QUSE4 */ 0x00000000 /* EMC_DLL_XFORM_QUSE5 */ 0x00000000 /* EMC_DLL_XFORM_QUSE6 */ 0x00000000 /* EMC_DLL_XFORM_QUSE7 */ 0x00000000 /* EMC_DLL_XFORM_ADDR0 */ 0x00000000 /* EMC_DLL_XFORM_ADDR1 */ 0x00004000 /* EMC_DLL_XFORM_ADDR2 */ 0x00000000 /* EMC_DLL_XFORM_ADDR3 */ 0x00000000 /* EMC_DLL_XFORM_ADDR4 */ 0x00004000 /* EMC_DLL_XFORM_ADDR5 */ 0x00000000 /* EMC_DLL_XFORM_QUSE8 */ 0x00000000 /* EMC_DLL_XFORM_QUSE9 */ 0x00000000 /* EMC_DLL_XFORM_QUSE10 */ 0x00000000 /* EMC_DLL_XFORM_QUSE11 */ 0x00000000 /* EMC_DLL_XFORM_QUSE12 */ 0x00000000 /* EMC_DLL_XFORM_QUSE13 */ 0x00000000 /* EMC_DLL_XFORM_QUSE14 */ 0x00000000 /* EMC_DLL_XFORM_QUSE15 */ 0x00000000 /* EMC_DLI_TRIM_TXDQS0 */ 0x00000000 /* EMC_DLI_TRIM_TXDQS1 */ 0x00000000 /* EMC_DLI_TRIM_TXDQS2 */ 0x00000000 /* EMC_DLI_TRIM_TXDQS3 */ 0x00000000 /* EMC_DLI_TRIM_TXDQS4 */ 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */ 0x00000000 /* EMC_DLI_TRIM_TXDQS6 */ 0x00000000 /* EMC_DLI_TRIM_TXDQS7 */ 0x00000000 /* EMC_DLI_TRIM_TXDQS8 */ 0x00000000 /* EMC_DLI_TRIM_TXDQS9 */ 0x00000000 /* EMC_DLI_TRIM_TXDQS10 */ 0x00000000 /* EMC_DLI_TRIM_TXDQS11 */ 0x00000000 /* EMC_DLI_TRIM_TXDQS12 */ 0x00000000 /* EMC_DLI_TRIM_TXDQS13 */ 0x00000000 /* EMC_DLI_TRIM_TXDQS14 */ 0x00000000 /* EMC_DLI_TRIM_TXDQS15 */ 0x000fc000 /* EMC_DLL_XFORM_DQ0 */ 0x000fc000 /* EMC_DLL_XFORM_DQ1 */ 0x000fc000 /* EMC_DLL_XFORM_DQ2 */ 0x000fc000 /* EMC_DLL_XFORM_DQ3 */ 0x0000fc00 /* EMC_DLL_XFORM_DQ4 */ 0x0000fc00 /* EMC_DLL_XFORM_DQ5 */ 0x0000fc00 /* EMC_DLL_XFORM_DQ6 */ 0x0000fc00 /* EMC_DLL_XFORM_DQ7 */ 0x10000280 /* EMC_XM2CMDPADCTRL */ 0x00000000 /* EMC_XM2CMDPADCTRL4 */ 0x00111111 /* EMC_XM2CMDPADCTRL5 */ 0x00000000 /* EMC_XM2DQPADCTRL2 */ 0x00000000 /* EMC_XM2DQPADCTRL3 */ 0x77ffc081 /* EMC_XM2CLKPADCTRL */ 0x00000303 /* EMC_XM2CLKPADCTRL2 */ 0x81f1f108 /* EMC_XM2COMPPADCTRL */ 0x07070004 /* EMC_XM2VTTGENPADCTRL */ 0x0000003f /* EMC_XM2VTTGENPADCTRL2 */ 0x016eeeee /* EMC_XM2VTTGENPADCTRL3 */ 0x51451400 /* EMC_XM2DQSPADCTRL3 */ 0x00514514 /* EMC_XM2DQSPADCTRL4 */ 0x00514514 /* EMC_XM2DQSPADCTRL5 */ 0x51451400 /* EMC_XM2DQSPADCTRL6 */ 0x0000003f /* EMC_DSR_VTTGEN_DRV */ 0x0000000b /* EMC_TXDSRVTTGEN */ 0x00000000 /* EMC_FBIO_SPARE */ 0x00000042 /* EMC_ZCAL_WAIT_CNT */ 0x000c000c /* EMC_MRS_WAIT_CNT2 */ 0x00000000 /* EMC_CTT */ 0x00000003 /* EMC_CTT_DURATION */ 0x0000f2f3 /* EMC_CFG_PIPE */ 0x8000023a /* EMC_DYN_SELF_REF_CONTROL */ 0x0000000a /* EMC_QPOP */ >; }; timing-40800000 { clock-frequency = <40800000>; nvidia,emc-auto-cal-config = <0xa1430000>; nvidia,emc-auto-cal-config2 = <0x00000000>; nvidia,emc-auto-cal-config3 = <0x00000000>; nvidia,emc-auto-cal-interval = <0x001fffff>; nvidia,emc-bgbias-ctl0 = <0x00000008>; nvidia,emc-cfg = <0x73240000>; nvidia,emc-cfg-2 = <0x000008c5>; nvidia,emc-ctt-term-ctrl = <0x00000802>; nvidia,emc-mode-1 = <0x80100003>; nvidia,emc-mode-2 = <0x80200008>; nvidia,emc-mode-4 = <0x00000000>; nvidia,emc-mode-reset = <0x80001221>; nvidia,emc-mrs-wait-cnt = <0x000c000c>; nvidia,emc-sel-dpd-ctrl = <0x00040128>; nvidia,emc-xm2dqspadctrl2 = <0x0130b118>; nvidia,emc-zcal-cnt-long = <0x00000042>; nvidia,emc-zcal-interval = <0x00000000>; nvidia,emc-configuration = < 0x00000001 /* EMC_RC */ 0x0000000a /* EMC_RFC */ 0x00000000 /* EMC_RFC_SLR */ 0x00000001 /* EMC_RAS */ 0x00000000 /* EMC_RP */ 0x00000004 /* EMC_R2W */ 0x0000000a /* EMC_W2R */ 0x00000003 /* EMC_R2P */ 0x0000000b /* EMC_W2P */ 0x00000000 /* EMC_RD_RCD */ 0x00000000 /* EMC_WR_RCD */ 0x00000003 /* EMC_RRD */ 0x00000003 /* EMC_REXT */ 0x00000000 /* EMC_WEXT */ 0x00000006 /* EMC_WDV */ 0x00000006 /* EMC_WDV_MASK */ 0x00000006 /* EMC_QUSE */ 0x00000002 /* EMC_QUSE_WIDTH */ 0x00000000 /* EMC_IBDLY */ 0x00000005 /* EMC_EINPUT */ 0x00000005 /* EMC_EINPUT_DURATION */ 0x00010000 /* EMC_PUTERM_EXTRA */ 0x00000003 /* EMC_PUTERM_WIDTH */ 0x00000000 /* EMC_PUTERM_ADJ */ 0x00000000 /* EMC_CDB_CNTL_1 */ 0x00000000 /* EMC_CDB_CNTL_2 */ 0x00000000 /* EMC_CDB_CNTL_3 */ 0x00000004 /* EMC_QRST */ 0x0000000c /* EMC_QSAFE */ 0x0000000d /* EMC_RDV */ 0x0000000f /* EMC_RDV_MASK */ 0x00000134 /* EMC_REFRESH */ 0x00000000 /* EMC_BURST_REFRESH_NUM */ 0x0000004d /* EMC_PRE_REFRESH_REQ_CNT */ 0x00000002 /* EMC_PDEX2WR */ 0x00000002 /* EMC_PDEX2RD */ 0x00000001 /* EMC_PCHG2PDEN */ 0x00000000 /* EMC_ACT2PDEN */ 0x00000008 /* EMC_AR2PDEN */ 0x0000000f /* EMC_RW2PDEN */ 0x0000000c /* EMC_TXSR */ 0x0000000c /* EMC_TXSRDLL */ 0x00000004 /* EMC_TCKE */ 0x00000005 /* EMC_TCKESR */ 0x00000004 /* EMC_TPD */ 0x00000000 /* EMC_TFAW */ 0x00000000 /* EMC_TRPAB */ 0x00000005 /* EMC_TCLKSTABLE */ 0x00000005 /* EMC_TCLKSTOP */ 0x0000013f /* EMC_TREFBW */ 0x00000000 /* EMC_FBIO_CFG6 */ 0x00000000 /* EMC_ODT_WRITE */ 0x00000000 /* EMC_ODT_READ */ 0x106aa298 /* EMC_FBIO_CFG5 */ 0x002c00a0 /* EMC_CFG_DIG_DLL */ 0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */ 0x00064000 /* EMC_DLL_XFORM_DQS0 */ 0x00064000 /* EMC_DLL_XFORM_DQS1 */ 0x00064000 /* EMC_DLL_XFORM_DQS2 */ 0x00064000 /* EMC_DLL_XFORM_DQS3 */ 0x00064000 /* EMC_DLL_XFORM_DQS4 */ 0x00064000 /* EMC_DLL_XFORM_DQS5 */ 0x00064000 /* EMC_DLL_XFORM_DQS6 */ 0x00064000 /* EMC_DLL_XFORM_DQS7 */ 0x00064000 /* EMC_DLL_XFORM_DQS8 */ 0x00064000 /* EMC_DLL_XFORM_DQS9 */ 0x00064000 /* EMC_DLL_XFORM_DQS10 */ 0x00064000 /* EMC_DLL_XFORM_DQS11 */ 0x00064000 /* EMC_DLL_XFORM_DQS12 */ 0x00064000 /* EMC_DLL_XFORM_DQS13 */ 0x00064000 /* EMC_DLL_XFORM_DQS14 */ 0x00064000 /* EMC_DLL_XFORM_DQS15 */ 0x00000000 /* EMC_DLL_XFORM_QUSE0 */ 0x00000000 /* EMC_DLL_XFORM_QUSE1 */ 0x00000000 /* EMC_DLL_XFORM_QUSE2 */ 0x00000000 /* EMC_DLL_XFORM_QUSE3 */ 0x00000000 /* EMC_DLL_XFORM_QUSE4 */ 0x00000000 /* EMC_DLL_XFORM_QUSE5 */ 0x00000000 /* EMC_DLL_XFORM_QUSE6 */ 0x00000000 /* EMC_DLL_XFORM_QUSE7 */ 0x00000000 /* EMC_DLL_XFORM_ADDR0 */ 0x00000000 /* EMC_DLL_XFORM_ADDR1 */ 0x00004000 /* EMC_DLL_XFORM_ADDR2 */ 0x00000000 /* EMC_DLL_XFORM_ADDR3 */ 0x00000000 /* EMC_DLL_XFORM_ADDR4 */ 0x00004000 /* EMC_DLL_XFORM_ADDR5 */ 0x00000000 /* EMC_DLL_XFORM_QUSE8 */ 0x00000000 /* EMC_DLL_XFORM_QUSE9 */ 0x00000000 /* EMC_DLL_XFORM_QUSE10 */ 0x00000000 /* EMC_DLL_XFORM_QUSE11 */ 0x00000000 /* EMC_DLL_XFORM_QUSE12 */ 0x00000000 /* EMC_DLL_XFORM_QUSE13 */ 0x00000000 /* EMC_DLL_XFORM_QUSE14 */ 0x00000000 /* EMC_DLL_XFORM_QUSE15 */ 0x00000000 /* EMC_DLI_TRIM_TXDQS0 */ 0x00000000 /* EMC_DLI_TRIM_TXDQS1 */ 0x00000000 /* EMC_DLI_TRIM_TXDQS2 */ 0x00000000 /* EMC_DLI_TRIM_TXDQS3 */ 0x00000000 /* EMC_DLI_TRIM_TXDQS4 */ 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */ 0x00000000 /* EMC_DLI_TRIM_TXDQS6 */ 0x00000000 /* EMC_DLI_TRIM_TXDQS7 */ 0x00000000 /* EMC_DLI_TRIM_TXDQS8 */ 0x00000000 /* EMC_DLI_TRIM_TXDQS9 */ 0x00000000 /* EMC_DLI_TRIM_TXDQS10 */ 0x00000000 /* EMC_DLI_TRIM_TXDQS11 */ 0x00000000 /* EMC_DLI_TRIM_TXDQS12 */ 0x00000000 /* EMC_DLI_TRIM_TXDQS13 */ 0x00000000 /* EMC_DLI_TRIM_TXDQS14 */ 0x00000000 /* EMC_DLI_TRIM_TXDQS15 */ 0x000fc000 /* EMC_DLL_XFORM_DQ0 */ 0x000fc000 /* EMC_DLL_XFORM_DQ1 */ 0x000fc000 /* EMC_DLL_XFORM_DQ2 */ 0x000fc000 /* EMC_DLL_XFORM_DQ3 */ 0x0000fc00 /* EMC_DLL_XFORM_DQ4 */ 0x0000fc00 /* EMC_DLL_XFORM_DQ5 */ 0x0000fc00 /* EMC_DLL_XFORM_DQ6 */ 0x0000fc00 /* EMC_DLL_XFORM_DQ7 */ 0x10000280 /* EMC_XM2CMDPADCTRL */ 0x00000000 /* EMC_XM2CMDPADCTRL4 */ 0x00111111 /* EMC_XM2CMDPADCTRL5 */ 0x00000000 /* EMC_XM2DQPADCTRL2 */ 0x00000000 /* EMC_XM2DQPADCTRL3 */ 0x77ffc081 /* EMC_XM2CLKPADCTRL */ 0x00000303 /* EMC_XM2CLKPADCTRL2 */ 0x81f1f108 /* EMC_XM2COMPPADCTRL */ 0x07070004 /* EMC_XM2VTTGENPADCTRL */ 0x0000003f /* EMC_XM2VTTGENPADCTRL2 */ 0x016eeeee /* EMC_XM2VTTGENPADCTRL3 */ 0x51451400 /* EMC_XM2DQSPADCTRL3 */ 0x00514514 /* EMC_XM2DQSPADCTRL4 */ 0x00514514 /* EMC_XM2DQSPADCTRL5 */ 0x51451400 /* EMC_XM2DQSPADCTRL6 */ 0x0000003f /* EMC_DSR_VTTGEN_DRV */ 0x00000015 /* EMC_TXDSRVTTGEN */ 0x00000000 /* EMC_FBIO_SPARE */ 0x00000042 /* EMC_ZCAL_WAIT_CNT */ 0x000c000c /* EMC_MRS_WAIT_CNT2 */ 0x00000000 /* EMC_CTT */ 0x00000003 /* EMC_CTT_DURATION */ 0x0000f2f3 /* EMC_CFG_PIPE */ 0x80000370 /* EMC_DYN_SELF_REF_CONTROL */ 0x0000000a /* EMC_QPOP */ >; }; timing-68000000 { clock-frequency = <68000000>; nvidia,emc-auto-cal-config = <0xa1430000>; nvidia,emc-auto-cal-config2 = <0x00000000>; nvidia,emc-auto-cal-config3 = <0x00000000>; nvidia,emc-auto-cal-interval = <0x001fffff>; nvidia,emc-bgbias-ctl0 = <0x00000008>; nvidia,emc-cfg = <0x73240000>; nvidia,emc-cfg-2 = <0x000008c5>; nvidia,emc-ctt-term-ctrl = <0x00000802>; nvidia,emc-mode-1 = <0x80100003>; nvidia,emc-mode-2 = <0x80200008>; nvidia,emc-mode-4 = <0x00000000>; nvidia,emc-mode-reset = <0x80001221>; nvidia,emc-mrs-wait-cnt = <0x000c000c>; nvidia,emc-sel-dpd-ctrl = <0x00040128>; nvidia,emc-xm2dqspadctrl2 = <0x0130b118>; nvidia,emc-zcal-cnt-long = <0x00000042>; nvidia,emc-zcal-interval = <0x00000000>; nvidia,emc-configuration = < 0x00000003 /* EMC_RC */ 0x00000011 /* EMC_RFC */ 0x00000000 /* EMC_RFC_SLR */ 0x00000002 /* EMC_RAS */ 0x00000000 /* EMC_RP */ 0x00000004 /* EMC_R2W */ 0x0000000a /* EMC_W2R */ 0x00000003 /* EMC_R2P */ 0x0000000b /* EMC_W2P */ 0x00000000 /* EMC_RD_RCD */ 0x00000000 /* EMC_WR_RCD */ 0x00000003 /* EMC_RRD */ 0x00000003 /* EMC_REXT */ 0x00000000 /* EMC_WEXT */ 0x00000006 /* EMC_WDV */ 0x00000006 /* EMC_WDV_MASK */ 0x00000006 /* EMC_QUSE */ 0x00000002 /* EMC_QUSE_WIDTH */ 0x00000000 /* EMC_IBDLY */ 0x00000005 /* EMC_EINPUT */ 0x00000005 /* EMC_EINPUT_DURATION */ 0x00010000 /* EMC_PUTERM_EXTRA */ 0x00000003 /* EMC_PUTERM_WIDTH */ 0x00000000 /* EMC_PUTERM_ADJ */ 0x00000000 /* EMC_CDB_CNTL_1 */ 0x00000000 /* EMC_CDB_CNTL_2 */ 0x00000000 /* EMC_CDB_CNTL_3 */ 0x00000004 /* EMC_QRST */ 0x0000000c /* EMC_QSAFE */ 0x0000000d /* EMC_RDV */ 0x0000000f /* EMC_RDV_MASK */ 0x00000202 /* EMC_REFRESH */ 0x00000000 /* EMC_BURST_REFRESH_NUM */ 0x00000080 /* EMC_PRE_REFRESH_REQ_CNT */ 0x00000002 /* EMC_PDEX2WR */ 0x00000002 /* EMC_PDEX2RD */ 0x00000001 /* EMC_PCHG2PDEN */ 0x00000000 /* EMC_ACT2PDEN */ 0x0000000f /* EMC_AR2PDEN */ 0x0000000f /* EMC_RW2PDEN */ 0x00000013 /* EMC_TXSR */ 0x00000013 /* EMC_TXSRDLL */ 0x00000004 /* EMC_TCKE */ 0x00000005 /* EMC_TCKESR */ 0x00000004 /* EMC_TPD */ 0x00000001 /* EMC_TFAW */ 0x00000000 /* EMC_TRPAB */ 0x00000005 /* EMC_TCLKSTABLE */ 0x00000005 /* EMC_TCLKSTOP */ 0x00000213 /* EMC_TREFBW */ 0x00000000 /* EMC_FBIO_CFG6 */ 0x00000000 /* EMC_ODT_WRITE */ 0x00000000 /* EMC_ODT_READ */ 0x106aa298 /* EMC_FBIO_CFG5 */ 0x002c00a0 /* EMC_CFG_DIG_DLL */ 0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */ 0x00064000 /* EMC_DLL_XFORM_DQS0 */ 0x00064000 /* EMC_DLL_XFORM_DQS1 */ 0x00064000 /* EMC_DLL_XFORM_DQS2 */ 0x00064000 /* EMC_DLL_XFORM_DQS3 */ 0x00064000 /* EMC_DLL_XFORM_DQS4 */ 0x00064000 /* EMC_DLL_XFORM_DQS5 */ 0x00064000 /* EMC_DLL_XFORM_DQS6 */ 0x00064000 /* EMC_DLL_XFORM_DQS7 */ 0x00064000 /* EMC_DLL_XFORM_DQS8 */ 0x00064000 /* EMC_DLL_XFORM_DQS9 */ 0x00064000 /* EMC_DLL_XFORM_DQS10 */ 0x00064000 /* EMC_DLL_XFORM_DQS11 */ 0x00064000 /* EMC_DLL_XFORM_DQS12 */ 0x00064000 /* EMC_DLL_XFORM_DQS13 */ 0x00064000 /* EMC_DLL_XFORM_DQS14 */ 0x00064000 /* EMC_DLL_XFORM_DQS15 */ 0x00000000 /* EMC_DLL_XFORM_QUSE0 */ 0x00000000 /* EMC_DLL_XFORM_QUSE1 */ 0x00000000 /* EMC_DLL_XFORM_QUSE2 */ 0x00000000 /* EMC_DLL_XFORM_QUSE3 */ 0x00000000 /* EMC_DLL_XFORM_QUSE4 */ 0x00000000 /* EMC_DLL_XFORM_QUSE5 */ 0x00000000 /* EMC_DLL_XFORM_QUSE6 */ 0x00000000 /* EMC_DLL_XFORM_QUSE7 */ 0x00000000 /* EMC_DLL_XFORM_ADDR0 */ 0x00000000 /* EMC_DLL_XFORM_ADDR1 */ 0x00004000 /* EMC_DLL_XFORM_ADDR2 */ 0x00000000 /* EMC_DLL_XFORM_ADDR3 */ 0x00000000 /* EMC_DLL_XFORM_ADDR4 */ 0x00004000 /* EMC_DLL_XFORM_ADDR5 */ 0x00000000 /* EMC_DLL_XFORM_QUSE8 */ 0x00000000 /* EMC_DLL_XFORM_QUSE9 */ 0x00000000 /* EMC_DLL_XFORM_QUSE10 */ 0x00000000 /* EMC_DLL_XFORM_QUSE11 */ 0x00000000 /* EMC_DLL_XFORM_QUSE12 */ 0x00000000 /* EMC_DLL_XFORM_QUSE13 */ 0x00000000 /* EMC_DLL_XFORM_QUSE14 */ 0x00000000 /* EMC_DLL_XFORM_QUSE15 */ 0x00000000 /* EMC_DLI_TRIM_TXDQS0 */ 0x00000000 /* EMC_DLI_TRIM_TXDQS1 */ 0x00000000 /* EMC_DLI_TRIM_TXDQS2 */ 0x00000000 /* EMC_DLI_TRIM_TXDQS3 */ 0x00000000 /* EMC_DLI_TRIM_TXDQS4 */ 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */ 0x00000000 /* EMC_DLI_TRIM_TXDQS6 */ 0x00000000 /* EMC_DLI_TRIM_TXDQS7 */ 0x00000000 /* EMC_DLI_TRIM_TXDQS8 */ 0x00000000 /* EMC_DLI_TRIM_TXDQS9 */ 0x00000000 /* EMC_DLI_TRIM_TXDQS10 */ 0x00000000 /* EMC_DLI_TRIM_TXDQS11 */ 0x00000000 /* EMC_DLI_TRIM_TXDQS12 */ 0x00000000 /* EMC_DLI_TRIM_TXDQS13 */ 0x00000000 /* EMC_DLI_TRIM_TXDQS14 */ 0x00000000 /* EMC_DLI_TRIM_TXDQS15 */ 0x000fc000 /* EMC_DLL_XFORM_DQ0 */ 0x000fc000 /* EMC_DLL_XFORM_DQ1 */ 0x000fc000 /* EMC_DLL_XFORM_DQ2 */ 0x000fc000 /* EMC_DLL_XFORM_DQ3 */ 0x0000fc00 /* EMC_DLL_XFORM_DQ4 */ 0x0000fc00 /* EMC_DLL_XFORM_DQ5 */ 0x0000fc00 /* EMC_DLL_XFORM_DQ6 */ 0x0000fc00 /* EMC_DLL_XFORM_DQ7 */ 0x10000280 /* EMC_XM2CMDPADCTRL */ 0x00000000 /* EMC_XM2CMDPADCTRL4 */ 0x00111111 /* EMC_XM2CMDPADCTRL5 */ 0x00000000 /* EMC_XM2DQPADCTRL2 */ 0x00000000 /* EMC_XM2DQPADCTRL3 */ 0x77ffc081 /* EMC_XM2CLKPADCTRL */ 0x00000303 /* EMC_XM2CLKPADCTRL2 */ 0x81f1f108 /* EMC_XM2COMPPADCTRL */ 0x07070004 /* EMC_XM2VTTGENPADCTRL */ 0x0000003f /* EMC_XM2VTTGENPADCTRL2 */ 0x016eeeee /* EMC_XM2VTTGENPADCTRL3 */ 0x51451400 /* EMC_XM2DQSPADCTRL3 */ 0x00514514 /* EMC_XM2DQSPADCTRL4 */ 0x00514514 /* EMC_XM2DQSPADCTRL5 */ 0x51451400 /* EMC_XM2DQSPADCTRL6 */ 0x0000003f /* EMC_DSR_VTTGEN_DRV */ 0x00000022 /* EMC_TXDSRVTTGEN */ 0x00000000 /* EMC_FBIO_SPARE */ 0x00000042 /* EMC_ZCAL_WAIT_CNT */ 0x000c000c /* EMC_MRS_WAIT_CNT2 */ 0x00000000 /* EMC_CTT */ 0x00000003 /* EMC_CTT_DURATION */ 0x0000f2f3 /* EMC_CFG_PIPE */ 0x8000050e /* EMC_DYN_SELF_REF_CONTROL */ 0x0000000a /* EMC_QPOP */ >; }; timing-102000000 { clock-frequency = <102000000>; nvidia,emc-auto-cal-config = <0xa1430000>; nvidia,emc-auto-cal-config2 = <0x00000000>; nvidia,emc-auto-cal-config3 = <0x00000000>; nvidia,emc-auto-cal-interval = <0x001fffff>; nvidia,emc-bgbias-ctl0 = <0x00000008>; nvidia,emc-cfg = <0x73240000>; nvidia,emc-cfg-2 = <0x000008c5>; nvidia,emc-ctt-term-ctrl = <0x00000802>; nvidia,emc-mode-1 = <0x80100003>; nvidia,emc-mode-2 = <0x80200008>; nvidia,emc-mode-4 = <0x00000000>; nvidia,emc-mode-reset = <0x80001221>; nvidia,emc-mrs-wait-cnt = <0x000c000c>; nvidia,emc-sel-dpd-ctrl = <0x00040128>; nvidia,emc-xm2dqspadctrl2 = <0x0130b118>; nvidia,emc-zcal-cnt-long = <0x00000042>; nvidia,emc-zcal-interval = <0x00000000>; nvidia,emc-configuration = < 0x00000004 /* EMC_RC */ 0x0000001a /* EMC_RFC */ 0x00000000 /* EMC_RFC_SLR */ 0x00000003 /* EMC_RAS */ 0x00000001 /* EMC_RP */ 0x00000004 /* EMC_R2W */ 0x0000000a /* EMC_W2R */ 0x00000003 /* EMC_R2P */ 0x0000000b /* EMC_W2P */ 0x00000001 /* EMC_RD_RCD */ 0x00000001 /* EMC_WR_RCD */ 0x00000003 /* EMC_RRD */ 0x00000003 /* EMC_REXT */ 0x00000000 /* EMC_WEXT */ 0x00000006 /* EMC_WDV */ 0x00000006 /* EMC_WDV_MASK */ 0x00000006 /* EMC_QUSE */ 0x00000002 /* EMC_QUSE_WIDTH */ 0x00000000 /* EMC_IBDLY */ 0x00000005 /* EMC_EINPUT */ 0x00000005 /* EMC_EINPUT_DURATION */ 0x00010000 /* EMC_PUTERM_EXTRA */ 0x00000003 /* EMC_PUTERM_WIDTH */ 0x00000000 /* EMC_PUTERM_ADJ */ 0x00000000 /* EMC_CDB_CNTL_1 */ 0x00000000 /* EMC_CDB_CNTL_2 */ 0x00000000 /* EMC_CDB_CNTL_3 */ 0x00000004 /* EMC_QRST */ 0x0000000c /* EMC_QSAFE */ --> -------------------- --> maximum size reached --> -------------------- [ Dauer der Verarbeitung: 0.12 Sekunden (vorverarbeitet) ] |
2026-04-07