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# SPDX-License-Identifier: (GPL-
2.
0-only OR BSD-
2-Clause)
%YAML
1.
2
---
$id:
http://devicetree.org/schemas/ata/sata_highbank.yaml#
$schema:
http://devicetree.org/meta-schemas/core.yaml#
title: Calxeda AHCI SATA Controller
description: |
The Calxeda SATA controller mostly conforms to the AHCI interface
with some special extensions to add functionality, to map GPIOs for
activity LEDs and for mapping the ComboPHYs.
maintainers:
- Andre Przywara <andre.przywara@arm.com>
properties:
compatible:
const: calxeda,hb-ahci
reg:
maxItems:
1
interrupts:
maxItems:
1
dma-coherent: true
calxeda,pre-clocks:
$ref: /schemas/types.yaml#/definitions/uint32
description: |
Indicates the number of additional clock cycles to transmit before
sending an SGPIO pattern.
calxeda,post-clocks:
$ref: /schemas/types.yaml#/definitions/uint32
description: |
Indicates the number of additional clock cycles to transmit after
sending an SGPIO pattern.
calxeda,led-order:
description: Maps port numbers to offsets within the SGPIO bitstream.
$ref: /schemas/types.yaml#/definitions/uint32-array
minItems:
1
maxItems:
8
calxeda,port-phys:
description: |
phandle-combophy and lane assignment, which maps each SATA port to a
combophy and a lane within that combophy
$ref: /schemas/types.yaml#/definitions/phandle-array
minItems:
1
maxItems:
8
items:
maxItems:
2
calxeda,tx-atten:
description: |
Contains TX attenuation override codes, one per port.
The upper
24 bits of each entry are always
0 and thus ignored.
$ref: /schemas/types.yaml#/definitions/uint32-array
minItems:
1
maxItems:
8
calxeda,sgpio-gpio:
maxItems:
3
description: |
phandle-gpio bank, bit offset, and default on or off, which indicates
that the driver supports SGPIO indicator lights using the indicated
GPIOs.
required:
- compatible
- reg
- interrupts
additionalProperties: false
examples:
- |
sata@ffe08000 {
compatible = "calxeda,hb-ahci";
reg = <
0xffe08000
0x1000>;
interrupts = <
115>;
dma-coherent;
calxeda,port-phys = <&combophy5
0>, <&combophy0
0>, <&combophy0
1>,
<&combophy0
2>, <&combophy0
3>;
calxeda,sgpio-gpio =<&gpioh
5 1>, <&gpioh
6 1>, <&gpioh
7 1>;
calxeda,led-order = <
4 0 1 2 3>;
calxeda,tx-atten = <
0xff
22 0xff
0xff
23>;
calxeda,pre-clocks = <
10>;
calxeda,post-clocks = <
0>;
};
...