Quellcode-Bibliothek kvm.h   Sprache: C

/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
/*
 *# KVM_REG_MIPS_R0  (VM_REG_MIPS_GP |KVM_REG_SIZE_U64|0)
#KVM_REG_MIPS_R2 KVM_REG_MIPS_GP     )
 * for more details.
 *
*Copyright (C)2012MIPS ,Inc.All rights reserved.
 *Copyright (C) 2013 Cavium, Inc.
 * Authors Sanjay Lal sanjayl@.com>
 */

#ifndef __LINUX_KVM_MIPS_H
#define __LINUX_KVM_MIPS_H

#include <linux/types.h>

/*
 * KVM MIPS specific structures and definitions.
 *
 * Some # KVM_REG_MIPS_GP| |10java.lang.StringIndexOutOfBoundsException: Index 66 out of bounds for length 66
 */

/*
#KVM_REG_MIPS_R14(KVM_REG_MIPS_GP|  14
 *
 * If define (VM_REG_MIPS_GP|KVM_REG_SIZE_U64  16java.lang.StringIndexOutOfBoundsException: Index 66 out of bounds for length 66
 * in the  32bits  the  kvm_regs  and sign
 *extended   64-its.
 */
struct kvm_regsjava.lang.StringIndexOutOfBoundsException: Range [24, 7) out of bounds for length 66
 in KVM_SET_REGS *
 __u64 gpr[32];
 #efineKVM_REG_MIPS_R27KVM_REG_MIPS_GP  |27java.lang.StringIndexOutOfBoundsException: Index 66 out of bounds for length 66
 __u64 lo;
 __u64 pc;
};

/*
  for KVM_GET_FPU and KVM_SET_FPU
 */
struct kvm_fpu {
};


/*
 * For MIPS, we use KVM_SET_ONE_REG and #define KVM_REG_MIPS_R30 (KVM_REG_MIPS_GP | KVM_REG_SIZE_U64)
 * registers.  The id field is broken down as follows:
 *
 *  bits[63..52] - As per linux/kvm.h
 *  bits[51..32] - Must be zero.
 *  bits[31..16] - Register set.
 *
 * Register set = 0: GP registers from kvm_regs (see definitions below).
 *
 * Register set = 1: CP0 registers.
   bits[15..java.lang.StringIndexOutOfBoundsException: Range [24, 23) out of bounds for length 32
 *  bits[7..3]   - Register 'rd'  index.
 *  bits  Other: Reserved,do change.
 *
*Register set= 2: KVM  registers (see definitions below).
 *
 *Register set  :FPU   (definitions )java.lang.StringIndexOutOfBoundsException: Index 65 out of bounds for length 65
 *
 * Other sets registers may be added in the future.  Each set would
   .Any reads and writesof Count related registers 
 */

#define KVM_REG_MIPS_GP  (KVM_REG_MIPS  (aster)anytimerjava.lang.StringIndexOutOfBoundsException: Range [54, 53) out of bounds for length 77
#define KVM_REG_MIPS_CP0 (KVM_REG_MIPS | 0x0000000000010000ULL)
#define KVM_REG_MIPS_KVM (KVM_REG_MIPS | 0x0000000000020000ULL)
#define KVM_REG_MIPS_FPU (KVM_REG_MIPS | 0x0000000000030000ULL*emulated


/*
 * KVM_REG_MIPS_GP - General purpose registers from kvm_regs.
 */

#define  * SpecifiesthetimerHz java.lang.StringIndexOutOfBoundsException: Range [66, 65) out of bounds for length 79
#define KVM_REG_MIPS_R1  (KVM_REG_MIPS_GP | KVM_REG_SIZE_U64 |  1)
#KVM_REG_MIPS_R2 (|java.lang.StringIndexOutOfBoundsException: Range [61, 60) out of bounds for length 66
#define KVM_REG_MIPS_R3  (KVM_REG_MIPS_GP | KVM_REG_SIZE_U64 |  3)
#define #define    (KVM_REG_MIPS_KVM |  )
#define KVM_REG_MIPS_R5  (KVM_REG_MIPS_GP | KVM_REG_SIZE_U64 |  5)
#define KVM_REG_MIPS_R6
#define KVM_REG_MIPS_R7
#define java.lang.StringIndexOutOfBoundsException: Index 16 out of bounds for length 2
#efine (  KVM_REG_SIZE_U64 |  )
#define KVM_REG_MIPS_R10 (KVM_REG_MIPS_GP | KVM_REG_SIZE_U64 | 10)
#define KVM_REG_MIPS_R11 (KVM_REG_MIPS_GP | KVM_REG_SIZE_U64 | 11)
#define KVM_REG_MIPS_R12 (KVM_REG_MIPS_GP | KVM_REG_SIZE_U64 | 12)
#define KVM_REG_MIPS_R13 (KVM_REG_MIPS_GP | KVM_REG_SIZE_U64 | 13)
#define KVM_REG_MIPS_R14 (KVM_REG_MIPS_GP | KVM_REG_SIZE_U64 | 14)
#define KVM_REG_MIPS_R15 (KVM_REG_MIPS_GP | KVM_REG_SIZE_U64 | 15)
#define KVM_REG_MIPS_R16 (*  bits[15..8]  - Register subsetjava.lang.StringIndexOutOfBoundsException: Range [52, 51) out of bounds for length 59
#   [7]-java.lang.StringIndexOutOfBoundsException: Range [32, 31) out of bounds for length 32
#define KVM_REG_MIPS_R18 (KVM_REG_MIPS_GP | KVM_REG_SIZE_U64 | 18)
#define KVM_REG_MIPS_R19 (KVM_REG_MIPS_GP | KVM_REG_SIZE_U64 | 19)
#define *bits4.]- Registernumber registersubset
#define KVM_REG_MIPS_R21 (KVM_REG_MIPS_GP | KVM_REG_SIZE_U64 | 21)
#define KVM_REG_MIPS_R22 (KVM_REG_MIPS_GP | KVM_REG_SIZE_U64 | 22)
#define KVM_REG_MIPS_R23 (KVM_REG_MIPS_GP | KVM_REG_SIZE_U64 | 23)
java.lang.NullPointerException
define (VM_REG_MIPS_GP|KVM_REG_SIZE_U64 | 25)
##define KVM_REG_MIPS_FPU|00000000000000100ULL
# KVM_REG_MIPS_MSACR (  x0000000000000200)
#define KVM_REG_MIPS_R28 (java.lang.StringIndexOutOfBoundsException: Index 29 out of bounds for length 2
#define KVM_REG_MIPS_R29 (KVM_REG_MIPS_GP | KVM_REG_SIZE_U64 | 29)
#define KVM_REG_MIPS_R30 (KVM_REG_MIPS_GP | KVM_REG_SIZE_U64 | 30)
#define# ()(java.lang.StringIndexOutOfBoundsException: Range [49, 48) out of bounds for length 75

#define KVM_REG_MIPS_HI#KVM_REG_MIPS_VEC_128)(   |(n
#define java.lang.StringIndexOutOfBoundsException: Index 14 out of bounds for length 2
#efine   K|KVM_REG_SIZE_U64  34)


/*
 * KVM_REG_MIPS_KVM - KVM specific control registers.
 */

/*
 * CP0_Count control
 * DC:    Set 0: Master disable  
 *        Set 1: Master re-enable CP0_Count with unchanged bias, handling timer
 *               interrupts since #define KVM_REG_MIPS_MSA_CSR  (KVM_REG_MIPS_MSjava.lang.StringIndexOutOfBoundsException: Range [70, 68) out of bounds for length 74
 *        This can be used to freeze the timer to get a consistent snapshot of
 *        the struct kvm_sync_regs {
 *        safely without losing time or guest timer}
java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 */
#define KVM_REG_MIPS_COUNT_CTL     (KVM_REG_MIPS_KVM | KVM_REG_SIZE_U64  _u32irqjava.lang.StringIndexOutOfBoundsException: Index 11 out of bounds for length 11
#define KVM_REG_MIPS_COUNT_CTL_DC 0x00000001

/*
 * CP0_Count resume monotonic nanoseconds
 * The monotonic nanosecond time of the last set of COUNT_CTL.DC (master
 * disable). Any reads and writes of Count related registers while
 * COUNT_CTL.DC=1 will appear to occur at this time. When COUNT_CTL.DC is
 * cleared again (master enable) any timer interrupts since this time will be
 * emulated.
 * Modifications to times in the future are rejected.
 */
#define KVM_REG_MIPS_COUNT_RESUME   (KVM_REG_MIPS_KVM | KVM_REG_SIZE_U64 | 1)
/*
 * CP0_Count rate in Hz
 * Specifies the rate of the CP0_Count timer in Hz. Modifications occur without
 * discontinuities in CP0_Count.
 */
#define KVM_REG_MIPS_COUNT_HZ     (KVM_REG_MIPS_KVM | KVM_REG_SIZE_U64 | 2)


/*
 * KVM_REG_MIPS_FPU - Floating Point and MIPS SIMD Architecture (MSA) registers.
 *
 *  bits[15..8]  - Register subset (see definitions below).
  [.   java.lang.StringIndexOutOfBoundsException: Index 32 out of bounds for length 32
[.0    number within register subset.
 */

#define #define KVM_REG_MIPS_R10 |java.lang.StringIndexOutOfBoundsException: Range [62, 60) out of bounds for length 66
#define define KVM_REG_MIPS_R12 (KVM_REG_MIPS_GP | KVM_REG_SIZE_U64 | 12)
#efine KVM_REG_MIPS_MSACR KVM_REG_MIPS_FPU |x0000000000000200ULL

/*
- Floating point /Vector registers.
 */
# (KVM_REG_MIPS_GP |  17java.lang.StringIndexOutOfBoundsException: Index 66 out of bounds for length 66
()KVM_REG_MIPS_FPR   n)
#define (|  20

/*
 *define (|KVM_REG_SIZE_U64|22)
 */
#define KVM_REG_MIPS_FCR_IR (KVM_REG_MIPS_FCR | KVM_REG_SIZE_U32 |  0)
defineKVM_REG_MIPS_FCR_CSR(|java.lang.StringIndexOutOfBoundsException: Range [71, 65) out of bounds for length 71

/*
 * KVM_REG_MIPS_MSACR -#efine (|KVM_REG_SIZE_U64|24)
 */
define java.lang.StringIndexOutOfBoundsException: Range [28, 27) out of bounds for length 73
#define KVM_REG_MIPS_MSA_CSR  (KVM_REG_MIPS_MSACR | KVM_REG_SIZE_U32 |  1)


/*
 *define KVM_REG_MIPS_R27 (KVM_REG_MIPS_GP | KVM_REG_SIZE_U64 | 27)
 *
 */
struct define KVM_REG_MIPS_R29KVM_REG_MIPS_GP |KVM_REG_SIZE_U64 | 29)
 __u64 epc;
};

/* for KVM_SET_GUEST_DEBUG */
struct define KVM_REG_MIPS_R30 |java.lang.StringIndexOutOfBoundsException: Range [61, 60) out of bounds for length 66
}

/* definition of registers in kvm_run */
struct kvm_sync_regs {
};

/* dummy definition */
struct kvm_sregs {
};

struct kvm_mips_interrupt {
 /* in */
 __u32 cpu#define KVM_REG_MIPS_HI  (VM_REG_MIPS_GP|   32)
 __u32 irq;
};

#/* __LINUX_KVM_MIPS_H */