/* SPDX-License-Identifier: GPL-2.0-only */
/*
* ALSA SoC TLV320AIC23 codec driver
*
* Author: Arun KS, <arunks@mistralsolutions.com>
* Copyright: (C) 2008 Mistral Solutions Pvt Ltd
*/
#ifndef _TLV320AIC23_H
#define _TLV320AIC23_H
struct device;
struct regmap_config;
extern const struct regmap_config tlv320aic23_regmap;
int tlv320aic23_probe(struct device *dev, struct regmap *regmap);
/* Codec TLV320AIC23 */
#define TLV320AIC23_LINVOL 0 x00
#define TLV320AIC23_RINVOL 0 x01
#define TLV320AIC23_LCHNVOL 0 x02
#define TLV320AIC23_RCHNVOL 0 x03
#define TLV320AIC23_ANLG 0 x04
#define TLV320AIC23_DIGT 0 x05
#define TLV320AIC23_PWR 0 x06
#define TLV320AIC23_DIGT_FMT 0 x07
#define TLV320AIC23_SRATE 0 x08
#define TLV320AIC23_ACTIVE 0 x09
#define TLV320AIC23_RESET 0 x0F
/* Left (right) line input volume control register */
#define TLV320AIC23_LRS_ENABLED 0 x0100
#define TLV320AIC23_LIM_MUTED 0 x0080
#define TLV320AIC23_LIV_DEFAULT 0 x0017
#define TLV320AIC23_LIV_MAX 0 x001f
#define TLV320AIC23_LIV_MIN 0 x0000
/* Left (right) channel headphone volume control register */
#define TLV320AIC23_LZC_ON 0 x0080
#define TLV320AIC23_LHV_DEFAULT 0 x0079
#define TLV320AIC23_LHV_MAX 0 x007f
#define TLV320AIC23_LHV_MIN 0 x0000
/* Analog audio path control register */
#define TLV320AIC23_STA_REG(x) ((x)<<6 )
#define TLV320AIC23_STE_ENABLED 0 x0020
#define TLV320AIC23_DAC_SELECTED 0 x0010
#define TLV320AIC23_BYPASS_ON 0 x0008
#define TLV320AIC23_INSEL_MIC 0 x0004
#define TLV320AIC23_MICM_MUTED 0 x0002
#define TLV320AIC23_MICB_20DB 0 x0001
/* Digital audio path control register */
#define TLV320AIC23_DACM_MUTE 0 x0008
#define TLV320AIC23_DEEMP_32K 0 x0002
#define TLV320AIC23_DEEMP_44K 0 x0004
#define TLV320AIC23_DEEMP_48K 0 x0006
#define TLV320AIC23_ADCHP_ON 0 x0001
/* Power control down register */
#define TLV320AIC23_DEVICE_PWR_OFF 0 x0080
#define TLV320AIC23_CLK_OFF 0 x0040
#define TLV320AIC23_OSC_OFF 0 x0020
#define TLV320AIC23_OUT_OFF 0 x0010
#define TLV320AIC23_DAC_OFF 0 x0008
#define TLV320AIC23_ADC_OFF 0 x0004
#define TLV320AIC23_MIC_OFF 0 x0002
#define TLV320AIC23_LINE_OFF 0 x0001
/* Digital audio interface register */
#define TLV320AIC23_MS_MASTER 0 x0040
#define TLV320AIC23_LRSWAP_ON 0 x0020
#define TLV320AIC23_LRP_ON 0 x0010
#define TLV320AIC23_IWL_16 0 x0000
#define TLV320AIC23_IWL_20 0 x0004
#define TLV320AIC23_IWL_24 0 x0008
#define TLV320AIC23_IWL_32 0 x000C
#define TLV320AIC23_FOR_I2S 0 x0002
#define TLV320AIC23_FOR_DSP 0 x0003
#define TLV320AIC23_FOR_LJUST 0 x0001
/* Sample rate control register */
#define TLV320AIC23_CLKOUT_HALF 0 x0080
#define TLV320AIC23_CLKIN_HALF 0 x0040
#define TLV320AIC23_BOSR_384fs 0 x0002 /* BOSR_272fs in USB mode */
#define TLV320AIC23_USB_CLK_ON 0 x0001
#define TLV320AIC23_SR_MASK 0 xf
#define TLV320AIC23_CLKOUT_SHIFT 7
#define TLV320AIC23_CLKIN_SHIFT 6
#define TLV320AIC23_SR_SHIFT 2
#define TLV320AIC23_BOSR_SHIFT 1
/* Digital interface register */
#define TLV320AIC23_ACT_ON 0 x0001
/*
* AUDIO related MACROS
*/
#define TLV320AIC23_DEFAULT_OUT_VOL 0 x70
#define TLV320AIC23_DEFAULT_IN_VOLUME 0 x10
#define TLV320AIC23_OUT_VOL_MIN TLV320AIC23_LHV_MIN
#define TLV320AIC23_OUT_VOL_MAX TLV320AIC23_LHV_MAX
#define TLV320AIC23_OUT_VO_RANGE (TLV320AIC23_OUT_VOL_MAX - \
TLV320AIC23_OUT_VOL_MIN)
#define TLV320AIC23_OUT_VOL_MASK TLV320AIC23_OUT_VOL_MAX
#define TLV320AIC23_IN_VOL_MIN TLV320AIC23_LIV_MIN
#define TLV320AIC23_IN_VOL_MAX TLV320AIC23_LIV_MAX
#define TLV320AIC23_IN_VOL_RANGE (TLV320AIC23_IN_VOL_MAX - \
TLV320AIC23_IN_VOL_MIN)
#define TLV320AIC23_IN_VOL_MASK TLV320AIC23_IN_VOL_MAX
#define TLV320AIC23_SIDETONE_MASK 0 x1c0
#define TLV320AIC23_SIDETONE_0 0 x100
#define TLV320AIC23_SIDETONE_6 0 x000
#define TLV320AIC23_SIDETONE_9 0 x040
#define TLV320AIC23_SIDETONE_12 0 x080
#define TLV320AIC23_SIDETONE_18 0 x0c0
#endif /* _TLV320AIC23_H */
Messung V0.5 in Prozent C=95 H=92 G=93
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(vorverarbeitet am 2026-06-08)
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