// SPDX-License-Identifier: GPL-2.0-only /* * lm49453.c - LM49453 ALSA Soc Audio driver * * Copyright (c) 2012 Texas Instruments, Inc * * Initially based on sound/soc/codecs/wm8350.c #include <linux/module.h>#include <linux/moduleparam.h>#include <linux/kernel.h>#include <linux/init.h>#include <linux/delay.h>#include <linux/pm.h>#include <linux/i2c.h>#include <linux/regmap.h>#include <linux/slab.h>#include <sound/core.h>#include <sound/pcm.h>#include <sound/pcm_params.h>#include <sound/soc.h>#include <sound/soc-dapm.h>#include <sound/tlv.h>#include <sound/jack.h>#include <sound/initval.h>#include <asm /div64.h>#include "lm49453.h" static const struct reg_default lm49453_reg_defs[] = {0 , 0 x00 },1 , 0 x00 },2 , 0 x00 },3 , 0 x00 },4 , 0 x00 },5 , 0 x00 },6 , 0 x00 },7 , 0 x00 },8 , 0 x00 },9 , 0 x00 },10 , 0 x00 },11 , 0 x00 },12 , 0 x00 },13 , 0 x00 },14 , 0 x00 },15 , 0 x00 },16 , 0 x00 },17 , 0 x00 },18 , 0 x00 },19 , 0 x00 },20 , 0 x00 },21 , 0 x00 },22 , 0 x00 },23 , 0 x00 },32 , 0 x00 },33 , 0 x00 },35 , 0 x00 },36 , 0 x00 },37 , 0 x00 },46 , 0 x00 },48 , 0 x00 },49 , 0 x00 },51 , 0 x00 },56 , 0 x00 },58 , 0 x00 },59 , 0 x00 },60 , 0 x00 },61 , 0 x00 },62 , 0 x00 },63 , 0 x00 },64 , 0 x00 },65 , 0 x00 },66 , 0 x00 },67 , 0 x00 },68 , 0 x00 },69 , 0 x00 },70 , 0 x00 },71 , 0 x00 },72 , 0 x00 },73 , 0 x00 },74 , 0 x00 },75 , 0 x00 },76 , 0 x00 },77 , 0 x00 },78 , 0 x00 },79 , 0 x00 },80 , 0 x00 },81 , 0 x00 },82 , 0 x00 },83 , 0 x00 },85 , 0 x00 },85 , 0 x00 },86 , 0 x00 },87 , 0 x00 },88 , 0 x00 },89 , 0 x00 },90 , 0 x00 },91 , 0 x00 },92 , 0 x00 },93 , 0 x00 },94 , 0 x00 },95 , 0 x00 },96 , 0 x01 },97 , 0 x00 },98 , 0 x00 },99 , 0 x00 },100 , 0 x00 },101 , 0 x00 },102 , 0 x00 },103 , 0 x01 },104 , 0 x01 },105 , 0 x00 },106 , 0 x01 },107 , 0 x00 },108 , 0 x00 },109 , 0 x00 },110 , 0 x00 },111 , 0 x02 },112 , 0 x02 },113 , 0 x00 },121 , 0 x80 },122 , 0 xBB },123 , 0 x80 },124 , 0 xBB },128 , 0 x00 },130 , 0 x00 },131 , 0 x00 },132 , 0 x00 },133 , 0 x0A },134 , 0 x0A },135 , 0 x0A },136 , 0 x0F },137 , 0 x00 },138 , 0 x73 },139 , 0 x33 },140 , 0 x73 },141 , 0 x33 },142 , 0 x73 },143 , 0 x33 },144 , 0 x73 },145 , 0 x33 },146 , 0 x73 },147 , 0 x33 },148 , 0 x73 },149 , 0 x33 },150 , 0 x73 },151 , 0 x33 },152 , 0 x00 },153 , 0 x00 },154 , 0 x00 },155 , 0 x00 },176 , 0 x00 },177 , 0 x00 },178 , 0 x00 },179 , 0 x00 },180 , 0 x00 },181 , 0 x00 },182 , 0 x00 },183 , 0 x00 },184 , 0 x00 },185 , 0 x00 },186 , 0 x00 },187 , 0 x00 },188 , 0 x00 },189 , 0 x00 },208 , 0 x06 },209 , 0 x00 },210 , 0 x08 },211 , 0 x54 },212 , 0 x14 },213 , 0 x0d },214 , 0 x0d },215 , 0 x14 },216 , 0 x60 },221 , 0 x00 },222 , 0 x00 },223 , 0 x00 },224 , 0 x00 },248 , 0 x00 },249 , 0 x00 },250 , 0 x00 },255 , 0 x00 },/* codec private data */ struct lm49453_priv {struct regmap *regmap;/* capture path controls */ static const char *lm49453_mic2mode_text[] = {"Single Ended" , "Differential" };static SOC_ENUM_SINGLE_DECL(lm49453_mic2mode_enum, LM49453_P0_MICR_REG, 5 ,static const char *lm49453_dmic_cfg_text[] = {"DMICDAT1" , "DMICDAT2" };static SOC_ENUM_SINGLE_DECL(lm49453_dmic12_cfg_enum,7 ,static SOC_ENUM_SINGLE_DECL(lm49453_dmic34_cfg_enum,7 ,/* MUX Controls */ static const char *lm49453_adcl_mux_text[] = { "MIC1" , "Aux_L" };static const char *lm49453_adcr_mux_text[] = { "MIC2" , "Aux_R" };static SOC_ENUM_SINGLE_DECL(lm49453_adcl_enum,0 ,static SOC_ENUM_SINGLE_DECL(lm49453_adcr_enum,1 ,static const struct snd_kcontrol_new lm49453_adcl_mux_control ="ADC Left Mux" , lm49453_adcl_enum);static const struct snd_kcontrol_new lm49453_adcr_mux_control ="ADC Right Mux" , lm49453_adcr_enum);static const struct snd_kcontrol_new lm49453_headset_left_mixer[] = {"Port1_1 Switch" , LM49453_P0_DACHPL1_REG, 0 , 1 , 0 ),"Port1_2 Switch" , LM49453_P0_DACHPL1_REG, 1 , 1 , 0 ),"Port1_3 Switch" , LM49453_P0_DACHPL1_REG, 2 , 1 , 0 ),"Port1_4 Switch" , LM49453_P0_DACHPL1_REG, 3 , 1 , 0 ),"Port1_5 Switch" , LM49453_P0_DACHPL1_REG, 4 , 1 , 0 ),"Port1_6 Switch" , LM49453_P0_DACHPL1_REG, 5 , 1 , 0 ),"Port1_7 Switch" , LM49453_P0_DACHPL1_REG, 6 , 1 , 0 ),"Port1_8 Switch" , LM49453_P0_DACHPL1_REG, 7 , 1 , 0 ),"DMIC1L Switch" , LM49453_P0_DACHPL2_REG, 0 , 1 , 0 ),"DMIC1R Switch" , LM49453_P0_DACHPL2_REG, 1 , 1 , 0 ),"DMIC2L Switch" , LM49453_P0_DACHPL2_REG, 2 , 1 , 0 ),"DMIC2R Switch" , LM49453_P0_DACHPL2_REG, 3 , 1 , 0 ),"ADCL Switch" , LM49453_P0_DACHPL2_REG, 4 , 1 , 0 ),"ADCR Switch" , LM49453_P0_DACHPL2_REG, 5 , 1 , 0 ),"Port2_1 Switch" , LM49453_P0_DACHPL2_REG, 6 , 1 , 0 ),"Port2_2 Switch" , LM49453_P0_DACHPL2_REG, 7 , 1 , 0 ),"Sidetone Switch" , LM49453_P0_STN_SEL_REG, 0 , 0 , 0 ),static const struct snd_kcontrol_new lm49453_headset_right_mixer[] = {"Port1_1 Switch" , LM49453_P0_DACHPR1_REG, 0 , 1 , 0 ),"Port1_2 Switch" , LM49453_P0_DACHPR1_REG, 1 , 1 , 0 ),"Port1_3 Switch" , LM49453_P0_DACHPR1_REG, 2 , 1 , 0 ),"Port1_4 Switch" , LM49453_P0_DACHPR1_REG, 3 , 1 , 0 ),"Port1_5 Switch" , LM49453_P0_DACHPR1_REG, 4 , 1 , 0 ),"Port1_6 Switch" , LM49453_P0_DACHPR1_REG, 5 , 1 , 0 ),"Port1_7 Switch" , LM49453_P0_DACHPR1_REG, 6 , 1 , 0 ),"Port1_8 Switch" , LM49453_P0_DACHPR1_REG, 7 , 1 , 0 ),"DMIC1L Switch" , LM49453_P0_DACHPR2_REG, 0 , 1 , 0 ),"DMIC1R Switch" , LM49453_P0_DACHPR2_REG, 1 , 1 , 0 ),"DMIC2L Switch" , LM49453_P0_DACHPR2_REG, 2 , 1 , 0 ),"DMIC2R Switch" , LM49453_P0_DACHPR2_REG, 3 , 1 , 0 ),"ADCL Switch" , LM49453_P0_DACHPR2_REG, 4 , 1 , 0 ),"ADCR Switch" , LM49453_P0_DACHPR2_REG, 5 , 1 , 0 ),"Port2_1 Switch" , LM49453_P0_DACHPR2_REG, 6 , 1 , 0 ),"Port2_2 Switch" , LM49453_P0_DACHPR2_REG, 7 , 1 , 0 ),"Sidetone Switch" , LM49453_P0_STN_SEL_REG, 1 , 0 , 0 ),static const struct snd_kcontrol_new lm49453_speaker_left_mixer[] = {"Port1_1 Switch" , LM49453_P0_DACLSL1_REG, 0 , 1 , 0 ),"Port1_2 Switch" , LM49453_P0_DACLSL1_REG, 1 , 1 , 0 ),"Port1_3 Switch" , LM49453_P0_DACLSL1_REG, 2 , 1 , 0 ),"Port1_4 Switch" , LM49453_P0_DACLSL1_REG, 3 , 1 , 0 ),"Port1_5 Switch" , LM49453_P0_DACLSL1_REG, 4 , 1 , 0 ),"Port1_6 Switch" , LM49453_P0_DACLSL1_REG, 5 , 1 , 0 ),"Port1_7 Switch" , LM49453_P0_DACLSL1_REG, 6 , 1 , 0 ),"Port1_8 Switch" , LM49453_P0_DACLSL1_REG, 7 , 1 , 0 ),"DMIC1L Switch" , LM49453_P0_DACLSL2_REG, 0 , 1 , 0 ),"DMIC1R Switch" , LM49453_P0_DACLSL2_REG, 1 , 1 , 0 ),"DMIC2L Switch" , LM49453_P0_DACLSL2_REG, 2 , 1 , 0 ),"DMIC2R Switch" , LM49453_P0_DACLSL2_REG, 3 , 1 , 0 ),"ADCL Switch" , LM49453_P0_DACLSL2_REG, 4 , 1 , 0 ),"ADCR Switch" , LM49453_P0_DACLSL2_REG, 5 , 1 , 0 ),"Port2_1 Switch" , LM49453_P0_DACLSL2_REG, 6 , 1 , 0 ),"Port2_2 Switch" , LM49453_P0_DACLSL2_REG, 7 , 1 , 0 ),"Sidetone Switch" , LM49453_P0_STN_SEL_REG, 2 , 0 , 0 ),static const struct snd_kcontrol_new lm49453_speaker_right_mixer[] = {"Port1_1 Switch" , LM49453_P0_DACLSR1_REG, 0 , 1 , 0 ),"Port1_2 Switch" , LM49453_P0_DACLSR1_REG, 1 , 1 , 0 ),"Port1_3 Switch" , LM49453_P0_DACLSR1_REG, 2 , 1 , 0 ),"Port1_4 Switch" , LM49453_P0_DACLSR1_REG, 3 , 1 , 0 ),"Port1_5 Switch" , LM49453_P0_DACLSR1_REG, 4 , 1 , 0 ),"Port1_6 Switch" , LM49453_P0_DACLSR1_REG, 5 , 1 , 0 ),"Port1_7 Switch" , LM49453_P0_DACLSR1_REG, 6 , 1 , 0 ),"Port1_8 Switch" , LM49453_P0_DACLSR1_REG, 7 , 1 , 0 ),"DMIC1L Switch" , LM49453_P0_DACLSR2_REG, 0 , 1 , 0 ),"DMIC1R Switch" , LM49453_P0_DACLSR2_REG, 1 , 1 , 0 ),"DMIC2L Switch" , LM49453_P0_DACLSR2_REG, 2 , 1 , 0 ),"DMIC2R Switch" , LM49453_P0_DACLSR2_REG, 3 , 1 , 0 ),"ADCL Switch" , LM49453_P0_DACLSR2_REG, 4 , 1 , 0 ),"ADCR Switch" , LM49453_P0_DACLSR2_REG, 5 , 1 , 0 ),"Port2_1 Switch" , LM49453_P0_DACLSR2_REG, 6 , 1 , 0 ),"Port2_2 Switch" , LM49453_P0_DACLSR2_REG, 7 , 1 , 0 ),"Sidetone Switch" , LM49453_P0_STN_SEL_REG, 3 , 0 , 0 ),static const struct snd_kcontrol_new lm49453_haptic_left_mixer[] = {"Port1_1 Switch" , LM49453_P0_DACHAL1_REG, 0 , 1 , 0 ),"Port1_2 Switch" , LM49453_P0_DACHAL1_REG, 1 , 1 , 0 ),"Port1_3 Switch" , LM49453_P0_DACHAL1_REG, 2 , 1 , 0 ),"Port1_4 Switch" , LM49453_P0_DACHAL1_REG, 3 , 1 , 0 ),"Port1_5 Switch" , LM49453_P0_DACHAL1_REG, 4 , 1 , 0 ),"Port1_6 Switch" , LM49453_P0_DACHAL1_REG, 5 , 1 , 0 ),"Port1_7 Switch" , LM49453_P0_DACHAL1_REG, 6 , 1 , 0 ),"Port1_8 Switch" , LM49453_P0_DACHAL1_REG, 7 , 1 , 0 ),"DMIC1L Switch" , LM49453_P0_DACHAL2_REG, 0 , 1 , 0 ),"DMIC1R Switch" , LM49453_P0_DACHAL2_REG, 1 , 1 , 0 ),"DMIC2L Switch" , LM49453_P0_DACHAL2_REG, 2 , 1 , 0 ),"DMIC2R Switch" , LM49453_P0_DACHAL2_REG, 3 , 1 , 0 ),"ADCL Switch" , LM49453_P0_DACHAL2_REG, 4 , 1 , 0 ),"ADCR Switch" , LM49453_P0_DACHAL2_REG, 5 , 1 , 0 ),"Port2_1 Switch" , LM49453_P0_DACHAL2_REG, 6 , 1 , 0 ),"Port2_2 Switch" , LM49453_P0_DACHAL2_REG, 7 , 1 , 0 ),"Sidetone Switch" , LM49453_P0_STN_SEL_REG, 4 , 0 , 0 ),static const struct snd_kcontrol_new lm49453_haptic_right_mixer[] = {"Port1_1 Switch" , LM49453_P0_DACHAR1_REG, 0 , 1 , 0 ),"Port1_2 Switch" , LM49453_P0_DACHAR1_REG, 1 , 1 , 0 ),"Port1_3 Switch" , LM49453_P0_DACHAR1_REG, 2 , 1 , 0 ),"Port1_4 Switch" , LM49453_P0_DACHAR1_REG, 3 , 1 , 0 ),"Port1_5 Switch" , LM49453_P0_DACHAR1_REG, 4 , 1 , 0 ),"Port1_6 Switch" , LM49453_P0_DACHAR1_REG, 5 , 1 , 0 ),"Port1_7 Switch" , LM49453_P0_DACHAR1_REG, 6 , 1 , 0 ),"Port1_8 Switch" , LM49453_P0_DACHAR1_REG, 7 , 1 , 0 ),"DMIC1L Switch" , LM49453_P0_DACHAR2_REG, 0 , 1 , 0 ),"DMIC1R Switch" , LM49453_P0_DACHAR2_REG, 1 , 1 , 0 ),"DMIC2L Switch" , LM49453_P0_DACHAR2_REG, 2 , 1 , 0 ),"DMIC2R Switch" , LM49453_P0_DACHAR2_REG, 3 , 1 , 0 ),"ADCL Switch" , LM49453_P0_DACHAR2_REG, 4 , 1 , 0 ),"ADCR Switch" , LM49453_P0_DACHAR2_REG, 5 , 1 , 0 ),"Port2_1 Switch" , LM49453_P0_DACHAR2_REG, 6 , 1 , 0 ),"Port2_2 Switch" , LM49453_P0_DACHAR2_REG, 7 , 1 , 0 ),"Sidetone Switch" , LM49453_P0_STN_SEL_REG, 5 , 0 , 0 ),static const struct snd_kcontrol_new lm49453_lineout_left_mixer[] = {"Port1_1 Switch" , LM49453_P0_DACLOL1_REG, 0 , 1 , 0 ),"Port1_2 Switch" , LM49453_P0_DACLOL1_REG, 1 , 1 , 0 ),"Port1_3 Switch" , LM49453_P0_DACLOL1_REG, 2 , 1 , 0 ),"Port1_4 Switch" , LM49453_P0_DACLOL1_REG, 3 , 1 , 0 ),"Port1_5 Switch" , LM49453_P0_DACLOL1_REG, 4 , 1 , 0 ),"Port1_6 Switch" , LM49453_P0_DACLOL1_REG, 5 , 1 , 0 ),"Port1_7 Switch" , LM49453_P0_DACLOL1_REG, 6 , 1 , 0 ),"Port1_8 Switch" , LM49453_P0_DACLOL1_REG, 7 , 1 , 0 ),"DMIC1L Switch" , LM49453_P0_DACLOL2_REG, 0 , 1 , 0 ),"DMIC1R Switch" , LM49453_P0_DACLOL2_REG, 1 , 1 , 0 ),"DMIC2L Switch" , LM49453_P0_DACLOL2_REG, 2 , 1 , 0 ),"DMIC2R Switch" , LM49453_P0_DACLOL2_REG, 3 , 1 , 0 ),"ADCL Switch" , LM49453_P0_DACLOL2_REG, 4 , 1 , 0 ),"ADCR Switch" , LM49453_P0_DACLOL2_REG, 5 , 1 , 0 ),"Port2_1 Switch" , LM49453_P0_DACLOL2_REG, 6 , 1 , 0 ),"Port2_2 Switch" , LM49453_P0_DACLOL2_REG, 7 , 1 , 0 ),"Sidetone Switch" , LM49453_P0_STN_SEL_REG, 6 , 0 , 0 ),static const struct snd_kcontrol_new lm49453_lineout_right_mixer[] = {"Port1_1 Switch" , LM49453_P0_DACLOR1_REG, 0 , 1 , 0 ),"Port1_2 Switch" , LM49453_P0_DACLOR1_REG, 1 , 1 , 0 ),"Port1_3 Switch" , LM49453_P0_DACLOR1_REG, 2 , 1 , 0 ),"Port1_4 Switch" , LM49453_P0_DACLOR1_REG, 3 , 1 , 0 ),"Port1_5 Switch" , LM49453_P0_DACLOR1_REG, 4 , 1 , 0 ),"Port1_6 Switch" , LM49453_P0_DACLOR1_REG, 5 , 1 , 0 ),"Port1_7 Switch" , LM49453_P0_DACLOR1_REG, 6 , 1 , 0 ),"Port1_8 Switch" , LM49453_P0_DACLOR1_REG, 7 , 1 , 0 ),"DMIC1L Switch" , LM49453_P0_DACLOR2_REG, 0 , 1 , 0 ),"DMIC1R Switch" , LM49453_P0_DACLOR2_REG, 1 , 1 , 0 ),"DMIC2L Switch" , LM49453_P0_DACLOR2_REG, 2 , 1 , 0 ),"DMIC2R Switch" , LM49453_P0_DACLOR2_REG, 3 , 1 , 0 ),"ADCL Switch" , LM49453_P0_DACLOR2_REG, 4 , 1 , 0 ),"ADCR Switch" , LM49453_P0_DACLOR2_REG, 5 , 1 , 0 ),"Port2_1 Switch" , LM49453_P0_DACLOR2_REG, 6 , 1 , 0 ),"Port2_2 Switch" , LM49453_P0_DACLOR2_REG, 7 , 1 , 0 ),"Sidetone Switch" , LM49453_P0_STN_SEL_REG, 7 , 0 , 0 ),static const struct snd_kcontrol_new lm49453_port1_tx1_mixer[] = {"DMIC1L Switch" , LM49453_P0_PORT1_TX1_REG, 0 , 1 , 0 ),"DMIC1R Switch" , LM49453_P0_PORT1_TX1_REG, 1 , 1 , 0 ),"DMIC2L Switch" , LM49453_P0_PORT1_TX1_REG, 2 , 1 , 0 ),"DMIC2R Switch" , LM49453_P0_PORT1_TX1_REG, 3 , 1 , 0 ),"ADCL Switch" , LM49453_P0_PORT1_TX1_REG, 4 , 1 , 0 ),"ADCR Switch" , LM49453_P0_PORT1_TX1_REG, 5 , 1 , 0 ),"Port1_1 Switch" , LM49453_P0_PORT1_TX1_REG, 6 , 1 , 0 ),"Port2_1 Switch" , LM49453_P0_PORT1_TX1_REG, 7 , 1 , 0 ),static const struct snd_kcontrol_new lm49453_port1_tx2_mixer[] = {"DMIC1L Switch" , LM49453_P0_PORT1_TX2_REG, 0 , 1 , 0 ),"DMIC1R Switch" , LM49453_P0_PORT1_TX2_REG, 1 , 1 , 0 ),"DMIC2L Switch" , LM49453_P0_PORT1_TX2_REG, 2 , 1 , 0 ),"DMIC2R Switch" , LM49453_P0_PORT1_TX2_REG, 3 , 1 , 0 ),"ADCL Switch" , LM49453_P0_PORT1_TX2_REG, 4 , 1 , 0 ),"ADCR Switch" , LM49453_P0_PORT1_TX2_REG, 5 , 1 , 0 ),"Port1_2 Switch" , LM49453_P0_PORT1_TX2_REG, 6 , 1 , 0 ),"Port2_2 Switch" , LM49453_P0_PORT1_TX2_REG, 7 , 1 , 0 ),static const struct snd_kcontrol_new lm49453_port1_tx3_mixer[] = {"DMIC1L Switch" , LM49453_P0_PORT1_TX3_REG, 0 , 1 , 0 ),"DMIC1R Switch" , LM49453_P0_PORT1_TX3_REG, 1 , 1 , 0 ),"DMIC2L Switch" , LM49453_P0_PORT1_TX3_REG, 2 , 1 , 0 ),"DMIC2R Switch" , LM49453_P0_PORT1_TX3_REG, 3 , 1 , 0 ),"ADCL Switch" , LM49453_P0_PORT1_TX3_REG, 4 , 1 , 0 ),"ADCR Switch" , LM49453_P0_PORT1_TX3_REG, 5 , 1 , 0 ),"Port1_3 Switch" , LM49453_P0_PORT1_TX3_REG, 6 , 1 , 0 ),static const struct snd_kcontrol_new lm49453_port1_tx4_mixer[] = {"DMIC1L Switch" , LM49453_P0_PORT1_TX4_REG, 0 , 1 , 0 ),"DMIC1R Switch" , LM49453_P0_PORT1_TX4_REG, 1 , 1 , 0 ),"DMIC2L Switch" , LM49453_P0_PORT1_TX4_REG, 2 , 1 , 0 ),"DMIC2R Switch" , LM49453_P0_PORT1_TX4_REG, 3 , 1 , 0 ),"ADCL Switch" , LM49453_P0_PORT1_TX4_REG, 4 , 1 , 0 ),"ADCR Switch" , LM49453_P0_PORT1_TX4_REG, 5 , 1 , 0 ),"Port1_4 Switch" , LM49453_P0_PORT1_TX4_REG, 6 , 1 , 0 ),static const struct snd_kcontrol_new lm49453_port1_tx5_mixer[] = {"DMIC1L Switch" , LM49453_P0_PORT1_TX5_REG, 0 , 1 , 0 ),"DMIC1R Switch" , LM49453_P0_PORT1_TX5_REG, 1 , 1 , 0 ),"DMIC2L Switch" , LM49453_P0_PORT1_TX5_REG, 2 , 1 , 0 ),"DMIC2R Switch" , LM49453_P0_PORT1_TX5_REG, 3 , 1 , 0 ),"ADCL Switch" , LM49453_P0_PORT1_TX5_REG, 4 , 1 , 0 ),"ADCR Switch" , LM49453_P0_PORT1_TX5_REG, 5 , 1 , 0 ),"Port1_5 Switch" , LM49453_P0_PORT1_TX5_REG, 6 , 1 , 0 ),static const struct snd_kcontrol_new lm49453_port1_tx6_mixer[] = {"DMIC1L Switch" , LM49453_P0_PORT1_TX6_REG, 0 , 1 , 0 ),"DMIC1R Switch" , LM49453_P0_PORT1_TX6_REG, 1 , 1 , 0 ),"DMIC2L Switch" , LM49453_P0_PORT1_TX6_REG, 2 , 1 , 0 ),"DMIC2R Switch" , LM49453_P0_PORT1_TX6_REG, 3 , 1 , 0 ),"ADCL Switch" , LM49453_P0_PORT1_TX6_REG, 4 , 1 , 0 ),"ADCR Switch" , LM49453_P0_PORT1_TX6_REG, 5 , 1 , 0 ),"Port1_6 Switch" , LM49453_P0_PORT1_TX6_REG, 6 , 1 , 0 ),static const struct snd_kcontrol_new lm49453_port1_tx7_mixer[] = {"DMIC1L Switch" , LM49453_P0_PORT1_TX7_REG, 0 , 1 , 0 ),"DMIC1R Switch" , LM49453_P0_PORT1_TX7_REG, 1 , 1 , 0 ),"DMIC2L Switch" , LM49453_P0_PORT1_TX7_REG, 2 , 1 , 0 ),"DMIC2R Switch" , LM49453_P0_PORT1_TX7_REG, 3 , 1 , 0 ),"ADCL Switch" , LM49453_P0_PORT1_TX7_REG, 4 , 1 , 0 ),"ADCR Switch" , LM49453_P0_PORT1_TX7_REG, 5 , 1 , 0 ),"Port1_7 Switch" , LM49453_P0_PORT1_TX7_REG, 6 , 1 , 0 ),static const struct snd_kcontrol_new lm49453_port1_tx8_mixer[] = {"DMIC1L Switch" , LM49453_P0_PORT1_TX8_REG, 0 , 1 , 0 ),"DMIC1R Switch" , LM49453_P0_PORT1_TX8_REG, 1 , 1 , 0 ),"DMIC2L Switch" , LM49453_P0_PORT1_TX8_REG, 2 , 1 , 0 ),"DMIC2R Switch" , LM49453_P0_PORT1_TX8_REG, 3 , 1 , 0 ),"ADCL Switch" , LM49453_P0_PORT1_TX8_REG, 4 , 1 , 0 ),"ADCR Switch" , LM49453_P0_PORT1_TX8_REG, 5 , 1 , 0 ),"Port1_8 Switch" , LM49453_P0_PORT1_TX8_REG, 6 , 1 , 0 ),static const struct snd_kcontrol_new lm49453_port2_tx1_mixer[] = {"DMIC1L Switch" , LM49453_P0_PORT2_TX1_REG, 0 , 1 , 0 ),"DMIC1R Switch" , LM49453_P0_PORT2_TX1_REG, 1 , 1 , 0 ),"DMIC2L Switch" , LM49453_P0_PORT2_TX1_REG, 2 , 1 , 0 ),"DMIC2R Switch" , LM49453_P0_PORT2_TX1_REG, 3 , 1 , 0 ),"ADCL Switch" , LM49453_P0_PORT2_TX1_REG, 4 , 1 , 0 ),"ADCR Switch" , LM49453_P0_PORT2_TX1_REG, 5 , 1 , 0 ),"Port1_1 Switch" , LM49453_P0_PORT2_TX1_REG, 6 , 1 , 0 ),"Port2_1 Switch" , LM49453_P0_PORT2_TX1_REG, 7 , 1 , 0 ),static const struct snd_kcontrol_new lm49453_port2_tx2_mixer[] = {"DMIC1L Switch" , LM49453_P0_PORT2_TX2_REG, 0 , 1 , 0 ),"DMIC1R Switch" , LM49453_P0_PORT2_TX2_REG, 1 , 1 , 0 ),"DMIC2L Switch" , LM49453_P0_PORT2_TX2_REG, 2 , 1 , 0 ),"DMIC2R Switch" , LM49453_P0_PORT2_TX2_REG, 3 , 1 , 0 ),"ADCL Switch" , LM49453_P0_PORT2_TX2_REG, 4 , 1 , 0 ),"ADCR Switch" , LM49453_P0_PORT2_TX2_REG, 5 , 1 , 0 ),"Port1_2 Switch" , LM49453_P0_PORT2_TX2_REG, 6 , 1 , 0 ),"Port2_2 Switch" , LM49453_P0_PORT2_TX2_REG, 7 , 1 , 0 ),/* TLV Declarations */ static const DECLARE_TLV_DB_SCALE(adc_dac_tlv, -7650 , 150 , 1 );static const DECLARE_TLV_DB_SCALE(mic_tlv, 0 , 200 , 1 );static const DECLARE_TLV_DB_SCALE(port_tlv, -1800 , 600 , 0 );static const DECLARE_TLV_DB_SCALE(stn_tlv, -7200 , 150 , 0 );static const struct snd_kcontrol_new lm49453_sidetone_mixer_controls[] = {/* Sidetone supports mono only */ "Sidetone ADCL Volume" , LM49453_P0_STN_VOL_ADCL_REG,0 , 0 x3F, 0 , stn_tlv),"Sidetone ADCR Volume" , LM49453_P0_STN_VOL_ADCR_REG,0 , 0 x3F, 0 , stn_tlv),"Sidetone DMIC1L Volume" , LM49453_P0_STN_VOL_DMIC1L_REG,0 , 0 x3F, 0 , stn_tlv),"Sidetone DMIC1R Volume" , LM49453_P0_STN_VOL_DMIC1R_REG,0 , 0 x3F, 0 , stn_tlv),"Sidetone DMIC2L Volume" , LM49453_P0_STN_VOL_DMIC2L_REG,0 , 0 x3F, 0 , stn_tlv),"Sidetone DMIC2R Volume" , LM49453_P0_STN_VOL_DMIC2R_REG,0 , 0 x3F, 0 , stn_tlv),static const struct snd_kcontrol_new lm49453_snd_controls[] = {/* mic1 and mic2 supports mono only */ "Mic1 Volume" , LM49453_P0_MICL_REG, 0 , 15 , 0 , mic_tlv),"Mic2 Volume" , LM49453_P0_MICR_REG, 0 , 15 , 0 , mic_tlv),"ADCL Volume" , LM49453_P0_ADC_LEVELL_REG, 0 , 63 ,0 , adc_dac_tlv),"ADCR Volume" , LM49453_P0_ADC_LEVELR_REG, 0 , 63 ,0 , adc_dac_tlv),"DMIC1 Volume" , LM49453_P0_DMIC1_LEVELL_REG,0 , 63 , 0 , adc_dac_tlv),"DMIC2 Volume" , LM49453_P0_DMIC2_LEVELL_REG,0 , 63 , 0 , adc_dac_tlv),"Mic2Mode" , lm49453_mic2mode_enum),"DMIC12 SRC" , lm49453_dmic12_cfg_enum),"DMIC34 SRC" , lm49453_dmic34_cfg_enum),/* Capture path filter enable */ "DMIC1 HPFilter Switch" , LM49453_P0_ADC_FX_ENABLES_REG,0 , 1 , 0 ),"DMIC2 HPFilter Switch" , LM49453_P0_ADC_FX_ENABLES_REG,1 , 1 , 0 ),"ADC HPFilter Switch" , LM49453_P0_ADC_FX_ENABLES_REG,2 , 1 , 0 ),"DAC HP Volume" , LM49453_P0_DAC_HP_LEVELL_REG,0 , 63 , 0 , adc_dac_tlv),"DAC LO Volume" , LM49453_P0_DAC_LO_LEVELL_REG,0 , 63 , 0 , adc_dac_tlv),"DAC LS Volume" , LM49453_P0_DAC_LS_LEVELL_REG,0 , 63 , 0 , adc_dac_tlv),"DAC HA Volume" , LM49453_P0_DAC_HA_LEVELL_REG,0 , 63 , 0 , adc_dac_tlv),"EP Volume" , LM49453_P0_DAC_LS_LEVELL_REG,0 , 63 , 0 , adc_dac_tlv),"PORT1_1_RX_LVL Volume" , LM49453_P0_PORT1_RX_LVL1_REG,0 , 3 , 0 , port_tlv),"PORT1_2_RX_LVL Volume" , LM49453_P0_PORT1_RX_LVL1_REG,2 , 3 , 0 , port_tlv),"PORT1_3_RX_LVL Volume" , LM49453_P0_PORT1_RX_LVL1_REG,4 , 3 , 0 , port_tlv),"PORT1_4_RX_LVL Volume" , LM49453_P0_PORT1_RX_LVL1_REG,6 , 3 , 0 , port_tlv),"PORT1_5_RX_LVL Volume" , LM49453_P0_PORT1_RX_LVL2_REG,0 , 3 , 0 , port_tlv),"PORT1_6_RX_LVL Volume" , LM49453_P0_PORT1_RX_LVL2_REG,2 , 3 , 0 , port_tlv),"PORT1_7_RX_LVL Volume" , LM49453_P0_PORT1_RX_LVL2_REG,4 , 3 , 0 , port_tlv),"PORT1_8_RX_LVL Volume" , LM49453_P0_PORT1_RX_LVL2_REG,6 , 3 , 0 , port_tlv),"PORT2_1_RX_LVL Volume" , LM49453_P0_PORT2_RX_LVL_REG,0 , 3 , 0 , port_tlv),"PORT2_2_RX_LVL Volume" , LM49453_P0_PORT2_RX_LVL_REG,2 , 3 , 0 , port_tlv),"Port1 Playback Switch" , LM49453_P0_AUDIO_PORT1_BASIC_REG,1 , 1 , 0 ),"Port2 Playback Switch" , LM49453_P0_AUDIO_PORT2_BASIC_REG,1 , 1 , 0 ),"Port1 Capture Switch" , LM49453_P0_AUDIO_PORT1_BASIC_REG,2 , 1 , 0 ),"Port2 Capture Switch" , LM49453_P0_AUDIO_PORT2_BASIC_REG,2 , 1 , 0 )/* DAPM widgets */ static const struct snd_soc_dapm_widget lm49453_dapm_widgets[] = {/* All end points HP,EP, LS, Lineout and Haptic */ "HPOUTL" ),"HPOUTR" ),"EPOUT" ),"LSOUTL" ),"LSOUTR" ),"LOOUTR" ),"LOOUTL" ),"HAOUTL" ),"HAOUTR" ),"AMIC1" ),"AMIC2" ),"DMIC1DAT" ),"DMIC2DAT" ),"AUXL" ),"AUXR" ),"PORT1_1_RX" , SND_SOC_NOPM, 0 , 0 , NULL, 0 ),"PORT1_2_RX" , SND_SOC_NOPM, 0 , 0 , NULL, 0 ),"PORT1_3_RX" , SND_SOC_NOPM, 0 , 0 , NULL, 0 ),"PORT1_4_RX" , SND_SOC_NOPM, 0 , 0 , NULL, 0 ),"PORT1_5_RX" , SND_SOC_NOPM, 0 , 0 , NULL, 0 ),"PORT1_6_RX" , SND_SOC_NOPM, 0 , 0 , NULL, 0 ),"PORT1_7_RX" , SND_SOC_NOPM, 0 , 0 , NULL, 0 ),"PORT1_8_RX" , SND_SOC_NOPM, 0 , 0 , NULL, 0 ),"PORT2_1_RX" , SND_SOC_NOPM, 0 , 0 , NULL, 0 ),"PORT2_2_RX" , SND_SOC_NOPM, 0 , 0 , NULL, 0 ),"AMIC1Bias" , LM49453_P0_MICL_REG, 6 , 0 , NULL, 0 ),"AMIC2Bias" , LM49453_P0_MICR_REG, 6 , 0 , NULL, 0 ),/* playback path driver enables */ "Headset Switch" ,0 , 0 , NULL, 0 ),"Earpiece Switch" ,0 , 0 , NULL, 0 ),"Speaker Left Switch" ,0 , 1 , NULL, 0 ),"Speaker Right Switch" ,1 , 1 , NULL, 0 ),"Haptic Left Switch" ,2 , 1 , NULL, 0 ),"Haptic Right Switch" ,3 , 1 , NULL, 0 ),/* DAC */ "HPL DAC" , "Headset" , SND_SOC_NOPM, 0 , 0 ),"HPR DAC" , "Headset" , SND_SOC_NOPM, 0 , 0 ),"LSL DAC" , "Speaker" , SND_SOC_NOPM, 0 , 0 ),"LSR DAC" , "Speaker" , SND_SOC_NOPM, 0 , 0 ),"HAL DAC" , "Haptic" , SND_SOC_NOPM, 0 , 0 ),"HAR DAC" , "Haptic" , SND_SOC_NOPM, 0 , 0 ),"LOL DAC" , "Lineout" , SND_SOC_NOPM, 0 , 0 ),"LOR DAC" , "Lineout" , SND_SOC_NOPM, 0 , 0 ),"AUXL Input" ,2 , 0 , NULL, 0 ),"AUXR Input" ,3 , 0 , NULL, 0 ),"Sidetone" , SND_SOC_NOPM, 0 , 0 , NULL, 0 ),/* ADC */ "DMIC1 Left" , "Capture" , SND_SOC_NOPM, 1 , 0 ),"DMIC1 Right" , "Capture" , SND_SOC_NOPM, 1 , 0 ),"DMIC2 Left" , "Capture" , SND_SOC_NOPM, 1 , 0 ),"DMIC2 Right" , "Capture" , SND_SOC_NOPM, 1 , 0 ),"ADC Left" , "Capture" , SND_SOC_NOPM, 1 , 0 ),"ADC Right" , "Capture" , SND_SOC_NOPM, 0 , 0 ),"ADCL Mux" , SND_SOC_NOPM, 0 , 0 ,"ADCR Mux" , SND_SOC_NOPM, 0 , 0 ,"Mic1 Input" ,0 , 0 , &lm49453_adcl_mux_control),"Mic2 Input" ,0 , 0 , &lm49453_adcr_mux_control),/* AIF */ "PORT1_SDI" , NULL, 0 ,2 , 0 ),"PORT2_SDI" , NULL, 0 ,6 , 0 ),"PORT1_SDO" , NULL, 0 ,3 , 0 ),"PORT2_SDO" , NULL, 0 ,7 , 0 ),/* Port1 TX controls */ "P1_1_TX" , SND_SOC_NOPM, 0 , 0 , NULL, 0 ),"P1_2_TX" , SND_SOC_NOPM, 0 , 0 , NULL, 0 ),"P1_3_TX" , SND_SOC_NOPM, 0 , 0 , NULL, 0 ),"P1_4_TX" , SND_SOC_NOPM, 0 , 0 , NULL, 0 ),"P1_5_TX" , SND_SOC_NOPM, 0 , 0 , NULL, 0 ),"P1_6_TX" , SND_SOC_NOPM, 0 , 0 , NULL, 0 ),"P1_7_TX" , SND_SOC_NOPM, 0 , 0 , NULL, 0 ),"P1_8_TX" , SND_SOC_NOPM, 0 , 0 , NULL, 0 ),/* Port2 TX controls */ "P2_1_TX" , SND_SOC_NOPM, 0 , 0 , NULL, 0 ),"P2_2_TX" , SND_SOC_NOPM, 0 , 0 , NULL, 0 ),/* Sidetone Mixer */ "Sidetone Mixer" , SND_SOC_NOPM, 0 , 0 ,/* DAC MIXERS */ "HPL Mixer" , SND_SOC_NOPM, 0 , 0 ,"HPR Mixer" , SND_SOC_NOPM, 0 , 0 ,"LOL Mixer" , SND_SOC_NOPM, 0 , 0 ,"LOR Mixer" , SND_SOC_NOPM, 0 , 0 ,"LSL Mixer" , SND_SOC_NOPM, 0 , 0 ,"LSR Mixer" , SND_SOC_NOPM, 0 , 0 ,"HAL Mixer" , SND_SOC_NOPM, 0 , 0 ,"HAR Mixer" , SND_SOC_NOPM, 0 , 0 ,/* Capture Mixer */ "Port1_1 Mixer" , SND_SOC_NOPM, 0 , 0 ,"Port1_2 Mixer" , SND_SOC_NOPM, 0 , 0 ,"Port1_3 Mixer" , SND_SOC_NOPM, 0 , 0 ,"Port1_4 Mixer" , SND_SOC_NOPM, 0 , 0 ,"Port1_5 Mixer" , SND_SOC_NOPM, 0 , 0 ,"Port1_6 Mixer" , SND_SOC_NOPM, 0 , 0 ,"Port1_7 Mixer" , SND_SOC_NOPM, 0 , 0 ,"Port1_8 Mixer" , SND_SOC_NOPM, 0 , 0 ,"Port2_1 Mixer" , SND_SOC_NOPM, 0 , 0 ,"Port2_2 Mixer" , SND_SOC_NOPM, 0 , 0 ,static const struct snd_soc_dapm_route lm49453_audio_map[] = {/* Port SDI mapping */ "PORT1_1_RX" , "Port1 Playback Switch" , "PORT1_SDI" },"PORT1_2_RX" , "Port1 Playback Switch" , "PORT1_SDI" },"PORT1_3_RX" , "Port1 Playback Switch" , "PORT1_SDI" },"PORT1_4_RX" , "Port1 Playback Switch" , "PORT1_SDI" },"PORT1_5_RX" , "Port1 Playback Switch" , "PORT1_SDI" },"PORT1_6_RX" , "Port1 Playback Switch" , "PORT1_SDI" },"PORT1_7_RX" , "Port1 Playback Switch" , "PORT1_SDI" },"PORT1_8_RX" , "Port1 Playback Switch" , "PORT1_SDI" },"PORT2_1_RX" , "Port2 Playback Switch" , "PORT2_SDI" },"PORT2_2_RX" , "Port2 Playback Switch" , "PORT2_SDI" },/* HP mapping */ "HPL Mixer" , "Port1_1 Switch" , "PORT1_1_RX" },"HPL Mixer" , "Port1_2 Switch" , "PORT1_2_RX" },"HPL Mixer" , "Port1_3 Switch" , "PORT1_3_RX" },"HPL Mixer" , "Port1_4 Switch" , "PORT1_4_RX" },"HPL Mixer" , "Port1_5 Switch" , "PORT1_5_RX" },"HPL Mixer" , "Port1_6 Switch" , "PORT1_6_RX" },"HPL Mixer" , "Port1_7 Switch" , "PORT1_7_RX" },"HPL Mixer" , "Port1_8 Switch" , "PORT1_8_RX" },"HPL Mixer" , "Port2_1 Switch" , "PORT2_1_RX" },"HPL Mixer" , "Port2_2 Switch" , "PORT2_2_RX" },"HPL Mixer" , "ADCL Switch" , "ADC Left" },"HPL Mixer" , "ADCR Switch" , "ADC Right" },"HPL Mixer" , "DMIC1L Switch" , "DMIC1 Left" },"HPL Mixer" , "DMIC1R Switch" , "DMIC1 Right" },"HPL Mixer" , "DMIC2L Switch" , "DMIC2 Left" },"HPL Mixer" , "DMIC2R Switch" , "DMIC2 Right" },"HPL Mixer" , "Sidetone Switch" , "Sidetone" },"HPL DAC" , NULL, "HPL Mixer" },"HPR Mixer" , "Port1_1 Switch" , "PORT1_1_RX" },"HPR Mixer" , "Port1_2 Switch" , "PORT1_2_RX" },"HPR Mixer" , "Port1_3 Switch" , "PORT1_3_RX" },"HPR Mixer" , "Port1_4 Switch" , "PORT1_4_RX" },"HPR Mixer" , "Port1_5 Switch" , "PORT1_5_RX" },"HPR Mixer" , "Port1_6 Switch" , "PORT1_6_RX" },"HPR Mixer" , "Port1_7 Switch" , "PORT1_7_RX" },"HPR Mixer" , "Port1_8 Switch" , "PORT1_8_RX" },/* Port 2 */ "HPR Mixer" , "Port2_1 Switch" , "PORT2_1_RX" },"HPR Mixer" , "Port2_2 Switch" , "PORT2_2_RX" },"HPR Mixer" , "ADCL Switch" , "ADC Left" },"HPR Mixer" , "ADCR Switch" , "ADC Right" },"HPR Mixer" , "DMIC1L Switch" , "DMIC1 Left" },"HPR Mixer" , "DMIC1R Switch" , "DMIC1 Right" },"HPR Mixer" , "DMIC2L Switch" , "DMIC2 Left" },"HPR Mixer" , "DMIC2L Switch" , "DMIC2 Right" },"HPR Mixer" , "Sidetone Switch" , "Sidetone" },"HPR DAC" , NULL, "HPR Mixer" },"HPOUTL" , "Headset Switch" , "HPL DAC" },"HPOUTR" , "Headset Switch" , "HPR DAC" },/* EP map */ "EPOUT" , "Earpiece Switch" , "HPL DAC" },/* Speaker map */ "LSL Mixer" , "Port1_1 Switch" , "PORT1_1_RX" },"LSL Mixer" , "Port1_2 Switch" , "PORT1_2_RX" },"LSL Mixer" , "Port1_3 Switch" , "PORT1_3_RX" },"LSL Mixer" , "Port1_4 Switch" , "PORT1_4_RX" },"LSL Mixer" , "Port1_5 Switch" , "PORT1_5_RX" },"LSL Mixer" , "Port1_6 Switch" , "PORT1_6_RX" },"LSL Mixer" , "Port1_7 Switch" , "PORT1_7_RX" },"LSL Mixer" , "Port1_8 Switch" , "PORT1_8_RX" },/* Port 2 */ "LSL Mixer" , "Port2_1 Switch" , "PORT2_1_RX" },"LSL Mixer" , "Port2_2 Switch" , "PORT2_2_RX" },"LSL Mixer" , "ADCL Switch" , "ADC Left" },"LSL Mixer" , "ADCR Switch" , "ADC Right" },"LSL Mixer" , "DMIC1L Switch" , "DMIC1 Left" },"LSL Mixer" , "DMIC1R Switch" , "DMIC1 Right" },"LSL Mixer" , "DMIC2L Switch" , "DMIC2 Left" },"LSL Mixer" , "DMIC2R Switch" , "DMIC2 Right" },"LSL Mixer" , "Sidetone Switch" , "Sidetone" },"LSL DAC" , NULL, "LSL Mixer" },"LSR Mixer" , "Port1_1 Switch" , "PORT1_1_RX" },"LSR Mixer" , "Port1_2 Switch" , "PORT1_2_RX" },"LSR Mixer" , "Port1_3 Switch" , "PORT1_3_RX" },"LSR Mixer" , "Port1_4 Switch" , "PORT1_4_RX" },"LSR Mixer" , "Port1_5 Switch" , "PORT1_5_RX" },"LSR Mixer" , "Port1_6 Switch" , "PORT1_6_RX" },"LSR Mixer" , "Port1_7 Switch" , "PORT1_7_RX" },"LSR Mixer" , "Port1_8 Switch" , "PORT1_8_RX" },/* Port 2 */ "LSR Mixer" , "Port2_1 Switch" , "PORT2_1_RX" },"LSR Mixer" , "Port2_2 Switch" , "PORT2_2_RX" },"LSR Mixer" , "ADCL Switch" , "ADC Left" },"LSR Mixer" , "ADCR Switch" , "ADC Right" },"LSR Mixer" , "DMIC1L Switch" , "DMIC1 Left" },"LSR Mixer" , "DMIC1R Switch" , "DMIC1 Right" },"LSR Mixer" , "DMIC2L Switch" , "DMIC2 Left" },"LSR Mixer" , "DMIC2R Switch" , "DMIC2 Right" },"LSR Mixer" , "Sidetone Switch" , "Sidetone" },"LSR DAC" , NULL, "LSR Mixer" },"LSOUTL" , "Speaker Left Switch" , "LSL DAC" },"LSOUTR" , "Speaker Left Switch" , "LSR DAC" },/* Haptic map */ "HAL Mixer" , "Port1_1 Switch" , "PORT1_1_RX" },"HAL Mixer" , "Port1_2 Switch" , "PORT1_2_RX" },"HAL Mixer" , "Port1_3 Switch" , "PORT1_3_RX" },"HAL Mixer" , "Port1_4 Switch" , "PORT1_4_RX" },"HAL Mixer" , "Port1_5 Switch" , "PORT1_5_RX" },"HAL Mixer" , "Port1_6 Switch" , "PORT1_6_RX" },"HAL Mixer" , "Port1_7 Switch" , "PORT1_7_RX" },"HAL Mixer" , "Port1_8 Switch" , "PORT1_8_RX" },/* Port 2 */ "HAL Mixer" , "Port2_1 Switch" , "PORT2_1_RX" },"HAL Mixer" , "Port2_2 Switch" , "PORT2_2_RX" },"HAL Mixer" , "ADCL Switch" , "ADC Left" },"HAL Mixer" , "ADCR Switch" , "ADC Right" },"HAL Mixer" , "DMIC1L Switch" , "DMIC1 Left" },"HAL Mixer" , "DMIC1R Switch" , "DMIC1 Right" },"HAL Mixer" , "DMIC2L Switch" , "DMIC2 Left" },"HAL Mixer" , "DMIC2R Switch" , "DMIC2 Right" },"HAL Mixer" , "Sidetone Switch" , "Sidetone" },"HAL DAC" , NULL, "HAL Mixer" },"HAR Mixer" , "Port1_1 Switch" , "PORT1_1_RX" },"HAR Mixer" , "Port1_2 Switch" , "PORT1_2_RX" },"HAR Mixer" , "Port1_3 Switch" , "PORT1_3_RX" },"HAR Mixer" , "Port1_4 Switch" , "PORT1_4_RX" },"HAR Mixer" , "Port1_5 Switch" , "PORT1_5_RX" },"HAR Mixer" , "Port1_6 Switch" , "PORT1_6_RX" },"HAR Mixer" , "Port1_7 Switch" , "PORT1_7_RX" },"HAR Mixer" , "Port1_8 Switch" , "PORT1_8_RX" },/* Port 2 */ "HAR Mixer" , "Port2_1 Switch" , "PORT2_1_RX" },"HAR Mixer" , "Port2_2 Switch" , "PORT2_2_RX" },"HAR Mixer" , "ADCL Switch" , "ADC Left" },"HAR Mixer" , "ADCR Switch" , "ADC Right" },"HAR Mixer" , "DMIC1L Switch" , "DMIC1 Left" },"HAR Mixer" , "DMIC1R Switch" , "DMIC1 Right" },"HAR Mixer" , "DMIC2L Switch" , "DMIC2 Left" },"HAR Mixer" , "DMIC2R Switch" , "DMIC2 Right" },"HAR Mixer" , "Sideton Switch" , "Sidetone" },"HAR DAC" , NULL, "HAR Mixer" },"HAOUTL" , "Haptic Left Switch" , "HAL DAC" },"HAOUTR" , "Haptic Right Switch" , "HAR DAC" },/* Lineout map */ "LOL Mixer" , "Port1_1 Switch" , "PORT1_1_RX" },"LOL Mixer" , "Port1_2 Switch" , "PORT1_2_RX" },"LOL Mixer" , "Port1_3 Switch" , "PORT1_3_RX" },"LOL Mixer" , "Port1_4 Switch" , "PORT1_4_RX" },"LOL Mixer" , "Port1_5 Switch" , "PORT1_5_RX" },"LOL Mixer" , "Port1_6 Switch" , "PORT1_6_RX" },"LOL Mixer" , "Port1_7 Switch" , "PORT1_7_RX" },"LOL Mixer" , "Port1_8 Switch" , "PORT1_8_RX" },/* Port 2 */ "LOL Mixer" , "Port2_1 Switch" , "PORT2_1_RX" },"LOL Mixer" , "Port2_2 Switch" , "PORT2_2_RX" },"LOL Mixer" , "ADCL Switch" , "ADC Left" },"LOL Mixer" , "ADCR Switch" , "ADC Right" },"LOL Mixer" , "DMIC1L Switch" , "DMIC1 Left" },"LOL Mixer" , "DMIC1R Switch" , "DMIC1 Right" },"LOL Mixer" , "DMIC2L Switch" , "DMIC2 Left" },"LOL Mixer" , "DMIC2R Switch" , "DMIC2 Right" },"LOL Mixer" , "Sidetone Switch" , "Sidetone" },"LOL DAC" , NULL, "LOL Mixer" },"LOR Mixer" , "Port1_1 Switch" , "PORT1_1_RX" },"LOR Mixer" , "Port1_2 Switch" , "PORT1_2_RX" },"LOR Mixer" , "Port1_3 Switch" , "PORT1_3_RX" },"LOR Mixer" , "Port1_4 Switch" , "PORT1_4_RX" },"LOR Mixer" , "Port1_5 Switch" , "PORT1_5_RX" },"LOR Mixer" , "Port1_6 Switch" , "PORT1_6_RX" },"LOR Mixer" , "Port1_7 Switch" , "PORT1_7_RX" },"LOR Mixer" , "Port1_8 Switch" , "PORT1_8_RX" },/* Port 2 */ "LOR Mixer" , "Port2_1 Switch" , "PORT2_1_RX" },"LOR Mixer" , "Port2_2 Switch" , "PORT2_2_RX" },"LOR Mixer" , "ADCL Switch" , "ADC Left" },"LOR Mixer" , "ADCR Switch" , "ADC Right" },"LOR Mixer" , "DMIC1L Switch" , "DMIC1 Left" },"LOR Mixer" , "DMIC1R Switch" , "DMIC1 Right" },"LOR Mixer" , "DMIC2L Switch" , "DMIC2 Left" },"LOR Mixer" , "DMIC2R Switch" , "DMIC2 Right" },"LOR Mixer" , "Sidetone Switch" , "Sidetone" },"LOR DAC" , NULL, "LOR Mixer" },"LOOUTL" , NULL, "LOL DAC" },"LOOUTR" , NULL, "LOR DAC" },/* TX map */ /* Port1 mappings */ "Port1_1 Mixer" , "ADCL Switch" , "ADC Left" },"Port1_1 Mixer" , "ADCR Switch" , "ADC Right" },"Port1_1 Mixer" , "DMIC1L Switch" , "DMIC1 Left" },"Port1_1 Mixer" , "DMIC1R Switch" , "DMIC1 Right" },"Port1_1 Mixer" , "DMIC2L Switch" , "DMIC2 Left" },"Port1_1 Mixer" , "DMIC2R Switch" , "DMIC2 Right" },"Port1_2 Mixer" , "ADCL Switch" , "ADC Left" },"Port1_2 Mixer" , "ADCR Switch" , "ADC Right" },"Port1_2 Mixer" , "DMIC1L Switch" , "DMIC1 Left" },"Port1_2 Mixer" , "DMIC1R Switch" , "DMIC1 Right" },"Port1_2 Mixer" , "DMIC2L Switch" , "DMIC2 Left" },"Port1_2 Mixer" , "DMIC2R Switch" , "DMIC2 Right" },"Port1_3 Mixer" , "ADCL Switch" , "ADC Left" },"Port1_3 Mixer" , "ADCR Switch" , "ADC Right" },"Port1_3 Mixer" , "DMIC1L Switch" , "DMIC1 Left" },"Port1_3 Mixer" , "DMIC1R Switch" , "DMIC1 Right" },"Port1_3 Mixer" , "DMIC2L Switch" , "DMIC2 Left" },"Port1_3 Mixer" , "DMIC2R Switch" , "DMIC2 Right" },"Port1_4 Mixer" , "ADCL Switch" , "ADC Left" },"Port1_4 Mixer" , "ADCR Switch" , "ADC Right" },"Port1_4 Mixer" , "DMIC1L Switch" , "DMIC1 Left" },"Port1_4 Mixer" , "DMIC1R Switch" , "DMIC1 Right" },"Port1_4 Mixer" , "DMIC2L Switch" , "DMIC2 Left" },"Port1_4 Mixer" , "DMIC2R Switch" , "DMIC2 Right" },"Port1_5 Mixer" , "ADCL Switch" , "ADC Left" },"Port1_5 Mixer" , "ADCR Switch" , "ADC Right" },"Port1_5 Mixer" , "DMIC1L Switch" , "DMIC1 Left" },"Port1_5 Mixer" , "DMIC1R Switch" , "DMIC1 Right" },"Port1_5 Mixer" , "DMIC2L Switch" , "DMIC2 Left" },"Port1_5 Mixer" , "DMIC2R Switch" , "DMIC2 Right" },"Port1_6 Mixer" , "ADCL Switch" , "ADC Left" },"Port1_6 Mixer" , "ADCR Switch" , "ADC Right" },"Port1_6 Mixer" , "DMIC1L Switch" , "DMIC1 Left" },"Port1_6 Mixer" , "DMIC1R Switch" , "DMIC1 Right" },"Port1_6 Mixer" , "DMIC2L Switch" , "DMIC2 Left" },"Port1_6 Mixer" , "DMIC2R Switch" , "DMIC2 Right" },"Port1_7 Mixer" , "ADCL Switch" , "ADC Left" },"Port1_7 Mixer" , "ADCR Switch" , "ADC Right" },"Port1_7 Mixer" , "DMIC1L Switch" , "DMIC1 Left" },"Port1_7 Mixer" , "DMIC1R Switch" , "DMIC1 Right" },"Port1_7 Mixer" , "DMIC2L Switch" , "DMIC2 Left" },"Port1_7 Mixer" , "DMIC2R Switch" , "DMIC2 Right" },"Port1_8 Mixer" , "ADCL Switch" , "ADC Left" },"Port1_8 Mixer" , "ADCR Switch" , "ADC Right" },"Port1_8 Mixer" , "DMIC1L Switch" , "DMIC1 Left" },"Port1_8 Mixer" , "DMIC1R Switch" , "DMIC1 Right" },"Port1_8 Mixer" , "DMIC2L Switch" , "DMIC2 Left" },"Port1_8 Mixer" , "DMIC2R Switch" , "DMIC2 Right" },"Port2_1 Mixer" , "ADCL Switch" , "ADC Left" },"Port2_1 Mixer" , "ADCR Switch" , "ADC Right" },"Port2_1 Mixer" , "DMIC1L Switch" , "DMIC1 Left" },"Port2_1 Mixer" , "DMIC1R Switch" , "DMIC1 Right" },"Port2_1 Mixer" , "DMIC2L Switch" , "DMIC2 Left" },"Port2_1 Mixer" , "DMIC2R Switch" , "DMIC2 Right" },"Port2_2 Mixer" , "ADCL Switch" , "ADC Left" },"Port2_2 Mixer" , "ADCR Switch" , "ADC Right" },"Port2_2 Mixer" , "DMIC1L Switch" , "DMIC1 Left" },"Port2_2 Mixer" , "DMIC1R Switch" , "DMIC1 Right" },"Port2_2 Mixer" , "DMIC2L Switch" , "DMIC2 Left" },"Port2_2 Mixer" , "DMIC2R Switch" , "DMIC2 Right" },"P1_1_TX" , NULL, "Port1_1 Mixer" },"P1_2_TX" , NULL, "Port1_2 Mixer" },"P1_3_TX" , NULL, "Port1_3 Mixer" },"P1_4_TX" , NULL, "Port1_4 Mixer" },"P1_5_TX" , NULL, "Port1_5 Mixer" },"P1_6_TX" , NULL, "Port1_6 Mixer" },"P1_7_TX" , NULL, "Port1_7 Mixer" },"P1_8_TX" , NULL, "Port1_8 Mixer" },"P2_1_TX" , NULL, "Port2_1 Mixer" },"P2_2_TX" , NULL, "Port2_2 Mixer" },"PORT1_SDO" , "Port1 Capture Switch" , "P1_1_TX" },"PORT1_SDO" , "Port1 Capture Switch" , "P1_2_TX" },"PORT1_SDO" , "Port1 Capture Switch" , "P1_3_TX" },"PORT1_SDO" , "Port1 Capture Switch" , "P1_4_TX" },"PORT1_SDO" , "Port1 Capture Switch" , "P1_5_TX" },"PORT1_SDO" , "Port1 Capture Switch" , "P1_6_TX" },"PORT1_SDO" , "Port1 Capture Switch" , "P1_7_TX" },"PORT1_SDO" , "Port1 Capture Switch" , "P1_8_TX" },"PORT2_SDO" , "Port2 Capture Switch" , "P2_1_TX" },"PORT2_SDO" , "Port2 Capture Switch" , "P2_2_TX" },"Mic1 Input" , NULL, "AMIC1" },"Mic2 Input" , NULL, "AMIC2" },"AUXL Input" , NULL, "AUXL" },"AUXR Input" , NULL, "AUXR" },/* AUX connections */ "ADCL Mux" , "Aux_L" , "AUXL Input" },"ADCL Mux" , "MIC1" , "Mic1 Input" },"ADCR Mux" , "Aux_R" , "AUXR Input" },"ADCR Mux" , "MIC2" , "Mic2 Input" },/* ADC connection */ "ADC Left" , NULL, "ADCL Mux" },"ADC Right" , NULL, "ADCR Mux" },"DMIC1 Left" , NULL, "DMIC1DAT" },"DMIC1 Right" , NULL, "DMIC1DAT" },"DMIC2 Left" , NULL, "DMIC2DAT" },"DMIC2 Right" , NULL, "DMIC2DAT" },/* Sidetone map */ "Sidetone Mixer" , NULL, "ADC Left" },"Sidetone Mixer" , NULL, "ADC Right" },"Sidetone Mixer" , NULL, "DMIC1 Left" },"Sidetone Mixer" , NULL, "DMIC1 Right" },"Sidetone Mixer" , NULL, "DMIC2 Left" },"Sidetone Mixer" , NULL, "DMIC2 Right" },"Sidetone" , "Sidetone Switch" , "Sidetone Mixer" },static int lm49453_hw_params(struct snd_pcm_substream *substream,struct snd_pcm_hw_params *params,struct snd_soc_dai *dai)struct snd_soc_component *component = dai->component;0 ;/* Setting DAC clock dividers based on substream sample rate. */ switch (params_rate(params)) {case 8000 :case 16000 :case 32000 :case 24000 :case 48000 :256 ;break ;case 11025 :case 22050 :case 44100 :216 ;break ;case 96000 :127 ;break ;default :return -EINVAL;return 0 ;static int lm49453_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)struct snd_soc_component *component = codec_dai->component;int mode = 0 ;int clk_phase = 0 ;int clk_shift = 0 ;switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {case SND_SOC_DAIFMT_CBC_CFC:0 ;break ;case SND_SOC_DAIFMT_CBC_CFP:break ;case SND_SOC_DAIFMT_CBP_CFC:break ;case SND_SOC_DAIFMT_CBP_CFP:break ;default :return -EINVAL;switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {case SND_SOC_DAIFMT_I2S:break ;case SND_SOC_DAIFMT_DSP_A:1 ;1 << 5 );1 ;break ;case SND_SOC_DAIFMT_DSP_B:1 ;1 << 5 );0 ;break ;default :return -EINVAL;0 )|BIT(5 ),return 0 ;static int lm49453_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id,unsigned int freq, int dir)struct snd_soc_component *component = dai->component;0 ;switch (freq) {case 12288000 :case 26000000 :case 19200000 :/* pll clk slection */ 0 ;break ;case 48000 :case 32576 :return 0 ;default :return -EINVAL;4 ), pll_clk);return 0 ;static int lm49453_hp_mute(struct snd_soc_dai *dai, int mute, int direction)1 )|BIT(0 ),1 )|BIT(0 )) : 0 ));return 0 ;static int lm49453_lo_mute(struct snd_soc_dai *dai, int mute, int direction)3 )|BIT(2 ),3 )|BIT(2 )) : 0 ));return 0 ;static int lm49453_ls_mute(struct snd_soc_dai *dai, int mute, int direction)5 )|BIT(4 ),5 )|BIT(4 )) : 0 ));return 0 ;static int lm49453_ep_mute(struct snd_soc_dai *dai, int mute, int direction)4 ),4 ) : 0 ));return 0 ;static int lm49453_ha_mute(struct snd_soc_dai *dai, int mute, int direction)7 )|BIT(6 ),7 )|BIT(6 )) : 0 ));return 0 ;static int lm49453_set_bias_level(struct snd_soc_component *component,enum snd_soc_bias_level level)struct lm49453_priv *lm49453 = snd_soc_component_get_drvdata(component);switch (level) {case SND_SOC_BIAS_ON:case SND_SOC_BIAS_PREPARE:break ;case SND_SOC_BIAS_STANDBY:if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF)break ;case SND_SOC_BIAS_OFF:0 );break ;return 0 ;/* Formates supported by LM49453 driver. */ #define LM49453_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\static const struct snd_soc_dai_ops lm49453_headset_dai_ops = {1 ,static const struct snd_soc_dai_ops lm49453_speaker_dai_ops = {1 ,static const struct snd_soc_dai_ops lm49453_haptic_dai_ops = {1 ,static const struct snd_soc_dai_ops lm49453_ep_dai_ops = {1 ,static const struct snd_soc_dai_ops lm49453_lineout_dai_ops = {1 ,/* LM49453 dai structure. */ static struct snd_soc_dai_driver lm49453_dai[] = {"LM49453 Headset" ,"Headset" ,2 ,2 ,"Capture" ,1 ,5 ,1 ,"LM49453 Speaker" ,"Speaker" ,2 ,2 ,"LM49453 Haptic" ,"Haptic" ,2 ,2 ,"LM49453 Earpiece" ,"Earpiece" ,1 ,1 ,"LM49453 line out" ,"Lineout" ,2 ,2 ,static const struct snd_soc_component_driver soc_component_dev_lm49453 = {1 ,1 ,static const struct regmap_config lm49453_regmap_config = {8 ,8 ,static int lm49453_i2c_probe(struct i2c_client *i2c)struct lm49453_priv *lm49453;int ret = 0 ;sizeof (struct lm49453_priv),if (lm49453 == NULL)return -ENOMEM;if (IS_ERR(lm49453->regmap)) {"Failed to allocate register map: %d\n" ,return ret;if (ret < 0 )"Failed to register component: %d\n" , ret);return ret;static const struct i2c_device_id lm49453_i2c_id[] = {"lm49453" },static struct i2c_driver lm49453_i2c_driver = {"lm49453" ,"ASoC LM49453 driver" );"M R Swami Reddy <MR.Swami.Reddy@ti.com>" );"GPL v2" );
Messung V0.5 in Prozent C=98 H=100 G=98
¤ Dauer der Verarbeitung: 0.27 Sekunden
(vorverarbeitet am 2026-06-07)
¤ *© Formatika GbR, Deutschland
