staticint verify_range(conststruct da9052_regulator_info *info, int min_uV, int max_uV)
{ if (min_uV > info->max_uV || max_uV < info->min_uV) return -EINVAL;
return 0;
}
staticint da9052_dcdc_get_current_limit(struct regulator_dev *rdev)
{ struct da9052_regulator *regulator = rdev_get_drvdata(rdev); int offset = rdev_get_id(rdev); int ret, row = 2;
ret = da9052_reg_read(regulator->da9052, DA9052_BUCKA_REG + offset/2); if (ret < 0) return ret;
/* Determine the even or odd position of the buck current limit * register field
*/ if (offset % 2 == 0)
ret = (ret & DA9052_BUCK_ILIM_MASK_EVEN) >> 2; else
ret = (ret & DA9052_BUCK_ILIM_MASK_ODD) >> 6;
/* Select the appropriate current limit range */ if (regulator->da9052->chip_id == DA9052)
row = 0; elseif (offset == 0)
row = 1;
return da9052_current_limits[row][ret];
}
staticint da9052_dcdc_set_current_limit(struct regulator_dev *rdev, int min_uA, int max_uA)
{ struct da9052_regulator *regulator = rdev_get_drvdata(rdev); int offset = rdev_get_id(rdev); int reg_val = 0; int i, row = 2;
/* Select the appropriate current limit range */ if (regulator->da9052->chip_id == DA9052)
row = 0; elseif (offset == 0)
row = 1;
for (i = DA9052_CURRENT_RANGE - 1; i >= 0; i--) { if ((min_uA <= da9052_current_limits[row][i]) &&
(da9052_current_limits[row][i] <= max_uA)) {
reg_val = i; break;
}
}
if (i < 0) return -EINVAL;
/* Determine the even or odd position of the buck current limit * register field
*/ if (offset % 2 == 0) return da9052_reg_update(regulator->da9052,
DA9052_BUCKA_REG + offset/2,
DA9052_BUCK_ILIM_MASK_EVEN,
reg_val << 2); else return da9052_reg_update(regulator->da9052,
DA9052_BUCKA_REG + offset/2,
DA9052_BUCK_ILIM_MASK_ODD,
reg_val << 6);
}
staticint da9052_list_voltage(struct regulator_dev *rdev, unsignedint selector)
{ struct da9052_regulator *regulator = rdev_get_drvdata(rdev); conststruct da9052_regulator_info *info = regulator->info; int id = rdev_get_id(rdev); int volt_uV;
ret = da9052_list_voltage(rdev, sel); if (ret < 0) return ret;
return sel;
}
staticint da9052_regulator_set_voltage_sel(struct regulator_dev *rdev, unsignedint selector)
{ struct da9052_regulator *regulator = rdev_get_drvdata(rdev); conststruct da9052_regulator_info *info = regulator->info; int id = rdev_get_id(rdev); int ret;
ret = da9052_reg_update(regulator->da9052, rdev->desc->vsel_reg,
rdev->desc->vsel_mask, selector); if (ret < 0) return ret;
/* Some LDOs and DCDCs are DVC controlled which requires enabling of * the activate bit to implment the changes on the output.
*/ switch (id) { case DA9052_ID_BUCK1: case DA9052_ID_BUCK2: case DA9052_ID_BUCK3: case DA9052_ID_LDO2: case DA9052_ID_LDO3:
ret = da9052_reg_update(regulator->da9052, DA9052_SUPPLY_REG,
info->activate_bit, info->activate_bit); break;
}
return ret;
}
staticint da9052_regulator_set_voltage_time_sel(struct regulator_dev *rdev, unsignedint old_sel, unsignedint new_sel)
{ struct da9052_regulator *regulator = rdev_get_drvdata(rdev); conststruct da9052_regulator_info *info = regulator->info; int id = rdev_get_id(rdev); int ret = 0;
/* The DVC controlled LDOs and DCDCs ramp with 6.25mV/µs after enabling * the activate bit.
*/ switch (id) { case DA9052_ID_BUCK1: case DA9052_ID_BUCK2: case DA9052_ID_BUCK3: case DA9052_ID_LDO2: case DA9052_ID_LDO3:
ret = DIV_ROUND_UP(abs(new_sel - old_sel) * info->step_uV,
6250); break;
}
staticinlineconststruct da9052_regulator_info *find_regulator_info(u8 chip_id, int id)
{ conststruct da9052_regulator_info *info; int i;
switch (chip_id) { case DA9052: for (i = 0; i < ARRAY_SIZE(da9052_regulator_info); i++) {
info = &da9052_regulator_info[i]; if (info->reg_desc.id == id) return info;
} break; case DA9053_AA: case DA9053_BA: case DA9053_BB: case DA9053_BC: for (i = 0; i < ARRAY_SIZE(da9053_regulator_info); i++) {
info = &da9053_regulator_info[i]; if (info->reg_desc.id == id) return info;
} break;
}
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