/* Turn on for general debugging---too verbose for normal use */ #undef NCR_700_DEBUG /* Debug the tag queues, checking hash queue allocation and deallocation
* and search for duplicate tags */ #undef NCR_700_TAG_DEBUG
#ifdef NCR_700_DEBUG #define DEBUG(x) printk x #define DDEBUG(prefix, sdev, fmt, a...) \
sdev_printk(prefix, sdev, fmt, ##a) #define CDEBUG(prefix, scmd, fmt, a...) \
scmd_printk(prefix, scmd, fmt, ##a) #else #define DEBUG(x) do {} while (0) #define DDEBUG(prefix, scmd, fmt, a...) do {} while (0) #define CDEBUG(prefix, scmd, fmt, a...) do {} while (0) #endif
/* The number of available command slots */ #define NCR_700_COMMAND_SLOTS_PER_HOST 64 /* The maximum number of Scatter Gathers we allow */ #define NCR_700_SG_SEGMENTS 32 /* The maximum number of luns (make this of the form 2^n) */ #define NCR_700_MAX_LUNS 32 #define NCR_700_LUN_MASK (NCR_700_MAX_LUNS - 1) /* Maximum number of tags the driver ever allows per device */ #define NCR_700_MAX_TAGS 16 /* Tag depth the driver starts out with (can be altered in sysfs) */ #define NCR_700_DEFAULT_TAGS 4 /* This is the default number of commands per LUN in the untagged case. * two is a good value because it means we can have one command active and * one command fully prepared and waiting
*/ #define NCR_700_CMD_PER_LUN 2 /* magic byte identifying an internally generated REQUEST_SENSE command */ #define NCR_700_INTERNAL_SENSE_MAGIC 0x42
struct NCR_700_Host_Parameters;
/* These are the externally used routines */ struct Scsi_Host *NCR_700_detect(struct scsi_host_template *, struct NCR_700_Host_Parameters *, struct device *); int NCR_700_release(struct Scsi_Host *host);
irqreturn_t NCR_700_intr(int, void *);
struct NCR_700_SG_List { /* The following is a script fragment to move the buffer onto the
* bus and then link the next fragment or return */ #define SCRIPT_MOVE_DATA_IN 0x09000000 #define SCRIPT_MOVE_DATA_OUT 0x08000000
__u32 ins;
__u32 pAddr; #define SCRIPT_NOP 0x80000000 #define SCRIPT_RETURN 0x90080000
};
struct NCR_700_Device_Parameters { /* space for creating a request sense command. Really, except * for the annoying SCSI-2 requirement for LUN information in
* cmnd[1], this could be in static storage */ unsignedchar cmnd[MAX_COMMAND_SIZE];
__u8 depth; struct scsi_cmnd *current_cmnd; /* currently active command */
};
/* The SYNC negotiation sequence looks like: * * If DEV_NEGOTIATED_SYNC not set, tack and SDTR message on to the * initial identify for the device and set DEV_BEGIN_SYNC_NEGOTIATION * If we get an SDTR reply, work out the SXFER parameters, squirrel * them away here, clear DEV_BEGIN_SYNC_NEGOTIATION and set * DEV_NEGOTIATED_SYNC. If we get a REJECT msg, squirrel * * * 0:7 SXFER_REG negotiated value for this device * 8:15 Current queue depth * 16 negotiated SYNC flag * 17 begin SYNC negotiation flag
* 18 device supports tag queueing */ #define NCR_700_DEV_NEGOTIATED_SYNC (1<<16) #define NCR_700_DEV_BEGIN_SYNC_NEGOTIATION (1<<17) #define NCR_700_DEV_PRINT_SYNC_NEGOTIATION (1<<19)
struct NCR_700_command_slot { struct NCR_700_SG_List SG[NCR_700_SG_SEGMENTS+1]; struct NCR_700_SG_List *pSG; #define NCR_700_SLOT_MASK 0xFC #define NCR_700_SLOT_MAGIC 0xb8 #define NCR_700_SLOT_FREE (0|NCR_700_SLOT_MAGIC) /* slot may be used */ #define NCR_700_SLOT_BUSY (1|NCR_700_SLOT_MAGIC) /* slot has command active on HA */ #define NCR_700_SLOT_QUEUED (2|NCR_700_SLOT_MAGIC) /* slot has command to be made active on HA */
__u8 state; #define NCR_700_FLAG_AUTOSENSE 0x01
__u8 flags;
__u8 pad1[2]; /* Needed for m68k where min alignment is 2 bytes */ int tag;
__u32 resume_offset; struct scsi_cmnd *cmnd; /* The pci_mapped address of the actual command in cmnd */
dma_addr_t pCmd;
__u32 temp; /* if this command is a pci_single mapping, holds the dma address
* for later unmapping in the done routine */
dma_addr_t dma_handle; /* historical remnant, now used to link free commands */ struct NCR_700_command_slot *ITL_forw;
};
struct NCR_700_Host_Parameters { /* These must be filled in by the calling driver */ int clock; /* board clock speed in MHz */ void __iomem *base; /* the base for the port (copied to host) */ struct device *dev;
__u32 dmode_extra; /* adjustable bus settings */
__u32 dcntl_extra; /* adjustable bus settings */
__u32 ctest7_extra; /* adjustable bus settings */
__u32 differential:1; /* if we are differential */ #ifdef CONFIG_53C700_LE_ON_BE /* This option is for HP only. Set it if your chip is wired for
* little endian on this platform (which is big endian) */
__u32 force_le_on_be:1; #endif
__u32 chip710:1; /* set if really a 710 not 700 */
__u32 burst_length:4; /* set to 0 to disable 710 bursting */
__u32 noncoherent:1; /* needs to use non-coherent DMA */
/* NOTHING BELOW HERE NEEDS ALTERING */
__u32 fast:1; /* if we can alter the SCSI bus clock
speed (so can negiotiate sync) */ int sync_clock; /* The speed of the SYNC core */
__u32 *script; /* pointer to script location */
__u32 pScript; /* physical mem addr of script */
enum NCR_700_Host_State state; /* protected by state lock */ struct scsi_cmnd *cmd; /* Note: pScript contains the single consistent block of * memory. All the msgin, msgout and status are allocated in * this memory too (at separate cache lines). TOTAL_MEM_SIZE
* represents the total size of this area */ #define MSG_ARRAY_SIZE 8 #define MSGOUT_OFFSET (L1_CACHE_ALIGN(sizeof(SCRIPT)))
__u8 *msgout; #define MSGIN_OFFSET (MSGOUT_OFFSET + L1_CACHE_ALIGN(MSG_ARRAY_SIZE))
__u8 *msgin; #define STATUS_OFFSET (MSGIN_OFFSET + L1_CACHE_ALIGN(MSG_ARRAY_SIZE))
__u8 *status; #define SLOTS_OFFSET (STATUS_OFFSET + L1_CACHE_ALIGN(MSG_ARRAY_SIZE)) struct NCR_700_command_slot *slots; #define TOTAL_MEM_SIZE (SLOTS_OFFSET + L1_CACHE_ALIGN(sizeof(struct NCR_700_command_slot) * NCR_700_COMMAND_SLOTS_PER_HOST)) int saved_slot_position; int command_slot_count; /* protected by state lock */
__u8 tag_negotiated;
__u8 rev;
__u8 reselection_id;
__u8 min_period;
/* Free list, singly linked by ITL_forw elements */ struct NCR_700_command_slot *free_list; /* Completion for waited for ops, like reset, abort or * device reset. * * NOTE: relies on single threading in the error handler to
* have only one outstanding at once */ struct completion *eh_complete;
};
/* * 53C700 Register Interface - the offset from the Selected base
* I/O address */ #ifdef CONFIG_53C700_LE_ON_BE #define bE (hostdata->force_le_on_be ? 0 : 3) #define bSWAP (hostdata->force_le_on_be) #define bEBus (!hostdata->force_le_on_be) #elifdefined(__BIG_ENDIAN) #define bE 3 #define bSWAP 0 #elifdefined(__LITTLE_ENDIAN) #define bE 0 #define bSWAP 0 #else #error"__BIG_ENDIAN or __LITTLE_ENDIAN must be defined, did you include byteorder.h?" #endif #ifndef bEBus #ifdef CONFIG_53C700_BE_BUS #define bEBus 1 #else #define bEBus 0 #endif #endif #define bS_to_cpu(x) (bSWAP ? le32_to_cpu(x) : (x)) #define bS_to_host(x) (bSWAP ? cpu_to_le32(x) : (x))
/* Parameters to begin SDTR negotiations. Empirically, I find that
* the 53c700-66 cannot handle an offset >8, so don't change this */ #define NCR_700_MAX_OFFSET 8 /* Was hoping the max offset would be greater for the 710, but
* empirically it seems to be 8 also */ #define NCR_710_MAX_OFFSET 8 #define NCR_700_MIN_XFERP 1 #define NCR_710_MIN_XFERP 0 #define NCR_700_MIN_PERIOD 25 /* for SDTR message, 100ns */
#define script_patch_32(h, script, symbol, value) \
{ \ int i; \
dma_addr_t da = value; \ for(i=0; i< (sizeof(A_##symbol##_used) / sizeof(__u32)); i++) { \
__u32 val = bS_to_cpu((script)[A_##symbol##_used[i]]) + da; \
(script)[A_##symbol##_used[i]] = bS_to_host(val); \
dma_sync_to_dev((h), &(script)[A_##symbol##_used[i]], 4); \
DEBUG((" script, patching %s at %d to %pad\n", \ #symbol, A_##symbol##_used[i], &da)); \
} \
}
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