/* SPDX-License-Identifier: GPL-2.0+ */
/*
* pv88080-regulator.h - Regulator definitions for PV88080
* Copyright (C) 2016 Powerventure Semiconductor Ltd.
*/
#ifndef __PV88080_REGISTERS_H__
#define __PV88080_REGISTERS_H__
/* System Control and Event Registers */
#define PV88080_REG_EVENT_A 0 x04
#define PV88080_REG_MASK_A 0 x09
#define PV88080_REG_MASK_B 0 x0A
#define PV88080_REG_MASK_C 0 x0B
/* Regulator Registers - rev. AA */
#define PV88080AA_REG_HVBUCK_CONF1 0 x2D
#define PV88080AA_REG_HVBUCK_CONF2 0 x2E
#define PV88080AA_REG_BUCK1_CONF0 0 x27
#define PV88080AA_REG_BUCK1_CONF1 0 x28
#define PV88080AA_REG_BUCK1_CONF2 0 x59
#define PV88080AA_REG_BUCK1_CONF5 0 x5C
#define PV88080AA_REG_BUCK2_CONF0 0 x29
#define PV88080AA_REG_BUCK2_CONF1 0 x2A
#define PV88080AA_REG_BUCK2_CONF2 0 x61
#define PV88080AA_REG_BUCK2_CONF5 0 x64
#define PV88080AA_REG_BUCK3_CONF0 0 x2B
#define PV88080AA_REG_BUCK3_CONF1 0 x2C
#define PV88080AA_REG_BUCK3_CONF2 0 x69
#define PV88080AA_REG_BUCK3_CONF5 0 x6C
/* Regulator Registers - rev. BA */
#define PV88080BA_REG_HVBUCK_CONF1 0 x33
#define PV88080BA_REG_HVBUCK_CONF2 0 x34
#define PV88080BA_REG_BUCK1_CONF0 0 x2A
#define PV88080BA_REG_BUCK1_CONF1 0 x2C
#define PV88080BA_REG_BUCK1_CONF2 0 x5A
#define PV88080BA_REG_BUCK1_CONF5 0 x5D
#define PV88080BA_REG_BUCK2_CONF0 0 x2D
#define PV88080BA_REG_BUCK2_CONF1 0 x2F
#define PV88080BA_REG_BUCK2_CONF2 0 x63
#define PV88080BA_REG_BUCK2_CONF5 0 x66
#define PV88080BA_REG_BUCK3_CONF0 0 x30
#define PV88080BA_REG_BUCK3_CONF1 0 x32
#define PV88080BA_REG_BUCK3_CONF2 0 x6C
#define PV88080BA_REG_BUCK3_CONF5 0 x6F
/* PV88080_REG_EVENT_A (addr=0x04) */
#define PV88080_E_VDD_FLT 0 x01
#define PV88080_E_OVER_TEMP 0 x02
/* PV88080_REG_MASK_A (addr=0x09) */
#define PV88080_M_VDD_FLT 0 x01
#define PV88080_M_OVER_TEMP 0 x02
/* PV88080_REG_BUCK1_CONF0 (addr=0x27|0x2A) */
#define PV88080_BUCK1_EN 0 x80
#define PV88080_VBUCK1_MASK 0 x7F
/* PV88080_REG_BUCK2_CONF0 (addr=0x29|0x2D) */
#define PV88080_BUCK2_EN 0 x80
#define PV88080_VBUCK2_MASK 0 x7F
/* PV88080_REG_BUCK3_CONF0 (addr=0x2B|0x30) */
#define PV88080_BUCK3_EN 0 x80
#define PV88080_VBUCK3_MASK 0 x7F
/* PV88080_REG_BUCK1_CONF1 (addr=0x28|0x2C) */
#define PV88080_BUCK1_ILIM_SHIFT 2
#define PV88080_BUCK1_ILIM_MASK 0 x0C
#define PV88080_BUCK1_MODE_MASK 0 x03
/* PV88080_REG_BUCK2_CONF1 (addr=0x2A|0x2F) */
#define PV88080_BUCK2_ILIM_SHIFT 2
#define PV88080_BUCK2_ILIM_MASK 0 x0C
#define PV88080_BUCK2_MODE_MASK 0 x03
/* PV88080_REG_BUCK3_CONF1 (addr=0x2C|0x32) */
#define PV88080_BUCK3_ILIM_SHIFT 2
#define PV88080_BUCK3_ILIM_MASK 0 x0C
#define PV88080_BUCK3_MODE_MASK 0 x03
#define PV88080_BUCK_MODE_SLEEP 0 x00
#define PV88080_BUCK_MODE_AUTO 0 x01
#define PV88080_BUCK_MODE_SYNC 0 x02
/* PV88080_REG_HVBUCK_CONF1 (addr=0x2D|0x33) */
#define PV88080_VHVBUCK_MASK 0 xFF
/* PV88080_REG_HVBUCK_CONF1 (addr=0x2E|0x34) */
#define PV88080_HVBUCK_EN 0 x01
/* PV88080_REG_BUCK2_CONF2 (addr=0x61|0x63) */
/* PV88080_REG_BUCK3_CONF2 (addr=0x69|0x6C) */
#define PV88080_BUCK_VDAC_RANGE_SHIFT 7
#define PV88080_BUCK_VDAC_RANGE_MASK 0 x01
#define PV88080_BUCK_VDAC_RANGE_1 0 x00
#define PV88080_BUCK_VDAC_RANGE_2 0 x01
/* PV88080_REG_BUCK2_CONF5 (addr=0x64|0x66) */
/* PV88080_REG_BUCK3_CONF5 (addr=0x6C|0x6F) */
#define PV88080_BUCK_VRANGE_GAIN_SHIFT 0
#define PV88080_BUCK_VRANGE_GAIN_MASK 0 x01
#define PV88080_BUCK_VRANGE_GAIN_1 0 x00
#define PV88080_BUCK_VRANGE_GAIN_2 0 x01
#endif /* __PV88080_REGISTERS_H__ */
Messung V0.5 in Prozent C=95 H=93 G=93
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(vorverarbeitet am 2026-06-07)
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