// SPDX-License-Identifier: GPL-2.0-or-later /* * Realtek DHC 1315E pin controller driver * * Copyright (c) 2023 Realtek Semiconductor Corp. * #include <linux/module.h>#include <linux/of.h>#include <linux/platform_device.h>#include <linux/pinctrl/pinctrl.h>#include "pinctrl-rtd.h" enum rtd13xxe_iso_pins {0 ,static const struct pinctrl_pin_desc rtd1315e_iso_pins[] = {"gpio_0" ),"gpio_1" ),"emmc_rst_n" ),"emmc_dd_sb" ),"emmc_clk" ),"emmc_cmd" ),"gpio_6" ),"gpio_7" ),"gpio_8" ),"gpio_9" ),"gpio_10" ),"gpio_11" ),"gpio_12" ),"gpio_13" ),"gpio_14" ),"gpio_15" ),"gpio_16" ),"gpio_17" ),"gpio_18" ),"gpio_19" ),"gpio_20" ),"emmc_data_0" ),"emmc_data_1" ),"emmc_data_2" ),"usb_cc2" ),"gpio_25" ),"gpio_26" ),"gpio_27" ),"gpio_28" ),"gpio_29" ),"gpio_30" ),"gpio_31" ),"gpio_32" ),"gpio_33" ),"gpio_34" ),"gpio_35" ),"hif_data" ),"hif_en" ),"hif_rdy" ),"hif_clk" ),"gpio_dummy_40" ),"gpio_dummy_41" ),"gpio_dummy_42" ),"gpio_dummy_43" ),"gpio_dummy_44" ),"gpio_dummy_45" ),"gpio_46" ),"gpio_47" ),"gpio_48" ),"gpio_49" ),"gpio_50" ),"usb_cc1" ),"emmc_data_3" ),"emmc_data_4" ),"ir_rx" ),"ur0_rx" ),"ur0_tx" ),"gpio_57" ),"gpio_58" ),"gpio_59" ),"gpio_60" ),"gpio_61" ),"gpio_62" ),"gpio_dummy_63" ),"gpio_dummy_64" ),"gpio_dummy_65" ),"gpio_66" ),"gpio_67" ),"gpio_68" ),"gpio_69" ),"gpio_70" ),"gpio_71" ),"gpio_72" ),"gpio_dummy_73" ),"emmc_data_5" ),"emmc_data_6" ),"emmc_data_7" ),"gpio_dummy_77" ),"gpio_78" ),"gpio_79" ),"gpio_80" ),"gpio_81" ),"ur2_loc" ),"gspi_loc" ),"hi_width" ),"sf_en" ),"arm_trace_dbg_en" ),"ejtag_aucpu_loc" ),"ejtag_acpu_loc" ),"ejtag_vcpu_loc" ),"ejtag_scpu_loc" ),"dmic_loc" ),"vtc_dmic_loc" ),"vtc_tdm_loc" ),"vtc_i2si_loc" ),"tdm_ai_loc" ),"ai_loc" ),"spdif_loc" ),"hif_en_loc" ),"scan_switch" ),"wd_rset" ),"boot_sel" ),"reset_n" ),"testmode" ),/* Tagged as __maybe_unused since there are pins we may use in the future */ #define DECLARE_RTD1315E_PIN(_pin, _name) \static const unsigned int rtd1315e_## _name ## _pins[] __maybe_unused = { _pin }#define RTD1315E_GROUP(_name) \# _name, \## _name ## _pins, \## _name ## _pins), \static const struct rtd_pin_group_desc rtd1315e_pin_groups[] = {static const char * const rtd1315e_gpio_groups[] = {"gpio_0" , "gpio_1" , "emmc_rst_n" , "emmc_dd_sb" , "emmc_clk" ,"emmc_cmd" , "gpio_6" , "gpio_7" , "gpio_8" , "gpio_9" ,"gpio_10" , "gpio_11" , "gpio_12" , "gpio_13" , "gpio_14" ,"gpio_15" , "gpio_16" , "gpio_17" , "gpio_18" , "gpio_19" ,"gpio_20" , "emmc_data_0" , "emmc_data_1" , "emmc_data_2" , "usb_cc2" ,"gpio_25" , "gpio_26" , "gpio_27" , "gpio_28" , "gpio_29" ,"gpio_30" , "gpio_31" , "gpio_32" , "gpio_33" , "gpio_34" ,"gpio_35" , "hif_data" , "hif_en" , "hif_rdy" , "hif_clk" ,"gpio_46" , "gpio_47" , "gpio_48" , "gpio_49" ,"gpio_50" , "usb_cc1" , "emmc_data_3" , "emmc_data_4" , "ir_rx" ,"ur0_rx" , "ur0_tx" , "gpio_57" , "gpio_58" , "gpio_59" ,"gpio_60" , "gpio_61" , "gpio_62" , "gpio_66" , "gpio_67" ,"gpio_68" , "gpio_69" , "gpio_70" , "gpio_71" , "gpio_72" ,"emmc_data_5" , "emmc_data_6" , "emmc_data_7" ,"gpio_78" , "gpio_79" , "gpio_80" , "gpio_81" };static const char * const rtd1315e_nf_groups[] = {"emmc_rst_n" , "emmc_clk" , "emmc_cmd" , "emmc_data_0" ,"emmc_data_1" , "emmc_data_2" , "emmc_data_3" , "emmc_data_4" ,"emmc_data_5" , "emmc_data_6" , "emmc_data_7" ,"gpio_78" , "gpio_79" , "gpio_80" , "gpio_81" };static const char * const rtd1315e_emmc_groups[] = {"emmc_rst_n" , "emmc_dd_sb" , "emmc_clk" , "emmc_cmd" ,"emmc_data_0" , "emmc_data_1" , "emmc_data_2" , "emmc_data_3" ,"emmc_data_4" , "emmc_data_5" , "emmc_data_6" , "emmc_data_7" };static const char * const rtd1315e_ao_groups[] = {"gpio_66" , "gpio_67" , "gpio_68" , "gpio_69" , "gpio_70" ,"gpio_71" , "gpio_72" };static const char * const rtd1315e_gspi_loc0_groups[] = {"gpio_18" , "gpio_19" , "gpio_20" , "gpio_31" , "gspi_loc" };static const char * const rtd1315e_gspi_loc1_groups[] = {"gpio_8" , "gpio_9" , "gpio_10" , "gpio_11" , "gspi_loc" };static const char * const rtd1315e_uart0_groups[] = { "ur0_rx" , "ur0_tx" };static const char * const rtd1315e_uart1_groups[] = {"gpio_8" , "gpio_9" , "gpio_10" , "gpio_11" };static const char * const rtd1315e_uart2_loc0_groups[] = {"gpio_18" , "gpio_19" , "gpio_20" , "gpio_31" , "ur2_loc" };static const char * const rtd1315e_uart2_loc1_groups[] = {"gpio_25" , "gpio_26" , "gpio_27" , "gpio_28" , "ur2_loc" };static const char * const rtd1315e_i2c0_groups[] = { "gpio_12" , "gpio_13" };static const char * const rtd1315e_i2c1_groups[] = { "gpio_16" , "gpio_17" };static const char * const rtd1315e_i2c4_groups[] = { "gpio_34" , "gpio_35" };static const char * const rtd1315e_i2c5_groups[] = { "gpio_29" , "gpio_46" };static const char * const rtd1315e_pcie1_groups[] = { "gpio_25" };static const char * const rtd1315e_etn_led_groups[] = { "gpio_14" , "gpio_15" };static const char * const rtd1315e_etn_phy_groups[] = { "gpio_14" , "gpio_15" };static const char * const rtd1315e_spi_groups[] = {"gpio_78" , "gpio_79" , "gpio_80" , "gpio_81" };static const char * const rtd1315e_pwm0_loc0_groups[] = { "gpio_26" };static const char * const rtd1315e_pwm0_loc1_groups[] = { "gpio_20" };static const char * const rtd1315e_pwm1_loc0_groups[] = { "gpio_27" };static const char * const rtd1315e_pwm1_loc1_groups[] = { "gpio_29" };static const char * const rtd1315e_pwm2_loc0_groups[] = { "gpio_28" };static const char * const rtd1315e_pwm2_loc1_groups[] = { "gpio_30" };static const char * const rtd1315e_pwm3_loc0_groups[] = { "gpio_47" };static const char * const rtd1315e_pwm3_loc1_groups[] = { "gpio_31" };static const char * const rtd1315e_spdif_optical_loc0_groups[] = { "gpio_20" , "spdif_loc" };static const char * const rtd1315e_spdif_optical_loc1_groups[] = { "gpio_6" , "spdif_loc" };static const char * const rtd1315e_usb_cc1_groups[] = { "usb_cc1" };static const char * const rtd1315e_usb_cc2_groups[] = { "usb_cc2" };static const char * const rtd1315e_sd_groups[] = {"gpio_32" , "gpio_33" , "gpio_34" , "gpio_35" ,"hif_data" , "hif_en" , "hif_rdy" , "hif_clk" };static const char * const rtd1315e_dmic_loc0_groups[] = {"gpio_57" , "gpio_58" , "gpio_59" , "gpio_60" , "gpio_61" ,"gpio_62" , "gpio_1" , "gpio_6" , "dmic_loc" };static const char * const rtd1315e_dmic_loc1_groups[] = {"gpio_32" , "gpio_33" , "gpio_34" , "gpio_35" ,"hif_data" , "hif_en" , "hif_rdy" , "hif_clk" ,"dmic_loc" };static const char * const rtd1315e_ai_loc0_groups[] = {"gpio_57" , "gpio_58" , "gpio_59" , "gpio_60" , "gpio_61" ,"gpio_62" , "gpio_1" , "ai_loc" };static const char * const rtd1315e_ai_loc1_groups[] = {"gpio_32" , "gpio_33" , "gpio_34" , "hif_data" ,"hif_en" , "hif_rdy" , "hif_clk" , "ai_loc" };static const char * const rtd1315e_tdm_ai_loc0_groups[] = {"gpio_57" , "gpio_58" , "gpio_59" ,"gpio_60" , "tdm_ai_loc" };static const char * const rtd1315e_tdm_ai_loc1_groups[] = {"hif_data" , "hif_en" , "hif_rdy" , "hif_clk" , "tdm_ai_loc" };static const char * const rtd1315e_hi_loc0_groups[] = {"hif_data" , "hif_en" , "hif_rdy" , "hif_clk" };static const char * const rtd1315e_hi_m_groups[] = {"hif_data" , "hif_en" , "hif_rdy" , "hif_clk" };static const char * const rtd1315e_vtc_i2so_groups[] = {"gpio_67" , "gpio_68" , "gpio_69" , "gpio_70" };static const char * const rtd1315e_vtc_i2si_loc0_groups[] = {"gpio_57" , "gpio_58" , "gpio_59" , "gpio_60" , "gpio_61" ,"vtc_i2si_loc" };static const char * const rtd1315e_vtc_i2si_loc1_groups[] = {"gpio_32" , "hif_data" , "hif_en" , "hif_rdy" , "hif_clk" ,"vtc_i2si_loc" };static const char * const rtd1315e_vtc_dmic_loc0_groups[] = {"gpio_57" , "gpio_58" , "gpio_59" , "gpio_60" ,"vtc_dmic_loc" };static const char * const rtd1315e_vtc_dmic_loc1_groups[] = {"hif_data" , "hif_en" , "hif_rdy" , "hif_clk" ,"vtc_dmic_loc" };static const char * const rtd1315e_vtc_tdm_loc0_groups[] = {"gpio_57" , "gpio_58" , "gpio_59" , "gpio_60" ,"vtc_tdm_loc" };static const char * const rtd1315e_vtc_tdm_loc1_groups[] = {"hif_data" , "hif_en" , "hif_rdy" , "hif_clk" ,"vtc_tdm_loc" };static const char * const rtd1315e_dc_fan_groups[] = { "gpio_47" };static const char * const rtd1315e_pll_test_loc0_groups[] = { "gpio_0" , "gpio_1" };static const char * const rtd1315e_pll_test_loc1_groups[] = { "gpio_48" , "gpio_49" };static const char * const rtd1315e_spdif_groups[] = { "gpio_50" };static const char * const rtd1315e_ir_rx_groups[] = { "ir_rx" };static const char * const rtd1315e_uart2_disable_groups[] = { "ur2_loc" };static const char * const rtd1315e_gspi_disable_groups[] = { "gspi_loc" };static const char * const rtd1315e_hi_width_disable_groups[] = { "hi_width" };static const char * const rtd1315e_hi_width_1bit_groups[] = { "hi_width" };static const char * const rtd1315e_sf_disable_groups[] = { "sf_en" };static const char * const rtd1315e_sf_enable_groups[] = { "sf_en" };static const char * const rtd1315e_scpu_ejtag_loc0_groups[] = {"gpio_68" , "gpio_69" , "gpio_70" , "gpio_71" , "gpio_72" ,"ejtag_scpu_loc" };static const char * const rtd1315e_scpu_ejtag_loc1_groups[] = {"gpio_32" , "gpio_33" , "hif_data" , "hif_en" , "hif_clk" ,"ejtag_scpu_loc" };static const char * const rtd1315e_scpu_ejtag_loc2_groups[] = {"gpio_57" , "gpio_58" , "gpio_59" , "gpio_60" , "gpio_61" ,"ejtag_scpu_loc" };static const char * const rtd1315e_scpu_ejtag_loc3_groups[] = {"hif_data" };static const char * const rtd1315e_acpu_ejtag_loc0_groups[] = {"gpio_68" , "gpio_69" , "gpio_70" , "gpio_71" , "gpio_72" ,"ejtag_acpu_loc" };static const char * const rtd1315e_acpu_ejtag_loc1_groups[] = {"gpio_32" , "gpio_33" , "hif_data" , "hif_en" , "hif_clk" ,"ejtag_acpu_loc" };static const char * const rtd1315e_acpu_ejtag_loc2_groups[] = {"gpio_57" , "gpio_58" , "gpio_59" , "gpio_60" , "gpio_61" ,"ejtag_acpu_loc" };static const char * const rtd1315e_vcpu_ejtag_loc0_groups[] = {"gpio_68" , "gpio_69" , "gpio_70" , "gpio_71" , "gpio_72" ,"ejtag_vcpu_loc" };static const char * const rtd1315e_vcpu_ejtag_loc1_groups[] = {"gpio_32" , "gpio_33" , "hif_data" , "hif_en" , "hif_clk" ,"ejtag_vcpu_loc" };static const char * const rtd1315e_vcpu_ejtag_loc2_groups[] = {"gpio_57" , "gpio_58" , "gpio_59" , "gpio_60" , "gpio_61" ,"ejtag_vcpu_loc" };static const char * const rtd1315e_aucpu_ejtag_loc0_groups[] = {"gpio_68" , "gpio_69" , "gpio_70" , "gpio_71" , "gpio_72" ,"ejtag_aucpu_loc" };static const char * const rtd1315e_aucpu_ejtag_loc1_groups[] = {"gpio_32" , "gpio_33" , "hif_data" , "hif_en" , "hif_clk" ,"ejtag_aucpu_loc" };static const char * const rtd1315e_aucpu_ejtag_loc2_groups[] = {"gpio_57" , "gpio_58" , "gpio_59" , "gpio_60" , "gpio_61" ,"ejtag_aucpu_loc" };static const char * const rtd1315e_gpu_ejtag_groups[] = {"gpio_68" , "gpio_69" , "gpio_70" , "gpio_71" , "gpio_72" };static const char * const rtd1315e_iso_tristate_groups[] = {"emmc_rst_n" , "emmc_dd_sb" , "emmc_clk" , "emmc_cmd" ,"emmc_data_0" , "emmc_data_1" , "emmc_data_2" , "emmc_data_3" ,"emmc_data_4" , "emmc_data_5" , "emmc_data_6" , "emmc_data_7" ,"gpio_1" , "gpio_7" , "gpio_8" , "gpio_9" , "gpio_10" ,"gpio_11" , "usb_cc2" , "gpio_32" , "gpio_33" , "hif_data" ,"hif_en" , "hif_rdy" , "hif_clk" , "ir_rx" , "ur0_rx" ,"ur0_tx" , "gpio_66" , "gpio_67" , "gpio_68" , "gpio_69" , "gpio_70" ,"gpio_71" , "gpio_72" , "gpio_78" , "gpio_79" , "gpio_80" , "gpio_81" };static const char * const rtd1315e_dbg_out0_groups[] = {"gpio_0" , "gpio_12" , "gpio_13" , "gpio_16" , "gpio_17" , "gpio_26" ,"gpio_27" , "gpio_28" , "gpio_29" , "gpio_30" , "gpio_34" , "gpio_35" ,"gpio_46" , "gpio_48" , "gpio_49" , "usb_cc1" , "gpio_57" , "gpio_58" , "gpio_59" , "gpio_60" };static const char * const rtd1315e_dbg_out1_groups[] = {"gpio_6" , "gpio_14" , "gpio_15" , "gpio_18" , "gpio_19" , "gpio_20" ,"gpio_25" , "gpio_31" , "gpio_47" , "gpio_50" , "gpio_59" , "gpio_61" ,"gpio_62" };static const char * const rtd1315e_standby_dbg_groups[] = {"gpio_1" , "gpio_6" , "ir_rx" };static const char * const rtd1315e_arm_trace_debug_disable_groups[] = { "arm_trace_dbg_en" };static const char * const rtd1315e_arm_trace_debug_enable_groups[] = { "arm_trace_dbg_en" };static const char * const rtd1315e_aucpu_ejtag_disable_groups[] = { "ejtag_aucpu_loc" };static const char * const rtd1315e_acpu_ejtag_disable_groups[] = { "ejtag_acpu_loc" };static const char * const rtd1315e_vcpu_ejtag_disable_groups[] = { "ejtag_vcpu_loc" };static const char * const rtd1315e_scpu_ejtag_disable_groups[] = { "ejtag_scpu_loc" };static const char * const rtd1315e_vtc_dmic_loc_disable_groups[] = { "vtc_dmic_loc" };static const char * const rtd1315e_vtc_tdm_disable_groups[] = { "vtc_tdm_loc" };static const char * const rtd1315e_vtc_i2si_disable_groups[] = { "vtc_i2si_loc" };static const char * const rtd1315e_tdm_ai_disable_groups[] = { "tdm_ai_loc" };static const char * const rtd1315e_ai_disable_groups[] = { "ai_loc" };static const char * const rtd1315e_spdif_disable_groups[] = { "spdif_loc" };static const char * const rtd1315e_hif_disable_groups[] = { "hif_en_loc" };static const char * const rtd1315e_hif_enable_groups[] = { "hif_en_loc" };static const char * const rtd1315e_test_loop_groups[] = { "gpio_50" };static const char * const rtd1315e_pmic_pwrup_groups[] = { "gpio_78" };#define RTD1315E_FUNC(_name) \# _name, \## _name ## _groups, \## _name ## _groups), \static const struct rtd_pin_func_desc rtd1315e_pin_functions[] = {#undef RTD1315E_FUNCstatic const struct rtd_pin_desc rtd1315e_iso_muxes[ARRAY_SIZE(rtd1315e_iso_pins)] = {0 x0, GENMASK(3 , 0 ),0 x0, 0 ), "gpio" ),0 x1, 0 ), "nf" ),0 x2, 0 ), "emmc" ),0 xf, 0 ), "iso_tristate" )),0 x0, GENMASK(7 , 4 ),0 x0, 4 ), "gpio" ),0 x2, 4 ), "emmc" ),0 xf, 4 ), "iso_tristate" )),0 x0, GENMASK(11 , 8 ),0 x0, 8 ), "gpio" ),0 x1, 8 ), "nf" ),0 x2, 8 ), "emmc" ),0 xf, 8 ), "iso_tristate" )),0 x0, GENMASK(15 , 12 ),0 x0, 12 ), "gpio" ),0 x1, 12 ), "nf" ),0 x2, 12 ), "emmc" ),0 xf, 12 ), "iso_tristate" )),0 x0, GENMASK(19 , 16 ),0 x0, 16 ), "gpio" ),0 x1, 16 ), "nf" ),0 x2, 16 ), "emmc" ),0 xf, 16 ), "iso_tristate" )),0 x0, GENMASK(23 , 20 ),0 x0, 20 ), "gpio" ),0 x1, 20 ), "nf" ),0 x2, 20 ), "emmc" ),0 xf, 20 ), "iso_tristate" )),0 x0, GENMASK(27 , 24 ),0 x0, 24 ), "gpio" ),0 x1, 24 ), "nf" ),0 x2, 24 ), "emmc" ),0 xf, 24 ), "iso_tristate" )),0 x0, GENMASK(31 , 28 ),0 x0, 28 ), "gpio" ),0 x1, 28 ), "nf" ),0 x2, 28 ), "emmc" ),0 xf, 28 ), "iso_tristate" )),0 x4, GENMASK(3 , 0 ),0 x0, 0 ), "gpio" ),0 x1, 0 ), "nf" ),0 x2, 0 ), "emmc" ),0 xf, 0 ), "iso_tristate" )),0 x4, GENMASK(7 , 4 ),0 x0, 4 ), "gpio" ),0 x1, 4 ), "nf" ),0 x2, 4 ), "emmc" ),0 xf, 4 ), "iso_tristate" )),0 x4, GENMASK(11 , 8 ),0 x0, 8 ), "gpio" ),0 x1, 8 ), "nf" ),0 x2, 8 ), "emmc" ),0 xf, 8 ), "iso_tristate" )),0 x4, GENMASK(15 , 12 ),0 x0, 12 ), "gpio" ),0 x1, 12 ), "nf" ),0 x2, 12 ), "emmc" ),0 xf, 12 ), "iso_tristate" )),0 x4, GENMASK(19 , 16 ),0 x0, 16 ), "gpio" ),0 x2, 16 ), "pll_test_loc0" ),0 xf, 16 ), "dbg_out0" )),0 x4, GENMASK(23 , 20 ),0 x0, 20 ), "gpio" ),0 x1, 20 ), "standby_dbg" ),0 x2, 20 ), "pll_test_loc0" ),0 x3, 20 ), "dmic_loc0" ),0 x4, 20 ), "ai_loc0" ),0 xf, 20 ), "iso_tristate" )),0 x4, GENMASK(27 , 24 ),0 x0, 24 ), "gpio" ),0 x1, 24 ), "standby_dbg" ),0 x3, 24 ), "dmic_loc0" ),0 x4, 24 ), "spdif_optical_loc1" ),0 xf, 24 ), "dbg_out1" )),0 x4, GENMASK(31 , 28 ),0 x0, 28 ), "gpio" ),0 xf, 28 ), "iso_tristate" )),0 x8, GENMASK(3 , 0 ),0 x0, 0 ), "gpio" ),0 x1, 0 ), "uart1" ),0 x3, 0 ), "gspi_loc1" ),0 xf, 0 ), "iso_tristate" )),0 x8, GENMASK(7 , 4 ),0 x0, 4 ), "gpio" ),0 x1, 4 ), "uart1" ),0 x3, 4 ), "gspi_loc1" ),0 xf, 4 ), "iso_tristate" )),0 x8, GENMASK(11 , 8 ),0 x0, 8 ), "gpio" ),0 x1, 8 ), "uart1" ),0 x3, 8 ), "gspi_loc1" ),0 xf, 8 ), "iso_tristate" )),0 x8, GENMASK(15 , 12 ),0 x0, 12 ), "gpio" ),0 x1, 12 ), "uart1" ),0 x3, 12 ), "gspi_loc1" ),0 xf, 12 ), "iso_tristate" )),0 x8, GENMASK(19 , 16 ),0 x0, 16 ), "gpio" ),0 x1, 16 ), "i2c0" ),0 xf, 16 ), "dbg_out0" )),0 x8, GENMASK(23 , 20 ),0 x0, 20 ), "gpio" ),0 x1, 20 ), "i2c0" ),0 xf, 20 ), "dbg_out0" )),0 x8, GENMASK(27 , 24 ),0 x0, 24 ), "gpio" ),0 x1, 24 ), "etn_led" ),0 x3, 24 ), "etn_phy" ),0 xf, 24 ), "dbg_out1" )),0 x8, GENMASK(31 , 28 ),0 x0, 28 ), "gpio" ),0 x1, 28 ), "etn_led" ),0 x3, 28 ), "etn_phy" ),0 xf, 28 ), "dbg_out1" )),0 xc, GENMASK(3 , 0 ),0 x0, 0 ), "gpio" ),0 x1, 0 ), "i2c1" ),0 xf, 0 ), "dbg_out0" )),0 xc, GENMASK(7 , 4 ),0 x0, 4 ), "gpio" ),0 x1, 4 ), "i2c1" ),0 xf, 4 ), "dbg_out0" )),0 xc, GENMASK(11 , 8 ),0 x0, 8 ), "gpio" ),0 x1, 8 ), "uart2_loc0" ),0 x3, 8 ), "gspi_loc0" ),0 xf, 8 ), "dbg_out1" )),0 xc, GENMASK(15 , 12 ),0 x0, 12 ), "gpio" ),0 x1, 12 ), "uart2_loc0" ),0 x3, 12 ), "gspi_loc0" ),0 xf, 12 ), "dbg_out1" )),0 xc, GENMASK(19 , 16 ),0 x0, 16 ), "gpio" ),0 x1, 16 ), "uart2_loc0" ),0 x2, 16 ), "pwm0_loc1" ),0 x3, 16 ), "gspi_loc0" ),0 x6, 16 ), "spdif_optical_loc0" ),0 xf, 16 ), "dbg_out1" )),0 xc, GENMASK(23 , 20 ),0 x0, 20 ), "gpio" ),0 x1, 20 ), "usb_cc2" ),0 xf, 20 ), "iso_tristate" )),0 xc, GENMASK(27 , 24 ),0 x0, 24 ), "gpio" ),0 x1, 24 ), "uart2_loc1" ),0 x4, 24 ), "pcie1" ),0 xf, 24 ), "dbg_out1" )),0 xc, GENMASK(31 , 28 ),0 x0, 28 ), "gpio" ),0 x1, 28 ), "uart2_loc1" ),0 x3, 28 ), "pwm0_loc0" ),0 xf, 28 ), "dbg_out0" )),0 x10, GENMASK(3 , 0 ),0 x0, 0 ), "gpio" ),0 x1, 0 ), "uart2_loc1" ),0 x3, 0 ), "pwm1_loc0" ),0 xf, 0 ), "dbg_out0" )),0 x10, GENMASK(7 , 4 ),0 x0, 4 ), "gpio" ),0 x1, 4 ), "uart2_loc1" ),0 x3, 4 ), "pwm2_loc0" ),0 xf, 4 ), "dbg_out0" )),0 x10, GENMASK(11 , 8 ),0 x0, 8 ), "gpio" ),0 x1, 8 ), "i2c5" ),0 x2, 8 ), "pwm1_loc1" ),0 xf, 8 ), "dbg_out0" )),0 x10, GENMASK(15 , 12 ),0 x0, 12 ), "gpio" ),0 x2, 12 ), "pwm2_loc1" ),0 xf, 12 ), "dbg_out0" )),0 x10, GENMASK(19 , 16 ),0 x0, 16 ), "gpio" ),0 x1, 16 ), "uart2_loc0" ),0 x2, 16 ), "pwm3_loc1" ),0 x3, 16 ), "gspi_loc0" ),0 xf, 16 ), "dbg_out1" )),0 x10, GENMASK(23 , 20 ),0 x0, 20 ), "gpio" ),0 x1, 20 ), "sd" ),0 x2, 20 ), "aucpu_ejtag_loc1" ),0 x3, 20 ), "dmic_loc1" ),0 x5, 20 ), "scpu_ejtag_loc1" ),0 x6, 20 ), "acpu_ejtag_loc1" ),0 x7, 20 ), "vcpu_ejtag_loc1" ),0 x8, 20 ), "ai_loc1" ),0 xb, 20 ), "vtc_i2si_loc1" ),0 xf, 20 ), "iso_tristate" )),0 x10, GENMASK(27 , 24 ),0 x0, 24 ), "gpio" ),0 x1, 24 ), "sd" ),0 x2, 24 ), "aucpu_ejtag_loc1" ),0 x3, 24 ), "dmic_loc1" ),0 x5, 24 ), "scpu_ejtag_loc1" ),0 x6, 24 ), "acpu_ejtag_loc1" ),0 x7, 24 ), "vcpu_ejtag_loc1" ),0 x8, 24 ), "ai_loc1" ),0 xf, 24 ), "iso_tristate" )),0 x10, GENMASK(31 , 28 ),0 x0, 28 ), "gpio" ),0 x1, 28 ), "sd" ),0 x3, 28 ), "dmic_loc1" ),0 x5, 28 ), "i2c4" ),0 x8, 28 ), "ai_loc1" ),0 xf, 28 ), "dbg_out0" )),0 x14, GENMASK(3 , 0 ),0 x0, 0 ), "gpio" ),0 x1, 0 ), "sd" ),0 x3, 0 ), "dmic_loc1" ),0 x5, 0 ), "i2c4" ),0 xf, 0 ), "dbg_out0" )),0 x14, GENMASK(7 , 4 ),0 x0, 4 ), "gpio" ),0 x1, 4 ), "sd" ),0 x2, 4 ), "aucpu_ejtag_loc1" ),0 x3, 4 ), "dmic_loc1" ),0 x4, 4 ), "tdm_ai_loc1" ),0 x5, 4 ), "scpu_ejtag_loc1" ),0 x6, 4 ), "acpu_ejtag_loc1" ),0 x7, 4 ), "vcpu_ejtag_loc1" ),0 x8, 4 ), "ai_loc1" ),0 x9, 4 ), "hi_loc0" ),0 xa, 4 ), "hi_m" ),0 xb, 4 ), "vtc_i2si_loc1" ),0 xc, 4 ), "vtc_tdm_loc1" ),0 xd, 4 ), "vtc_dmic_loc1" ),0 xe, 4 ), "scpu_ejtag_loc3" ),0 xf, 4 ), "iso_tristate" )),0 x14, GENMASK(11 , 8 ),0 x0, 8 ), "gpio" ),0 x1, 8 ), "sd" ),0 x2, 8 ), "aucpu_ejtag_loc1" ),0 x3, 8 ), "dmic_loc1" ),0 x4, 8 ), "tdm_ai_loc1" ),0 x5, 8 ), "scpu_ejtag_loc1" ),0 x6, 8 ), "acpu_ejtag_loc1" ),0 x7, 8 ), "vcpu_ejtag_loc1" ),0 x8, 8 ), "ai_loc1" ),0 x9, 8 ), "hi_loc0" ),0 xa, 8 ), "hi_m" ),0 xb, 8 ), "vtc_i2si_loc1" ),0 xc, 8 ), "vtc_tdm_loc1" ),0 xd, 8 ), "vtc_dmic_loc1" ),0 xf, 8 ), "iso_tristate" )),0 x14, GENMASK(15 , 12 ),0 x0, 12 ), "gpio" ),0 x1, 12 ), "sd" ),0 x3, 12 ), "dmic_loc1" ),0 x4, 12 ), "tdm_ai_loc1" ),0 x8, 12 ), "ai_loc1" ),0 x9, 12 ), "hi_loc0" ),0 xa, 12 ), "hi_m" ),0 xb, 12 ), "vtc_i2si_loc1" ),0 xc, 12 ), "vtc_tdm_loc1" ),0 xd, 12 ), "vtc_dmic_loc1" ),0 xf, 12 ), "iso_tristate" )),0 x14, GENMASK(19 , 16 ),0 x0, 16 ), "gpio" ),0 x1, 16 ), "sd" ),0 x2, 16 ), "aucpu_ejtag_loc1" ),0 x3, 16 ), "dmic_loc1" ),0 x4, 16 ), "tdm_ai_loc1" ),0 x5, 16 ), "scpu_ejtag_loc1" ),0 x6, 16 ), "acpu_ejtag_loc1" ),0 x7, 16 ), "vcpu_ejtag_loc1" ),0 x8, 16 ), "ai_loc1" ),0 x9, 16 ), "hi_loc0" ),0 xa, 16 ), "hi_m" ),0 xb, 16 ), "vtc_i2si_loc1" ),0 xc, 16 ), "vtc_tdm_loc1" ),0 xd, 16 ), "vtc_dmic_loc1" ),0 xf, 16 ), "iso_tristate" )),0 x14, GENMASK(23 , 20 ),0 x0, 20 ), "gpio" ),0 x1, 20 ), "i2c5" ),0 xf, 20 ), "dbg_out0" )),0 x14, GENMASK(27 , 24 ),0 x0, 24 ), "gpio" ),0 x2, 24 ), "dc_fan" ),0 x3, 24 ), "pwm3_loc0" ),0 xf, 24 ), "dbg_out1" )),0 x14, GENMASK(31 , 28 ),0 x0, 28 ), "gpio" ),0 x1, 28 ), "pll_test_loc1" ),0 xf, 28 ), "dbg_out0" )),0 x18, GENMASK(3 , 0 ),0 x0, 0 ), "gpio" ),0 x1, 0 ), "pll_test_loc1" ),0 xf, 0 ), "dbg_out0" )),0 x18, GENMASK(7 , 4 ),0 x0, 4 ), "gpio" ),0 x1, 4 ), "spdif" ),0 x5, 4 ), "test_loop" ),0 xf, 4 ), "dbg_out1" )),0 x18, GENMASK(11 , 8 ),0 x0, 8 ), "gpio" ),0 x1, 8 ), "usb_cc1" ),0 xf, 8 ), "dbg_out0" )),0 x18, GENMASK(15 , 12 ),0 x0, 12 ), "gpio" ),0 x1, 12 ), "ir_rx" ),0 x2, 12 ), "standby_dbg" ),0 xf, 12 ), "iso_tristate" )),0 x18, GENMASK(19 , 16 ),0 x0, 16 ), "gpio" ),0 x1, 16 ), "uart0" ),0 xf, 16 ), "iso_tristate" )),0 x18, GENMASK(23 , 20 ),0 x0, 20 ), "gpio" ),0 x1, 20 ), "uart0" ),0 xf, 20 ), "iso_tristate" )),0 x18, GENMASK(27 , 24 ),0 x0, 24 ), "gpio" ),0 x1, 24 ), "tdm_ai_loc0" ),0 x2, 24 ), "ai_loc0" ),0 x3, 24 ), "dmic_loc0" ),0 x6, 24 ), "acpu_ejtag_loc2" ),0 x7, 24 ), "vcpu_ejtag_loc2" ),0 x9, 24 ), "aucpu_ejtag_loc2" ),0 xb, 24 ), "vtc_i2si_loc0" ),0 xc, 24 ), "vtc_tdm_loc0" ),0 xd, 24 ), "vtc_dmic_loc0" ),0 xe, 24 ), "scpu_ejtag_loc2" ),0 xf, 24 ), "dbg_out0" )),0 x18, GENMASK(31 , 28 ),0 x0, 28 ), "gpio" ),0 x1, 28 ), "tdm_ai_loc0" ),0 x2, 28 ), "ai_loc0" ),0 x3, 28 ), "dmic_loc0" ),0 x6, 28 ), "acpu_ejtag_loc2" ),0 x7, 28 ), "vcpu_ejtag_loc2" ),0 x9, 28 ), "aucpu_ejtag_loc2" ),0 xb, 28 ), "vtc_i2si_loc0" ),0 xc, 28 ), "vtc_tdm_loc0" ),0 xd, 28 ), "vtc_dmic_loc0" ),0 xe, 28 ), "scpu_ejtag_loc2" ),0 xf, 28 ), "dbg_out0" )),0 x1c, GENMASK(3 , 0 ),0 x0, 0 ), "gpio" ),0 x1, 0 ), "tdm_ai_loc0" ),0 x2, 0 ), "ai_loc0" ),0 x3, 0 ), "dmic_loc0" ),0 x6, 0 ), "acpu_ejtag_loc2" ),0 x7, 0 ), "vcpu_ejtag_loc2" ),0 x9, 0 ), "aucpu_ejtag_loc2" ),0 xb, 0 ), "vtc_i2si_loc0" ),0 xc, 0 ), "vtc_tdm_loc0" ),0 xd, 0 ), "vtc_dmic_loc0" ),0 xe, 0 ), "scpu_ejtag_loc2" ),0 xf, 0 ), "dbg_out1" )),0 x1c, GENMASK(7 , 4 ),0 x0, 4 ), "gpio" ),0 x1, 4 ), "tdm_ai_loc0" ),0 x2, 4 ), "ai_loc0" ),0 x3, 4 ), "dmic_loc0" ),0 x6, 4 ), "acpu_ejtag_loc2" ),0 x7, 4 ), "vcpu_ejtag_loc2" ),0 x9, 4 ), "aucpu_ejtag_loc2" ),0 xb, 4 ), "vtc_i2si_loc0" ),0 xc, 4 ), "vtc_tdm_loc0" ),0 xd, 4 ), "vtc_dmic_loc0" ),0 xe, 4 ), "scpu_ejtag_loc2" ),0 xf, 4 ), "dbg_out0" )),0 x1c, GENMASK(11 , 8 ),0 x0, 8 ), "gpio" ),0 x2, 8 ), "ai_loc0" ),0 x3, 8 ), "dmic_loc0" ),0 x6, 8 ), "acpu_ejtag_loc2" ),0 x7, 8 ), "vcpu_ejtag_loc2" ),0 x9, 8 ), "aucpu_ejtag_loc2" ),0 xb, 8 ), "vtc_i2si_loc0" ),0 xe, 8 ), "scpu_ejtag_loc2" ),0 xf, 8 ), "dbg_out1" )),0 x1c, GENMASK(15 , 12 ),0 x0, 12 ), "gpio" ),0 x2, 12 ), "ai_loc0" ),0 x3, 12 ), "dmic_loc0" ),0 xf, 12 ), "dbg_out1" )),0 x1c, GENMASK(19 , 16 ),0 x0, 16 ), "gpio" ),0 xc, 16 ), "ao" ),0 xf, 16 ), "iso_tristate" )),0 x1c, GENMASK(23 , 20 ),0 x0, 20 ), "gpio" ),0 xb, 20 ), "vtc_i2so" ),0 xc, 20 ), "ao" ),0 xf, 20 ), "iso_tristate" )),0 x1c, GENMASK(27 , 24 ),0 x0, 24 ), "gpio" ),0 x3, 24 ), "aucpu_ejtag_loc0" ),0 x4, 24 ), "gpu_ejtag" ),0 x5, 24 ), "scpu_ejtag_loc0" ),0 x6, 24 ), "acpu_ejtag_loc0" ),0 x7, 24 ), "vcpu_ejtag_loc0" ),0 xb, 24 ), "vtc_i2so" ),0 xc, 24 ), "ao" ),0 xf, 24 ), "iso_tristate" )),0 x1c, GENMASK(31 , 28 ),0 x0, 28 ), "gpio" ),0 x3, 28 ), "aucpu_ejtag_loc0" ),0 x4, 28 ), "gpu_ejtag" ),0 x5, 28 ), "scpu_ejtag_loc0" ),0 x6, 28 ), "acpu_ejtag_loc0" ),0 x7, 28 ), "vcpu_ejtag_loc0" ),0 xb, 28 ), "vtc_i2so" ),0 xc, 28 ), "ao" ),0 xf, 28 ), "iso_tristate" )),0 x20, GENMASK(3 , 0 ),0 x0, 0 ), "gpio" ),0 x3, 0 ), "aucpu_ejtag_loc0" ),0 x4, 0 ), "gpu_ejtag" ),0 x5, 0 ), "scpu_ejtag_loc0" ),0 x6, 0 ), "acpu_ejtag_loc0" ),0 x7, 0 ), "vcpu_ejtag_loc0" ),0 xb, 0 ), "vtc_i2so" ),0 xc, 0 ), "ao" ),0 xf, 0 ), "iso_tristate" )),0 x20, GENMASK(7 , 4 ),0 x0, 4 ), "gpio" ),0 x3, 4 ), "aucpu_ejtag_loc0" ),0 x4, 4 ), "gpu_ejtag" ),0 x5, 4 ), "scpu_ejtag_loc0" ),0 x6, 4 ), "acpu_ejtag_loc0" ),0 x7, 4 ), "vcpu_ejtag_loc0" ),0 xc, 4 ), "ao" ),0 xf, 4 ), "iso_tristate" )),0 x20, GENMASK(11 , 8 ),0 x0, 8 ), "gpio" ),0 x3, 8 ), "aucpu_ejtag_loc0" ),0 x4, 8 ), "gpu_ejtag" ),0 x5, 8 ), "scpu_ejtag_loc0" ),0 x6, 8 ), "acpu_ejtag_loc0" ),0 x7, 8 ), "vcpu_ejtag_loc0" ),0 xc, 8 ), "ao" ),0 xf, 8 ), "iso_tristate" )),0 x20, GENMASK(15 , 12 ),0 x0, 12 ), "gpio" ),0 x1, 12 ), "nf" ),0 x3, 12 ), "pmic_pwrup" ),0 x5, 12 ), "spi" ),0 xf, 12 ), "iso_tristate" )),0 x20, GENMASK(19 , 16 ),0 x0, 16 ), "gpio" ),0 x1, 16 ), "nf" ),0 x5, 16 ), "spi" ),0 xf, 16 ), "iso_tristate" )),0 x20, GENMASK(23 , 20 ),0 x0, 20 ), "gpio" ),0 x1, 20 ), "nf" ),0 x5, 20 ), "spi" ),0 xf, 20 ), "iso_tristate" )),0 x20, GENMASK(27 , 24 ),0 x0, 24 ), "gpio" ),0 x1, 24 ), "nf" ),0 x5, 24 ), "spi" ),0 xf, 24 ), "iso_tristate" )),0 x120, GENMASK(1 , 0 ),0 x0, 0 ), "uart2_disable" ),0 x1, 0 ), "uart2_loc0" ),0 x2, 0 ), "uart2_loc1" )),0 x120, GENMASK(3 , 2 ),0 x0, 2 ), "gspi_disable" ),0 x1, 2 ), "gspi_loc0" ),0 x2, 2 ), "gspi_loc1" )),0 x120, GENMASK(9 , 8 ),0 x0, 8 ), "hi_width_disable" ),0 x1, 8 ), "hi_width_1bit" )),0 x120, GENMASK(11 , 11 ),0 x0, 11 ), "sf_disable" ),0 x1, 11 ), "sf_enable" )),0 x120, GENMASK(12 , 12 ),0 x0, 12 ), "arm_trace_debug_disable" ),0 x1, 12 ), "arm_trace_debug_enable" )),0 x120, GENMASK(16 , 14 ),0 x0, 14 ), "aucpu_ejtag_disable" ),0 x1, 14 ), "aucpu_ejtag_loc0" ),0 x2, 14 ), "aucpu_ejtag_loc1" ),0 x4, 14 ), "aucpu_ejtag_loc2" )),0 x120, GENMASK(19 , 17 ),0 x0, 17 ), "acpu_ejtag_disable" ),0 x1, 17 ), "acpu_ejtag_loc0" ),0 x2, 17 ), "acpu_ejtag_loc1" ),0 x4, 17 ), "acpu_ejtag_loc2" )),0 x120, GENMASK(22 , 20 ),0 x0, 20 ), "vcpu_ejtag_disable" ),0 x1, 20 ), "vcpu_ejtag_loc0" ),0 x2, 20 ), "vcpu_ejtag_loc1" ),0 x4, 20 ), "vcpu_ejtag_loc2" )),0 x120, GENMASK(25 , 23 ),0 x0, 23 ), "scpu_ejtag_disable" ),0 x1, 23 ), "scpu_ejtag_loc0" ),0 x2, 23 ), "scpu_ejtag_loc1" ),0 x4, 23 ), "scpu_ejtag_loc2" )),0 x120, GENMASK(27 , 26 ),0 x1, 26 ), "dmic_loc0" ),0 x2, 26 ), "dmic_loc1" )),0 x128, GENMASK(1 , 0 ),0 x0, 0 ), "vtc_dmic_loc_disable" ),0 x1, 0 ), "vtc_dmic_loc0" ),0 x2, 0 ), "vtc_dmic_loc1" )),0 x128, GENMASK(3 , 2 ),0 x0, 2 ), "vtc_tdm_disable" ),0 x1, 2 ), "vtc_tdm_loc0" ),0 x2, 2 ), "vtc_tdm_loc1" )),0 x128, GENMASK(5 , 4 ),0 x0, 4 ), "vtc_i2si_disable" ),0 x1, 4 ), "vtc_i2si_loc0" ),0 x2, 4 ), "vtc_i2si_loc1" )),0 x128, GENMASK(7 , 6 ),0 x0, 6 ), "tdm_ai_disable" ),0 x1, 6 ), "tdm_ai_loc0" ),0 x2, 6 ), "tdm_ai_loc1" )),0 x128, GENMASK(9 , 8 ),0 x0, 8 ), "ai_disable" ),0 x1, 8 ), "ai_loc0" ),0 x2, 8 ), "ai_loc1" )),0 x128, GENMASK(11 , 10 ),0 x0, 10 ), "spdif_disable" ),0 x1, 10 ), "spdif_optical_loc0" ),0 x2, 10 ), "spdif_optical_loc1" )),0 x12c, GENMASK(2 , 0 ),0 x2, 0 ), "hif_disable" ),0 x5, 0 ), "hif_enable" )),static const struct rtd_pin_config_desc rtd1315e_iso_configs[ARRAY_SIZE(rtd1315e_iso_pins)] = {0 x24, 0 , 0 , 1 , NA, 2 , 3 , NA),0 x24, 4 , 0 , 1 , NA, 2 , 12 , NA),0 x24, 17 , 0 , 1 , NA, 2 , 13 , NA),0 x28, 0 , 0 , 1 , NA, 2 , 12 , NA),0 x28, 13 , 0 , 1 , NA, 2 , 12 , NA),0 x2c, 0 , 0 , 1 , NA, 2 , 12 , NA),0 x2c, 13 , 0 , 1 , NA, 2 , 12 , NA),0 x30, 0 , 0 , 1 , NA, 2 , 12 , NA),0 x30, 13 , 0 , 1 , NA, 2 , 12 , NA),0 x34, 0 , 0 , 1 , NA, 2 , 12 , NA),0 x34, 13 , 0 , 1 , NA, 2 , 12 , NA),0 x38, 0 , 0 , 1 , NA, 2 , 12 , NA),0 x38, 13 , 0 , 1 , NA, 2 , 12 , NA),0 x3c, 0 , 1 , 2 , 0 , 3 , 4 , PADDRI_4_8),0 x3c, 5 , 1 , 2 , 0 , 3 , 4 , PADDRI_4_8),0 x3c, 10 , 1 , 2 , 0 , 3 , 4 , PADDRI_4_8),0 x3c, 15 , 1 , 2 , 0 , 3 , 4 , PADDRI_4_8),0 x3c, 20 , 1 , 2 , 0 , 3 , 4 , PADDRI_4_8),0 x3c, 25 , 1 , 2 , 0 , 3 , 4 , PADDRI_4_8),0 x40, 0 , 1 , 2 , 0 , 3 , 4 , PADDRI_4_8),0 x40, 5 , 1 , 2 , 0 , 3 , 4 , PADDRI_4_8),0 x40, 10 , 1 , 2 , 0 , 3 , 4 , PADDRI_4_8),0 x40, 15 , 1 , 2 , 0 , 3 , 4 , PADDRI_4_8),0 x40, 20 , 1 , 2 , 0 , 3 , 4 , PADDRI_4_8),0 x40, 25 , 1 , 2 , 0 , 3 , 4 , PADDRI_4_8),0 x44, 0 , 1 , 2 , 0 , 3 , 4 , PADDRI_4_8),0 x44, 5 , 1 , 2 , 0 , 3 , 4 , PADDRI_4_8),0 x44, 10 , 1 , 2 , 0 , 3 , 4 , PADDRI_4_8),0 x44, 15 , 1 , 2 , 0 , 3 , 4 , PADDRI_4_8),0 x44, 20 , 1 , 2 , 0 , 3 , 4 , PADDRI_4_8),0 x44, 25 , 1 , 2 , 0 , 3 , 4 , PADDRI_4_8),0 x48, 0 , 1 , 2 , 0 , 3 , 4 , PADDRI_4_8),0 x48, 6 , 1 , 2 , 0 , 3 , 4 , PADDRI_4_8),0 x48, 12 , 1 , 2 , 0 , 3 , 4 , PADDRI_4_8),0 x48, 17 , 1 , 2 , 0 , 3 , 4 , PADDRI_4_8),0 x4c, 0 , 1 , 2 , 0 , 3 , 4 , PADDRI_4_8),0 x4c, 5 , 0 , 1 , NA, 2 , 12 , NA),0 x4c, 18 , 0 , 1 , NA, 2 , 12 , NA),0 x50, 0 , 1 , 2 , 0 , 3 , 4 , PADDRI_4_8),0 x50, 5 , 1 , 2 , 0 , 3 , 4 , PADDRI_4_8),0 x50, 10 , 1 , 2 , 0 , 3 , 4 , PADDRI_4_8),0 x50, 15 , 1 , 2 , 0 , 3 , 4 , PADDRI_4_8),0 x50, 20 , 1 , 2 , 0 , 3 , 4 , PADDRI_4_8),0 x50, 25 , 1 , 2 , 0 , 3 , 4 , PADDRI_4_8),0 x54, 0 , 1 , 2 , 0 , 3 , 4 , PADDRI_4_8),0 x54, 5 , 1 , 2 , 0 , 3 , 4 , PADDRI_4_8),0 x54, 10 , 1 , 2 , 0 , 3 , 4 , PADDRI_4_8),0 x54, 15 , 1 , 2 , 0 , 3 , 4 , PADDRI_4_8),0 x54, 20 , 1 , 2 , 0 , 3 , 4 , PADDRI_4_8),0 x54, 25 , 1 , 2 , 0 , 3 , 4 , PADDRI_4_8),0 x58, 0 , 1 , 2 , 0 , 3 , 4 , PADDRI_4_8),0 x58, 5 , 1 , 2 , 0 , 3 , 4 , PADDRI_4_8),0 x58, 10 , 1 , 2 , 0 , 3 , 4 , PADDRI_4_8),0 x58, 15 , 1 , 2 , 0 , 3 , 4 , PADDRI_4_8),0 x58, 20 , 1 , 2 , 0 , 3 , 4 , PADDRI_4_8),0 x58, 25 , 1 , 2 , 0 , 3 , 4 , PADDRI_4_8),0 x5c, 0 , 1 , 2 , 0 , 3 , 4 , PADDRI_4_8),0 x5c, 5 , 1 , 2 , 0 , 3 , 4 , PADDRI_4_8),0 x5c, 10 , 0 , 1 , NA, 2 , 12 , NA),0 x60, 0 , 0 , 1 , NA, 2 , 12 , NA),0 x60, 13 , 0 , 1 , NA, 2 , 12 , NA),0 x64, 0 , 0 , 1 , NA, 2 , 12 , NA),0 x64, 13 , 0 , 1 , NA, 2 , 12 , NA),0 x68, 0 , 0 , 1 , NA, 2 , 12 , NA),0 x68, 13 , 0 , 1 , NA, 2 , 12 , NA),0 x68, 26 , 0 , 1 , NA, 2 , 12 , NA),0 x6c, 7 , 1 , 2 , 0 , 3 , 4 , PADDRI_4_8),0 x6c, 12 , 0 , 1 , NA, 2 , 3 , PADDRI_4_8),0 x6c, 16 , NA, NA, 0 , 1 , 2 , PADDRI_4_8),0 x6c, 19 , 0 , 1 , NA, 2 , 3 , PADDRI_4_8),0 x6c, 23 , 1 , 2 , 0 , 3 , 4 , PADDRI_4_8),0 x6c, 28 , 1 , 2 , 0 , 3 , 4 , PADDRI_4_8),0 x70, 1 , NA, NA, 0 , 1 , 2 , PADDRI_4_8),0 x70, 4 , NA, NA, 0 , 1 , 2 , PADDRI_4_8),0 x70, 7 , 1 , 2 , 0 , 3 , 4 , PADDRI_4_8),static const struct rtd_pin_sconfig_desc rtd1315e_iso_sconfigs[] = {0 x24, 7 , 3 , 10 , 3 , 13 , 3 ),0 x24, 20 , 3 , 23 , 3 , 26 , 3 ),0 x28, 3 , 3 , 6 , 3 , 9 , 3 ),0 x28, 16 , 3 , 19 , 3 , 22 , 3 ),0 x2c, 3 , 3 , 6 , 3 , 9 , 3 ),0 x2c, 16 , 3 , 19 , 3 , 22 , 3 ),0 x30, 3 , 3 , 6 , 3 , 9 , 3 ),0 x30, 16 , 3 , 19 , 3 , 22 , 3 ),0 x34, 3 , 3 , 6 , 3 , 9 , 3 ),0 x34, 16 , 3 , 19 , 3 , 22 , 3 ),0 x38, 3 , 3 , 6 , 3 , 9 , 3 ),0 x38, 16 , 3 , 19 , 3 , 22 , 3 ),0 x4c, 8 , 3 , 11 , 3 , 14 , 3 ),0 x4c, 21 , 3 , 24 , 3 , 27 , 3 ),0 x5c, 13 , 3 , 16 , 3 , 19 , 3 ),0 x60, 3 , 3 , 6 , 3 , 9 , 3 ),0 x60, 16 , 3 , 19 , 3 , 22 , 3 ),0 x64, 3 , 3 , 6 , 3 , 9 , 3 ),0 x64, 16 , 3 , 19 , 3 , 22 , 3 ),0 x68, 3 , 3 , 6 , 3 , 9 , 3 ),0 x68, 16 , 3 , 19 , 3 , 22 , 3 ),0 x68, 29 , 3 , 32 , 3 , 35 , 3 ),static const struct rtd_pinctrl_desc rtd1315e_iso_pinctrl_desc = {static int rtd1315e_pinctrl_probe(struct platform_device *pdev)return rtd_pinctrl_probe(pdev, &rtd1315e_iso_pinctrl_desc);static const struct of_device_id rtd1315e_pinctrl_of_match[] = {"realtek,rtd1315e-pinctrl" , },static struct platform_driver rtd1315e_pinctrl_driver = {"rtd1315e-pinctrl" ,static int __init rtd1315e_pinctrl_init(void )return platform_driver_register(&rtd1315e_pinctrl_driver);static void __exit rtd1315e_pinctrl_exit(void )"GPL" );"Realtek Semiconductor Corporation" );"Realtek DHC SoC RTD1315E pinctrl driver" );
Messung V0.5 in Prozent C=96 H=100 G=97
¤ Dauer der Verarbeitung: 0.18 Sekunden
(vorverarbeitet am 2026-06-08)
¤ *© Formatika GbR, Deutschland
