// SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2022,2025, Qualcomm Innovation Center, Inc. All rights reserved. * Copyright (c) 2023, Linaro Limited #include <linux/module.h>#include <linux/of.h>#include <linux/platform_device.h>#include "pinctrl-msm.h" #define REG_BASE 0 x100000#define REG_SIZE 0 x1000#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9)\"gpio" #id , \## id## _pins, \## id## _pins)), \int []){ \/* gpio mode */ \ ## f1, \## f2, \## f3, \## f4, \## f5, \## f6, \## f7, \## f8, \## f9 \10 , \0 x4 + REG_SIZE * id, \0 x8 + REG_SIZE * id, \0 xc + REG_SIZE * id, \0 x8 + REG_SIZE * id, \2 , \0 , \6 , \12 , \11 , \9 , \0 , \1 , \0 , \0 , \5 , \4 , \3 , \4 , \1 , \2 , \2 , \#define SDC_QDSD_PINGROUP(pg_name, ctl, pull, drv) \#pg_name , \## _pins, \## _pins)), \0 , \0 , \0 , \0 , \1 , \1 , \1 , \1 , \1 , \1 , \1 , \1 , \1 , \1 , \1 , \#define UFS_RESET(pg_name, offset) \#pg_name , \## _pins, \## _pins)), \0 x4, \0 , \0 , \0 , \1 , \3 , \0 , \1 , \1 , \0 , \1 , \1 , \1 , \1 , \1 , \1 , \1 , \#define QUP_I3C(qup_mode, qup_offset) \#define QUP_I3C_6_MODE_OFFSET 0 xAF000#define QUP_I3C_7_MODE_OFFSET 0 xB0000#define QUP_I3C_13_MODE_OFFSET 0 xB1000#define QUP_I3C_14_MODE_OFFSET 0 xB2000static const struct pinctrl_pin_desc sa8775p_pins[] = {0 , "GPIO_0" ),1 , "GPIO_1" ),2 , "GPIO_2" ),3 , "GPIO_3" ),4 , "GPIO_4" ),5 , "GPIO_5" ),6 , "GPIO_6" ),7 , "GPIO_7" ),8 , "GPIO_8" ),9 , "GPIO_9" ),10 , "GPIO_10" ),11 , "GPIO_11" ),12 , "GPIO_12" ),13 , "GPIO_13" ),14 , "GPIO_14" ),15 , "GPIO_15" ),16 , "GPIO_16" ),17 , "GPIO_17" ),18 , "GPIO_18" ),19 , "GPIO_19" ),20 , "GPIO_20" ),21 , "GPIO_21" ),22 , "GPIO_22" ),23 , "GPIO_23" ),24 , "GPIO_24" ),25 , "GPIO_25" ),26 , "GPIO_26" ),27 , "GPIO_27" ),28 , "GPIO_28" ),29 , "GPIO_29" ),30 , "GPIO_30" ),31 , "GPIO_31" ),32 , "GPIO_32" ),33 , "GPIO_33" ),34 , "GPIO_34" ),35 , "GPIO_35" ),36 , "GPIO_36" ),37 , "GPIO_37" ),38 , "GPIO_38" ),39 , "GPIO_39" ),40 , "GPIO_40" ),41 , "GPIO_41" ),42 , "GPIO_42" ),43 , "GPIO_43" ),44 , "GPIO_44" ),45 , "GPIO_45" ),46 , "GPIO_46" ),47 , "GPIO_47" ),48 , "GPIO_48" ),49 , "GPIO_49" ),50 , "GPIO_50" ),51 , "GPIO_51" ),52 , "GPIO_52" ),53 , "GPIO_53" ),54 , "GPIO_54" ),55 , "GPIO_55" ),56 , "GPIO_56" ),57 , "GPIO_57" ),58 , "GPIO_58" ),59 , "GPIO_59" ),60 , "GPIO_60" ),61 , "GPIO_61" ),62 , "GPIO_62" ),63 , "GPIO_63" ),64 , "GPIO_64" ),65 , "GPIO_65" ),66 , "GPIO_66" ),67 , "GPIO_67" ),68 , "GPIO_68" ),69 , "GPIO_69" ),70 , "GPIO_70" ),71 , "GPIO_71" ),72 , "GPIO_72" ),73 , "GPIO_73" ),74 , "GPIO_74" ),75 , "GPIO_75" ),76 , "GPIO_76" ),77 , "GPIO_77" ),78 , "GPIO_78" ),79 , "GPIO_79" ),80 , "GPIO_80" ),81 , "GPIO_81" ),82 , "GPIO_82" ),83 , "GPIO_83" ),84 , "GPIO_84" ),85 , "GPIO_85" ),86 , "GPIO_86" ),87 , "GPIO_87" ),88 , "GPIO_88" ),89 , "GPIO_89" ),90 , "GPIO_90" ),91 , "GPIO_91" ),92 , "GPIO_92" ),93 , "GPIO_93" ),94 , "GPIO_94" ),95 , "GPIO_95" ),96 , "GPIO_96" ),97 , "GPIO_97" ),98 , "GPIO_98" ),99 , "GPIO_99" ),100 , "GPIO_100" ),101 , "GPIO_101" ),102 , "GPIO_102" ),103 , "GPIO_103" ),104 , "GPIO_104" ),105 , "GPIO_105" ),106 , "GPIO_106" ),107 , "GPIO_107" ),108 , "GPIO_108" ),109 , "GPIO_109" ),110 , "GPIO_110" ),111 , "GPIO_111" ),112 , "GPIO_112" ),113 , "GPIO_113" ),114 , "GPIO_114" ),115 , "GPIO_115" ),116 , "GPIO_116" ),117 , "GPIO_117" ),118 , "GPIO_118" ),119 , "GPIO_119" ),120 , "GPIO_120" ),121 , "GPIO_121" ),122 , "GPIO_122" ),123 , "GPIO_123" ),124 , "GPIO_124" ),125 , "GPIO_125" ),126 , "GPIO_126" ),127 , "GPIO_127" ),128 , "GPIO_128" ),129 , "GPIO_129" ),130 , "GPIO_130" ),131 , "GPIO_131" ),132 , "GPIO_132" ),133 , "GPIO_133" ),134 , "GPIO_134" ),135 , "GPIO_135" ),136 , "GPIO_136" ),137 , "GPIO_137" ),138 , "GPIO_138" ),139 , "GPIO_139" ),140 , "GPIO_140" ),141 , "GPIO_141" ),142 , "GPIO_142" ),143 , "GPIO_143" ),144 , "GPIO_144" ),145 , "GPIO_145" ),146 , "GPIO_146" ),147 , "GPIO_147" ),148 , "GPIO_148" ),149 , "UFS_RESET" ),150 , "SDC1_RCLK" ),151 , "SDC1_CLK" ),152 , "SDC1_CMD" ),153 , "SDC1_DATA" ),#define DECLARE_MSM_GPIO_PINS(pin) \static const unsigned int gpio## pin## _pins[] = { pin }0 );1 );2 );3 );4 );5 );6 );7 );8 );9 );10 );11 );12 );13 );14 );15 );16 );17 );18 );19 );20 );21 );22 );23 );24 );25 );26 );27 );28 );29 );30 );31 );32 );33 );34 );35 );36 );37 );38 );39 );40 );41 );42 );43 );44 );45 );46 );47 );48 );49 );50 );51 );52 );53 );54 );55 );56 );57 );58 );59 );60 );61 );62 );63 );64 );65 );66 );67 );68 );69 );70 );71 );72 );73 );74 );75 );76 );77 );78 );79 );80 );81 );82 );83 );84 );85 );86 );87 );88 );89 );90 );91 );92 );93 );94 );95 );96 );97 );98 );99 );100 );101 );102 );103 );104 );105 );106 );107 );108 );109 );110 );111 );112 );113 );114 );115 );116 );117 );118 );119 );120 );121 );122 );123 );124 );125 );126 );127 );128 );129 );130 );131 );132 );133 );134 );135 );136 );137 );138 );139 );140 );141 );142 );143 );144 );145 );146 );147 );148 );static const unsigned int ufs_reset_pins[] = { 149 };static const unsigned int sdc1_rclk_pins[] = { 150 };static const unsigned int sdc1_clk_pins[] = { 151 };static const unsigned int sdc1_cmd_pins[] = { 152 };static const unsigned int sdc1_data_pins[] = { 153 };enum sa8775p_functions {static const char * const gpio_groups[] = {"gpio0" , "gpio1" , "gpio2" , "gpio3" , "gpio4" , "gpio5" , "gpio6" , "gpio7" ,"gpio8" , "gpio9" , "gpio10" , "gpio11" , "gpio12" , "gpio13" , "gpio14" ,"gpio15" , "gpio16" , "gpio17" , "gpio18" , "gpio19" , "gpio20" , "gpio21" ,"gpio22" , "gpio23" , "gpio24" , "gpio25" , "gpio26" , "gpio27" , "gpio28" ,"gpio29" , "gpio30" , "gpio31" , "gpio32" , "gpio33" , "gpio34" , "gpio35" ,"gpio36" , "gpio37" , "gpio38" , "gpio39" , "gpio40" , "gpio41" , "gpio42" ,"gpio43" , "gpio44" , "gpio45" , "gpio46" , "gpio47" , "gpio48" , "gpio49" ,"gpio50" , "gpio51" , "gpio52" , "gpio53" , "gpio54" , "gpio55" , "gpio56" ,"gpio57" , "gpio58" , "gpio59" , "gpio60" , "gpio61" , "gpio62" , "gpio63" ,"gpio64" , "gpio65" , "gpio66" , "gpio67" , "gpio68" , "gpio69" , "gpio70" ,"gpio71" , "gpio72" , "gpio73" , "gpio74" , "gpio75" , "gpio76" , "gpio77" ,"gpio78" , "gpio79" , "gpio80" , "gpio81" , "gpio82" , "gpio83" , "gpio84" ,"gpio85" , "gpio86" , "gpio87" , "gpio88" , "gpio89" , "gpio90" , "gpio91" ,"gpio92" , "gpio93" , "gpio94" , "gpio95" , "gpio96" , "gpio97" , "gpio98" ,"gpio99" , "gpio100" , "gpio101" , "gpio102" , "gpio103" , "gpio104" ,"gpio105" , "gpio106" , "gpio107" , "gpio108" , "gpio109" , "gpio110" ,"gpio111" , "gpio112" , "gpio113" , "gpio114" , "gpio115" , "gpio116" ,"gpio117" , "gpio118" , "gpio119" , "gpio120" , "gpio121" , "gpio122" ,"gpio123" , "gpio124" , "gpio125" , "gpio126" , "gpio127" , "gpio128" ,"gpio129" , "gpio130" , "gpio131" , "gpio132" , "gpio133" , "gpio134" ,"gpio135" , "gpio136" , "gpio137" , "gpio138" , "gpio139" , "gpio140" ,"gpio141" , "gpio142" , "gpio143" , "gpio144" , "gpio145" , "gpio146" ,"gpio147" , "gpio148" ,static const char * const atest_char_groups[] = {"gpio27" , "gpio58" , "gpio59" , "gpio89" , "gpio90" ,static const char * const atest_usb2_groups[] = {"gpio58" , "gpio59" , "gpio86" , "gpio87" , "gpio88" , "gpio89" , "gpio90" ,"gpio91" , "gpio92" , "gpio93" , "gpio94" , "gpio95" , "gpio96" , "gpio97" ,"gpio105" ,static const char * const audio_ref_groups[] = {"gpio113" ,static const char * const cam_mclk_groups[] = {"gpio72" , "gpio73" , "gpio74" , "gpio75" ,static const char * const cci_async_groups[] = {"gpio50" , "gpio66" , "gpio68" , "gpio69" , "gpio70" , "gpio71" ,static const char * const cci_i2c_groups[] = {"gpio52" , "gpio53" , "gpio54" , "gpio55" , "gpio56" , "gpio57" , "gpio58" ,"gpio59" , "gpio60" , "gpio61" , "gpio62" , "gpio63" , "gpio64" , "gpio65" ,"gpio66" , "gpio67" ,static const char * const cci_timer0_groups[] = {"gpio68" ,static const char * const cci_timer1_groups[] = {"gpio69" ,static const char * const cci_timer2_groups[] = {"gpio70" ,static const char * const cci_timer3_groups[] = {"gpio71" ,static const char * const cci_timer4_groups[] = {"gpio52" ,static const char * const cci_timer5_groups[] = {"gpio53" ,static const char * const cci_timer6_groups[] = {"gpio54" ,static const char * const cci_timer7_groups[] = {"gpio55" ,static const char * const cci_timer8_groups[] = {"gpio56" ,static const char * const cci_timer9_groups[] = {"gpio57" ,static const char * const cri_trng_groups[] = {"gpio99" ,static const char * const cri_trng0_groups[] = {"gpio97" ,static const char * const cri_trng1_groups[] = {"gpio98" ,static const char * const dbg_out_groups[] = {"gpio144" ,static const char * const ddr_bist_groups[] = {"gpio56" , "gpio57" , "gpio58" , "gpio59" ,static const char * const ddr_pxi0_groups[] = {"gpio33" , "gpio34" ,static const char * const ddr_pxi1_groups[] = {"gpio52" , "gpio53" ,static const char * const ddr_pxi2_groups[] = {"gpio55" , "gpio86" ,static const char * const ddr_pxi3_groups[] = {"gpio87" , "gpio88" ,static const char * const ddr_pxi4_groups[] = {"gpio89" , "gpio90" ,static const char * const ddr_pxi5_groups[] = {"gpio118" , "gpio119" ,static const char * const edp0_hot_groups[] = {"gpio101" ,static const char * const edp0_lcd_groups[] = {"gpio44" ,static const char * const edp1_hot_groups[] = {"gpio102" ,static const char * const edp1_lcd_groups[] = {"gpio45" ,static const char * const edp2_hot_groups[] = {"gpio104" ,static const char * const edp2_lcd_groups[] = {"gpio48" ,static const char * const edp3_hot_groups[] = {"gpio103" ,static const char * const edp3_lcd_groups[] = {"gpio49" ,static const char *const egpio_groups[] = {"gpio126" , "gpio127" , "gpio128" , "gpio129" , "gpio130" , "gpio131" ,"gpio132" , "gpio133" , "gpio134" , "gpio135" , "gpio136" , "gpio137" ,"gpio138" , "gpio139" , "gpio140" , "gpio141" , "gpio142" , "gpio143" ,"gpio144" , "gpio145" , "gpio146" , "gpio147" , "gpio148" ,static const char * const emac0_mcg0_groups[] = {"gpio12" ,static const char * const emac0_mcg1_groups[] = {"gpio13" ,static const char * const emac0_mcg2_groups[] = {"gpio14" ,static const char * const emac0_mcg3_groups[] = {"gpio15" ,static const char * const emac0_mdc_groups[] = {"gpio8" ,static const char * const emac0_mdio_groups[] = {"gpio9" ,static const char * const emac0_ptp_aux_groups[] = {"gpio6" , "gpio10" , "gpio11" , "gpio12" ,static const char * const emac0_ptp_pps_groups[] = {"gpio6" , "gpio10" , "gpio11" , "gpio12" ,static const char * const emac1_mcg0_groups[] = {"gpio16" ,static const char * const emac1_mcg1_groups[] = {"gpio17" ,static const char * const emac1_mcg2_groups[] = {"gpio18" ,static const char * const emac1_mcg3_groups[] = {"gpio19" ,static const char * const emac1_mdc_groups[] = {"gpio20" ,static const char * const emac1_mdio_groups[] = {"gpio21" ,static const char * const emac1_ptp_aux_groups[] = {"gpio6" , "gpio10" , "gpio11" , "gpio12" ,static const char * const emac1_ptp_pps_groups[] = {"gpio6" , "gpio10" , "gpio11" , "gpio12" ,static const char * const gcc_gp1_groups[] = {"gpio51" , "gpio82" ,static const char * const gcc_gp2_groups[] = {"gpio52" , "gpio83" ,static const char * const gcc_gp3_groups[] = {"gpio53" , "gpio84" ,static const char * const gcc_gp4_groups[] = {"gpio33" , "gpio55" ,static const char * const gcc_gp5_groups[] = {"gpio34" , "gpio42" ,static const char * const hs0_mi2s_groups[] = {"gpio114" , "gpio115" , "gpio116" , "gpio117" ,static const char * const hs1_mi2s_groups[] = {"gpio118" , "gpio119" , "gpio120" , "gpio121" ,static const char * const hs2_mi2s_groups[] = {"gpio122" , "gpio123" , "gpio124" , "gpio125" ,static const char * const ibi_i3c_groups[] = {"gpio40" , "gpio41" , "gpio42" , "gpio43" , "gpio80" , "gpio81" , "gpio84" ,"gpio85" ,static const char * const jitter_bist_groups[] = {"gpio86" ,static const char * const mdp0_vsync0_groups[] = {"gpio57" ,static const char * const mdp0_vsync1_groups[] = {"gpio58" ,static const char * const mdp0_vsync2_groups[] = {"gpio59" ,static const char * const mdp0_vsync3_groups[] = {"gpio80" ,static const char * const mdp0_vsync4_groups[] = {"gpio81" ,static const char * const mdp0_vsync5_groups[] = {"gpio91" ,static const char * const mdp0_vsync6_groups[] = {"gpio92" ,static const char * const mdp0_vsync7_groups[] = {"gpio93" ,static const char * const mdp0_vsync8_groups[] = {"gpio94" ,static const char * const mdp1_vsync0_groups[] = {"gpio40" ,static const char * const mdp1_vsync1_groups[] = {"gpio41" ,static const char * const mdp1_vsync2_groups[] = {"gpio42" ,static const char * const mdp1_vsync3_groups[] = {"gpio43" ,static const char * const mdp1_vsync4_groups[] = {"gpio46" ,static const char * const mdp1_vsync5_groups[] = {"gpio47" ,static const char * const mdp1_vsync6_groups[] = {"gpio51" ,static const char * const mdp1_vsync7_groups[] = {"gpio52" ,static const char * const mdp1_vsync8_groups[] = {"gpio50" ,static const char * const mdp_vsync_groups[] = {"gpio82" , "gpio83" , "gpio84" ,static const char * const mi2s1_data0_groups[] = {"gpio108" ,static const char * const mi2s1_data1_groups[] = {"gpio109" ,static const char * const mi2s1_sck_groups[] = {"gpio106" ,static const char * const mi2s1_ws_groups[] = {"gpio107" ,static const char * const mi2s2_data0_groups[] = {"gpio112" ,static const char * const mi2s2_data1_groups[] = {"gpio113" ,static const char * const mi2s2_sck_groups[] = {"gpio110" ,static const char * const mi2s2_ws_groups[] = {"gpio111" ,static const char * const mi2s_mclk0_groups[] = {"gpio105" ,static const char * const mi2s_mclk1_groups[] = {"gpio117" ,static const char * const pcie0_clkreq_groups[] = {"gpio1" ,static const char * const pcie1_clkreq_groups[] = {"gpio3" ,static const char * const phase_flag_groups[] = {"gpio25" , "gpio26" , "gpio27" , "gpio28" , "gpio29" , "gpio30" , "gpio31" ,"gpio32" , "gpio35" , "gpio36" , "gpio37" , "gpio38" , "gpio39" , "gpio56" ,"gpio57" , "gpio98" , "gpio99" , "gpio106" , "gpio107" , "gpio108" ,"gpio109" , "gpio110" , "gpio111" , "gpio112" , "gpio113" , "gpio114" ,"gpio120" , "gpio121" , "gpio122" , "gpio123" , "gpio124" , "gpio125" ,static const char * const pll_bist_groups[] = {"gpio114" ,static const char * const pll_clk_groups[] = {"gpio87" ,static const char * const prng_rosc0_groups[] = {"gpio101" ,static const char * const prng_rosc1_groups[] = {"gpio102" ,static const char * const prng_rosc2_groups[] = {"gpio103" ,static const char * const prng_rosc3_groups[] = {"gpio104" ,static const char * const qdss_cti_groups[] = {"gpio26" , "gpio27" , "gpio38" , "gpio39" , "gpio48" , "gpio49" , "gpio50" ,"gpio51" ,static const char * const qdss_gpio_groups[] = {"gpio20" , "gpio21" , "gpio22" , "gpio23" , "gpio24" , "gpio25" , "gpio28" ,"gpio29" , "gpio30" , "gpio31" , "gpio60" , "gpio61" , "gpio62" , "gpio63" ,"gpio64" , "gpio65" , "gpio66" , "gpio67" , "gpio105" , "gpio106" , "gpio107" ,"gpio108" , "gpio109" , "gpio110" , "gpio111" , "gpio112" , "gpio113" ,"gpio114" , "gpio115" , "gpio116" , "gpio117" , "gpio118" , "gpio119" ,"gpio120" , "gpio121" , "gpio122" ,static const char * const qup0_se0_groups[] = {"gpio20" , "gpio21" , "gpio22" , "gpio23" ,static const char * const qup0_se1_groups[] = {"gpio24" , "gpio25" , "gpio26" , "gpio27" ,static const char * const qup0_se2_groups[] = {"gpio36" , "gpio37" , "gpio38" , "gpio39" ,static const char * const qup0_se3_groups[] = {"gpio28" , "gpio29" , "gpio30" , "gpio31" ,static const char * const qup0_se4_groups[] = {"gpio32" , "gpio33" , "gpio34" , "gpio35" ,static const char * const qup0_se5_groups[] = {"gpio36" , "gpio37" , "gpio38" , "gpio39" ,static const char * const qup1_se0_groups[] = {"gpio40" , "gpio41" , "gpio42" , "gpio43" ,static const char * const qup1_se1_groups[] = {"gpio40" , "gpio41" , "gpio42" , "gpio43" ,static const char * const qup1_se2_groups[] = {"gpio44" , "gpio45" , "gpio46" , "gpio47" ,static const char * const qup1_se3_groups[] = {"gpio44" , "gpio45" , "gpio46" , "gpio47" ,static const char * const qup1_se4_groups[] = {"gpio48" , "gpio49" , "gpio50" , "gpio51" ,static const char * const qup1_se5_groups[] = {"gpio52" , "gpio53" , "gpio54" , "gpio55" ,static const char * const qup1_se6_groups[] = {"gpio56" , "gpio56" , "gpio57" , "gpio57" ,static const char * const qup2_se0_groups[] = {"gpio80" , "gpio81" , "gpio82" , "gpio83" ,static const char * const qup2_se1_groups[] = {"gpio84" , "gpio85" , "gpio99" , "gpio100" ,static const char * const qup2_se2_groups[] = {"gpio86" , "gpio87" , "gpio88" , "gpio89" , "gpio90" ,static const char * const qup2_se3_groups[] = {"gpio91" , "gpio92" , "gpio93" , "gpio94" ,static const char * const qup2_se4_groups[] = {"gpio95" , "gpio96" , "gpio97" , "gpio98" ,static const char * const qup2_se5_groups[] = {"gpio84" , "gpio85" , "gpio99" , "gpio100" ,static const char * const qup2_se6_groups[] = {"gpio95" , "gpio96" , "gpio97" , "gpio98" ,static const char * const qup3_se0_groups[] = {"gpio13" , "gpio14" , "gpio15" , "gpio16" , "gpio17" , "gpio18" , "gpio19" ,static const char * const sail_top_groups[] = {"gpio13" , "gpio14" , "gpio15" , "gpio16" ,static const char * const sailss_emac0_groups[] = {"gpio18" , "gpio19" ,static const char * const sailss_ospi_groups[] = {"gpio18" , "gpio19" ,static const char * const sgmii_phy_groups[] = {"gpio7" , "gpio26" ,static const char * const tb_trig_groups[] = {"gpio17" , "gpio17" ,static const char * const tgu_ch0_groups[] = {"gpio46" ,static const char * const tgu_ch1_groups[] = {"gpio47" ,static const char * const tgu_ch2_groups[] = {"gpio36" ,static const char * const tgu_ch3_groups[] = {"gpio37" ,static const char * const tgu_ch4_groups[] = {"gpio38" ,static const char * const tgu_ch5_groups[] = {"gpio39" ,static const char * const tsense_pwm1_groups[] = {"gpio104" ,static const char * const tsense_pwm2_groups[] = {"gpio103" ,static const char * const tsense_pwm3_groups[] = {"gpio102" ,static const char * const tsense_pwm4_groups[] = {"gpio101" ,static const char * const usb2phy_ac_groups[] = {"gpio10" , "gpio11" , "gpio12" ,static const char * const vsense_trigger_groups[] = {"gpio111" ,static const struct pinfunction sa8775p_functions[] = {/* * Every pin is maintained as a single group, and missing or non-existing pin * would be maintained as dummy group to synchronize pin group index with * pin descriptor registered with pinctrl core. * Clients would not be able to request these dummy pin groups. static const struct msm_pingroup sa8775p_groups[] = {0 ] = PINGROUP(0 , _, _, _, _, _, _, _, _, _),1 ] = PINGROUP(1 , pcie0_clkreq, _, _, _, _, _, _, _, _),2 ] = PINGROUP(2 , _, _, _, _, _, _, _, _, _),3 ] = PINGROUP(3 , pcie1_clkreq, _, _, _, _, _, _, _, _),4 ] = PINGROUP(4 , _, _, _, _, _, _, _, _, _),5 ] = PINGROUP(5 , _, _, _, _, _, _, _, _, _),6 ] = PINGROUP(6 , emac0_ptp_aux, emac0_ptp_pps, emac1_ptp_aux, emac1_ptp_pps,7 ] = PINGROUP(7 , sgmii_phy, _, _, _, _, _, _, _, _),8 ] = PINGROUP(8 , emac0_mdc, _, _, _, _, _, _, _, _),9 ] = PINGROUP(9 , emac0_mdio, _, _, _, _, _, _, _, _),10 ] = PINGROUP(10 , usb2phy_ac, emac0_ptp_aux, emac0_ptp_pps, emac1_ptp_aux, emac1_ptp_pps,11 ] = PINGROUP(11 , usb2phy_ac, emac0_ptp_aux, emac0_ptp_pps, emac1_ptp_aux, emac1_ptp_pps,12 ] = PINGROUP(12 , usb2phy_ac, emac0_ptp_aux, emac0_ptp_pps, emac1_ptp_aux, emac1_ptp_pps,13 ] = PINGROUP(13 , qup3_se0, emac0_mcg1, _, _, sail_top, _, _, _, _),14 ] = PINGROUP(14 , qup3_se0, emac0_mcg2, _, _, sail_top, _, _, _, _),15 ] = PINGROUP(15 , qup3_se0, emac0_mcg3, _, _, sail_top, _, _, _, _),16 ] = PINGROUP(16 , qup3_se0, emac1_mcg0, _, _, sail_top, _, _, _, _),17 ] = PINGROUP(17 , qup3_se0, tb_trig, tb_trig, emac1_mcg1, _, _, _, _, _),18 ] = PINGROUP(18 , qup3_se0, emac1_mcg2, _, _, sailss_ospi, sailss_emac0, _, _, _),19 ] = PINGROUP(19 , qup3_se0, emac1_mcg3, _, _, sailss_ospi, sailss_emac0, _, _, _),20 ] = PINGROUP(20 , qup0_se0, emac1_mdc, qdss_gpio, _, _, _, _, _, _),21 ] = PINGROUP(21 , qup0_se0, emac1_mdio, qdss_gpio, _, _, _, _, _, _),22 ] = PINGROUP(22 , qup0_se0, qdss_gpio, _, _, _, _, _, _, _),23 ] = PINGROUP(23 , qup0_se0, qdss_gpio, _, _, _, _, _, _, _),24 ] = PINGROUP(24 , qup0_se1, qdss_gpio, _, _, _, _, _, _, _),25 ] = PINGROUP(25 , qup0_se1, phase_flag, _, qdss_gpio, _, _, _, _, _),26 ] = PINGROUP(26 , sgmii_phy, qup0_se1, qdss_cti, phase_flag, _, _, _, _, _),27 ] = PINGROUP(27 , qup0_se1, qdss_cti, phase_flag, _, atest_char, _, _, _, _),28 ] = PINGROUP(28 , qup0_se3, phase_flag, _, qdss_gpio, _, _, _, _, _),29 ] = PINGROUP(29 , qup0_se3, phase_flag, _, qdss_gpio, _, _, _, _, _),30 ] = PINGROUP(30 , qup0_se3, phase_flag, _, qdss_gpio, _, _, _, _, _),31 ] = PINGROUP(31 , qup0_se3, phase_flag, _, qdss_gpio, _, _, _, _, _),32 ] = PINGROUP(32 , qup0_se4, phase_flag, _, _, _, _, _, _, _),33 ] = PINGROUP(33 , qup0_se4, gcc_gp4, _, ddr_pxi0, _, _, _, _, _),34 ] = PINGROUP(34 , qup0_se4, gcc_gp5, _, ddr_pxi0, _, _, _, _, _),35 ] = PINGROUP(35 , qup0_se4, phase_flag, _, _, _, _, _, _, _),36 ] = PINGROUP(36 , qup0_se2, qup0_se5, phase_flag, tgu_ch2, _, _, _, _, _),37 ] = PINGROUP(37 , qup0_se2, qup0_se5, phase_flag, tgu_ch3, _, _, _, _, _),38 ] = PINGROUP(38 , qup0_se5, qup0_se2, qdss_cti, phase_flag, tgu_ch4, _, _, _, _),39 ] = PINGROUP(39 , qup0_se5, qup0_se2, qdss_cti, phase_flag, tgu_ch5, _, _, _, _),40 ] = PINGROUP(40 , qup1_se0, qup1_se1, ibi_i3c, mdp1_vsync0, _, _, _, _, _),41 ] = PINGROUP(41 , qup1_se0, qup1_se1, ibi_i3c, mdp1_vsync1, _, _, _, _, _),42 ] = PINGROUP(42 , qup1_se1, qup1_se0, ibi_i3c, mdp1_vsync2, gcc_gp5, _, _, _, _),43 ] = PINGROUP(43 , qup1_se1, qup1_se0, ibi_i3c, mdp1_vsync3, _, _, _, _, _),44 ] = PINGROUP(44 , qup1_se2, qup1_se3, edp0_lcd, _, _, _, _, _, _),45 ] = PINGROUP(45 , qup1_se2, qup1_se3, edp1_lcd, _, _, _, _, _, _),46 ] = PINGROUP(46 , qup1_se3, qup1_se2, mdp1_vsync4, tgu_ch0, _, _, _, _, _),47 ] = PINGROUP(47 , qup1_se3, qup1_se2, mdp1_vsync5, tgu_ch1, _, _, _, _, _),48 ] = PINGROUP(48 , qup1_se4, qdss_cti, edp2_lcd, _, _, _, _, _, _),49 ] = PINGROUP(49 , qup1_se4, qdss_cti, edp3_lcd, _, _, _, _, _, _),50 ] = PINGROUP(50 , qup1_se4, cci_async, qdss_cti, mdp1_vsync8, _, _, _, _, _),51 ] = PINGROUP(51 , qup1_se4, qdss_cti, mdp1_vsync6, gcc_gp1, _, _, _, _, _),52 ] = PINGROUP(52 , qup1_se5, cci_timer4, cci_i2c, mdp1_vsync7, gcc_gp2, _, ddr_pxi1, _, _),53 ] = PINGROUP(53 , qup1_se5, cci_timer5, cci_i2c, gcc_gp3, _, ddr_pxi1, _, _, _),54 ] = PINGROUP(54 , qup1_se5, cci_timer6, cci_i2c, _, _, _, _, _, _),55 ] = PINGROUP(55 , qup1_se5, cci_timer7, cci_i2c, gcc_gp4, _, ddr_pxi2, _, _, _),56 ] = PINGROUP(56 , qup1_se6, qup1_se6, cci_timer8, cci_i2c, phase_flag,57 ] = PINGROUP(57 , qup1_se6, qup1_se6, cci_timer9, cci_i2c, mdp0_vsync0,58 ] = PINGROUP(58 , cci_i2c, mdp0_vsync1, ddr_bist, _, atest_usb2, atest_char, _, _, _),59 ] = PINGROUP(59 , cci_i2c, mdp0_vsync2, ddr_bist, _, atest_usb2, atest_char, _, _, _),60 ] = PINGROUP(60 , cci_i2c, qdss_gpio, _, _, _, _, _, _, _),61 ] = PINGROUP(61 , cci_i2c, qdss_gpio, _, _, _, _, _, _, _),62 ] = PINGROUP(62 , cci_i2c, qdss_gpio, _, _, _, _, _, _, _),63 ] = PINGROUP(63 , cci_i2c, qdss_gpio, _, _, _, _, _, _, _),64 ] = PINGROUP(64 , cci_i2c, qdss_gpio, _, _, _, _, _, _, _),65 ] = PINGROUP(65 , cci_i2c, qdss_gpio, _, _, _, _, _, _, _),66 ] = PINGROUP(66 , cci_i2c, cci_async, qdss_gpio, _, _, _, _, _, _),67 ] = PINGROUP(67 , cci_i2c, qdss_gpio, _, _, _, _, _, _, _),68 ] = PINGROUP(68 , cci_timer0, cci_async, _, _, _, _, _, _, _),69 ] = PINGROUP(69 , cci_timer1, cci_async, _, _, _, _, _, _, _),70 ] = PINGROUP(70 , cci_timer2, cci_async, _, _, _, _, _, _, _),71 ] = PINGROUP(71 , cci_timer3, cci_async, _, _, _, _, _, _, _),72 ] = PINGROUP(72 , cam_mclk, _, _, _, _, _, _, _, _),73 ] = PINGROUP(73 , cam_mclk, _, _, _, _, _, _, _, _),74 ] = PINGROUP(74 , cam_mclk, _, _, _, _, _, _, _, _),75 ] = PINGROUP(75 , cam_mclk, _, _, _, _, _, _, _, _),76 ] = PINGROUP(76 , _, _, _, _, _, _, _, _, _),77 ] = PINGROUP(77 , _, _, _, _, _, _, _, _, _),78 ] = PINGROUP(78 , _, _, _, _, _, _, _, _, _),79 ] = PINGROUP(79 , _, _, _, _, _, _, _, _, _),80 ] = PINGROUP(80 , qup2_se0, ibi_i3c, mdp0_vsync3, _, _, _, _, _, _),81 ] = PINGROUP(81 , qup2_se0, ibi_i3c, mdp0_vsync4, _, _, _, _, _, _),82 ] = PINGROUP(82 , qup2_se0, mdp_vsync, gcc_gp1, _, _, _, _, _, _),83 ] = PINGROUP(83 , qup2_se0, mdp_vsync, gcc_gp2, _, _, _, _, _, _),84 ] = PINGROUP(84 , qup2_se1, qup2_se5, ibi_i3c, mdp_vsync, gcc_gp3, _, _, _, _),85 ] = PINGROUP(85 , qup2_se1, qup2_se5, ibi_i3c, _, _, _, _, _, _),86 ] = PINGROUP(86 , qup2_se2, jitter_bist, atest_usb2, ddr_pxi2, _, _, _, _, _),87 ] = PINGROUP(87 , qup2_se2, pll_clk, atest_usb2, ddr_pxi3, _, _, _, _, _),88 ] = PINGROUP(88 , qup2_se2, _, atest_usb2, ddr_pxi3, _, _, _, _, _),89 ] = PINGROUP(89 , qup2_se2, _, atest_usb2, ddr_pxi4, atest_char, _, _, _, _),90 ] = PINGROUP(90 , qup2_se2, _, atest_usb2, ddr_pxi4, atest_char, _, _, _, _),91 ] = PINGROUP(91 , qup2_se3, mdp0_vsync5, _, atest_usb2, _, _, _, _, _),92 ] = PINGROUP(92 , qup2_se3, mdp0_vsync6, _, atest_usb2, _, _, _, _, _),93 ] = PINGROUP(93 , qup2_se3, mdp0_vsync7, _, atest_usb2, _, _, _, _, _),94 ] = PINGROUP(94 , qup2_se3, mdp0_vsync8, _, atest_usb2, _, _, _, _, _),95 ] = PINGROUP(95 , qup2_se4, qup2_se6, _, atest_usb2, _, _, _, _, _),96 ] = PINGROUP(96 , qup2_se4, qup2_se6, _, atest_usb2, _, _, _, _, _),97 ] = PINGROUP(97 , qup2_se6, qup2_se4, cri_trng0, _, atest_usb2, _, _, _, _),98 ] = PINGROUP(98 , qup2_se6, qup2_se4, phase_flag, cri_trng1, _, _, _, _, _),99 ] = PINGROUP(99 , qup2_se5, qup2_se1, phase_flag, cri_trng, _, _, _, _, _),100 ] = PINGROUP(100 , qup2_se5, qup2_se1, _, _, _, _, _, _, _),101 ] = PINGROUP(101 , edp0_hot, prng_rosc0, tsense_pwm4, _, _, _, _, _, _),102 ] = PINGROUP(102 , edp1_hot, prng_rosc1, tsense_pwm3, _, _, _, _, _, _),103 ] = PINGROUP(103 , edp3_hot, prng_rosc2, tsense_pwm2, _, _, _, _, _, _),104 ] = PINGROUP(104 , edp2_hot, prng_rosc3, tsense_pwm1, _, _, _, _, _, _),105 ] = PINGROUP(105 , mi2s_mclk0, _, qdss_gpio, atest_usb2, _, _, _, _, _),106 ] = PINGROUP(106 , mi2s1_sck, phase_flag, _, qdss_gpio, _, _, _, _, _),107 ] = PINGROUP(107 , mi2s1_ws, phase_flag, _, qdss_gpio, _, _, _, _, _),108 ] = PINGROUP(108 , mi2s1_data0, phase_flag, _, qdss_gpio, _, _, _, _, _),109 ] = PINGROUP(109 , mi2s1_data1, phase_flag, _, qdss_gpio, _, _, _, _, _),110 ] = PINGROUP(110 , mi2s2_sck, phase_flag, _, qdss_gpio, _, _, _, _, _),111 ] = PINGROUP(111 , mi2s2_ws, phase_flag, _, qdss_gpio, vsense_trigger, _, _, _, _),112 ] = PINGROUP(112 , mi2s2_data0, phase_flag, _, qdss_gpio, _, _, _, _, _),113 ] = PINGROUP(113 , mi2s2_data1, audio_ref, phase_flag, _, qdss_gpio, _, _, _, _),114 ] = PINGROUP(114 , hs0_mi2s, pll_bist, phase_flag, _, qdss_gpio, _, _, _, _),115 ] = PINGROUP(115 , hs0_mi2s, _, qdss_gpio, _, _, _, _, _, _),116 ] = PINGROUP(116 , hs0_mi2s, _, qdss_gpio, _, _, _, _, _, _),117 ] = PINGROUP(117 , hs0_mi2s, mi2s_mclk1, _, qdss_gpio, _, _, _, _, _),118 ] = PINGROUP(118 , hs1_mi2s, _, qdss_gpio, ddr_pxi5, _, _, _, _, _),119 ] = PINGROUP(119 , hs1_mi2s, _, qdss_gpio, ddr_pxi5, _, _, _, _, _),120 ] = PINGROUP(120 , hs1_mi2s, phase_flag, _, qdss_gpio, _, _, _, _, _),121 ] = PINGROUP(121 , hs1_mi2s, phase_flag, _, qdss_gpio, _, _, _, _, _),122 ] = PINGROUP(122 , hs2_mi2s, phase_flag, _, qdss_gpio, _, _, _, _, _),123 ] = PINGROUP(123 , hs2_mi2s, phase_flag, _, _, _, _, _, _, _),124 ] = PINGROUP(124 , hs2_mi2s, phase_flag, _, _, _, _, _, _, _),125 ] = PINGROUP(125 , hs2_mi2s, phase_flag, _, _, _, _, _, _, _),126 ] = PINGROUP(126 , _, _, _, _, _, _, _, _, egpio),127 ] = PINGROUP(127 , _, _, _, _, _, _, _, _, egpio),128 ] = PINGROUP(128 , _, _, _, _, _, _, _, _, egpio),129 ] = PINGROUP(129 , _, _, _, _, _, _, _, _, egpio),130 ] = PINGROUP(130 , _, _, _, _, _, _, _, _, egpio),131 ] = PINGROUP(131 , _, _, _, _, _, _, _, _, egpio),132 ] = PINGROUP(132 , _, _, _, _, _, _, _, _, egpio),133 ] = PINGROUP(133 , _, _, _, _, _, _, _, _, egpio),134 ] = PINGROUP(134 , _, _, _, _, _, _, _, _, egpio),135 ] = PINGROUP(135 , _, _, _, _, _, _, _, _, egpio),136 ] = PINGROUP(136 , _, _, _, _, _, _, _, _, egpio),137 ] = PINGROUP(137 , _, _, _, _, _, _, _, _, egpio),138 ] = PINGROUP(138 , _, _, _, _, _, _, _, _, egpio),139 ] = PINGROUP(139 , _, _, _, _, _, _, _, _, egpio),140 ] = PINGROUP(140 , _, _, _, _, _, _, _, _, egpio),141 ] = PINGROUP(141 , _, _, _, _, _, _, _, _, egpio),142 ] = PINGROUP(142 , _, _, _, _, _, _, _, _, egpio),143 ] = PINGROUP(143 , _, _, _, _, _, _, _, _, egpio),144 ] = PINGROUP(144 , dbg_out, _, _, _, _, _, _, _, egpio),145 ] = PINGROUP(145 , _, _, _, _, _, _, _, _, egpio),146 ] = PINGROUP(146 , _, _, _, _, _, _, _, _, egpio),147 ] = PINGROUP(147 , _, _, _, _, _, _, _, _, egpio),148 ] = PINGROUP(148 , _, _, _, _, _, _, _, _, egpio),149 ] = UFS_RESET(ufs_reset, 0 x1a2000),150 ] = SDC_QDSD_PINGROUP(sdc1_rclk, 0 x199000, 15 , 0 ),151 ] = SDC_QDSD_PINGROUP(sdc1_clk, 0 x199000, 13 , 6 ),152 ] = SDC_QDSD_PINGROUP(sdc1_cmd, 0 x199000, 11 , 3 ),153 ] = SDC_QDSD_PINGROUP(sdc1_data, 0 x199000, 9 , 0 ),static const struct msm_gpio_wakeirq_map sa8775p_pdc_map[] = {0 , 169 }, { 1 , 174 }, { 2 , 170 }, { 3 , 175 }, { 4 , 171 }, { 5 , 173 },6 , 172 }, { 7 , 182 }, { 10 , 220 }, { 11 , 213 }, { 12 , 221 },16 , 230 }, { 19 , 231 }, { 20 , 232 }, { 23 , 233 }, { 24 , 234 },26 , 223 }, { 27 , 235 }, { 28 , 209 }, { 29 , 176 }, { 30 , 200 },31 , 201 }, { 32 , 212 }, { 35 , 177 }, { 36 , 178 }, { 39 , 184 },40 , 185 }, { 41 , 227 }, { 42 , 186 }, { 43 , 228 }, { 45 , 187 },47 , 188 }, { 48 , 194 }, { 51 , 195 }, { 52 , 196 }, { 55 , 197 },56 , 198 }, { 57 , 236 }, { 58 , 192 }, { 59 , 193 }, { 72 , 179 },73 , 180 }, { 74 , 181 }, { 75 , 202 }, { 76 , 183 }, { 77 , 189 },78 , 190 }, { 79 , 191 }, { 80 , 199 }, { 83 , 204 }, { 84 , 205 },85 , 229 }, { 86 , 206 }, { 89 , 207 }, { 91 , 208 }, { 94 , 214 },95 , 215 }, { 96 , 237 }, { 97 , 216 }, { 98 , 238 }, { 99 , 217 },100 , 239 }, { 105 , 219 }, { 106 , 210 }, { 107 , 211 }, { 108 , 222 },109 , 203 }, { 145 , 225 }, { 146 , 226 },static const struct msm_pinctrl_soc_data sa8775p_pinctrl = {150 ,9 ,static int sa8775p_pinctrl_probe(struct platform_device *pdev)return msm_pinctrl_probe(pdev, &sa8775p_pinctrl);static const struct of_device_id sa8775p_pinctrl_of_match[] = {"qcom,sa8775p-tlmm" , },static struct platform_driver sa8775p_pinctrl_driver = {"sa8775p-tlmm" ,static int __init sa8775p_pinctrl_init(void )return platform_driver_register(&sa8775p_pinctrl_driver);static void __exit sa8775p_pinctrl_exit(void )"QTI SA8775P pinctrl driver" );"GPL" );
Messung V0.5 in Prozent C=95 H=97 G=95
