// SPDX-License-Identifier: GPL-2.0-only /* * Ingenic SoCs pinctrl driver * * Copyright (c) 2017 Paul Cercueil <paul@crapouillou.net> * Copyright (c) 2017, 2019, 2020, 2023 Paul Boddie <paul@boddie.org.uk> * Copyright (c) 2019, 2020 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> #include <linux/compiler.h>#include <linux/gpio/driver.h>#include <linux/interrupt.h>#include <linux/io.h>#include <linux/kernel.h>#include <linux/mod_devicetable.h>#include <linux/of.h>#include <linux/platform_device.h>#include <linux/property.h>#include <linux/regmap.h>#include <linux/seq_file.h>#include <linux/slab.h>#include <linux/pinctrl/consumer.h>#include <linux/pinctrl/pinconf-generic.h>#include <linux/pinctrl/pinconf.h>#include <linux/pinctrl/pinctrl.h>#include <linux/pinctrl/pinmux.h>#include "core.h" #include "pinconf.h" #include "pinmux.h" #define GPIO_PIN 0x00#define GPIO_MSK 0x20#define JZ4730_GPIO_DATA 0x00#define JZ4730_GPIO_GPDIR 0x04#define JZ4730_GPIO_GPPUR 0x0c#define JZ4730_GPIO_GPALR 0x10#define JZ4730_GPIO_GPAUR 0x14#define JZ4730_GPIO_GPIDLR 0x18#define JZ4730_GPIO_GPIDUR 0x1c#define JZ4730_GPIO_GPIER 0x20#define JZ4730_GPIO_GPIMR 0x24#define JZ4730_GPIO_GPFR 0x28#define JZ4740_GPIO_DATA 0x10#define JZ4740_GPIO_PULL_DIS 0x30#define JZ4740_GPIO_FUNC 0x40#define JZ4740_GPIO_SELECT 0x50#define JZ4740_GPIO_DIR 0x60#define JZ4740_GPIO_TRIG 0x70#define JZ4740_GPIO_FLAG 0x80#define JZ4770_GPIO_INT 0x10#define JZ4770_GPIO_PAT1 0x30#define JZ4770_GPIO_PAT0 0x40#define JZ4770_GPIO_FLAG 0x50#define JZ4770_GPIO_PEN 0x70#define X1600_GPIO_PU 0x80#define X1830_GPIO_PEL 0x110#define X1830_GPIO_PEH 0x120#define X1830_GPIO_SR 0x150#define X1830_GPIO_SMT 0x160#define X2000_GPIO_EDG 0x70#define X2000_GPIO_PEPU 0x80#define X2000_GPIO_PEPD 0x90#define X2000_GPIO_SR 0xd0#define X2000_GPIO_SMT 0xe0#define REG_SET(x) ((x) + 0x4)#define REG_CLEAR(x) ((x) + 0x8)#define REG_PZ_BASE(x) ((x) * 7)#define REG_PZ_GID2LD(x) ((x) * 7 + 0xf0)#define GPIO_PULL_DIS 0#define GPIO_PULL_UP 1#define GPIO_PULL_DOWN 2#define PINS_PER_GPIO_CHIP 32#define JZ4730_PINS_PER_PAIRED_REG 16#define INGENIC_PIN_GROUP_FUNCS(_name_, id, funcs) \## _pins, ARRAY_SIZE(id## _pins)), \#define INGENIC_PIN_GROUP(_name_, id, func) \## _pins, ARRAY_SIZE(id## _pins)), \void *)func, \#define INGENIC_PIN_FUNCTION(_name_, id) \## _groups, ARRAY_SIZE(id## _groups)), \enum jz_version {struct ingenic_chip_info {unsigned int num_chips;unsigned int reg_offset;enum jz_version version;const struct group_desc *groups;unsigned int num_groups;const struct function_desc *functions;unsigned int num_functions;const u32 *pull_ups, *pull_downs;const struct regmap_access_table *access_table;struct ingenic_pinctrl {struct device *dev;struct regmap *map;struct pinctrl_dev *pctl;struct pinctrl_pin_desc *pdesc;const struct ingenic_chip_info *info;struct gpio_chip *gc;struct ingenic_gpio_chip {struct ingenic_pinctrl *jzpc;struct gpio_chip gc;unsigned int irq, reg_base;static const unsigned long enabled_socs =static bool const struct ingenic_pinctrl *jzpc, enum jz_version version)return (enabled_socs >> version) &&static const u32 jz4730_pull_ups[4] = {static const u32 jz4730_pull_downs[4] = {static int jz4730_mmc_1bit_pins[] = { 0x27, 0x26, 0x22, };static int jz4730_mmc_4bit_pins[] = { 0x23, 0x24, 0x25, };static int jz4730_uart0_data_pins[] = { 0x7e, 0x7f, };static int jz4730_uart1_data_pins[] = { 0x18, 0x19, };static int jz4730_uart2_data_pins[] = { 0x6f, 0x7d, };static int jz4730_uart3_data_pins[] = { 0x10, 0x15, };static int jz4730_uart3_hwflow_pins[] = { 0x11, 0x17, };static int jz4730_lcd_8bit_pins[] = {static int jz4730_lcd_16bit_pins[] = {static int jz4730_lcd_special_pins[] = { 0x3d, 0x3c, 0x3e, 0x3f, };static int jz4730_lcd_generic_pins[] = { 0x3b, };static int jz4730_nand_cs1_pins[] = { 0x53, };static int jz4730_nand_cs2_pins[] = { 0x54, };static int jz4730_nand_cs3_pins[] = { 0x55, };static int jz4730_nand_cs4_pins[] = { 0x56, };static int jz4730_nand_cs5_pins[] = { 0x57, };static int jz4730_pwm_pwm0_pins[] = { 0x5e, };static int jz4730_pwm_pwm1_pins[] = { 0x5f, };static int jz4730_mii_pins[] = { 0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76,static int jz4730_i2s_mclk_pins[] = { 0x44, };static int jz4730_i2s_acreset_pins[] = { 0x45, };static int jz4730_i2s_data_pins[] = { 0x46, 0x47, };static int jz4730_i2s_clock_pins[] = { 0x4d, 0x4e, };static u8 jz4730_lcd_8bit_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, };static const struct group_desc jz4730_groups[] = {"mmc-1bit" , jz4730_mmc_1bit, 1),"mmc-4bit" , jz4730_mmc_4bit, 1),"uart0-data" , jz4730_uart0_data, 1),"uart1-data" , jz4730_uart1_data, 1),"uart2-data" , jz4730_uart2_data, 1),"uart3-data" , jz4730_uart3_data, 1),"uart3-hwflow" , jz4730_uart3_hwflow, 1),"lcd-8bit" , jz4730_lcd_8bit, jz4730_lcd_8bit_funcs),"lcd-16bit" , jz4730_lcd_16bit, 1),"lcd-special" , jz4730_lcd_special, 1),"lcd-generic" , jz4730_lcd_generic, 1),"nand-cs1" , jz4730_nand_cs1, 1),"nand-cs2" , jz4730_nand_cs2, 1),"nand-cs3" , jz4730_nand_cs3, 1),"nand-cs4" , jz4730_nand_cs4, 1),"nand-cs5" , jz4730_nand_cs5, 1),"pwm0" , jz4730_pwm_pwm0, 1),"pwm1" , jz4730_pwm_pwm1, 1),"mii" , jz4730_mii, 1),"i2s-mclk-out" , jz4730_i2s_mclk, 1),"i2s-acreset" , jz4730_i2s_acreset, 1),"i2s-data" , jz4730_i2s_data, 1),"i2s-master" , jz4730_i2s_clock, 1),"i2s-slave" , jz4730_i2s_clock, 2),static const char *jz4730_mmc_groups[] = { "mmc-1bit" , "mmc-4bit" , };static const char *jz4730_uart0_groups[] = { "uart0-data" , };static const char *jz4730_uart1_groups[] = { "uart1-data" , };static const char *jz4730_uart2_groups[] = { "uart2-data" , };static const char *jz4730_uart3_groups[] = { "uart3-data" , "uart3-hwflow" , };static const char *jz4730_lcd_groups[] = {"lcd-8bit" , "lcd-16bit" , "lcd-special" , "lcd-generic" ,static const char *jz4730_nand_groups[] = {"nand-cs1" , "nand-cs2" , "nand-cs3" , "nand-cs4" , "nand-cs5" ,static const char *jz4730_pwm0_groups[] = { "pwm0" , };static const char *jz4730_pwm1_groups[] = { "pwm1" , };static const char *jz4730_mii_groups[] = { "mii" , };static const char *jz4730_i2s_groups[] = { "i2s-data" , "i2s-master" , "i2s-slave" , };static const struct function_desc jz4730_functions[] = {"mmc" , jz4730_mmc),"uart0" , jz4730_uart0),"uart1" , jz4730_uart1),"uart2" , jz4730_uart2),"uart3" , jz4730_uart3),"lcd" , jz4730_lcd),"nand" , jz4730_nand),"pwm0" , jz4730_pwm0),"pwm1" , jz4730_pwm1),"mii" , jz4730_mii),"i2s" , jz4730_i2s),static const struct ingenic_chip_info jz4730_chip_info = {static const u32 jz4740_pull_ups[4] = {static const u32 jz4740_pull_downs[4] = {static int jz4740_mmc_1bit_pins[] = { 0x69, 0x68, 0x6a, };static int jz4740_mmc_4bit_pins[] = { 0x6b, 0x6c, 0x6d, };static int jz4740_uart0_data_pins[] = { 0x7a, 0x79, };static int jz4740_uart0_hwflow_pins[] = { 0x7e, 0x7f, };static int jz4740_uart1_data_pins[] = { 0x7e, 0x7f, };static int jz4740_lcd_8bit_pins[] = {static int jz4740_lcd_16bit_pins[] = {static int jz4740_lcd_18bit_pins[] = { 0x50, 0x51, };static int jz4740_lcd_special_pins[] = { 0x31, 0x32, 0x56, 0x57, };static int jz4740_lcd_generic_pins[] = { 0x55, };static int jz4740_nand_cs1_pins[] = { 0x39, };static int jz4740_nand_cs2_pins[] = { 0x3a, };static int jz4740_nand_cs3_pins[] = { 0x3b, };static int jz4740_nand_cs4_pins[] = { 0x3c, };static int jz4740_nand_fre_fwe_pins[] = { 0x5c, 0x5d, };static int jz4740_pwm_pwm0_pins[] = { 0x77, };static int jz4740_pwm_pwm1_pins[] = { 0x78, };static int jz4740_pwm_pwm2_pins[] = { 0x79, };static int jz4740_pwm_pwm3_pins[] = { 0x7a, };static int jz4740_pwm_pwm4_pins[] = { 0x7b, };static int jz4740_pwm_pwm5_pins[] = { 0x7c, };static int jz4740_pwm_pwm6_pins[] = { 0x7e, };static int jz4740_pwm_pwm7_pins[] = { 0x7f, };static const struct group_desc jz4740_groups[] = {"mmc-1bit" , jz4740_mmc_1bit, 0),"mmc-4bit" , jz4740_mmc_4bit, 0),"uart0-data" , jz4740_uart0_data, 1),"uart0-hwflow" , jz4740_uart0_hwflow, 1),"uart1-data" , jz4740_uart1_data, 2),"lcd-8bit" , jz4740_lcd_8bit, 0),"lcd-16bit" , jz4740_lcd_16bit, 0),"lcd-18bit" , jz4740_lcd_18bit, 0),"lcd-special" , jz4740_lcd_special, 0),"lcd-generic" , jz4740_lcd_generic, 0),"nand-cs1" , jz4740_nand_cs1, 0),"nand-cs2" , jz4740_nand_cs2, 0),"nand-cs3" , jz4740_nand_cs3, 0),"nand-cs4" , jz4740_nand_cs4, 0),"nand-fre-fwe" , jz4740_nand_fre_fwe, 0),"pwm0" , jz4740_pwm_pwm0, 0),"pwm1" , jz4740_pwm_pwm1, 0),"pwm2" , jz4740_pwm_pwm2, 0),"pwm3" , jz4740_pwm_pwm3, 0),"pwm4" , jz4740_pwm_pwm4, 0),"pwm5" , jz4740_pwm_pwm5, 0),"pwm6" , jz4740_pwm_pwm6, 0),"pwm7" , jz4740_pwm_pwm7, 0),static const char *jz4740_mmc_groups[] = { "mmc-1bit" , "mmc-4bit" , };static const char *jz4740_uart0_groups[] = { "uart0-data" , "uart0-hwflow" , };static const char *jz4740_uart1_groups[] = { "uart1-data" , };static const char *jz4740_lcd_groups[] = {"lcd-8bit" , "lcd-16bit" , "lcd-18bit" , "lcd-special" , "lcd-generic" ,static const char *jz4740_nand_groups[] = {"nand-cs1" , "nand-cs2" , "nand-cs3" , "nand-cs4" , "nand-fre-fwe" ,static const char *jz4740_pwm0_groups[] = { "pwm0" , };static const char *jz4740_pwm1_groups[] = { "pwm1" , };static const char *jz4740_pwm2_groups[] = { "pwm2" , };static const char *jz4740_pwm3_groups[] = { "pwm3" , };static const char *jz4740_pwm4_groups[] = { "pwm4" , };static const char *jz4740_pwm5_groups[] = { "pwm5" , };static const char *jz4740_pwm6_groups[] = { "pwm6" , };static const char *jz4740_pwm7_groups[] = { "pwm7" , };static const struct function_desc jz4740_functions[] = {"mmc" , jz4740_mmc),"uart0" , jz4740_uart0),"uart1" , jz4740_uart1),"lcd" , jz4740_lcd),"nand" , jz4740_nand),"pwm0" , jz4740_pwm0),"pwm1" , jz4740_pwm1),"pwm2" , jz4740_pwm2),"pwm3" , jz4740_pwm3),"pwm4" , jz4740_pwm4),"pwm5" , jz4740_pwm5),"pwm6" , jz4740_pwm6),"pwm7" , jz4740_pwm7),static const struct ingenic_chip_info jz4740_chip_info = {static int jz4725b_mmc0_1bit_pins[] = { 0x48, 0x49, 0x5c, };static int jz4725b_mmc0_4bit_pins[] = { 0x5d, 0x5b, 0x56, };static int jz4725b_mmc1_1bit_pins[] = { 0x7a, 0x7b, 0x7c, };static int jz4725b_mmc1_4bit_pins[] = { 0x7d, 0x7e, 0x7f, };static int jz4725b_uart_data_pins[] = { 0x4c, 0x4d, };static int jz4725b_lcd_8bit_pins[] = {static int jz4725b_lcd_16bit_pins[] = {static int jz4725b_lcd_18bit_pins[] = { 0x70, 0x71, };static int jz4725b_lcd_24bit_pins[] = { 0x76, 0x77, 0x78, 0x79, };static int jz4725b_lcd_special_pins[] = { 0x76, 0x77, 0x78, 0x79, };static int jz4725b_lcd_generic_pins[] = { 0x75, };static int jz4725b_nand_cs1_pins[] = { 0x55, };static int jz4725b_nand_cs2_pins[] = { 0x56, };static int jz4725b_nand_cs3_pins[] = { 0x57, };static int jz4725b_nand_cs4_pins[] = { 0x58, };static int jz4725b_nand_cle_ale_pins[] = { 0x48, 0x49 };static int jz4725b_nand_fre_fwe_pins[] = { 0x5c, 0x5d };static int jz4725b_pwm_pwm0_pins[] = { 0x4a, };static int jz4725b_pwm_pwm1_pins[] = { 0x4b, };static int jz4725b_pwm_pwm2_pins[] = { 0x4c, };static int jz4725b_pwm_pwm3_pins[] = { 0x4d, };static int jz4725b_pwm_pwm4_pins[] = { 0x4e, };static int jz4725b_pwm_pwm5_pins[] = { 0x4f, };static u8 jz4725b_mmc0_4bit_funcs[] = { 1, 0, 1, };static const struct group_desc jz4725b_groups[] = {"mmc0-1bit" , jz4725b_mmc0_1bit, 1),"mmc0-4bit" , jz4725b_mmc0_4bit,"mmc1-1bit" , jz4725b_mmc1_1bit, 0),"mmc1-4bit" , jz4725b_mmc1_4bit, 0),"uart-data" , jz4725b_uart_data, 1),"lcd-8bit" , jz4725b_lcd_8bit, 0),"lcd-16bit" , jz4725b_lcd_16bit, 0),"lcd-18bit" , jz4725b_lcd_18bit, 0),"lcd-24bit" , jz4725b_lcd_24bit, 1),"lcd-special" , jz4725b_lcd_special, 0),"lcd-generic" , jz4725b_lcd_generic, 0),"nand-cs1" , jz4725b_nand_cs1, 0),"nand-cs2" , jz4725b_nand_cs2, 0),"nand-cs3" , jz4725b_nand_cs3, 0),"nand-cs4" , jz4725b_nand_cs4, 0),"nand-cle-ale" , jz4725b_nand_cle_ale, 0),"nand-fre-fwe" , jz4725b_nand_fre_fwe, 0),"pwm0" , jz4725b_pwm_pwm0, 0),"pwm1" , jz4725b_pwm_pwm1, 0),"pwm2" , jz4725b_pwm_pwm2, 0),"pwm3" , jz4725b_pwm_pwm3, 0),"pwm4" , jz4725b_pwm_pwm4, 0),"pwm5" , jz4725b_pwm_pwm5, 0),static const char *jz4725b_mmc0_groups[] = { "mmc0-1bit" , "mmc0-4bit" , };static const char *jz4725b_mmc1_groups[] = { "mmc1-1bit" , "mmc1-4bit" , };static const char *jz4725b_uart_groups[] = { "uart-data" , };static const char *jz4725b_lcd_groups[] = {"lcd-8bit" , "lcd-16bit" , "lcd-18bit" , "lcd-24bit" ,"lcd-special" , "lcd-generic" ,static const char *jz4725b_nand_groups[] = {"nand-cs1" , "nand-cs2" , "nand-cs3" , "nand-cs4" ,"nand-cle-ale" , "nand-fre-fwe" ,static const char *jz4725b_pwm0_groups[] = { "pwm0" , };static const char *jz4725b_pwm1_groups[] = { "pwm1" , };static const char *jz4725b_pwm2_groups[] = { "pwm2" , };static const char *jz4725b_pwm3_groups[] = { "pwm3" , };static const char *jz4725b_pwm4_groups[] = { "pwm4" , };static const char *jz4725b_pwm5_groups[] = { "pwm5" , };static const struct function_desc jz4725b_functions[] = {"mmc0" , jz4725b_mmc0),"mmc1" , jz4725b_mmc1),"uart" , jz4725b_uart),"nand" , jz4725b_nand),"pwm0" , jz4725b_pwm0),"pwm1" , jz4725b_pwm1),"pwm2" , jz4725b_pwm2),"pwm3" , jz4725b_pwm3),"pwm4" , jz4725b_pwm4),"pwm5" , jz4725b_pwm5),"lcd" , jz4725b_lcd),static const struct ingenic_chip_info jz4725b_chip_info = {static const u32 jz4750_pull_ups[6] = {static const u32 jz4750_pull_downs[6] = {static int jz4750_uart0_data_pins[] = { 0xa4, 0xa5, };static int jz4750_uart0_hwflow_pins[] = { 0xa6, 0xa7, };static int jz4750_uart1_data_pins[] = { 0x90, 0x91, };static int jz4750_uart1_hwflow_pins[] = { 0x92, 0x93, };static int jz4750_uart2_data_pins[] = { 0x9b, 0x9a, };static int jz4750_uart3_data_pins[] = { 0xb0, 0xb1, };static int jz4750_uart3_hwflow_pins[] = { 0xb2, 0xb3, };static int jz4750_mmc0_1bit_pins[] = { 0xa8, 0xa9, 0xa0, };static int jz4750_mmc0_4bit_pins[] = { 0xa1, 0xa2, 0xa3, };static int jz4750_mmc0_8bit_pins[] = { 0xa4, 0xa5, 0xa6, 0xa7, };static int jz4750_mmc1_1bit_pins[] = { 0xae, 0xaf, 0xaa, };static int jz4750_mmc1_4bit_pins[] = { 0xab, 0xac, 0xad, };static int jz4750_i2c_pins[] = { 0x8c, 0x8d, };static int jz4750_cim_pins[] = {static int jz4750_lcd_8bit_pins[] = {static int jz4750_lcd_16bit_pins[] = {static int jz4750_lcd_18bit_pins[] = { 0x70, 0x71, };static int jz4750_lcd_24bit_pins[] = { 0x76, 0x77, 0x78, 0x79, 0xb2, 0xb3, };static int jz4750_lcd_special_pins[] = { 0x76, 0x77, 0x78, 0x79, };static int jz4750_lcd_generic_pins[] = { 0x75, };static int jz4750_nand_cs1_pins[] = { 0x55, };static int jz4750_nand_cs2_pins[] = { 0x56, };static int jz4750_nand_cs3_pins[] = { 0x57, };static int jz4750_nand_cs4_pins[] = { 0x58, };static int jz4750_nand_fre_fwe_pins[] = { 0x5c, 0x5d, };static int jz4750_pwm_pwm0_pins[] = { 0x94, };static int jz4750_pwm_pwm1_pins[] = { 0x95, };static int jz4750_pwm_pwm2_pins[] = { 0x96, };static int jz4750_pwm_pwm3_pins[] = { 0x97, };static int jz4750_pwm_pwm4_pins[] = { 0x98, };static int jz4750_pwm_pwm5_pins[] = { 0x99, };static const struct group_desc jz4750_groups[] = {"uart0-data" , jz4750_uart0_data, 1),"uart0-hwflow" , jz4750_uart0_hwflow, 1),"uart1-data" , jz4750_uart1_data, 0),"uart1-hwflow" , jz4750_uart1_hwflow, 0),"uart2-data" , jz4750_uart2_data, 1),"uart3-data" , jz4750_uart3_data, 0),"uart3-hwflow" , jz4750_uart3_hwflow, 0),"mmc0-1bit" , jz4750_mmc0_1bit, 0),"mmc0-4bit" , jz4750_mmc0_4bit, 0),"mmc0-8bit" , jz4750_mmc0_8bit, 0),"mmc1-1bit" , jz4750_mmc1_1bit, 0),"mmc1-4bit" , jz4750_mmc1_4bit, 0),"i2c-data" , jz4750_i2c, 0),"cim-data" , jz4750_cim, 0),"lcd-8bit" , jz4750_lcd_8bit, 0),"lcd-16bit" , jz4750_lcd_16bit, 0),"lcd-18bit" , jz4750_lcd_18bit, 0),"lcd-24bit" , jz4750_lcd_24bit, 1),"lcd-special" , jz4750_lcd_special, 0),"lcd-generic" , jz4750_lcd_generic, 0),"nand-cs1" , jz4750_nand_cs1, 0),"nand-cs2" , jz4750_nand_cs2, 0),"nand-cs3" , jz4750_nand_cs3, 0),"nand-cs4" , jz4750_nand_cs4, 0),"nand-fre-fwe" , jz4750_nand_fre_fwe, 0),"pwm0" , jz4750_pwm_pwm0, 0),"pwm1" , jz4750_pwm_pwm1, 0),"pwm2" , jz4750_pwm_pwm2, 0),"pwm3" , jz4750_pwm_pwm3, 0),"pwm4" , jz4750_pwm_pwm4, 0),"pwm5" , jz4750_pwm_pwm5, 0),static const char *jz4750_uart0_groups[] = { "uart0-data" , "uart0-hwflow" , };static const char *jz4750_uart1_groups[] = { "uart1-data" , "uart1-hwflow" , };static const char *jz4750_uart2_groups[] = { "uart2-data" , };static const char *jz4750_uart3_groups[] = { "uart3-data" , "uart3-hwflow" , };static const char *jz4750_mmc0_groups[] = {"mmc0-1bit" , "mmc0-4bit" , "mmc0-8bit" ,static const char *jz4750_mmc1_groups[] = { "mmc0-1bit" , "mmc0-4bit" , };static const char *jz4750_i2c_groups[] = { "i2c-data" , };static const char *jz4750_cim_groups[] = { "cim-data" , };static const char *jz4750_lcd_groups[] = {"lcd-8bit" , "lcd-16bit" , "lcd-18bit" , "lcd-24bit" ,"lcd-special" , "lcd-generic" ,static const char *jz4750_nand_groups[] = {"nand-cs1" , "nand-cs2" , "nand-cs3" , "nand-cs4" , "nand-fre-fwe" ,static const char *jz4750_pwm0_groups[] = { "pwm0" , };static const char *jz4750_pwm1_groups[] = { "pwm1" , };static const char *jz4750_pwm2_groups[] = { "pwm2" , };static const char *jz4750_pwm3_groups[] = { "pwm3" , };static const char *jz4750_pwm4_groups[] = { "pwm4" , };static const char *jz4750_pwm5_groups[] = { "pwm5" , };static const struct function_desc jz4750_functions[] = {"uart0" , jz4750_uart0),"uart1" , jz4750_uart1),"uart2" , jz4750_uart2),"uart3" , jz4750_uart3),"mmc0" , jz4750_mmc0),"mmc1" , jz4750_mmc1),"i2c" , jz4750_i2c),"cim" , jz4750_cim),"lcd" , jz4750_lcd),"nand" , jz4750_nand),"pwm0" , jz4750_pwm0),"pwm1" , jz4750_pwm1),"pwm2" , jz4750_pwm2),"pwm3" , jz4750_pwm3),"pwm4" , jz4750_pwm4),"pwm5" , jz4750_pwm5),static const struct ingenic_chip_info jz4750_chip_info = {static const u32 jz4755_pull_ups[6] = {static const u32 jz4755_pull_downs[6] = {static int jz4755_uart0_data_pins[] = { 0x7c, 0x7d, };static int jz4755_uart0_hwflow_pins[] = { 0x7e, 0x7f, };static int jz4755_uart1_data_pins[] = { 0x97, 0x99, };static int jz4755_uart2_data_pins[] = { 0x9f, };static int jz4755_ssi_dt_b_pins[] = { 0x3b, };static int jz4755_ssi_dt_f_pins[] = { 0xa1, };static int jz4755_ssi_dr_b_pins[] = { 0x3c, };static int jz4755_ssi_dr_f_pins[] = { 0xa2, };static int jz4755_ssi_clk_b_pins[] = { 0x3a, };static int jz4755_ssi_clk_f_pins[] = { 0xa0, };static int jz4755_ssi_gpc_b_pins[] = { 0x3e, };static int jz4755_ssi_gpc_f_pins[] = { 0xa4, };static int jz4755_ssi_ce0_b_pins[] = { 0x3d, };static int jz4755_ssi_ce0_f_pins[] = { 0xa3, };static int jz4755_ssi_ce1_b_pins[] = { 0x3f, };static int jz4755_ssi_ce1_f_pins[] = { 0xa5, };static int jz4755_mmc0_1bit_pins[] = { 0x2f, 0x50, 0x5c, };static int jz4755_mmc0_4bit_pins[] = { 0x5d, 0x5b, 0x51, };static int jz4755_mmc1_1bit_pins[] = { 0x3a, 0x3d, 0x3c, };static int jz4755_mmc1_4bit_pins[] = { 0x3b, 0x3e, 0x3f, };static int jz4755_i2c_pins[] = { 0x8c, 0x8d, };static int jz4755_cim_pins[] = {static int jz4755_lcd_8bit_pins[] = {static int jz4755_lcd_16bit_pins[] = {static int jz4755_lcd_18bit_pins[] = { 0x70, 0x71, };static int jz4755_lcd_24bit_pins[] = { 0x76, 0x77, 0x78, 0x79, 0x7a, 0x7b, };static int jz4755_lcd_special_pins[] = { 0x76, 0x77, 0x78, 0x79, };static int jz4755_lcd_generic_pins[] = { 0x75, };static int jz4755_nand_cs1_pins[] = { 0x55, };static int jz4755_nand_cs2_pins[] = { 0x56, };static int jz4755_nand_cs3_pins[] = { 0x57, };static int jz4755_nand_cs4_pins[] = { 0x58, };static int jz4755_nand_fre_fwe_pins[] = { 0x5c, 0x5d, };static int jz4755_pwm_pwm0_pins[] = { 0x94, };static int jz4755_pwm_pwm1_pins[] = { 0xab, };static int jz4755_pwm_pwm2_pins[] = { 0x96, };static int jz4755_pwm_pwm3_pins[] = { 0x97, };static int jz4755_pwm_pwm4_pins[] = { 0x98, };static int jz4755_pwm_pwm5_pins[] = { 0x99, };static u8 jz4755_mmc0_1bit_funcs[] = { 2, 2, 1, };static u8 jz4755_mmc0_4bit_funcs[] = { 1, 0, 1, };static u8 jz4755_lcd_24bit_funcs[] = { 1, 1, 1, 1, 0, 0, };static const struct group_desc jz4755_groups[] = {"uart0-data" , jz4755_uart0_data, 0),"uart0-hwflow" , jz4755_uart0_hwflow, 0),"uart1-data" , jz4755_uart1_data, 1),"uart2-data" , jz4755_uart2_data, 1),"ssi-dt-b" , jz4755_ssi_dt_b, 0),"ssi-dt-f" , jz4755_ssi_dt_f, 0),"ssi-dr-b" , jz4755_ssi_dr_b, 0),"ssi-dr-f" , jz4755_ssi_dr_f, 0),"ssi-clk-b" , jz4755_ssi_clk_b, 0),"ssi-clk-f" , jz4755_ssi_clk_f, 0),"ssi-gpc-b" , jz4755_ssi_gpc_b, 0),"ssi-gpc-f" , jz4755_ssi_gpc_f, 0),"ssi-ce0-b" , jz4755_ssi_ce0_b, 0),"ssi-ce0-f" , jz4755_ssi_ce0_f, 0),"ssi-ce1-b" , jz4755_ssi_ce1_b, 0),"ssi-ce1-f" , jz4755_ssi_ce1_f, 0),"mmc0-1bit" , jz4755_mmc0_1bit,"mmc0-4bit" , jz4755_mmc0_4bit,"mmc1-1bit" , jz4755_mmc1_1bit, 1),"mmc1-4bit" , jz4755_mmc1_4bit, 1),"i2c-data" , jz4755_i2c, 0),"cim-data" , jz4755_cim, 0),"lcd-8bit" , jz4755_lcd_8bit, 0),"lcd-16bit" , jz4755_lcd_16bit, 0),"lcd-18bit" , jz4755_lcd_18bit, 0),"lcd-24bit" , jz4755_lcd_24bit,"lcd-special" , jz4755_lcd_special, 0),"lcd-generic" , jz4755_lcd_generic, 0),"nand-cs1" , jz4755_nand_cs1, 0),"nand-cs2" , jz4755_nand_cs2, 0),"nand-cs3" , jz4755_nand_cs3, 0),"nand-cs4" , jz4755_nand_cs4, 0),"nand-fre-fwe" , jz4755_nand_fre_fwe, 0),"pwm0" , jz4755_pwm_pwm0, 0),"pwm1" , jz4755_pwm_pwm1, 1),"pwm2" , jz4755_pwm_pwm2, 0),"pwm3" , jz4755_pwm_pwm3, 0),"pwm4" , jz4755_pwm_pwm4, 0),"pwm5" , jz4755_pwm_pwm5, 0),static const char *jz4755_uart0_groups[] = { "uart0-data" , "uart0-hwflow" , };static const char *jz4755_uart1_groups[] = { "uart1-data" , };static const char *jz4755_uart2_groups[] = { "uart2-data" , };static const char *jz4755_ssi_groups[] = {"ssi-dt-b" , "ssi-dt-f" ,"ssi-dr-b" , "ssi-dr-f" ,"ssi-clk-b" , "ssi-clk-f" ,"ssi-gpc-b" , "ssi-gpc-f" ,"ssi-ce0-b" , "ssi-ce0-f" ,"ssi-ce1-b" , "ssi-ce1-f" ,static const char *jz4755_mmc0_groups[] = { "mmc0-1bit" , "mmc0-4bit" , };static const char *jz4755_mmc1_groups[] = { "mmc1-1bit" , "mmc1-4bit" , };static const char *jz4755_i2c_groups[] = { "i2c-data" , };static const char *jz4755_cim_groups[] = { "cim-data" , };static const char *jz4755_lcd_groups[] = {"lcd-8bit" , "lcd-16bit" , "lcd-18bit" , "lcd-24bit" ,"lcd-special" , "lcd-generic" ,static const char *jz4755_nand_groups[] = {"nand-cs1" , "nand-cs2" , "nand-cs3" , "nand-cs4" , "nand-fre-fwe" ,static const char *jz4755_pwm0_groups[] = { "pwm0" , };static const char *jz4755_pwm1_groups[] = { "pwm1" , };static const char *jz4755_pwm2_groups[] = { "pwm2" , };static const char *jz4755_pwm3_groups[] = { "pwm3" , };static const char *jz4755_pwm4_groups[] = { "pwm4" , };static const char *jz4755_pwm5_groups[] = { "pwm5" , };static const struct function_desc jz4755_functions[] = {"uart0" , jz4755_uart0),"uart1" , jz4755_uart1),"uart2" , jz4755_uart2),"ssi" , jz4755_ssi),"mmc0" , jz4755_mmc0),"mmc1" , jz4755_mmc1),"i2c" , jz4755_i2c),"cim" , jz4755_cim),"lcd" , jz4755_lcd),"nand" , jz4755_nand),"pwm0" , jz4755_pwm0),"pwm1" , jz4755_pwm1),"pwm2" , jz4755_pwm2),"pwm3" , jz4755_pwm3),"pwm4" , jz4755_pwm4),"pwm5" , jz4755_pwm5),static const struct ingenic_chip_info jz4755_chip_info = {static const u32 jz4760_pull_ups[6] = {static const u32 jz4760_pull_downs[6] = {static int jz4760_uart0_data_pins[] = { 0xa0, 0xa3, };static int jz4760_uart0_hwflow_pins[] = { 0xa1, 0xa2, };static int jz4760_uart1_data_pins[] = { 0x7a, 0x7c, };static int jz4760_uart1_hwflow_pins[] = { 0x7b, 0x7d, };static int jz4760_uart2_data_pins[] = { 0x5c, 0x5e, };static int jz4760_uart2_hwflow_pins[] = { 0x5d, 0x5f, };static int jz4760_uart3_data_pins[] = { 0x6c, 0x85, };static int jz4760_uart3_hwflow_pins[] = { 0x88, 0x89, };static int jz4760_ssi0_dt_a_pins[] = { 0x15, };static int jz4760_ssi0_dt_b_pins[] = { 0x35, };static int jz4760_ssi0_dt_d_pins[] = { 0x75, };static int jz4760_ssi0_dt_e_pins[] = { 0x91, };static int jz4760_ssi0_dr_a_pins[] = { 0x14, };static int jz4760_ssi0_dr_b_pins[] = { 0x34, };static int jz4760_ssi0_dr_d_pins[] = { 0x74, };static int jz4760_ssi0_dr_e_pins[] = { 0x8e, };static int jz4760_ssi0_clk_a_pins[] = { 0x12, };static int jz4760_ssi0_clk_b_pins[] = { 0x3c, };static int jz4760_ssi0_clk_d_pins[] = { 0x78, };static int jz4760_ssi0_clk_e_pins[] = { 0x8f, };static int jz4760_ssi0_gpc_b_pins[] = { 0x3e, };static int jz4760_ssi0_gpc_d_pins[] = { 0x76, };static int jz4760_ssi0_gpc_e_pins[] = { 0x93, };static int jz4760_ssi0_ce0_a_pins[] = { 0x13, };static int jz4760_ssi0_ce0_b_pins[] = { 0x3d, };static int jz4760_ssi0_ce0_d_pins[] = { 0x79, };static int jz4760_ssi0_ce0_e_pins[] = { 0x90, };static int jz4760_ssi0_ce1_b_pins[] = { 0x3f, };static int jz4760_ssi0_ce1_d_pins[] = { 0x77, };static int jz4760_ssi0_ce1_e_pins[] = { 0x92, };static int jz4760_ssi1_dt_b_9_pins[] = { 0x29, };static int jz4760_ssi1_dt_b_21_pins[] = { 0x35, };static int jz4760_ssi1_dt_d_12_pins[] = { 0x6c, };static int jz4760_ssi1_dt_d_21_pins[] = { 0x75, };static int jz4760_ssi1_dt_e_pins[] = { 0x91, };static int jz4760_ssi1_dt_f_pins[] = { 0xa3, };static int jz4760_ssi1_dr_b_6_pins[] = { 0x26, };static int jz4760_ssi1_dr_b_20_pins[] = { 0x34, };static int jz4760_ssi1_dr_d_13_pins[] = { 0x6d, };static int jz4760_ssi1_dr_d_20_pins[] = { 0x74, };static int jz4760_ssi1_dr_e_pins[] = { 0x8e, };static int jz4760_ssi1_dr_f_pins[] = { 0xa0, };static int jz4760_ssi1_clk_b_7_pins[] = { 0x27, };static int jz4760_ssi1_clk_b_28_pins[] = { 0x3c, };static int jz4760_ssi1_clk_d_pins[] = { 0x78, };static int jz4760_ssi1_clk_e_7_pins[] = { 0x87, };static int jz4760_ssi1_clk_e_15_pins[] = { 0x8f, };static int jz4760_ssi1_clk_f_pins[] = { 0xa2, };static int jz4760_ssi1_gpc_b_pins[] = { 0x3e, };static int jz4760_ssi1_gpc_d_pins[] = { 0x76, };static int jz4760_ssi1_gpc_e_pins[] = { 0x93, };static int jz4760_ssi1_ce0_b_8_pins[] = { 0x28, };static int jz4760_ssi1_ce0_b_29_pins[] = { 0x3d, };static int jz4760_ssi1_ce0_d_pins[] = { 0x79, };static int jz4760_ssi1_ce0_e_6_pins[] = { 0x86, };static int jz4760_ssi1_ce0_e_16_pins[] = { 0x90, };static int jz4760_ssi1_ce0_f_pins[] = { 0xa1, };static int jz4760_ssi1_ce1_b_pins[] = { 0x3f, };static int jz4760_ssi1_ce1_d_pins[] = { 0x77, };static int jz4760_ssi1_ce1_e_pins[] = { 0x92, };static int jz4760_mmc0_1bit_a_pins[] = { 0x12, 0x13, 0x14, };static int jz4760_mmc0_4bit_a_pins[] = { 0x15, 0x16, 0x17, };static int jz4760_mmc0_1bit_e_pins[] = { 0x9c, 0x9d, 0x94, };static int jz4760_mmc0_4bit_e_pins[] = { 0x95, 0x96, 0x97, };static int jz4760_mmc0_8bit_e_pins[] = { 0x98, 0x99, 0x9a, 0x9b, };static int jz4760_mmc1_1bit_d_pins[] = { 0x78, 0x79, 0x74, };static int jz4760_mmc1_4bit_d_pins[] = { 0x75, 0x76, 0x77, };static int jz4760_mmc1_1bit_e_pins[] = { 0x9c, 0x9d, 0x94, };static int jz4760_mmc1_4bit_e_pins[] = { 0x95, 0x96, 0x97, };static int jz4760_mmc1_8bit_e_pins[] = { 0x98, 0x99, 0x9a, 0x9b, };static int jz4760_mmc2_1bit_b_pins[] = { 0x3c, 0x3d, 0x34, };static int jz4760_mmc2_4bit_b_pins[] = { 0x35, 0x3e, 0x3f, };static int jz4760_mmc2_1bit_e_pins[] = { 0x9c, 0x9d, 0x94, };static int jz4760_mmc2_4bit_e_pins[] = { 0x95, 0x96, 0x97, };static int jz4760_mmc2_8bit_e_pins[] = { 0x98, 0x99, 0x9a, 0x9b, };static int jz4760_nemc_8bit_data_pins[] = {static int jz4760_nemc_16bit_data_pins[] = {static int jz4760_nemc_cle_ale_pins[] = { 0x20, 0x21, };static int jz4760_nemc_addr_pins[] = { 0x22, 0x23, 0x24, 0x25, };static int jz4760_nemc_rd_we_pins[] = { 0x10, 0x11, };static int jz4760_nemc_frd_fwe_pins[] = { 0x12, 0x13, };static int jz4760_nemc_wait_pins[] = { 0x1b, };static int jz4760_nemc_cs1_pins[] = { 0x15, };static int jz4760_nemc_cs2_pins[] = { 0x16, };static int jz4760_nemc_cs3_pins[] = { 0x17, };static int jz4760_nemc_cs4_pins[] = { 0x18, };static int jz4760_nemc_cs5_pins[] = { 0x19, };static int jz4760_nemc_cs6_pins[] = { 0x1a, };static int jz4760_i2c0_pins[] = { 0x7e, 0x7f, };static int jz4760_i2c1_pins[] = { 0x9e, 0x9f, };static int jz4760_cim_pins[] = {static int jz4760_lcd_8bit_pins[] = {static int jz4760_lcd_16bit_pins[] = {static int jz4760_lcd_18bit_pins[] = {static int jz4760_lcd_24bit_pins[] = {static int jz4760_lcd_special_pins[] = { 0x54, 0x4a, 0x41, 0x40, };static int jz4760_lcd_generic_pins[] = { 0x49, };static int jz4760_pwm_pwm0_pins[] = { 0x80, };static int jz4760_pwm_pwm1_pins[] = { 0x81, };static int jz4760_pwm_pwm2_pins[] = { 0x82, };static int jz4760_pwm_pwm3_pins[] = { 0x83, };static int jz4760_pwm_pwm4_pins[] = { 0x84, };static int jz4760_pwm_pwm5_pins[] = { 0x85, };static int jz4760_pwm_pwm6_pins[] = { 0x6a, };static int jz4760_pwm_pwm7_pins[] = { 0x6b, };static int jz4760_otg_pins[] = { 0x8a, };static u8 jz4760_uart3_data_funcs[] = { 0, 1, };static u8 jz4760_mmc0_1bit_a_funcs[] = { 1, 1, 0, };static const struct group_desc jz4760_groups[] = {"uart0-data" , jz4760_uart0_data, 0),"uart0-hwflow" , jz4760_uart0_hwflow, 0),"uart1-data" , jz4760_uart1_data, 0),"uart1-hwflow" , jz4760_uart1_hwflow, 0),"uart2-data" , jz4760_uart2_data, 0),"uart2-hwflow" , jz4760_uart2_hwflow, 0),"uart3-data" , jz4760_uart3_data,"uart3-hwflow" , jz4760_uart3_hwflow, 0),"ssi0-dt-a" , jz4760_ssi0_dt_a, 2),"ssi0-dt-b" , jz4760_ssi0_dt_b, 1),"ssi0-dt-d" , jz4760_ssi0_dt_d, 1),"ssi0-dt-e" , jz4760_ssi0_dt_e, 0),"ssi0-dr-a" , jz4760_ssi0_dr_a, 1),"ssi0-dr-b" , jz4760_ssi0_dr_b, 1),"ssi0-dr-d" , jz4760_ssi0_dr_d, 1),"ssi0-dr-e" , jz4760_ssi0_dr_e, 0),"ssi0-clk-a" , jz4760_ssi0_clk_a, 2),"ssi0-clk-b" , jz4760_ssi0_clk_b, 1),"ssi0-clk-d" , jz4760_ssi0_clk_d, 1),"ssi0-clk-e" , jz4760_ssi0_clk_e, 0),"ssi0-gpc-b" , jz4760_ssi0_gpc_b, 1),"ssi0-gpc-d" , jz4760_ssi0_gpc_d, 1),"ssi0-gpc-e" , jz4760_ssi0_gpc_e, 0),"ssi0-ce0-a" , jz4760_ssi0_ce0_a, 2),"ssi0-ce0-b" , jz4760_ssi0_ce0_b, 1),"ssi0-ce0-d" , jz4760_ssi0_ce0_d, 1),"ssi0-ce0-e" , jz4760_ssi0_ce0_e, 0),"ssi0-ce1-b" , jz4760_ssi0_ce1_b, 1),"ssi0-ce1-d" , jz4760_ssi0_ce1_d, 1),"ssi0-ce1-e" , jz4760_ssi0_ce1_e, 0),"ssi1-dt-b-9" , jz4760_ssi1_dt_b_9, 2),"ssi1-dt-b-21" , jz4760_ssi1_dt_b_21, 2),"ssi1-dt-d-12" , jz4760_ssi1_dt_d_12, 2),"ssi1-dt-d-21" , jz4760_ssi1_dt_d_21, 2),"ssi1-dt-e" , jz4760_ssi1_dt_e, 1),"ssi1-dt-f" , jz4760_ssi1_dt_f, 2),"ssi1-dr-b-6" , jz4760_ssi1_dr_b_6, 2),"ssi1-dr-b-20" , jz4760_ssi1_dr_b_20, 2),"ssi1-dr-d-13" , jz4760_ssi1_dr_d_13, 2),"ssi1-dr-d-20" , jz4760_ssi1_dr_d_20, 2),"ssi1-dr-e" , jz4760_ssi1_dr_e, 1),"ssi1-dr-f" , jz4760_ssi1_dr_f, 2),"ssi1-clk-b-7" , jz4760_ssi1_clk_b_7, 2),"ssi1-clk-b-28" , jz4760_ssi1_clk_b_28, 2),"ssi1-clk-d" , jz4760_ssi1_clk_d, 2),"ssi1-clk-e-7" , jz4760_ssi1_clk_e_7, 2),"ssi1-clk-e-15" , jz4760_ssi1_clk_e_15, 1),"ssi1-clk-f" , jz4760_ssi1_clk_f, 2),"ssi1-gpc-b" , jz4760_ssi1_gpc_b, 2),"ssi1-gpc-d" , jz4760_ssi1_gpc_d, 2),"ssi1-gpc-e" , jz4760_ssi1_gpc_e, 1),"ssi1-ce0-b-8" , jz4760_ssi1_ce0_b_8, 2),"ssi1-ce0-b-29" , jz4760_ssi1_ce0_b_29, 2),"ssi1-ce0-d" , jz4760_ssi1_ce0_d, 2),"ssi1-ce0-e-6" , jz4760_ssi1_ce0_e_6, 2),"ssi1-ce0-e-16" , jz4760_ssi1_ce0_e_16, 1),"ssi1-ce0-f" , jz4760_ssi1_ce0_f, 2),"ssi1-ce1-b" , jz4760_ssi1_ce1_b, 2),"ssi1-ce1-d" , jz4760_ssi1_ce1_d, 2),"ssi1-ce1-e" , jz4760_ssi1_ce1_e, 1),"mmc0-1bit-a" , jz4760_mmc0_1bit_a,"mmc0-4bit-a" , jz4760_mmc0_4bit_a, 1),"mmc0-1bit-e" , jz4760_mmc0_1bit_e, 0),"mmc0-4bit-e" , jz4760_mmc0_4bit_e, 0),"mmc0-8bit-e" , jz4760_mmc0_8bit_e, 0),"mmc1-1bit-d" , jz4760_mmc1_1bit_d, 0),"mmc1-4bit-d" , jz4760_mmc1_4bit_d, 0),"mmc1-1bit-e" , jz4760_mmc1_1bit_e, 1),"mmc1-4bit-e" , jz4760_mmc1_4bit_e, 1),"mmc1-8bit-e" , jz4760_mmc1_8bit_e, 1),"mmc2-1bit-b" , jz4760_mmc2_1bit_b, 0),"mmc2-4bit-b" , jz4760_mmc2_4bit_b, 0),"mmc2-1bit-e" , jz4760_mmc2_1bit_e, 2),"mmc2-4bit-e" , jz4760_mmc2_4bit_e, 2),"mmc2-8bit-e" , jz4760_mmc2_8bit_e, 2),"nemc-8bit-data" , jz4760_nemc_8bit_data, 0),"nemc-16bit-data" , jz4760_nemc_16bit_data, 0),"nemc-cle-ale" , jz4760_nemc_cle_ale, 0),"nemc-addr" , jz4760_nemc_addr, 0),"nemc-rd-we" , jz4760_nemc_rd_we, 0),"nemc-frd-fwe" , jz4760_nemc_frd_fwe, 0),"nemc-wait" , jz4760_nemc_wait, 0),"nemc-cs1" , jz4760_nemc_cs1, 0),"nemc-cs2" , jz4760_nemc_cs2, 0),"nemc-cs3" , jz4760_nemc_cs3, 0),"nemc-cs4" , jz4760_nemc_cs4, 0),"nemc-cs5" , jz4760_nemc_cs5, 0),"nemc-cs6" , jz4760_nemc_cs6, 0),"i2c0-data" , jz4760_i2c0, 0),"i2c1-data" , jz4760_i2c1, 0),"cim-data" , jz4760_cim, 0),"lcd-8bit" , jz4760_lcd_8bit, 0),"lcd-16bit" , jz4760_lcd_16bit, 0),"lcd-18bit" , jz4760_lcd_18bit, 0),"lcd-24bit" , jz4760_lcd_24bit, 0),"lcd-special" , jz4760_lcd_special, 1),"lcd-generic" , jz4760_lcd_generic, 0),"pwm0" , jz4760_pwm_pwm0, 0),"pwm1" , jz4760_pwm_pwm1, 0),"pwm2" , jz4760_pwm_pwm2, 0),"pwm3" , jz4760_pwm_pwm3, 0),"pwm4" , jz4760_pwm_pwm4, 0),"pwm5" , jz4760_pwm_pwm5, 0),"pwm6" , jz4760_pwm_pwm6, 0),"pwm7" , jz4760_pwm_pwm7, 0),"otg-vbus" , jz4760_otg, 0),static const char *jz4760_uart0_groups[] = { "uart0-data" , "uart0-hwflow" , };static const char *jz4760_uart1_groups[] = { "uart1-data" , "uart1-hwflow" , };static const char *jz4760_uart2_groups[] = { "uart2-data" , "uart2-hwflow" , };static const char *jz4760_uart3_groups[] = { "uart3-data" , "uart3-hwflow" , };static const char *jz4760_ssi0_groups[] = {"ssi0-dt-a" , "ssi0-dt-b" , "ssi0-dt-d" , "ssi0-dt-e" ,"ssi0-dr-a" , "ssi0-dr-b" , "ssi0-dr-d" , "ssi0-dr-e" ,"ssi0-clk-a" , "ssi0-clk-b" , "ssi0-clk-d" , "ssi0-clk-e" ,"ssi0-gpc-b" , "ssi0-gpc-d" , "ssi0-gpc-e" ,"ssi0-ce0-a" , "ssi0-ce0-b" , "ssi0-ce0-d" , "ssi0-ce0-e" ,"ssi0-ce1-b" , "ssi0-ce1-d" , "ssi0-ce1-e" ,static const char *jz4760_ssi1_groups[] = {"ssi1-dt-b-9" , "ssi1-dt-b-21" , "ssi1-dt-d-12" , "ssi1-dt-d-21" , "ssi1-dt-e" , "ssi1-dt-f" ,"ssi1-dr-b-6" , "ssi1-dr-b-20" , "ssi1-dr-d-13" , "ssi1-dr-d-20" , "ssi1-dr-e" , "ssi1-dr-f" ,"ssi1-clk-b-7" , "ssi1-clk-b-28" , "ssi1-clk-d" , "ssi1-clk-e-7" , "ssi1-clk-e-15" , "ssi1-clk-f" ,"ssi1-gpc-b" , "ssi1-gpc-d" , "ssi1-gpc-e" ,"ssi1-ce0-b-8" , "ssi1-ce0-b-29" , "ssi1-ce0-d" , "ssi1-ce0-e-6" , "ssi1-ce0-e-16" , "ssi1-ce0-f" ,"ssi1-ce1-b" , "ssi1-ce1-d" , "ssi1-ce1-e" ,static const char *jz4760_mmc0_groups[] = {"mmc0-1bit-a" , "mmc0-4bit-a" ,"mmc0-1bit-e" , "mmc0-4bit-e" , "mmc0-8bit-e" ,static const char *jz4760_mmc1_groups[] = {"mmc1-1bit-d" , "mmc1-4bit-d" ,"mmc1-1bit-e" , "mmc1-4bit-e" , "mmc1-8bit-e" ,static const char *jz4760_mmc2_groups[] = {"mmc2-1bit-b" , "mmc2-4bit-b" ,"mmc2-1bit-e" , "mmc2-4bit-e" , "mmc2-8bit-e" ,static const char *jz4760_nemc_groups[] = {"nemc-8bit-data" , "nemc-16bit-data" , "nemc-cle-ale" ,"nemc-addr" , "nemc-rd-we" , "nemc-frd-fwe" , "nemc-wait" ,static const char *jz4760_cs1_groups[] = { "nemc-cs1" , };static const char *jz4760_cs2_groups[] = { "nemc-cs2" , };static const char *jz4760_cs3_groups[] = { "nemc-cs3" , };static const char *jz4760_cs4_groups[] = { "nemc-cs4" , };static const char *jz4760_cs5_groups[] = { "nemc-cs5" , };static const char *jz4760_cs6_groups[] = { "nemc-cs6" , };static const char *jz4760_i2c0_groups[] = { "i2c0-data" , };static const char *jz4760_i2c1_groups[] = { "i2c1-data" , };static const char *jz4760_cim_groups[] = { "cim-data" , };static const char *jz4760_lcd_groups[] = {"lcd-8bit" , "lcd-16bit" , "lcd-18bit" , "lcd-24bit" ,"lcd-special" , "lcd-generic" ,static const char *jz4760_pwm0_groups[] = { "pwm0" , };static const char *jz4760_pwm1_groups[] = { "pwm1" , };static const char *jz4760_pwm2_groups[] = { "pwm2" , };static const char *jz4760_pwm3_groups[] = { "pwm3" , };static const char *jz4760_pwm4_groups[] = { "pwm4" , };static const char *jz4760_pwm5_groups[] = { "pwm5" , };static const char *jz4760_pwm6_groups[] = { "pwm6" , };static const char *jz4760_pwm7_groups[] = { "pwm7" , };static const char *jz4760_otg_groups[] = { "otg-vbus" , };static const struct function_desc jz4760_functions[] = {"uart0" , jz4760_uart0),"uart1" , jz4760_uart1),"uart2" , jz4760_uart2),"uart3" , jz4760_uart3),"ssi0" , jz4760_ssi0),"ssi1" , jz4760_ssi1),"mmc0" , jz4760_mmc0),"mmc1" , jz4760_mmc1),"mmc2" , jz4760_mmc2),"nemc" , jz4760_nemc),"nemc-cs1" , jz4760_cs1),"nemc-cs2" , jz4760_cs2),"nemc-cs3" , jz4760_cs3),"nemc-cs4" , jz4760_cs4),"nemc-cs5" , jz4760_cs5),"nemc-cs6" , jz4760_cs6),"i2c0" , jz4760_i2c0),"i2c1" , jz4760_i2c1),"cim" , jz4760_cim),"lcd" , jz4760_lcd),"pwm0" , jz4760_pwm0),"pwm1" , jz4760_pwm1),"pwm2" , jz4760_pwm2),"pwm3" , jz4760_pwm3),"pwm4" , jz4760_pwm4),"pwm5" , jz4760_pwm5),"pwm6" , jz4760_pwm6),"pwm7" , jz4760_pwm7),"otg" , jz4760_otg),static const struct ingenic_chip_info jz4760_chip_info = {static const u32 jz4770_pull_ups[6] = {static const u32 jz4770_pull_downs[6] = {static int jz4770_uart0_data_pins[] = { 0xa0, 0xa3, };static int jz4770_uart0_hwflow_pins[] = { 0xa1, 0xa2, };static int jz4770_uart1_data_pins[] = { 0x7a, 0x7c, };static int jz4770_uart1_hwflow_pins[] = { 0x7b, 0x7d, };static int jz4770_uart2_data_pins[] = { 0x5c, 0x5e, };static int jz4770_uart2_hwflow_pins[] = { 0x5d, 0x5f, };static int jz4770_uart3_data_pins[] = { 0x6c, 0x85, };static int jz4770_uart3_hwflow_pins[] = { 0x88, 0x89, };static int jz4770_ssi0_dt_a_pins[] = { 0x15, };static int jz4770_ssi0_dt_b_pins[] = { 0x35, };static int jz4770_ssi0_dt_d_pins[] = { 0x75, };static int jz4770_ssi0_dt_e_pins[] = { 0x91, };static int jz4770_ssi0_dr_a_pins[] = { 0x14, };static int jz4770_ssi0_dr_b_pins[] = { 0x34, };static int jz4770_ssi0_dr_d_pins[] = { 0x74, };static int jz4770_ssi0_dr_e_pins[] = { 0x8e, };static int jz4770_ssi0_clk_a_pins[] = { 0x12, };static int jz4770_ssi0_clk_b_pins[] = { 0x3c, };static int jz4770_ssi0_clk_d_pins[] = { 0x78, };static int jz4770_ssi0_clk_e_pins[] = { 0x8f, };static int jz4770_ssi0_gpc_b_pins[] = { 0x3e, };static int jz4770_ssi0_gpc_d_pins[] = { 0x76, };static int jz4770_ssi0_gpc_e_pins[] = { 0x93, };static int jz4770_ssi0_ce0_a_pins[] = { 0x13, };static int jz4770_ssi0_ce0_b_pins[] = { 0x3d, };static int jz4770_ssi0_ce0_d_pins[] = { 0x79, };static int jz4770_ssi0_ce0_e_pins[] = { 0x90, };static int jz4770_ssi0_ce1_b_pins[] = { 0x3f, };static int jz4770_ssi0_ce1_d_pins[] = { 0x77, };static int jz4770_ssi0_ce1_e_pins[] = { 0x92, };static int jz4770_ssi1_dt_b_pins[] = { 0x35, };static int jz4770_ssi1_dt_d_pins[] = { 0x75, };static int jz4770_ssi1_dt_e_pins[] = { 0x91, };static int jz4770_ssi1_dr_b_pins[] = { 0x34, };static int jz4770_ssi1_dr_d_pins[] = { 0x74, };static int jz4770_ssi1_dr_e_pins[] = { 0x8e, };static int jz4770_ssi1_clk_b_pins[] = { 0x3c, };static int jz4770_ssi1_clk_d_pins[] = { 0x78, };static int jz4770_ssi1_clk_e_pins[] = { 0x8f, };static int jz4770_ssi1_gpc_b_pins[] = { 0x3e, };static int jz4770_ssi1_gpc_d_pins[] = { 0x76, };static int jz4770_ssi1_gpc_e_pins[] = { 0x93, };static int jz4770_ssi1_ce0_b_pins[] = { 0x3d, };static int jz4770_ssi1_ce0_d_pins[] = { 0x79, };static int jz4770_ssi1_ce0_e_pins[] = { 0x90, };static int jz4770_ssi1_ce1_b_pins[] = { 0x3f, };static int jz4770_ssi1_ce1_d_pins[] = { 0x77, };static int jz4770_ssi1_ce1_e_pins[] = { 0x92, };static int jz4770_mmc0_1bit_a_pins[] = { 0x12, 0x13, 0x14, };static int jz4770_mmc0_4bit_a_pins[] = { 0x15, 0x16, 0x17, };static int jz4770_mmc0_1bit_e_pins[] = { 0x9c, 0x9d, 0x94, };static int jz4770_mmc0_4bit_e_pins[] = { 0x95, 0x96, 0x97, };static int jz4770_mmc0_8bit_e_pins[] = { 0x98, 0x99, 0x9a, 0x9b, };static int jz4770_mmc1_1bit_d_pins[] = { 0x78, 0x79, 0x74, };static int jz4770_mmc1_4bit_d_pins[] = { 0x75, 0x76, 0x77, };static int jz4770_mmc1_1bit_e_pins[] = { 0x9c, 0x9d, 0x94, };static int jz4770_mmc1_4bit_e_pins[] = { 0x95, 0x96, 0x97, };static int jz4770_mmc1_8bit_e_pins[] = { 0x98, 0x99, 0x9a, 0x9b, };static int jz4770_mmc2_1bit_b_pins[] = { 0x3c, 0x3d, 0x34, };static int jz4770_mmc2_4bit_b_pins[] = { 0x35, 0x3e, 0x3f, };static int jz4770_mmc2_1bit_e_pins[] = { 0x9c, 0x9d, 0x94, };static int jz4770_mmc2_4bit_e_pins[] = { 0x95, 0x96, 0x97, };static int jz4770_mmc2_8bit_e_pins[] = { 0x98, 0x99, 0x9a, 0x9b, };static int jz4770_nemc_8bit_data_pins[] = {static int jz4770_nemc_16bit_data_pins[] = {static int jz4770_nemc_cle_ale_pins[] = { 0x20, 0x21, };static int jz4770_nemc_addr_pins[] = { 0x22, 0x23, 0x24, 0x25, };static int jz4770_nemc_rd_we_pins[] = { 0x10, 0x11, };static int jz4770_nemc_frd_fwe_pins[] = { 0x12, 0x13, };static int jz4770_nemc_wait_pins[] = { 0x1b, };static int jz4770_nemc_cs1_pins[] = { 0x15, };static int jz4770_nemc_cs2_pins[] = { 0x16, };static int jz4770_nemc_cs3_pins[] = { 0x17, };static int jz4770_nemc_cs4_pins[] = { 0x18, };static int jz4770_nemc_cs5_pins[] = { 0x19, };static int jz4770_nemc_cs6_pins[] = { 0x1a, };static int jz4770_i2c0_pins[] = { 0x7e, 0x7f, };static int jz4770_i2c1_pins[] = { 0x9e, 0x9f, };static int jz4770_i2c2_pins[] = { 0xb0, 0xb1, };static int jz4770_cim_8bit_pins[] = {static int jz4770_cim_12bit_pins[] = {static int jz4770_lcd_8bit_pins[] = {static int jz4770_lcd_16bit_pins[] = {static int jz4770_lcd_18bit_pins[] = {static int jz4770_lcd_24bit_pins[] = {static int jz4770_lcd_special_pins[] = { 0x54, 0x4a, 0x41, 0x40, };static int jz4770_lcd_generic_pins[] = { 0x49, };static int jz4770_pwm_pwm0_pins[] = { 0x80, };static int jz4770_pwm_pwm1_pins[] = { 0x81, };static int jz4770_pwm_pwm2_pins[] = { 0x82, };static int jz4770_pwm_pwm3_pins[] = { 0x83, };static int jz4770_pwm_pwm4_pins[] = { 0x84, };static int jz4770_pwm_pwm5_pins[] = { 0x85, };static int jz4770_pwm_pwm6_pins[] = { 0x6a, };static int jz4770_pwm_pwm7_pins[] = { 0x6b, };static int jz4770_mac_rmii_pins[] = {static int jz4770_mac_mii_pins[] = {static const struct group_desc jz4770_groups[] = {"uart0-data" , jz4770_uart0_data, 0),"uart0-hwflow" , jz4770_uart0_hwflow, 0),"uart1-data" , jz4770_uart1_data, 0),"uart1-hwflow" , jz4770_uart1_hwflow, 0),"uart2-data" , jz4770_uart2_data, 0),"uart2-hwflow" , jz4770_uart2_hwflow, 0),"uart3-data" , jz4770_uart3_data,"uart3-hwflow" , jz4770_uart3_hwflow, 0),"ssi0-dt-a" , jz4770_ssi0_dt_a, 2),"ssi0-dt-b" , jz4770_ssi0_dt_b, 1),"ssi0-dt-d" , jz4770_ssi0_dt_d, 1),"ssi0-dt-e" , jz4770_ssi0_dt_e, 0),"ssi0-dr-a" , jz4770_ssi0_dr_a, 1),"ssi0-dr-b" , jz4770_ssi0_dr_b, 1),"ssi0-dr-d" , jz4770_ssi0_dr_d, 1),"ssi0-dr-e" , jz4770_ssi0_dr_e, 0),"ssi0-clk-a" , jz4770_ssi0_clk_a, 2),"ssi0-clk-b" , jz4770_ssi0_clk_b, 1),"ssi0-clk-d" , jz4770_ssi0_clk_d, 1),"ssi0-clk-e" , jz4770_ssi0_clk_e, 0),"ssi0-gpc-b" , jz4770_ssi0_gpc_b, 1),"ssi0-gpc-d" , jz4770_ssi0_gpc_d, 1),"ssi0-gpc-e" , jz4770_ssi0_gpc_e, 0),"ssi0-ce0-a" , jz4770_ssi0_ce0_a, 2),"ssi0-ce0-b" , jz4770_ssi0_ce0_b, 1),"ssi0-ce0-d" , jz4770_ssi0_ce0_d, 1),"ssi0-ce0-e" , jz4770_ssi0_ce0_e, 0),"ssi0-ce1-b" , jz4770_ssi0_ce1_b, 1),"ssi0-ce1-d" , jz4770_ssi0_ce1_d, 1),"ssi0-ce1-e" , jz4770_ssi0_ce1_e, 0),"ssi1-dt-b" , jz4770_ssi1_dt_b, 2),"ssi1-dt-d" , jz4770_ssi1_dt_d, 2),"ssi1-dt-e" , jz4770_ssi1_dt_e, 1),"ssi1-dr-b" , jz4770_ssi1_dr_b, 2),"ssi1-dr-d" , jz4770_ssi1_dr_d, 2),"ssi1-dr-e" , jz4770_ssi1_dr_e, 1),"ssi1-clk-b" , jz4770_ssi1_clk_b, 2),"ssi1-clk-d" , jz4770_ssi1_clk_d, 2),"ssi1-clk-e" , jz4770_ssi1_clk_e, 1),"ssi1-gpc-b" , jz4770_ssi1_gpc_b, 2),"ssi1-gpc-d" , jz4770_ssi1_gpc_d, 2),"ssi1-gpc-e" , jz4770_ssi1_gpc_e, 1),"ssi1-ce0-b" , jz4770_ssi1_ce0_b, 2),"ssi1-ce0-d" , jz4770_ssi1_ce0_d, 2),"ssi1-ce0-e" , jz4770_ssi1_ce0_e, 1),"ssi1-ce1-b" , jz4770_ssi1_ce1_b, 2),"ssi1-ce1-d" , jz4770_ssi1_ce1_d, 2),"ssi1-ce1-e" , jz4770_ssi1_ce1_e, 1),"mmc0-1bit-a" , jz4770_mmc0_1bit_a,"mmc0-4bit-a" , jz4770_mmc0_4bit_a, 1),"mmc0-1bit-e" , jz4770_mmc0_1bit_e, 0),"mmc0-4bit-e" , jz4770_mmc0_4bit_e, 0),"mmc0-8bit-e" , jz4770_mmc0_8bit_e, 0),"mmc1-1bit-d" , jz4770_mmc1_1bit_d, 0),"mmc1-4bit-d" , jz4770_mmc1_4bit_d, 0),"mmc1-1bit-e" , jz4770_mmc1_1bit_e, 1),"mmc1-4bit-e" , jz4770_mmc1_4bit_e, 1),"mmc1-8bit-e" , jz4770_mmc1_8bit_e, 1),"mmc2-1bit-b" , jz4770_mmc2_1bit_b, 0),"mmc2-4bit-b" , jz4770_mmc2_4bit_b, 0),"mmc2-1bit-e" , jz4770_mmc2_1bit_e, 2),"mmc2-4bit-e" , jz4770_mmc2_4bit_e, 2),"mmc2-8bit-e" , jz4770_mmc2_8bit_e, 2),"nemc-8bit-data" , jz4770_nemc_8bit_data, 0),"nemc-16bit-data" , jz4770_nemc_16bit_data, 0),"nemc-cle-ale" , jz4770_nemc_cle_ale, 0),"nemc-addr" , jz4770_nemc_addr, 0),"nemc-rd-we" , jz4770_nemc_rd_we, 0),"nemc-frd-fwe" , jz4770_nemc_frd_fwe, 0),"nemc-wait" , jz4770_nemc_wait, 0),"nemc-cs1" , jz4770_nemc_cs1, 0),"nemc-cs2" , jz4770_nemc_cs2, 0),"nemc-cs3" , jz4770_nemc_cs3, 0),"nemc-cs4" , jz4770_nemc_cs4, 0),"nemc-cs5" , jz4770_nemc_cs5, 0),"nemc-cs6" , jz4770_nemc_cs6, 0),"i2c0-data" , jz4770_i2c0, 0),"i2c1-data" , jz4770_i2c1, 0),"i2c2-data" , jz4770_i2c2, 2),"cim-data-8bit" , jz4770_cim_8bit, 0),"cim-data-12bit" , jz4770_cim_12bit, 0),"lcd-8bit" , jz4770_lcd_8bit, 0),"lcd-16bit" , jz4770_lcd_16bit, 0),"lcd-18bit" , jz4770_lcd_18bit, 0),"lcd-24bit" , jz4770_lcd_24bit, 0),"lcd-special" , jz4770_lcd_special, 1),"lcd-generic" , jz4770_lcd_generic, 0),"pwm0" , jz4770_pwm_pwm0, 0),"pwm1" , jz4770_pwm_pwm1, 0),"pwm2" , jz4770_pwm_pwm2, 0),"pwm3" , jz4770_pwm_pwm3, 0),"pwm4" , jz4770_pwm_pwm4, 0),"pwm5" , jz4770_pwm_pwm5, 0),"pwm6" , jz4770_pwm_pwm6, 0),"pwm7" , jz4770_pwm_pwm7, 0),"mac-rmii" , jz4770_mac_rmii, 0),"mac-mii" , jz4770_mac_mii, 0),"otg-vbus" , jz4760_otg, 0),static const char *jz4770_uart0_groups[] = { "uart0-data" , "uart0-hwflow" , };static const char *jz4770_uart1_groups[] = { "uart1-data" , "uart1-hwflow" , };static const char *jz4770_uart2_groups[] = { "uart2-data" , "uart2-hwflow" , };static const char *jz4770_uart3_groups[] = { "uart3-data" , "uart3-hwflow" , };static const char *jz4770_ssi0_groups[] = {"ssi0-dt-a" , "ssi0-dt-b" , "ssi0-dt-d" , "ssi0-dt-e" ,"ssi0-dr-a" , "ssi0-dr-b" , "ssi0-dr-d" , "ssi0-dr-e" ,"ssi0-clk-a" , "ssi0-clk-b" , "ssi0-clk-d" , "ssi0-clk-e" ,"ssi0-gpc-b" , "ssi0-gpc-d" , "ssi0-gpc-e" ,"ssi0-ce0-a" , "ssi0-ce0-b" , "ssi0-ce0-d" , "ssi0-ce0-e" ,"ssi0-ce1-b" , "ssi0-ce1-d" , "ssi0-ce1-e" ,static const char *jz4770_ssi1_groups[] = {"ssi1-dt-b" , "ssi1-dt-d" , "ssi1-dt-e" ,"ssi1-dr-b" , "ssi1-dr-d" , "ssi1-dr-e" ,"ssi1-clk-b" , "ssi1-clk-d" , "ssi1-clk-e" ,"ssi1-gpc-b" , "ssi1-gpc-d" , "ssi1-gpc-e" ,"ssi1-ce0-b" , "ssi1-ce0-d" , "ssi1-ce0-e" ,"ssi1-ce1-b" , "ssi1-ce1-d" , "ssi1-ce1-e" ,static const char *jz4770_mmc0_groups[] = {"mmc0-1bit-a" , "mmc0-4bit-a" ,"mmc0-1bit-e" , "mmc0-4bit-e" , "mmc0-8bit-e" ,static const char *jz4770_mmc1_groups[] = {"mmc1-1bit-d" , "mmc1-4bit-d" ,"mmc1-1bit-e" , "mmc1-4bit-e" , "mmc1-8bit-e" ,static const char *jz4770_mmc2_groups[] = {"mmc2-1bit-b" , "mmc2-4bit-b" ,"mmc2-1bit-e" , "mmc2-4bit-e" , "mmc2-8bit-e" ,static const char *jz4770_nemc_groups[] = {"nemc-8bit-data" , "nemc-16bit-data" , "nemc-cle-ale" ,"nemc-addr" , "nemc-rd-we" , "nemc-frd-fwe" , "nemc-wait" ,static const char *jz4770_cs1_groups[] = { "nemc-cs1" , };static const char *jz4770_cs2_groups[] = { "nemc-cs2" , };static const char *jz4770_cs3_groups[] = { "nemc-cs3" , };static const char *jz4770_cs4_groups[] = { "nemc-cs4" , };static const char *jz4770_cs5_groups[] = { "nemc-cs5" , };static const char *jz4770_cs6_groups[] = { "nemc-cs6" , };static const char *jz4770_i2c0_groups[] = { "i2c0-data" , };static const char *jz4770_i2c1_groups[] = { "i2c1-data" , };static const char *jz4770_i2c2_groups[] = { "i2c2-data" , };static const char *jz4770_cim_groups[] = { "cim-data-8bit" , "cim-data-12bit" , };static const char *jz4770_lcd_groups[] = {"lcd-8bit" , "lcd-16bit" , "lcd-18bit" , "lcd-24bit" ,"lcd-special" , "lcd-generic" ,static const char *jz4770_pwm0_groups[] = { "pwm0" , };static const char *jz4770_pwm1_groups[] = { "pwm1" , };static const char *jz4770_pwm2_groups[] = { "pwm2" , };static const char *jz4770_pwm3_groups[] = { "pwm3" , };static const char *jz4770_pwm4_groups[] = { "pwm4" , };static const char *jz4770_pwm5_groups[] = { "pwm5" , };static const char *jz4770_pwm6_groups[] = { "pwm6" , };static const char *jz4770_pwm7_groups[] = { "pwm7" , };static const char *jz4770_mac_groups[] = { "mac-rmii" , "mac-mii" , };static const struct function_desc jz4770_functions[] = {"uart0" , jz4770_uart0),"uart1" , jz4770_uart1),"uart2" , jz4770_uart2),"uart3" , jz4770_uart3),"ssi0" , jz4770_ssi0),"ssi1" , jz4770_ssi1),"mmc0" , jz4770_mmc0),"mmc1" , jz4770_mmc1),"mmc2" , jz4770_mmc2),"nemc" , jz4770_nemc),"nemc-cs1" , jz4770_cs1),"nemc-cs2" , jz4770_cs2),"nemc-cs3" , jz4770_cs3),"nemc-cs4" , jz4770_cs4),"nemc-cs5" , jz4770_cs5),"nemc-cs6" , jz4770_cs6),"i2c0" , jz4770_i2c0),"i2c1" , jz4770_i2c1),"i2c2" , jz4770_i2c2),"cim" , jz4770_cim),"lcd" , jz4770_lcd),"pwm0" , jz4770_pwm0),"pwm1" , jz4770_pwm1),"pwm2" , jz4770_pwm2),"pwm3" , jz4770_pwm3),"pwm4" , jz4770_pwm4),"pwm5" , jz4770_pwm5),"pwm6" , jz4770_pwm6),"pwm7" , jz4770_pwm7),"mac" , jz4770_mac),"otg" , jz4760_otg),static const struct ingenic_chip_info jz4770_chip_info = {static const u32 jz4775_pull_ups[7] = {static const u32 jz4775_pull_downs[7] = {static int jz4775_uart0_data_pins[] = { 0xa0, 0xa3, };static int jz4775_uart0_hwflow_pins[] = { 0xa1, 0xa2, };static int jz4775_uart1_data_pins[] = { 0x7a, 0x7c, };static int jz4775_uart1_hwflow_pins[] = { 0x7b, 0x7d, };static int jz4775_uart2_data_c_pins[] = { 0x54, 0x4a, };static int jz4775_uart2_data_f_pins[] = { 0xa5, 0xa4, };static int jz4775_uart3_data_pins[] = { 0x1e, 0x1f, };static int jz4775_ssi_dt_a_pins[] = { 0x13, };static int jz4775_ssi_dt_d_pins[] = { 0x75, };static int jz4775_ssi_dr_a_pins[] = { 0x14, };static int jz4775_ssi_dr_d_pins[] = { 0x74, };static int jz4775_ssi_clk_a_pins[] = { 0x12, };static int jz4775_ssi_clk_d_pins[] = { 0x78, };static int jz4775_ssi_gpc_pins[] = { 0x76, };static int jz4775_ssi_ce0_a_pins[] = { 0x17, };static int jz4775_ssi_ce0_d_pins[] = { 0x79, };static int jz4775_ssi_ce1_pins[] = { 0x77, };static int jz4775_mmc0_1bit_a_pins[] = { 0x12, 0x13, 0x14, };static int jz4775_mmc0_4bit_a_pins[] = { 0x15, 0x16, 0x17, };static int jz4775_mmc0_8bit_a_pins[] = { 0x04, 0x05, 0x06, 0x07, };static int jz4775_mmc0_1bit_e_pins[] = { 0x9c, 0x9d, 0x94, };static int jz4775_mmc0_4bit_e_pins[] = { 0x95, 0x96, 0x97, };static int jz4775_mmc1_1bit_d_pins[] = { 0x78, 0x79, 0x74, };static int jz4775_mmc1_4bit_d_pins[] = { 0x75, 0x76, 0x77, };
Messung V0.5 C=100 H=100 G=100
¤ Dauer der Verarbeitung: 0.8 Sekunden
(vorverarbeitet)
¤ *© Formatika GbR, Deutschland
