// SPDX-License-Identifier: GPL-2.0 #include <linux/kernel.h>#include <linux/types.h>#include <linux/pinctrl/pinctrl.h>#include <linux/gpio/driver.h>#include <linux/gpio/gpio-nomadik.h>/* All the pins that can be used for GPIO and some other functions */ #define _GPIO(offset) (offset)#define DB8500_PIN_AJ5 _GPIO(0)#define DB8500_PIN_AJ3 _GPIO(1)#define DB8500_PIN_AH4 _GPIO(2)#define DB8500_PIN_AH3 _GPIO(3)#define DB8500_PIN_AH6 _GPIO(4)#define DB8500_PIN_AG6 _GPIO(5)#define DB8500_PIN_AF6 _GPIO(6)#define DB8500_PIN_AG5 _GPIO(7)#define DB8500_PIN_AD5 _GPIO(8)#define DB8500_PIN_AE4 _GPIO(9)#define DB8500_PIN_AF5 _GPIO(10)#define DB8500_PIN_AG4 _GPIO(11)#define DB8500_PIN_AC4 _GPIO(12)#define DB8500_PIN_AF3 _GPIO(13)#define DB8500_PIN_AE3 _GPIO(14)#define DB8500_PIN_AC3 _GPIO(15)#define DB8500_PIN_AD3 _GPIO(16)#define DB8500_PIN_AD4 _GPIO(17)#define DB8500_PIN_AC2 _GPIO(18)#define DB8500_PIN_AC1 _GPIO(19)#define DB8500_PIN_AB4 _GPIO(20)#define DB8500_PIN_AB3 _GPIO(21)#define DB8500_PIN_AA3 _GPIO(22)#define DB8500_PIN_AA4 _GPIO(23)#define DB8500_PIN_AB2 _GPIO(24)#define DB8500_PIN_Y4 _GPIO(25)#define DB8500_PIN_Y2 _GPIO(26)#define DB8500_PIN_AA2 _GPIO(27)#define DB8500_PIN_AA1 _GPIO(28)#define DB8500_PIN_W2 _GPIO(29)#define DB8500_PIN_W3 _GPIO(30)#define DB8500_PIN_V3 _GPIO(31)#define DB8500_PIN_V2 _GPIO(32)#define DB8500_PIN_AF2 _GPIO(33)#define DB8500_PIN_AE1 _GPIO(34)#define DB8500_PIN_AE2 _GPIO(35)#define DB8500_PIN_AG2 _GPIO(36)/* Hole */ #define DB8500_PIN_F3 _GPIO(64)#define DB8500_PIN_F1 _GPIO(65)#define DB8500_PIN_G3 _GPIO(66)#define DB8500_PIN_G2 _GPIO(67)#define DB8500_PIN_E1 _GPIO(68)#define DB8500_PIN_E2 _GPIO(69)#define DB8500_PIN_G5 _GPIO(70)#define DB8500_PIN_G4 _GPIO(71)#define DB8500_PIN_H4 _GPIO(72)#define DB8500_PIN_H3 _GPIO(73)#define DB8500_PIN_J3 _GPIO(74)#define DB8500_PIN_H2 _GPIO(75)#define DB8500_PIN_J2 _GPIO(76)#define DB8500_PIN_H1 _GPIO(77)#define DB8500_PIN_F4 _GPIO(78)#define DB8500_PIN_E3 _GPIO(79)#define DB8500_PIN_E4 _GPIO(80)#define DB8500_PIN_D2 _GPIO(81)#define DB8500_PIN_C1 _GPIO(82)#define DB8500_PIN_D3 _GPIO(83)#define DB8500_PIN_C2 _GPIO(84)#define DB8500_PIN_D5 _GPIO(85)#define DB8500_PIN_C6 _GPIO(86)#define DB8500_PIN_B3 _GPIO(87)#define DB8500_PIN_C4 _GPIO(88)#define DB8500_PIN_E6 _GPIO(89)#define DB8500_PIN_A3 _GPIO(90)#define DB8500_PIN_B6 _GPIO(91)#define DB8500_PIN_D6 _GPIO(92)#define DB8500_PIN_B7 _GPIO(93)#define DB8500_PIN_D7 _GPIO(94)#define DB8500_PIN_E8 _GPIO(95)#define DB8500_PIN_D8 _GPIO(96)#define DB8500_PIN_D9 _GPIO(97)/* Hole */ #define DB8500_PIN_A5 _GPIO(128)#define DB8500_PIN_B4 _GPIO(129)#define DB8500_PIN_C8 _GPIO(130)#define DB8500_PIN_A12 _GPIO(131)#define DB8500_PIN_C10 _GPIO(132)#define DB8500_PIN_B10 _GPIO(133)#define DB8500_PIN_B9 _GPIO(134)#define DB8500_PIN_A9 _GPIO(135)#define DB8500_PIN_C7 _GPIO(136)#define DB8500_PIN_A7 _GPIO(137)#define DB8500_PIN_C5 _GPIO(138)#define DB8500_PIN_C9 _GPIO(139)#define DB8500_PIN_B11 _GPIO(140)#define DB8500_PIN_C12 _GPIO(141)#define DB8500_PIN_C11 _GPIO(142)#define DB8500_PIN_D12 _GPIO(143)#define DB8500_PIN_B13 _GPIO(144)#define DB8500_PIN_C13 _GPIO(145)#define DB8500_PIN_D13 _GPIO(146)#define DB8500_PIN_C15 _GPIO(147)#define DB8500_PIN_B16 _GPIO(148)#define DB8500_PIN_B14 _GPIO(149)#define DB8500_PIN_C14 _GPIO(150)#define DB8500_PIN_D17 _GPIO(151)#define DB8500_PIN_D16 _GPIO(152)#define DB8500_PIN_B17 _GPIO(153)#define DB8500_PIN_C16 _GPIO(154)#define DB8500_PIN_C19 _GPIO(155)#define DB8500_PIN_C17 _GPIO(156)#define DB8500_PIN_A18 _GPIO(157)#define DB8500_PIN_C18 _GPIO(158)#define DB8500_PIN_B19 _GPIO(159)#define DB8500_PIN_B20 _GPIO(160)#define DB8500_PIN_D21 _GPIO(161)#define DB8500_PIN_D20 _GPIO(162)#define DB8500_PIN_C20 _GPIO(163)#define DB8500_PIN_B21 _GPIO(164)#define DB8500_PIN_C21 _GPIO(165)#define DB8500_PIN_A22 _GPIO(166)#define DB8500_PIN_B24 _GPIO(167)#define DB8500_PIN_C22 _GPIO(168)#define DB8500_PIN_D22 _GPIO(169)#define DB8500_PIN_C23 _GPIO(170)#define DB8500_PIN_D23 _GPIO(171)/* Hole */ #define DB8500_PIN_AJ27 _GPIO(192)#define DB8500_PIN_AH27 _GPIO(193)#define DB8500_PIN_AF27 _GPIO(194)#define DB8500_PIN_AG28 _GPIO(195)#define DB8500_PIN_AG26 _GPIO(196)#define DB8500_PIN_AH24 _GPIO(197)#define DB8500_PIN_AG25 _GPIO(198)#define DB8500_PIN_AH23 _GPIO(199)#define DB8500_PIN_AH26 _GPIO(200)#define DB8500_PIN_AF24 _GPIO(201)#define DB8500_PIN_AF25 _GPIO(202)#define DB8500_PIN_AE23 _GPIO(203)#define DB8500_PIN_AF23 _GPIO(204)#define DB8500_PIN_AG23 _GPIO(205)#define DB8500_PIN_AG24 _GPIO(206)#define DB8500_PIN_AJ23 _GPIO(207)#define DB8500_PIN_AH16 _GPIO(208)#define DB8500_PIN_AG15 _GPIO(209)#define DB8500_PIN_AJ15 _GPIO(210)#define DB8500_PIN_AG14 _GPIO(211)#define DB8500_PIN_AF13 _GPIO(212)#define DB8500_PIN_AG13 _GPIO(213)#define DB8500_PIN_AH15 _GPIO(214)#define DB8500_PIN_AH13 _GPIO(215)#define DB8500_PIN_AG12 _GPIO(216)#define DB8500_PIN_AH12 _GPIO(217)#define DB8500_PIN_AH11 _GPIO(218)#define DB8500_PIN_AG10 _GPIO(219)#define DB8500_PIN_AH10 _GPIO(220)#define DB8500_PIN_AJ11 _GPIO(221)#define DB8500_PIN_AJ9 _GPIO(222)#define DB8500_PIN_AH9 _GPIO(223)#define DB8500_PIN_AG9 _GPIO(224)#define DB8500_PIN_AG8 _GPIO(225)#define DB8500_PIN_AF8 _GPIO(226)#define DB8500_PIN_AH7 _GPIO(227)#define DB8500_PIN_AJ6 _GPIO(228)#define DB8500_PIN_AG7 _GPIO(229)#define DB8500_PIN_AF7 _GPIO(230)/* Hole */ #define DB8500_PIN_AF28 _GPIO(256)#define DB8500_PIN_AE29 _GPIO(257)#define DB8500_PIN_AD29 _GPIO(258)#define DB8500_PIN_AC29 _GPIO(259)#define DB8500_PIN_AD28 _GPIO(260)#define DB8500_PIN_AD26 _GPIO(261)#define DB8500_PIN_AE26 _GPIO(262)#define DB8500_PIN_AG29 _GPIO(263)#define DB8500_PIN_AE27 _GPIO(264)#define DB8500_PIN_AD27 _GPIO(265)#define DB8500_PIN_AC28 _GPIO(266)#define DB8500_PIN_AC27 _GPIO(267)/* * The names of the pins are denoted by GPIO number and ball name, even * though they can be used for other things than GPIO, this is the first * column in the table of the data sheet and often used on schematics and * such. static const struct pinctrl_pin_desc nmk_db8500_pins[] = {"GPIO0_AJ5" ),"GPIO1_AJ3" ),"GPIO2_AH4" ),"GPIO3_AH3" ),"GPIO4_AH6" ),"GPIO5_AG6" ),"GPIO6_AF6" ),"GPIO7_AG5" ),"GPIO8_AD5" ),"GPIO9_AE4" ),"GPIO10_AF5" ),"GPIO11_AG4" ),"GPIO12_AC4" ),"GPIO13_AF3" ),"GPIO14_AE3" ),"GPIO15_AC3" ),"GPIO16_AD3" ),"GPIO17_AD4" ),"GPIO18_AC2" ),"GPIO19_AC1" ),"GPIO20_AB4" ),"GPIO21_AB3" ),"GPIO22_AA3" ),"GPIO23_AA4" ),"GPIO24_AB2" ),"GPIO25_Y4" ),"GPIO26_Y2" ),"GPIO27_AA2" ),"GPIO28_AA1" ),"GPIO29_W2" ),"GPIO30_W3" ),"GPIO31_V3" ),"GPIO32_V2" ),"GPIO33_AF2" ),"GPIO34_AE1" ),"GPIO35_AE2" ),"GPIO36_AG2" ),/* Hole */ "GPIO64_F3" ),"GPIO65_F1" ),"GPIO66_G3" ),"GPIO67_G2" ),"GPIO68_E1" ),"GPIO69_E2" ),"GPIO70_G5" ),"GPIO71_G4" ),"GPIO72_H4" ),"GPIO73_H3" ),"GPIO74_J3" ),"GPIO75_H2" ),"GPIO76_J2" ),"GPIO77_H1" ),"GPIO78_F4" ),"GPIO79_E3" ),"GPIO80_E4" ),"GPIO81_D2" ),"GPIO82_C1" ),"GPIO83_D3" ),"GPIO84_C2" ),"GPIO85_D5" ),"GPIO86_C6" ),"GPIO87_B3" ),"GPIO88_C4" ),"GPIO89_E6" ),"GPIO90_A3" ),"GPIO91_B6" ),"GPIO92_D6" ),"GPIO93_B7" ),"GPIO94_D7" ),"GPIO95_E8" ),"GPIO96_D8" ),"GPIO97_D9" ),/* Hole */ "GPIO128_A5" ),"GPIO129_B4" ),"GPIO130_C8" ),"GPIO131_A12" ),"GPIO132_C10" ),"GPIO133_B10" ),"GPIO134_B9" ),"GPIO135_A9" ),"GPIO136_C7" ),"GPIO137_A7" ),"GPIO138_C5" ),"GPIO139_C9" ),"GPIO140_B11" ),"GPIO141_C12" ),"GPIO142_C11" ),"GPIO143_D12" ),"GPIO144_B13" ),"GPIO145_C13" ),"GPIO146_D13" ),"GPIO147_C15" ),"GPIO148_B16" ),"GPIO149_B14" ),"GPIO150_C14" ),"GPIO151_D17" ),"GPIO152_D16" ),"GPIO153_B17" ),"GPIO154_C16" ),"GPIO155_C19" ),"GPIO156_C17" ),"GPIO157_A18" ),"GPIO158_C18" ),"GPIO159_B19" ),"GPIO160_B20" ),"GPIO161_D21" ),"GPIO162_D20" ),"GPIO163_C20" ),"GPIO164_B21" ),"GPIO165_C21" ),"GPIO166_A22" ),"GPIO167_B24" ),"GPIO168_C22" ),"GPIO169_D22" ),"GPIO170_C23" ),"GPIO171_D23" ),/* Hole */ "GPIO192_AJ27" ),"GPIO193_AH27" ),"GPIO194_AF27" ),"GPIO195_AG28" ),"GPIO196_AG26" ),"GPIO197_AH24" ),"GPIO198_AG25" ),"GPIO199_AH23" ),"GPIO200_AH26" ),"GPIO201_AF24" ),"GPIO202_AF25" ),"GPIO203_AE23" ),"GPIO204_AF23" ),"GPIO205_AG23" ),"GPIO206_AG24" ),"GPIO207_AJ23" ),"GPIO208_AH16" ),"GPIO209_AG15" ),"GPIO210_AJ15" ),"GPIO211_AG14" ),"GPIO212_AF13" ),"GPIO213_AG13" ),"GPIO214_AH15" ),"GPIO215_AH13" ),"GPIO216_AG12" ),"GPIO217_AH12" ),"GPIO218_AH11" ),"GPIO219_AG10" ),"GPIO220_AH10" ),"GPIO221_AJ11" ),"GPIO222_AJ9" ),"GPIO223_AH9" ),"GPIO224_AG9" ),"GPIO225_AG8" ),"GPIO226_AF8" ),"GPIO227_AH7" ),"GPIO228_AJ6" ),"GPIO229_AG7" ),"GPIO230_AF7" ),/* Hole */ "GPIO256_AF28" ),"GPIO257_AE29" ),"GPIO258_AD29" ),"GPIO259_AC29" ),"GPIO260_AD28" ),"GPIO261_AD26" ),"GPIO262_AE26" ),"GPIO263_AG29" ),"GPIO264_AE27" ),"GPIO265_AD27" ),"GPIO266_AC28" ),"GPIO267_AC27" ),/* * Read the pin group names like this: * u0_a_1 = first groups of pins for uart0 on alt function a * i2c2_b_2 = second group of pins for i2c2 on alt function b * * The groups are arranged as sets per altfunction column, so we can * mux in one group at a time by selecting the same altfunction for them * all. When functions require pins on different altfunctions, you need * to combine several groups. /* Altfunction A column */ static const unsigned u0_a_1_pins[] = { DB8500_PIN_AJ5, DB8500_PIN_AJ3,static const unsigned u1rxtx_a_1_pins[] = { DB8500_PIN_AH6, DB8500_PIN_AG6 };static const unsigned u1ctsrts_a_1_pins[] = { DB8500_PIN_AF6, DB8500_PIN_AG5 };/* Image processor I2C line, this is driven by image processor firmware */ static const unsigned ipi2c_a_1_pins[] = { DB8500_PIN_AD5, DB8500_PIN_AE4 };static const unsigned ipi2c_a_2_pins[] = { DB8500_PIN_AF5, DB8500_PIN_AG4 };/* MSP0 can only be on these pins, but TXD and RXD can be flipped */ static const unsigned msp0txrx_a_1_pins[] = { DB8500_PIN_AC4, DB8500_PIN_AC3 };static const unsigned msp0tfstck_a_1_pins[] = { DB8500_PIN_AF3, DB8500_PIN_AE3 };static const unsigned msp0rfsrck_a_1_pins[] = { DB8500_PIN_AD3, DB8500_PIN_AD4 };/* Basic pins of the MMC/SD card 0 interface */ static const unsigned mc0_a_1_pins[] = { DB8500_PIN_AC2, /* MC0_CMDDIR */ /* MC0_DAT0DIR */ /* MC0_DAT2DIR */ /* MC0_FBCLK */ /* MC0_CLK */ /* MC0_CMD */ /* MC0_DAT0 */ /* MC0_DAT1 */ /* MC0_DAT2 */ /* MC0_DAT3 */ /* MMC/SD card 0 interface without CMD/DAT0/DAT2 direction control */ static const unsigned mc0_a_2_pins[] = { DB8500_PIN_AA3, /* MC0_FBCLK */ /* MC0_CLK */ /* MC0_CMD */ /* MC0_DAT0 */ /* MC0_DAT1 */ /* MC0_DAT2 */ /* MC0_DAT3 */ /* Often only 4 bits are used, then these are not needed (only used for MMC) */ static const unsigned mc0_dat47_a_1_pins[] = { DB8500_PIN_W2, /* MC0_DAT4 */ /* MC0_DAT5 */ /* MC0_DAT6 */ /* MC0_DAT7 */ static const unsigned mc0dat31dir_a_1_pins[] = { DB8500_PIN_AB3 }; /* MC0_DAT31DIR */ /* MSP1 can only be on these pins, but TXD and RXD can be flipped */ static const unsigned msp1txrx_a_1_pins[] = { DB8500_PIN_AF2, DB8500_PIN_AG2 };static const unsigned msp1_a_1_pins[] = { DB8500_PIN_AE1, DB8500_PIN_AE2 };/* LCD interface */ static const unsigned lcdb_a_1_pins[] = { DB8500_PIN_F3, DB8500_PIN_F1,static const unsigned lcdvsi0_a_1_pins[] = { DB8500_PIN_E1 };static const unsigned lcdvsi1_a_1_pins[] = { DB8500_PIN_E2 };static const unsigned lcd_d0_d7_a_1_pins[] = {/* D8 thru D11 often used as TVOUT lines */ static const unsigned lcd_d8_d11_a_1_pins[] = { DB8500_PIN_F4,static const unsigned lcd_d12_d15_a_1_pins[] = {static const unsigned lcd_d12_d23_a_1_pins[] = {static const unsigned kp_a_1_pins[] = { DB8500_PIN_D7, DB8500_PIN_E8,static const unsigned kpskaskb_a_1_pins[] = { DB8500_PIN_D17, DB8500_PIN_D16 };static const unsigned kp_a_2_pins[] = {/* MC2 has 8 data lines and no direction control, so only for (e)MMC */ static const unsigned mc2_a_1_pins[] = { DB8500_PIN_A5, DB8500_PIN_B4,/* MC2 without the feedback clock */ static const unsigned mc2_a_2_pins[] = { DB8500_PIN_A5, DB8500_PIN_B4,static const unsigned ssp1_a_1_pins[] = { DB8500_PIN_C9, DB8500_PIN_B11,static const unsigned ssp0_a_1_pins[] = { DB8500_PIN_D12, DB8500_PIN_B13,static const unsigned i2c0_a_1_pins[] = { DB8500_PIN_C15, DB8500_PIN_B16 };/* * Image processor GPIO pins are named "ipgpio" and have their own * numberspace static const unsigned ipgpio0_a_1_pins[] = { DB8500_PIN_B14 };static const unsigned ipgpio1_a_1_pins[] = { DB8500_PIN_C14 };/* Three modem pins named RF_PURn, MODEM_STATE and MODEM_PWREN */ static const unsigned modem_a_1_pins[] = { DB8500_PIN_D22, DB8500_PIN_C23,/* * This MSP cannot switch RX and TX, SCK in a separate group since this * seems to be optional. static const unsigned msp2sck_a_1_pins[] = { DB8500_PIN_AJ27 };static const unsigned msp2_a_1_pins[] = { DB8500_PIN_AH27, DB8500_PIN_AF27,static const unsigned mc4_a_1_pins[] = { DB8500_PIN_AH24, DB8500_PIN_AG25,/* MC1 has only 4 data pins, designed for SD or SDIO exclusively */ static const unsigned mc1_a_1_pins[] = { DB8500_PIN_AH16, DB8500_PIN_AG15,static const unsigned mc1_a_2_pins[] = { DB8500_PIN_AH16, DB8500_PIN_AJ15,static const unsigned mc1dir_a_1_pins[] = { DB8500_PIN_AH13, DB8500_PIN_AG12,static const unsigned hsir_a_1_pins[] = { DB8500_PIN_AG10, DB8500_PIN_AH10,static const unsigned hsit_a_1_pins[] = { DB8500_PIN_AJ9, DB8500_PIN_AH9,static const unsigned hsit_a_2_pins[] = { DB8500_PIN_AJ9, DB8500_PIN_AH9,static const unsigned clkout1_a_1_pins[] = { DB8500_PIN_AH7 };static const unsigned clkout1_a_2_pins[] = { DB8500_PIN_AG7 };static const unsigned clkout2_a_1_pins[] = { DB8500_PIN_AJ6 };static const unsigned clkout2_a_2_pins[] = { DB8500_PIN_AF7 };static const unsigned usb_a_1_pins[] = { DB8500_PIN_AF28, DB8500_PIN_AE29,/* Altfunction B column */ static const unsigned trig_b_1_pins[] = { DB8500_PIN_AJ5, DB8500_PIN_AJ3 };static const unsigned i2c4_b_1_pins[] = { DB8500_PIN_AH6, DB8500_PIN_AG6 };static const unsigned i2c1_b_1_pins[] = { DB8500_PIN_AF6, DB8500_PIN_AG5 };static const unsigned i2c2_b_1_pins[] = { DB8500_PIN_AD5, DB8500_PIN_AE4 };static const unsigned i2c2_b_2_pins[] = { DB8500_PIN_AF5, DB8500_PIN_AG4 };static const unsigned msp0txrx_b_1_pins[] = { DB8500_PIN_AC4, DB8500_PIN_AC3 };static const unsigned i2c1_b_2_pins[] = { DB8500_PIN_AD3, DB8500_PIN_AD4 };/* Just RX and TX for UART2 */ static const unsigned u2rxtx_b_1_pins[] = { DB8500_PIN_AC2, DB8500_PIN_AC1 };static const unsigned uartmodtx_b_1_pins[] = { DB8500_PIN_AB4 };static const unsigned msp0sck_b_1_pins[] = { DB8500_PIN_AB3 };static const unsigned uartmodrx_b_1_pins[] = { DB8500_PIN_AA3 };static const unsigned stmmod_b_1_pins[] = { DB8500_PIN_AA4, DB8500_PIN_Y4,static const unsigned uartmodrx_b_2_pins[] = { DB8500_PIN_AB2 };static const unsigned spi3_b_1_pins[] = { DB8500_PIN_W2, DB8500_PIN_W3,static const unsigned msp1txrx_b_1_pins[] = { DB8500_PIN_AF2, DB8500_PIN_AG2 };static const unsigned kp_b_1_pins[] = { DB8500_PIN_F3, DB8500_PIN_F1,static const unsigned kp_b_2_pins[] = { DB8500_PIN_F3, DB8500_PIN_F1,static const unsigned sm_b_1_pins[] = { DB8500_PIN_C6, DB8500_PIN_B3,/* This chip select pin can be "ps0" in alt C so have it separately */ static const unsigned smcs0_b_1_pins[] = { DB8500_PIN_E8 };/* This chip select pin can be "ps1" in alt C so have it separately */ static const unsigned smcs1_b_1_pins[] = { DB8500_PIN_B14 };static const unsigned ipgpio7_b_1_pins[] = { DB8500_PIN_B11 };static const unsigned ipgpio2_b_1_pins[] = { DB8500_PIN_C12 };static const unsigned ipgpio3_b_1_pins[] = { DB8500_PIN_C11 };static const unsigned lcdaclk_b_1_pins[] = { DB8500_PIN_C14 };static const unsigned lcda_b_1_pins[] = { DB8500_PIN_D22,static const unsigned lcd_b_1_pins[] = { DB8500_PIN_D17, DB8500_PIN_D16,static const unsigned lcd_d16_d23_b_1_pins[] = {static const unsigned ddrtrig_b_1_pins[] = { DB8500_PIN_AJ27 };static const unsigned pwl_b_1_pins[] = { DB8500_PIN_AF25 };static const unsigned spi1_b_1_pins[] = { DB8500_PIN_AG15, DB8500_PIN_AF13,static const unsigned mc3_b_1_pins[] = { DB8500_PIN_AH13, DB8500_PIN_AG12,static const unsigned pwl_b_2_pins[] = { DB8500_PIN_AF8 };static const unsigned pwl_b_3_pins[] = { DB8500_PIN_AG7 };static const unsigned pwl_b_4_pins[] = { DB8500_PIN_AF7 };/* Altfunction C column */ static const unsigned ipjtag_c_1_pins[] = { DB8500_PIN_AJ5, DB8500_PIN_AJ3,static const unsigned ipgpio6_c_1_pins[] = { DB8500_PIN_AG6 };static const unsigned ipgpio0_c_1_pins[] = { DB8500_PIN_AF6 };static const unsigned ipgpio1_c_1_pins[] = { DB8500_PIN_AG5 };static const unsigned ipgpio3_c_1_pins[] = { DB8500_PIN_AF5 };static const unsigned ipgpio2_c_1_pins[] = { DB8500_PIN_AG4 };static const unsigned slim0_c_1_pins[] = { DB8500_PIN_AD3, DB8500_PIN_AD4 };/* Optional 4-bit Memory Stick interface */ static const unsigned ms_c_1_pins[] = { DB8500_PIN_AC2, DB8500_PIN_AC1,static const unsigned iptrigout_c_1_pins[] = { DB8500_PIN_AB4 };static const unsigned u2rxtx_c_1_pins[] = { DB8500_PIN_W2, DB8500_PIN_W3 };static const unsigned u2ctsrts_c_1_pins[] = { DB8500_PIN_V3, DB8500_PIN_V2 };static const unsigned u0_c_1_pins[] = { DB8500_PIN_AF2, DB8500_PIN_AE1,static const unsigned ipgpio4_c_1_pins[] = { DB8500_PIN_F3 };static const unsigned ipgpio5_c_1_pins[] = { DB8500_PIN_F1 };static const unsigned ipgpio6_c_2_pins[] = { DB8500_PIN_G3 };static const unsigned ipgpio7_c_1_pins[] = { DB8500_PIN_G2 };static const unsigned smcleale_c_1_pins[] = { DB8500_PIN_E1, DB8500_PIN_E2 };static const unsigned stmape_c_1_pins[] = { DB8500_PIN_G5, DB8500_PIN_G4,static const unsigned u2rxtx_c_2_pins[] = { DB8500_PIN_H2, DB8500_PIN_J2 };static const unsigned ipgpio2_c_2_pins[] = { DB8500_PIN_F4 };static const unsigned ipgpio3_c_2_pins[] = { DB8500_PIN_E3 };static const unsigned ipgpio4_c_2_pins[] = { DB8500_PIN_E4 };static const unsigned ipgpio5_c_2_pins[] = { DB8500_PIN_D2 };static const unsigned mc5_c_1_pins[] = { DB8500_PIN_C6, DB8500_PIN_B3,static const unsigned mc2rstn_c_1_pins[] = { DB8500_PIN_C8 };static const unsigned kp_c_1_pins[] = { DB8500_PIN_C9, DB8500_PIN_B11,static const unsigned smps0_c_1_pins[] = { DB8500_PIN_E8 };static const unsigned smps1_c_1_pins[] = { DB8500_PIN_B14 };static const unsigned u2rxtx_c_3_pins[] = { DB8500_PIN_B17, DB8500_PIN_C16 };static const unsigned stmape_c_2_pins[] = { DB8500_PIN_C19, DB8500_PIN_C17,static const unsigned uartmodrx_c_1_pins[] = { DB8500_PIN_D21 };static const unsigned uartmodtx_c_1_pins[] = { DB8500_PIN_D20 };static const unsigned stmmod_c_1_pins[] = { DB8500_PIN_C20, DB8500_PIN_B21,static const unsigned usbsim_c_1_pins[] = { DB8500_PIN_D22 };static const unsigned mc4rstn_c_1_pins[] = { DB8500_PIN_AF25 };static const unsigned clkout1_c_1_pins[] = { DB8500_PIN_AH13 };static const unsigned clkout2_c_1_pins[] = { DB8500_PIN_AH12 };static const unsigned i2c3_c_1_pins[] = { DB8500_PIN_AG12, DB8500_PIN_AH11 };static const unsigned spi0_c_1_pins[] = { DB8500_PIN_AH10, DB8500_PIN_AH9,static const unsigned usbsim_c_2_pins[] = { DB8500_PIN_AF8 };static const unsigned i2c3_c_2_pins[] = { DB8500_PIN_AG7, DB8500_PIN_AF7 };/* Other C1 column */ static const unsigned u2rx_oc1_1_pins[] = { DB8500_PIN_AB2 };static const unsigned stmape_oc1_1_pins[] = { DB8500_PIN_AA4, DB8500_PIN_Y4,static const unsigned remap0_oc1_1_pins[] = { DB8500_PIN_E1 };static const unsigned remap1_oc1_1_pins[] = { DB8500_PIN_E2 };static const unsigned ptma9_oc1_1_pins[] = { DB8500_PIN_G5, DB8500_PIN_G4,static const unsigned kp_oc1_1_pins[] = { DB8500_PIN_C6, DB8500_PIN_B3,static const unsigned rf_oc1_1_pins[] = { DB8500_PIN_D8, DB8500_PIN_D9 };static const unsigned hxclk_oc1_1_pins[] = { DB8500_PIN_D16 };static const unsigned uartmodrx_oc1_1_pins[] = { DB8500_PIN_B17 };static const unsigned uartmodtx_oc1_1_pins[] = { DB8500_PIN_C16 };static const unsigned stmmod_oc1_1_pins[] = { DB8500_PIN_C19, DB8500_PIN_C17,static const unsigned hxgpio_oc1_1_pins[] = { DB8500_PIN_D21, DB8500_PIN_D20,static const unsigned rf_oc1_2_pins[] = { DB8500_PIN_C23, DB8500_PIN_D23 };static const unsigned spi2_oc1_1_pins[] = { DB8500_PIN_AH13, DB8500_PIN_AG12,static const unsigned spi2_oc1_2_pins[] = { DB8500_PIN_AH13, DB8500_PIN_AH12,/* Other C2 column */ static const unsigned sbag_oc2_1_pins[] = { DB8500_PIN_AA4, DB8500_PIN_AB2,static const unsigned etmr4_oc2_1_pins[] = { DB8500_PIN_G5, DB8500_PIN_G4,static const unsigned ptma9_oc2_1_pins[] = { DB8500_PIN_D17, DB8500_PIN_D16,/* Other C3 column */ static const unsigned stmmod_oc3_1_pins[] = { DB8500_PIN_AB2, DB8500_PIN_W2,static const unsigned stmmod_oc3_2_pins[] = { DB8500_PIN_G5, DB8500_PIN_G4,static const unsigned uartmodrx_oc3_1_pins[] = { DB8500_PIN_H2 };static const unsigned uartmodtx_oc3_1_pins[] = { DB8500_PIN_J2 };static const unsigned etmr4_oc3_1_pins[] = { DB8500_PIN_D17, DB8500_PIN_D16,/* Other C4 column */ static const unsigned sbag_oc4_1_pins[] = { DB8500_PIN_G5, DB8500_PIN_G4,static const unsigned hwobs_oc4_1_pins[] = { DB8500_PIN_D17, DB8500_PIN_D16,static const struct nmk_pingroup nmk_db8500_groups[] = {/* Altfunction A column */ /* Altfunction B column */ /* Altfunction C column */ /* Other alt C1 column */ /* Other alt C2 column */ /* Other alt C3 column */ /* Other alt C4 column */ /* We use this macro to define the groups applicable to a function */ #define DB8500_FUNC_GROUPS(a, b...) \static const char * const a## _groups[] = { b };"u0_a_1" , "u0_c_1" );"u1rxtx_a_1" , "u1ctsrts_a_1" );/* * UART2 can be muxed out with just RX/TX in four places, CTS+RTS is however * only available on two pins in alternative function C "u2rxtx_b_1" , "u2rxtx_c_1" , "u2ctsrts_c_1" ,"u2rxtx_c_2" , "u2rxtx_c_3" , "u2rx_oc1_1" );"ipi2c_a_1" , "ipi2c_a_2" );/* * MSP0 can only be on a certain set of pins, but the TX/RX pins can be * switched around by selecting the altfunction A or B. The SCK pin is * only available on the altfunction B. "msp0txrx_a_1" , "msp0tfstck_a_1" , "msp0rfstck_a_1" ,"msp0txrx_b_1" , "msp0sck_b_1" );"mc0_a_1" , "mc0_a_2" , "mc0_dat47_a_1" , "mc0dat31dir_a_1" );/* MSP0 can swap RX/TX like MSP0 but has no SCK pin available */ "msp1txrx_a_1" , "msp1_a_1" , "msp1txrx_b_1" );"lcdb_a_1" );"lcdvsi0_a_1" , "lcdvsi1_a_1" , "lcd_d0_d7_a_1" ,"lcd_d8_d11_a_1" , "lcd_d12_d15_a_1" , "lcd_d12_d23_a_1" , "lcd_b_1" ,"lcd_d16_d23_b_1" );"kp_a_1" , "kp_a_2" , "kp_b_1" , "kp_b_2" , "kp_c_1" , "kp_oc1_1" );"mc2_a_1" , "mc2_a_2" , "mc2rstn_c_1" );"ssp1_a_1" );"ssp0_a_1" );"i2c0_a_1" );/* The image processor has 8 GPIO pins that can be muxed out */ "ipgpio0_a_1" , "ipgpio1_a_1" , "ipgpio7_b_1" ,"ipgpio2_b_1" , "ipgpio3_b_1" , "ipgpio6_c_1" , "ipgpio0_c_1" ,"ipgpio1_c_1" , "ipgpio3_c_1" , "ipgpio2_c_1" , "ipgpio4_c_1" ,"ipgpio5_c_1" , "ipgpio6_c_2" , "ipgpio7_c_1" , "ipgpio2_c_2" ,"ipgpio3_c_2" , "ipgpio4_c_2" , "ipgpio5_c_2" );/* MSP2 can not invert the RX/TX pins but has the optional SCK pin */ "msp2sck_a_1" , "msp2_a_1" );"mc4_a_1" , "mc4rstn_c_1" );"mc1_a_1" , "mc1_a_2" , "mc1dir_a_1" );"hsir_a_1" , "hsit_a_1" , "hsit_a_2" );"clkout1_a_1" , "clkout1_a_2" , "clkout1_c_1" ,"clkout2_a_1" , "clkout2_a_2" , "clkout2_c_1" );"usb_a_1" );"trig_b_1" );"i2c4_b_1" );"i2c1_b_1" , "i2c1_b_2" );"i2c2_b_1" , "i2c2_b_2" );/* * The modem UART can output its RX and TX pins in some different places, * so select one of each. "uartmodtx_b_1" , "uartmodrx_b_1" , "uartmodrx_b_2" ,"uartmodrx_c_1" , "uartmod_tx_c_1" , "uartmodrx_oc1_1" ,"uartmodtx_oc1_1" , "uartmodrx_oc3_1" , "uartmodtx_oc3_1" );"stmmod_b_1" , "stmmod_c_1" , "stmmod_oc1_1" ,"stmmod_oc3_1" , "stmmod_oc3_2" );"spi3_b_1" );/* Select between CS0 on alt B or PS1 on alt C */ "sm_b_1" , "smcs0_b_1" , "smcs1_b_1" , "smcleale_c_1" ,"smps0_c_1" , "smps1_c_1" );"lcdaclk_b_1" , "lcda_b_1" );"ddrtrig_b_1" );"pwl_b_1" , "pwl_b_2" , "pwl_b_3" , "pwl_b_4" );"spi1_b_1" );"mc3_b_1" );"ipjtag_c_1" );"slim0_c_1" );"ms_c_1" );"iptrigout_c_1" );"stmape_c_1" , "stmape_c_2" , "stmape_oc1_1" );"mc5_c_1" );"usbsim_c_1" , "usbsim_c_2" );"i2c3_c_1" , "i2c3_c_2" );"spi0_c_1" );"spi2_oc1_1" , "spi2_oc1_2" );"remap0_oc1_1" , "remap1_oc1_1" );"sbag_oc2_1" , "sbag_oc4_1" );"ptma9_oc1_1" , "ptma9_oc2_1" );"rf_oc1_1" , "rf_oc1_2" );"hxclk_oc1_1" , "hxgpio_oc1_1" );"etmr4_oc2_1" , "etmr4_oc3_1" );"hwobs_oc4_1" );#define FUNCTION(fname) \#fname , \## _groups, \## _groups), \static const struct nmk_function nmk_db8500_functions[] = {static const struct prcm_gpiocr_altcx_pin_desc db8500_altcx_pins[] = {true , PRCM_IDX_GPIOCR1, 9, /* STMAPE_CLK_a */ true , PRCM_IDX_GPIOCR1, 7, /* SBAG_CLK_a */ false , 0, 0,false , 0, 0true , PRCM_IDX_GPIOCR1, 9, /* STMAPE or U2_RXD ??? */ true , PRCM_IDX_GPIOCR1, 7, /* SBAG_VAL_a */ true , PRCM_IDX_GPIOCR1, 10, /* STM_MOD_CMD0 */ false , 0, 0true , PRCM_IDX_GPIOCR1, 9, /* STMAPE_DAT_a[0] */ true , PRCM_IDX_GPIOCR1, 7, /* SBAG_D_a[0] */ false , 0, 0,false , 0, 0true , PRCM_IDX_GPIOCR1, 9, /* STMAPE_DAT_a[1] */ true , PRCM_IDX_GPIOCR1, 7, /* SBAG_D_a[1] */ false , 0, 0,false , 0, 0true , PRCM_IDX_GPIOCR1, 9, /* STMAPE_DAT_a[2] */ true , PRCM_IDX_GPIOCR1, 7, /* SBAG_D_a[2] */ false , 0, 0,false , 0, 0true , PRCM_IDX_GPIOCR1, 9, /* STMAPE_DAT_a[3] */ true , PRCM_IDX_GPIOCR1, 7, /* SBAG_D_a[3] */ false , 0, 0,false , 0, 0false , 0, 0,false , 0, 0,true , PRCM_IDX_GPIOCR1, 10, /* STM_MOD_CMD0 */ false , 0, 0false , 0, 0,false , 0, 0,true , PRCM_IDX_GPIOCR1, 10, /* STM_MOD_CMD0 */ false , 0, 0false , 0, 0,false , 0, 0,true , PRCM_IDX_GPIOCR1, 10, /* STM_MOD_CMD0 */ false , 0, 0false , 0, 0,false , 0, 0,true , PRCM_IDX_GPIOCR1, 10, /* STM_MOD_CMD0 */ false , 0, 0true , PRCM_IDX_GPIOCR1, 18, /* REMAP_SELECT_ON */ false , 0, 0,false , 0, 0,false , 0, 0true , PRCM_IDX_GPIOCR1, 18, /* REMAP_SELECT_ON */ false , 0, 0,false , 0, 0,false , 0, 0true , PRCM_IDX_GPIOCR1, 5, /* PTM_A9_D23 */ true , PRCM_IDX_GPIOCR2, 2, /* DBG_ETM_R4_CMD0 */ true , PRCM_IDX_GPIOCR1, 11, /* STM_MOD_CMD1 */ true , PRCM_IDX_GPIOCR1, 8 /* SBAG_CLK */ true , PRCM_IDX_GPIOCR1, 5, /* PTM_A9_D22 */ true , PRCM_IDX_GPIOCR2, 2, /* DBG_ETM_R4_CMD0 */ true , PRCM_IDX_GPIOCR1, 11, /* STM_MOD_CMD1 */ true , PRCM_IDX_GPIOCR1, 8 /* SBAG_D3 */ true , PRCM_IDX_GPIOCR1, 5, /* PTM_A9_D21 */ true , PRCM_IDX_GPIOCR2, 2, /* DBG_ETM_R4_CMD0 */ true , PRCM_IDX_GPIOCR1, 11, /* STM_MOD_CMD1 */ true , PRCM_IDX_GPIOCR1, 8 /* SBAG_D2 */ true , PRCM_IDX_GPIOCR1, 5, /* PTM_A9_D20 */ true , PRCM_IDX_GPIOCR2, 2, /* DBG_ETM_R4_CMD0 */ true , PRCM_IDX_GPIOCR1, 11, /* STM_MOD_CMD1 */ true , PRCM_IDX_GPIOCR1, 8 /* SBAG_D1 */ true , PRCM_IDX_GPIOCR1, 5, /* PTM_A9_D19 */ true , PRCM_IDX_GPIOCR2, 2, /* DBG_ETM_R4_CMD0 */ true , PRCM_IDX_GPIOCR1, 11, /* STM_MOD_CMD1 */ true , PRCM_IDX_GPIOCR1, 8 /* SBAG_D0 */ true , PRCM_IDX_GPIOCR1, 5, /* PTM_A9_D18 */ true , PRCM_IDX_GPIOCR2, 2, /* DBG_ETM_R4_CMD0 */ true , PRCM_IDX_GPIOCR1, 0, /* DBG_UARTMOD_CMD0 */ false , 0, 0true , PRCM_IDX_GPIOCR1, 5, /* PTM_A9_D17 */ true , PRCM_IDX_GPIOCR2, 2, /* DBG_ETM_R4_CMD0 */ true , PRCM_IDX_GPIOCR1, 0, /* DBG_UARTMOD_CMD0 */ false , 0, 0true , PRCM_IDX_GPIOCR1, 5, /* PTM_A9_D16 */ true , PRCM_IDX_GPIOCR2, 2, /* DBG_ETM_R4_CMD0 */ false , 0, 0,true , PRCM_IDX_GPIOCR1, 8 /* SBAG_VAL */ true , PRCM_IDX_GPIOCR1, 12, /* KP_O3 */ false , 0, 0,false , 0, 0,false , 0, 0true , PRCM_IDX_GPIOCR1, 12, /* KP_O2 */ false , 0, 0,false , 0, 0,false , 0, 0true , PRCM_IDX_GPIOCR1, 12, /* KP_I3 */ false , 0, 0,false , 0, 0,false , 0, 0true , PRCM_IDX_GPIOCR1, 12, /* KP_I2 */ false , 0, 0,false , 0, 0,false , 0, 0true , PRCM_IDX_GPIOCR1, 12, /* KP_O1 */ false , 0, 0,false , 0, 0,false , 0, 0true , PRCM_IDX_GPIOCR1, 12, /* KP_O0 */ false , 0, 0,false , 0, 0,false , 0, 0true , PRCM_IDX_GPIOCR1, 12, /* KP_I1 */ false , 0, 0,false , 0, 0,false , 0, 0true , PRCM_IDX_GPIOCR1, 12, /* KP_I0 */ false , 0, 0,false , 0, 0,false , 0, 0true , PRCM_IDX_GPIOCR2, 3, /* RF_INT */ false , 0, 0,false , 0, 0,false , 0, 0true , PRCM_IDX_GPIOCR2, 1, /* RF_CTRL */ false , 0, 0,false , 0, 0,false , 0, 0false , 0, 0,true , PRCM_IDX_GPIOCR1, 6, /* PTM_A9_CTL */ true , PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/ true , PRCM_IDX_GPIOCR1, 25 /* HW_OBS17 */ true , PRCM_IDX_GPIOCR1, 4, /* Hx_CLK */ true , PRCM_IDX_GPIOCR1, 6, /* PTM_A9_CLK */ true , PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/ true , PRCM_IDX_GPIOCR1, 25 /* HW_OBS16 */ true , PRCM_IDX_GPIOCR1, 1, /* UARTMOD_CMD1 */ true , PRCM_IDX_GPIOCR1, 14, /* PTM_A9_D15 */ true , PRCM_IDX_GPIOCR1, 19, /* DBG_ETM_R4_CMD2 */ true , PRCM_IDX_GPIOCR1, 25 /* HW_OBS15 */ true , PRCM_IDX_GPIOCR1, 1, /* UARTMOD_CMD1 */ true , PRCM_IDX_GPIOCR1, 14, /* PTM_A9_D14 */ true , PRCM_IDX_GPIOCR1, 19, /* DBG_ETM_R4_CMD2 */ true , PRCM_IDX_GPIOCR1, 25 /* HW_OBS14 */ true , PRCM_IDX_GPIOCR1, 13, /* STM_MOD_CMD2 */ true , PRCM_IDX_GPIOCR1, 14, /* PTM_A9_D13 */ true , PRCM_IDX_GPIOCR1, 19, /* DBG_ETM_R4_CMD2 */ true , PRCM_IDX_GPIOCR1, 25 /* HW_OBS13 */ true , PRCM_IDX_GPIOCR1, 13, /* STM_MOD_CMD2 */ true , PRCM_IDX_GPIOCR1, 14, /* PTM_A9_D12 */ true , PRCM_IDX_GPIOCR1, 19, /* DBG_ETM_R4_CMD2 */ true , PRCM_IDX_GPIOCR1, 25 /* HW_OBS12 */ true , PRCM_IDX_GPIOCR1, 13, /* STM_MOD_CMD2 */ true , PRCM_IDX_GPIOCR1, 14, /* PTM_A9_D11 */ true , PRCM_IDX_GPIOCR1, 19, /* DBG_ETM_R4_CMD2 */ true , PRCM_IDX_GPIOCR1, 25 /* HW_OBS11 */ true , PRCM_IDX_GPIOCR1, 13, /* STM_MOD_CMD2 */ true , PRCM_IDX_GPIOCR1, 14, /* PTM_A9_D10 */ true , PRCM_IDX_GPIOCR1, 19, /* DBG_ETM_R4_CMD2 */ true , PRCM_IDX_GPIOCR1, 25 /* HW_OBS10 */ true , PRCM_IDX_GPIOCR1, 13, /* STM_MOD_CMD2 */ true , PRCM_IDX_GPIOCR1, 14, /* PTM_A9_D9 */ true , PRCM_IDX_GPIOCR1, 19, /* DBG_ETM_R4_CMD2 */ true , PRCM_IDX_GPIOCR1, 25 /* HW_OBS9 */ false , 0, 0,true , PRCM_IDX_GPIOCR1, 14, /* PTM_A9_D8 */ true , PRCM_IDX_GPIOCR1, 19, /* DBG_ETM_R4_CMD2 */ true , PRCM_IDX_GPIOCR1, 25 /* HW_OBS8 */ true , PRCM_IDX_GPIOCR1, 4, /* Hx_GPIO7 */ true , PRCM_IDX_GPIOCR1, 6, /* PTM_A9_D7 */ true , PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/ true , PRCM_IDX_GPIOCR1, 24 /* HW_OBS7 */ true , PRCM_IDX_GPIOCR1, 4, /* Hx_GPIO6 */ true , PRCM_IDX_GPIOCR1, 6, /* PTM_A9_D6 */ true , PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/ true , PRCM_IDX_GPIOCR1, 24 /* HW_OBS6 */ true , PRCM_IDX_GPIOCR1, 4, /* Hx_GPIO5 */ true , PRCM_IDX_GPIOCR1, 6, /* PTM_A9_D5 */ true , PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/ true , PRCM_IDX_GPIOCR1, 24 /* HW_OBS5 */ true , PRCM_IDX_GPIOCR1, 4, /* Hx_GPIO4 */ true , PRCM_IDX_GPIOCR1, 6, /* PTM_A9_D4 */ true , PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/ true , PRCM_IDX_GPIOCR1, 24 /* HW_OBS4 */ true , PRCM_IDX_GPIOCR1, 4, /* Hx_GPIO3 */ true , PRCM_IDX_GPIOCR1, 6, /* PTM_A9_D3 */ true , PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/ true , PRCM_IDX_GPIOCR1, 24 /* HW_OBS3 */ true , PRCM_IDX_GPIOCR1, 4, /* Hx_GPIO2 */ true , PRCM_IDX_GPIOCR1, 6, /* PTM_A9_D2 */ true , PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/ true , PRCM_IDX_GPIOCR1, 24 /* HW_OBS2 */ true , PRCM_IDX_GPIOCR1, 4, /* Hx_GPIO1 */ true , PRCM_IDX_GPIOCR1, 6, /* PTM_A9_D1 */ true , PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/ true , PRCM_IDX_GPIOCR1, 24 /* HW_OBS1 */ true , PRCM_IDX_GPIOCR1, 4, /* Hx_GPIO0 */ true , PRCM_IDX_GPIOCR1, 6, /* PTM_A9_D0 */ true , PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/ true , PRCM_IDX_GPIOCR1, 24 /* HW_OBS0 */ true , PRCM_IDX_GPIOCR2, 2, /* RF_INT */ false , 0, 0,false , 0, 0,false , 0, 0true , PRCM_IDX_GPIOCR2, 0, /* RF_CTRL */ false , 0, 0,false , 0, 0,false , 0, 0true , PRCM_IDX_GPIOCR1, 23, /* SPI2_TXD */ false , 0, 0,false , 0, 0,false , 0, 0true , PRCM_IDX_GPIOCR1, 23, /* SPI2_FRM */ false , 0, 0,false , 0, 0,false , 0, 0true , PRCM_IDX_GPIOCR1, 23, /* SPI2_CLK */ false , 0, 0,false , 0, 0,false , 0, 0true , PRCM_IDX_GPIOCR1, 23, /* SPI2_RXD */ false , 0, 0,false , 0, 0,false , 0, 0static const u16 db8500_prcm_gpiocr_regs[] = {static const struct nmk_pinctrl_soc_data nmk_db8500_soc = {void nmk_pinctrl_db8500_init(const struct nmk_pinctrl_soc_data **soc)
Messung V0.5 C=87 H=97 G=91
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¤ *© Formatika GbR, Deutschland
