// SPDX-License-Identifier: GPL-2.0-or-later /* * Marvell Armada CP110 pinctrl driver based on mvebu pinctrl core * * Copyright (C) 2017 Marvell * * Hanna Hawa <hannah@marvell.com> #include <linux/err.h>#include <linux/init.h>#include <linux/io.h>#include <linux/mfd/syscon.h>#include <linux/of.h>#include <linux/pinctrl/pinctrl.h>#include <linux/platform_device.h>#include <linux/property.h>#include "pinctrl-mvebu.h" /* * Even if the pin controller is the same the MMP available depend on the SoC * integration. * - In Armada7K (single CP) almost all the MPPs are available (except the * MMP 39 to 43) * - In Armada8K (dual CP) the MPPs are split into 2 parts, MPPs 0-31 from * CPS, and MPPs 32-62 from CPM, the below flags (V_ARMADA_8K_CPM, * V_ARMADA_8K_CPS) set which MPP is available to the CPx. * The x_PLUS enum mean that the MPP available for CPx and for Armada70x0 enum {0 ),1 ),2 ),3 ),static struct mvebu_mpp_mode armada_cp110_mpp_modes[] = {0 ,0 , "gpio" , NULL),1 , "dev" , "ale1" ),2 , "au" , "i2smclk" ),3 , "ge0" , "rxd3" ),4 , "tdm" , "pclk" ),6 , "ptp" , "pulse" ),7 , "mss_i2c" , "sda" ),8 , "uart0" , "rxd" ),9 , "sata0" , "present_act" ),10 , "ge" , "mdio" )),1 ,0 , "gpio" , NULL),1 , "dev" , "ale0" ),2 , "au" , "i2sdo_spdifo" ),3 , "ge0" , "rxd2" ),4 , "tdm" , "drx" ),6 , "ptp" , "clk" ),7 , "mss_i2c" , "sck" ),8 , "uart0" , "txd" ),9 , "sata1" , "present_act" ),10 , "ge" , "mdc" )),2 ,0 , "gpio" , NULL),1 , "dev" , "ad15" ),2 , "au" , "i2sextclk" ),3 , "ge0" , "rxd1" ),4 , "tdm" , "dtx" ),5 , "mss_uart" , "rxd" ),6 , "ptp" , "pclk_out" ),7 , "i2c1" , "sck" ),8 , "uart1" , "rxd" ),9 , "sata0" , "present_act" ),10 , "xg" , "mdc" )),3 ,0 , "gpio" , NULL),1 , "dev" , "ad14" ),2 , "au" , "i2slrclk" ),3 , "ge0" , "rxd0" ),4 , "tdm" , "fsync" ),5 , "mss_uart" , "txd" ),6 , "pcie" , "rstoutn" ),7 , "i2c1" , "sda" ),8 , "uart1" , "txd" ),9 , "sata1" , "present_act" ),10 , "xg" , "mdio" )),4 ,0 , "gpio" , NULL),1 , "dev" , "ad13" ),2 , "au" , "i2sbclk" ),3 , "ge0" , "rxctl" ),4 , "tdm" , "rstn" ),5 , "mss_uart" , "rxd" ),6 , "uart1" , "cts" ),7 , "pcie0" , "clkreq" ),8 , "uart3" , "rxd" ),10 , "ge" , "mdc" )),5 ,0 , "gpio" , NULL),1 , "dev" , "ad12" ),2 , "au" , "i2sdi" ),3 , "ge0" , "rxclk" ),4 , "tdm" , "intn" ),5 , "mss_uart" , "txd" ),6 , "uart1" , "rts" ),7 , "pcie1" , "clkreq" ),8 , "uart3" , "txd" ),10 , "ge" , "mdio" )),6 ,0 , "gpio" , NULL),1 , "dev" , "ad11" ),3 , "ge0" , "txd3" ),4 , "spi0" , "csn2" ),5 , "au" , "i2sextclk" ),6 , "sata1" , "present_act" ),7 , "pcie2" , "clkreq" ),8 , "uart0" , "rxd" ),9 , "ptp" , "pulse" )),7 ,0 , "gpio" , NULL),1 , "dev" , "ad10" ),3 , "ge0" , "txd2" ),4 , "spi0" , "csn1" ),5 , "spi1" , "csn1" ),6 , "sata0" , "present_act" ),7 , "led" , "data" ),8 , "uart0" , "txd" ),9 , "ptp" , "clk" )),8 ,0 , "gpio" , NULL),1 , "dev" , "ad9" ),3 , "ge0" , "txd1" ),4 , "spi0" , "csn0" ),5 , "spi1" , "csn0" ),6 , "uart0" , "cts" ),7 , "led" , "stb" ),8 , "uart2" , "rxd" ),9 , "ptp" , "pclk_out" ),10 , "synce1" , "clk" )),9 ,0 , "gpio" , NULL),1 , "dev" , "ad8" ),3 , "ge0" , "txd0" ),4 , "spi0" , "mosi" ),5 , "spi1" , "mosi" ),7 , "pcie" , "rstoutn" ),10 , "synce2" , "clk" )),10 ,0 , "gpio" , NULL),1 , "dev" , "readyn" ),3 , "ge0" , "txctl" ),4 , "spi0" , "miso" ),5 , "spi1" , "miso" ),6 , "uart0" , "cts" ),7 , "sata1" , "present_act" )),11 ,0 , "gpio" , NULL),1 , "dev" , "wen1" ),3 , "ge0" , "txclkout" ),4 , "spi0" , "clk" ),5 , "spi1" , "clk" ),6 , "uart0" , "rts" ),7 , "led" , "clk" ),8 , "uart2" , "txd" ),9 , "sata0" , "present_act" )),12 ,0 , "gpio" , NULL),1 , "dev" , "clk_out" ),2 , "nf" , "rbn1" ),3 , "spi1" , "csn1" ),4 , "ge0" , "rxclk" )),13 ,0 , "gpio" , NULL),1 , "dev" , "burstn" ),2 , "nf" , "rbn0" ),3 , "spi1" , "miso" ),4 , "ge0" , "rxctl" ),8 , "mss_spi" , "miso" )),14 ,0 , "gpio" , NULL),1 , "dev" , "bootcsn" ),2 , "dev" , "csn0" ),3 , "spi1" , "csn0" ),4 , "spi0" , "csn3" ),5 , "au" , "i2sextclk" ),6 , "spi0" , "miso" ),7 , "sata0" , "present_act" ),8 , "mss_spi" , "csn" )),15 ,0 , "gpio" , NULL),1 , "dev" , "ad7" ),3 , "spi1" , "mosi" ),6 , "spi0" , "mosi" ),8 , "mss_spi" , "mosi" ),11 , "ptp" , "pulse_cp2cp" )),16 ,0 , "gpio" , NULL),1 , "dev" , "ad6" ),3 , "spi1" , "clk" ),8 , "mss_spi" , "clk" )),17 ,0 , "gpio" , NULL),1 , "dev" , "ad5" ),4 , "ge0" , "txd3" )),18 ,0 , "gpio" , NULL),1 , "dev" , "ad4" ),4 , "ge0" , "txd2" ),11 , "ptp" , "clk_cp2cp" )),19 ,0 , "gpio" , NULL),1 , "dev" , "ad3" ),4 , "ge0" , "txd1" ),11 , "wakeup" , "out_cp2cp" )),20 ,0 , "gpio" , NULL),1 , "dev" , "ad2" ),4 , "ge0" , "txd0" )),21 ,0 , "gpio" , NULL),1 , "dev" , "ad1" ),4 , "ge0" , "txctl" ),11 , "sei" , "in_cp2cp" )),22 ,0 , "gpio" , NULL),1 , "dev" , "ad0" ),4 , "ge0" , "txclkout" ),11 , "wakeup" , "in_cp2cp" )),23 ,0 , "gpio" , NULL),1 , "dev" , "a1" ),5 , "au" , "i2smclk" ),11 , "link" , "rd_in_cp2cp" )),24 ,0 , "gpio" , NULL),1 , "dev" , "a0" ),5 , "au" , "i2slrclk" )),25 ,0 , "gpio" , NULL),1 , "dev" , "oen" ),5 , "au" , "i2sdo_spdifo" )),26 ,0 , "gpio" , NULL),1 , "dev" , "wen0" ),5 , "au" , "i2sbclk" )),27 ,0 , "gpio" , NULL),1 , "dev" , "csn0" ),2 , "spi1" , "miso" ),3 , "mss_gpio4" , NULL),4 , "ge0" , "rxd3" ),5 , "spi0" , "csn4" ),8 , "ge" , "mdio" ),9 , "sata0" , "present_act" ),10 , "uart0" , "rts" ),11 , "rei" , "in_cp2cp" )),28 ,0 , "gpio" , NULL),1 , "dev" , "csn1" ),2 , "spi1" , "csn0" ),3 , "mss_gpio5" , NULL),4 , "ge0" , "rxd2" ),5 , "spi0" , "csn5" ),6 , "pcie2" , "clkreq" ),7 , "ptp" , "pulse" ),8 , "ge" , "mdc" ),9 , "sata1" , "present_act" ),10 , "uart0" , "cts" ),11 , "led" , "data" )),29 ,0 , "gpio" , NULL),1 , "dev" , "csn2" ),2 , "spi1" , "mosi" ),3 , "mss_gpio6" , NULL),4 , "ge0" , "rxd1" ),5 , "spi0" , "csn6" ),6 , "pcie1" , "clkreq" ),7 , "ptp" , "clk" ),8 , "mss_i2c" , "sda" ),9 , "sata0" , "present_act" ),10 , "uart0" , "rxd" ),11 , "led" , "stb" )),30 ,0 , "gpio" , NULL),1 , "dev" , "csn3" ),2 , "spi1" , "clk" ),3 , "mss_gpio7" , NULL),4 , "ge0" , "rxd0" ),5 , "spi0" , "csn7" ),6 , "pcie0" , "clkreq" ),7 , "ptp" , "pclk_out" ),8 , "mss_i2c" , "sck" ),9 , "sata1" , "present_act" ),10 , "uart0" , "txd" ),11 , "led" , "clk" )),31 ,0 , "gpio" , NULL),1 , "dev" , "a2" ),3 , "mss_gpio4" , NULL),6 , "pcie" , "rstoutn" ),8 , "ge" , "mdc" )),32 ,0 , "gpio" , NULL),1 , "mii" , "col" ),2 , "mii" , "txerr" ),3 , "mss_spi" , "miso" ),4 , "tdm" , "drx" ),5 , "au" , "i2sextclk" ),6 , "au" , "i2sdi" ),7 , "ge" , "mdio" ),8 , "sdio" , "v18_en" ),9 , "pcie1" , "clkreq" ),10 , "mss_gpio0" , NULL)),33 ,0 , "gpio" , NULL),1 , "mii" , "txclk" ),2 , "sdio" , "pwr10" ),3 , "mss_spi" , "csn" ),4 , "tdm" , "fsync" ),5 , "au" , "i2smclk" ),6 , "sdio" , "bus_pwr" ),8 , "xg" , "mdio" ),9 , "pcie2" , "clkreq" ),10 , "mss_gpio1" , NULL)),34 ,0 , "gpio" , NULL),1 , "mii" , "rxerr" ),2 , "sdio" , "pwr11" ),3 , "mss_spi" , "mosi" ),4 , "tdm" , "dtx" ),5 , "au" , "i2slrclk" ),6 , "sdio" , "wr_protect" ),7 , "ge" , "mdc" ),9 , "pcie0" , "clkreq" ),10 , "mss_gpio2" , NULL)),35 ,0 , "gpio" , NULL),1 , "sata1" , "present_act" ),2 , "i2c1" , "sda" ),3 , "mss_spi" , "clk" ),4 , "tdm" , "pclk" ),5 , "au" , "i2sdo_spdifo" ),6 , "sdio" , "card_detect" ),7 , "xg" , "mdio" ),8 , "ge" , "mdio" ),9 , "pcie" , "rstoutn" ),10 , "mss_gpio3" , NULL)),36 ,0 , "gpio" , NULL),1 , "synce2" , "clk" ),2 , "i2c1" , "sck" ),3 , "ptp" , "clk" ),4 , "synce1" , "clk" ),5 , "au" , "i2sbclk" ),6 , "sata0" , "present_act" ),7 , "xg" , "mdc" ),8 , "ge" , "mdc" ),9 , "pcie2" , "clkreq" ),10 , "mss_gpio5" , NULL)),37 ,0 , "gpio" , NULL),1 , "uart2" , "rxd" ),2 , "i2c0" , "sck" ),3 , "ptp" , "pclk_out" ),4 , "tdm" , "intn" ),5 , "mss_i2c" , "sck" ),6 , "sata1" , "present_act" ),7 , "ge" , "mdc" ),8 , "xg" , "mdc" ),9 , "pcie1" , "clkreq" ),10 , "mss_gpio6" , NULL),11 , "link" , "rd_out_cp2cp" )),38 ,0 , "gpio" , NULL),1 , "uart2" , "txd" ),2 , "i2c0" , "sda" ),3 , "ptp" , "pulse" ),4 , "tdm" , "rstn" ),5 , "mss_i2c" , "sda" ),6 , "sata0" , "present_act" ),7 , "ge" , "mdio" ),8 , "xg" , "mdio" ),9 , "au" , "i2sextclk" ),10 , "mss_gpio7" , NULL),11 , "ptp" , "pulse_cp2cp" )),39 ,0 , "gpio" , NULL),1 , "sdio" , "wr_protect" ),4 , "au" , "i2sbclk" ),5 , "ptp" , "clk" ),6 , "spi0" , "csn1" ),9 , "sata1" , "present_act" ),10 , "mss_gpio0" , NULL)),40 ,0 , "gpio" , NULL),1 , "sdio" , "pwr11" ),2 , "synce1" , "clk" ),3 , "mss_i2c" , "sda" ),4 , "au" , "i2sdo_spdifo" ),5 , "ptp" , "pclk_out" ),6 , "spi0" , "clk" ),7 , "uart1" , "txd" ),8 , "ge" , "mdio" ),9 , "sata0" , "present_act" ),10 , "mss_gpio1" , NULL)),41 ,0 , "gpio" , NULL),1 , "sdio" , "pwr10" ),2 , "sdio" , "bus_pwr" ),3 , "mss_i2c" , "sck" ),4 , "au" , "i2slrclk" ),5 , "ptp" , "pulse" ),6 , "spi0" , "mosi" ),7 , "uart1" , "rxd" ),8 , "ge" , "mdc" ),9 , "sata1" , "present_act" ),10 , "mss_gpio2" , NULL),11 , "rei" , "out_cp2cp" )),42 ,0 , "gpio" , NULL),1 , "sdio" , "v18_en" ),2 , "sdio" , "wr_protect" ),3 , "synce2" , "clk" ),4 , "au" , "i2smclk" ),5 , "mss_uart" , "txd" ),6 , "spi0" , "miso" ),7 , "uart1" , "cts" ),8 , "xg" , "mdc" ),9 , "sata0" , "present_act" ),10 , "mss_gpio4" , NULL)),43 ,0 , "gpio" , NULL),1 , "sdio" , "card_detect" ),3 , "synce1" , "clk" ),4 , "au" , "i2sextclk" ),5 , "mss_uart" , "rxd" ),6 , "spi0" , "csn0" ),7 , "uart1" , "rts" ),8 , "xg" , "mdio" ),9 , "sata1" , "present_act" ),10 , "mss_gpio5" , NULL),11 , "wakeup" , "out_cp2cp" )),44 ,0 , "gpio" , NULL),1 , "ge1" , "txd2" ),7 , "uart0" , "rts" ),11 , "ptp" , "clk_cp2cp" )),45 ,0 , "gpio" , NULL),1 , "ge1" , "txd3" ),7 , "uart0" , "txd" ),9 , "pcie" , "rstoutn" )),46 ,0 , "gpio" , NULL),1 , "ge1" , "txd1" ),7 , "uart1" , "rts" )),47 ,0 , "gpio" , NULL),1 , "ge1" , "txd0" ),5 , "spi1" , "clk" ),7 , "uart1" , "txd" ),8 , "ge" , "mdc" )),48 ,0 , "gpio" , NULL),1 , "ge1" , "txctl_txen" ),5 , "spi1" , "mosi" ),8 , "xg" , "mdc" ),11 , "wakeup" , "in_cp2cp" )),49 ,0 , "gpio" , NULL),1 , "ge1" , "txclkout" ),2 , "mii" , "crs" ),5 , "spi1" , "miso" ),7 , "uart1" , "rxd" ),8 , "ge" , "mdio" ),9 , "pcie0" , "clkreq" ),10 , "sdio" , "v18_en" ),11 , "sei" , "out_cp2cp" )),50 ,0 , "gpio" , NULL),1 , "ge1" , "rxclk" ),2 , "mss_i2c" , "sda" ),5 , "spi1" , "csn0" ),6 , "uart2" , "txd" ),7 , "uart0" , "rxd" ),8 , "xg" , "mdio" ),10 , "sdio" , "pwr11" )),51 ,0 , "gpio" , NULL),1 , "ge1" , "rxd0" ),2 , "mss_i2c" , "sck" ),5 , "spi1" , "csn1" ),6 , "uart2" , "rxd" ),7 , "uart0" , "cts" ),10 , "sdio" , "pwr10" )),52 ,0 , "gpio" , NULL),1 , "ge1" , "rxd1" ),2 , "synce1" , "clk" ),4 , "synce2" , "clk" ),5 , "spi1" , "csn2" ),7 , "uart1" , "cts" ),8 , "led" , "clk" ),9 , "pcie" , "rstoutn" ),10 , "pcie0" , "clkreq" )),53 ,0 , "gpio" , NULL),1 , "ge1" , "rxd2" ),3 , "ptp" , "clk" ),5 , "spi1" , "csn3" ),7 , "uart1" , "rxd" ),8 , "led" , "stb" ),11 , "sdio" , "led" )),54 ,0 , "gpio" , NULL),1 , "ge1" , "rxd3" ),2 , "synce2" , "clk" ),3 , "ptp" , "pclk_out" ),4 , "synce1" , "clk" ),8 , "led" , "data" ),10 , "sdio" , "hw_rst" ),11 , "sdio_wp" , "wr_protect" )),55 ,0 , "gpio" , NULL),1 , "ge1" , "rxctl_rxdv" ),3 , "ptp" , "pulse" ),10 , "sdio" , "led" ),11 , "sdio_cd" , "card_detect" )),56 ,0 , "gpio" , NULL),4 , "tdm" , "drx" ),5 , "au" , "i2sdo_spdifo" ),6 , "spi0" , "clk" ),7 , "uart1" , "rxd" ),9 , "sata1" , "present_act" ),14 , "sdio" , "clk" )),57 ,0 , "gpio" , NULL),2 , "mss_i2c" , "sda" ),3 , "ptp" , "pclk_out" ),4 , "tdm" , "intn" ),5 , "au" , "i2sbclk" ),6 , "spi0" , "mosi" ),7 , "uart1" , "txd" ),9 , "sata0" , "present_act" ),14 , "sdio" , "cmd" )),58 ,0 , "gpio" , NULL),2 , "mss_i2c" , "sck" ),3 , "ptp" , "clk" ),4 , "tdm" , "rstn" ),5 , "au" , "i2sdi" ),6 , "spi0" , "miso" ),7 , "uart1" , "cts" ),8 , "led" , "clk" ),14 , "sdio" , "d0" )),59 ,0 , "gpio" , NULL),1 , "mss_gpio7" , NULL),2 , "synce2" , "clk" ),4 , "tdm" , "fsync" ),5 , "au" , "i2slrclk" ),6 , "spi0" , "csn0" ),7 , "uart0" , "cts" ),8 , "led" , "stb" ),9 , "uart1" , "txd" ),14 , "sdio" , "d1" )),60 ,0 , "gpio" , NULL),1 , "mss_gpio6" , NULL),3 , "ptp" , "pulse" ),4 , "tdm" , "dtx" ),5 , "au" , "i2smclk" ),6 , "spi0" , "csn1" ),7 , "uart0" , "rts" ),8 , "led" , "data" ),9 , "uart1" , "rxd" ),14 , "sdio" , "d2" )),61 ,0 , "gpio" , NULL),1 , "mss_gpio5" , NULL),3 , "ptp" , "clk" ),4 , "tdm" , "pclk" ),5 , "au" , "i2sextclk" ),6 , "spi0" , "csn2" ),7 , "uart0" , "txd" ),8 , "uart2" , "txd" ),9 , "sata1" , "present_act" ),10 , "ge" , "mdio" ),14 , "sdio" , "d3" )),62 ,0 , "gpio" , NULL),1 , "mss_gpio4" , NULL),2 , "synce1" , "clk" ),3 , "ptp" , "pclk_out" ),5 , "sata1" , "present_act" ),6 , "spi0" , "csn3" ),7 , "uart0" , "rxd" ),8 , "uart2" , "rxd" ),9 , "sata0" , "present_act" ),10 , "ge" , "mdc" ),14 , "sdio" , "ds" )),static const struct of_device_id armada_cp110_pinctrl_of_match[] = {"marvell,armada-7k-pinctrl" ,void *) V_ARMADA_7K,"marvell,armada-8k-cpm-pinctrl" ,void *) V_ARMADA_8K_CPM,"marvell,armada-8k-cps-pinctrl" ,void *) V_ARMADA_8K_CPS,"marvell,cp115-standalone-pinctrl" ,void *) V_CP115_STANDALONE,static const struct mvebu_mpp_ctrl armada_cp110_mpp_controls[] = {0 , 62 , NULL, mvebu_regmap_mpp_ctrl),static void mvebu_pinctrl_assign_variant(struct mvebu_mpp_mode *m,struct mvebu_mpp_ctrl_setting *s;for (s = m->settings ; s->name ; s++)static int armada_cp110_pinctrl_probe(struct platform_device *pdev)struct mvebu_pinctrl_soc_info *soc;int i;if (!pdev->dev.parent)return -ENODEV;sizeof (struct mvebu_pinctrl_soc_info), GFP_KERNEL);if (!soc)return -ENOMEM;unsigned long )device_get_match_data(&pdev->dev) & 0 xff;for (i = 0 ; i < ARRAY_SIZE(armada_cp110_mpp_modes); i++) {struct mvebu_mpp_mode *m = &armada_cp110_mpp_modes[i];switch (i) {case 0 ... 31 :break ;case 32 ... 38 :break ;case 39 ... 43 :break ;case 44 ... 62 :break ;return mvebu_pinctrl_simple_regmap_probe(pdev, pdev->dev.parent, 0 );static struct platform_driver armada_cp110_pinctrl_driver = {"armada-cp110-pinctrl" ,
Messung V0.5 in Prozent C=96 H=98 G=96
