// SPDX-License-Identifier: GPL-2.0 /* * Intel Tiger Lake PCH pinctrl/GPIO driver * * Copyright (C) 2019 - 2020, Intel Corporation * Authors: Andy Shevchenko <andriy.shevchenko@linux.intel.com> * Mika Westerberg <mika.westerberg@linux.intel.com> #include <linux/mod_devicetable.h>#include <linux/module.h>#include <linux/platform_device.h>#include <linux/pm.h>#include <linux/pinctrl/pinctrl.h>#include "pinctrl-intel.h" #define TGL_LP_PAD_OWN 0 x020#define TGL_LP_PADCFGLOCK 0 x080#define TGL_LP_HOSTSW_OWN 0 x0b0#define TGL_LP_GPI_IS 0 x100#define TGL_LP_GPI_IE 0 x120#define TGL_H_PAD_OWN 0 x020#define TGL_H_PADCFGLOCK 0 x090#define TGL_H_HOSTSW_OWN 0 x0c0#define TGL_H_GPI_IS 0 x100#define TGL_H_GPI_IE 0 x120#define TGL_GPP(r, s, e, g) \1 ), \#define TGL_LP_COMMUNITY(b, s, e, g) \#define TGL_H_COMMUNITY(b, s, e, g) \/* Tiger Lake-LP */ static const struct pinctrl_pin_desc tgllp_pins[] = {/* GPP_B */ 0 , "CORE_VID_0" ),1 , "CORE_VID_1" ),2 , "VRALERTB" ),3 , "CPU_GP_2" ),4 , "CPU_GP_3" ),5 , "ISH_I2C0_SDA" ),6 , "ISH_I2C0_SCL" ),7 , "ISH_I2C1_SDA" ),8 , "ISH_I2C1_SCL" ),9 , "I2C5_SDA" ),10 , "I2C5_SCL" ),11 , "PMCALERTB" ),12 , "SLP_S0B" ),13 , "PLTRSTB" ),14 , "SPKR" ),15 , "GSPI0_CS0B" ),16 , "GSPI0_CLK" ),17 , "GSPI0_MISO" ),18 , "GSPI0_MOSI" ),19 , "GSPI1_CS0B" ),20 , "GSPI1_CLK" ),21 , "GSPI1_MISO" ),22 , "GSPI1_MOSI" ),23 , "SML1ALERTB" ),24 , "GSPI0_CLK_LOOPBK" ),25 , "GSPI1_CLK_LOOPBK" ),/* GPP_T */ 26 , "I2C6_SDA" ),27 , "I2C6_SCL" ),28 , "I2C7_SDA" ),29 , "I2C7_SCL" ),30 , "UART4_RXD" ),31 , "UART4_TXD" ),32 , "UART4_RTSB" ),33 , "UART4_CTSB" ),34 , "UART5_RXD" ),35 , "UART5_TXD" ),36 , "UART5_RTSB" ),37 , "UART5_CTSB" ),38 , "UART6_RXD" ),39 , "UART6_TXD" ),40 , "UART6_RTSB" ),41 , "UART6_CTSB" ),/* GPP_A */ 42 , "ESPI_IO_0" ),43 , "ESPI_IO_1" ),44 , "ESPI_IO_2" ),45 , "ESPI_IO_3" ),46 , "ESPI_CSB" ),47 , "ESPI_CLK" ),48 , "ESPI_RESETB" ),49 , "I2S2_SCLK" ),50 , "I2S2_SFRM" ),51 , "I2S2_TXD" ),52 , "I2S2_RXD" ),53 , "PMC_I2C_SDA" ),54 , "SATAXPCIE_1" ),55 , "PMC_I2C_SCL" ),56 , "USB2_OCB_1" ),57 , "USB2_OCB_2" ),58 , "USB2_OCB_3" ),59 , "DDSP_HPD_C" ),60 , "DDSP_HPD_B" ),61 , "DDSP_HPD_1" ),62 , "DDSP_HPD_2" ),63 , "GPPC_A_21" ),64 , "GPPC_A_22" ),65 , "I2S1_SCLK" ),66 , "ESPI_CLK_LOOPBK" ),/* GPP_S */ 67 , "SNDW0_CLK" ),68 , "SNDW0_DATA" ),69 , "SNDW1_CLK" ),70 , "SNDW1_DATA" ),71 , "SNDW2_CLK" ),72 , "SNDW2_DATA" ),73 , "SNDW3_CLK" ),74 , "SNDW3_DATA" ),/* GPP_H */ 75 , "GPPC_H_0" ),76 , "GPPC_H_1" ),77 , "GPPC_H_2" ),78 , "SX_EXIT_HOLDOFFB" ),79 , "I2C2_SDA" ),80 , "I2C2_SCL" ),81 , "I2C3_SDA" ),82 , "I2C3_SCL" ),83 , "I2C4_SDA" ),84 , "I2C4_SCL" ),85 , "SRCCLKREQB_4" ),86 , "SRCCLKREQB_5" ),87 , "M2_SKT2_CFG_0" ),88 , "M2_SKT2_CFG_1" ),89 , "M2_SKT2_CFG_2" ),90 , "M2_SKT2_CFG_3" ),91 , "DDPB_CTRLCLK" ),92 , "DDPB_CTRLDATA" ),93 , "CPU_C10_GATEB" ),94 , "TIME_SYNC_0" ),95 , "IMGCLKOUT_1" ),96 , "IMGCLKOUT_2" ),97 , "IMGCLKOUT_3" ),98 , "IMGCLKOUT_4" ),/* GPP_D */ 99 , "ISH_GP_0" ),100 , "ISH_GP_1" ),101 , "ISH_GP_2" ),102 , "ISH_GP_3" ),103 , "IMGCLKOUT_0" ),104 , "SRCCLKREQB_0" ),105 , "SRCCLKREQB_1" ),106 , "SRCCLKREQB_2" ),107 , "SRCCLKREQB_3" ),108 , "ISH_SPI_CSB" ),109 , "ISH_SPI_CLK" ),110 , "ISH_SPI_MISO" ),111 , "ISH_SPI_MOSI" ),112 , "ISH_UART0_RXD" ),113 , "ISH_UART0_TXD" ),114 , "ISH_UART0_RTSB" ),115 , "ISH_UART0_CTSB" ),116 , "ISH_GP_4" ),117 , "ISH_GP_5" ),118 , "I2S_MCLK1_OUT" ),119 , "GSPI2_CLK_LOOPBK" ),/* GPP_U */ 120 , "UART3_RXD" ),121 , "UART3_TXD" ),122 , "UART3_RTSB" ),123 , "UART3_CTSB" ),124 , "GSPI3_CS0B" ),125 , "GSPI3_CLK" ),126 , "GSPI3_MISO" ),127 , "GSPI3_MOSI" ),128 , "GSPI4_CS0B" ),129 , "GSPI4_CLK" ),130 , "GSPI4_MISO" ),131 , "GSPI4_MOSI" ),132 , "GSPI5_CS0B" ),133 , "GSPI5_CLK" ),134 , "GSPI5_MISO" ),135 , "GSPI5_MOSI" ),136 , "GSPI6_CS0B" ),137 , "GSPI6_CLK" ),138 , "GSPI6_MISO" ),139 , "GSPI6_MOSI" ),140 , "GSPI3_CLK_LOOPBK" ),141 , "GSPI4_CLK_LOOPBK" ),142 , "GSPI5_CLK_LOOPBK" ),143 , "GSPI6_CLK_LOOPBK" ),/* vGPIO */ 144 , "CNV_BTEN" ),145 , "CNV_BT_HOST_WAKEB" ),146 , "CNV_BT_IF_SELECT" ),147 , "vCNV_BT_UART_TXD" ),148 , "vCNV_BT_UART_RXD" ),149 , "vCNV_BT_UART_CTS_B" ),150 , "vCNV_BT_UART_RTS_B" ),151 , "vCNV_MFUART1_TXD" ),152 , "vCNV_MFUART1_RXD" ),153 , "vCNV_MFUART1_CTS_B" ),154 , "vCNV_MFUART1_RTS_B" ),155 , "vUART0_TXD" ),156 , "vUART0_RXD" ),157 , "vUART0_CTS_B" ),158 , "vUART0_RTS_B" ),159 , "vISH_UART0_TXD" ),160 , "vISH_UART0_RXD" ),161 , "vISH_UART0_CTS_B" ),162 , "vISH_UART0_RTS_B" ),163 , "vCNV_BT_I2S_BCLK" ),164 , "vCNV_BT_I2S_WS_SYNC" ),165 , "vCNV_BT_I2S_SDO" ),166 , "vCNV_BT_I2S_SDI" ),167 , "vI2S2_SCLK" ),168 , "vI2S2_SFRM" ),169 , "vI2S2_TXD" ),170 , "vI2S2_RXD" ),/* GPP_C */ 171 , "SMBCLK" ),172 , "SMBDATA" ),173 , "SMBALERTB" ),174 , "SML0CLK" ),175 , "SML0DATA" ),176 , "SML0ALERTB" ),177 , "SML1CLK" ),178 , "SML1DATA" ),179 , "UART0_RXD" ),180 , "UART0_TXD" ),181 , "UART0_RTSB" ),182 , "UART0_CTSB" ),183 , "UART1_RXD" ),184 , "UART1_TXD" ),185 , "UART1_RTSB" ),186 , "UART1_CTSB" ),187 , "I2C0_SDA" ),188 , "I2C0_SCL" ),189 , "I2C1_SDA" ),190 , "I2C1_SCL" ),191 , "UART2_RXD" ),192 , "UART2_TXD" ),193 , "UART2_RTSB" ),194 , "UART2_CTSB" ),/* GPP_F */ 195 , "CNV_BRI_DT" ),196 , "CNV_BRI_RSP" ),197 , "CNV_RGI_DT" ),198 , "CNV_RGI_RSP" ),199 , "CNV_RF_RESET_B" ),200 , "GPPC_F_5" ),201 , "CNV_PA_BLANKING" ),202 , "GPPC_F_7" ),203 , "I2S_MCLK2_INOUT" ),204 , "BOOTMPC" ),205 , "GPPC_F_10" ),206 , "GPPC_F_11" ),207 , "GSXDOUT" ),208 , "GSXSLOAD" ),209 , "GSXDIN" ),210 , "GSXSRESETB" ),211 , "GSXCLK" ),212 , "GMII_MDC" ),213 , "GMII_MDIO" ),214 , "SRCCLKREQB_6" ),215 , "EXT_PWR_GATEB" ),216 , "EXT_PWR_GATE2B" ),217 , "VNN_CTRL" ),218 , "V1P05_CTRL" ),219 , "GPPF_CLK_LOOPBACK" ),/* HVCMOS */ 220 , "L_BKLTEN" ),221 , "L_BKLTCTL" ),222 , "L_VDDEN" ),223 , "SYS_PWROK" ),224 , "SYS_RESETB" ),225 , "MLK_RSTB" ),/* GPP_E */ 226 , "SATAXPCIE_0" ),227 , "SPI1_IO_2" ),228 , "SPI1_IO_3" ),229 , "CPU_GP_0" ),230 , "SATA_DEVSLP_0" ),231 , "SATA_DEVSLP_1" ),232 , "GPPC_E_6" ),233 , "CPU_GP_1" ),234 , "SPI1_CS1B" ),235 , "USB2_OCB_0" ),236 , "SPI1_CSB" ),237 , "SPI1_CLK" ),238 , "SPI1_MISO_IO_1" ),239 , "SPI1_MOSI_IO_0" ),240 , "DDSP_HPD_A" ),241 , "ISH_GP_6" ),242 , "ISH_GP_7" ),243 , "GPPC_E_17" ),244 , "DDP1_CTRLCLK" ),245 , "DDP1_CTRLDATA" ),246 , "DDP2_CTRLCLK" ),247 , "DDP2_CTRLDATA" ),248 , "DDPA_CTRLCLK" ),249 , "DDPA_CTRLDATA" ),250 , "SPI1_CLK_LOOPBK" ),/* JTAG */ 251 , "JTAG_TDO" ),252 , "JTAGX" ),253 , "PRDYB" ),254 , "PREQB" ),255 , "CPU_TRSTB" ),256 , "JTAG_TDI" ),257 , "JTAG_TMS" ),258 , "JTAG_TCK" ),259 , "DBG_PMODE" ),/* GPP_R */ 260 , "HDA_BCLK" ),261 , "HDA_SYNC" ),262 , "HDA_SDO" ),263 , "HDA_SDI_0" ),264 , "HDA_RSTB" ),265 , "HDA_SDI_1" ),266 , "GPP_R_6" ),267 , "GPP_R_7" ),/* SPI */ 268 , "SPI0_IO_2" ),269 , "SPI0_IO_3" ),270 , "SPI0_MOSI_IO_0" ),271 , "SPI0_MISO_IO_1" ),272 , "SPI0_TPM_CSB" ),273 , "SPI0_FLASH_0_CSB" ),274 , "SPI0_FLASH_1_CSB" ),275 , "SPI0_CLK" ),276 , "SPI0_CLK_LOOPBK" ),static const struct intel_padgroup tgllp_community0_gpps[] = {0 , 0 , 25 , 0 ), /* GPP_B */ 1 , 26 , 41 , 32 ), /* GPP_T */ 2 , 42 , 66 , 64 ), /* GPP_A */ static const struct intel_padgroup tgllp_community1_gpps[] = {0 , 67 , 74 , 96 ), /* GPP_S */ 1 , 75 , 98 , 128 ), /* GPP_H */ 2 , 99 , 119 , 160 ), /* GPP_D */ 3 , 120 , 143 , 192 ), /* GPP_U */ 4 , 144 , 170 , 224 ), /* vGPIO */ static const struct intel_padgroup tgllp_community4_gpps[] = {0 , 171 , 194 , 256 ), /* GPP_C */ 1 , 195 , 219 , 288 ), /* GPP_F */ 2 , 220 , 225 , INTEL_GPIO_BASE_NOMAP), /* HVCMOS */ 3 , 226 , 250 , 320 ), /* GPP_E */ 4 , 251 , 259 , INTEL_GPIO_BASE_NOMAP), /* JTAG */ static const struct intel_padgroup tgllp_community5_gpps[] = {0 , 260 , 267 , 352 ), /* GPP_R */ 1 , 268 , 276 , INTEL_GPIO_BASE_NOMAP), /* SPI */ static const struct intel_community tgllp_communities[] = {0 , 0 , 66 , tgllp_community0_gpps),1 , 67 , 170 , tgllp_community1_gpps),2 , 171 , 259 , tgllp_community4_gpps),3 , 260 , 276 , tgllp_community5_gpps),static const struct intel_pinctrl_soc_data tgllp_soc_data = {/* Tiger Lake-H */ static const struct pinctrl_pin_desc tglh_pins[] = {/* GPP_A */ 0 , "SPI0_IO_2" ),1 , "SPI0_IO_3" ),2 , "SPI0_MOSI_IO_0" ),3 , "SPI0_MISO_IO_1" ),4 , "SPI0_TPM_CSB" ),5 , "SPI0_FLASH_0_CSB" ),6 , "SPI0_FLASH_1_CSB" ),7 , "SPI0_CLK" ),8 , "ESPI_IO_0" ),9 , "ESPI_IO_1" ),10 , "ESPI_IO_2" ),11 , "ESPI_IO_3" ),12 , "ESPI_CS0B" ),13 , "ESPI_CLK" ),14 , "ESPI_RESETB" ),15 , "ESPI_CS1B" ),16 , "ESPI_CS2B" ),17 , "ESPI_CS3B" ),18 , "ESPI_ALERT0B" ),19 , "ESPI_ALERT1B" ),20 , "ESPI_ALERT2B" ),21 , "ESPI_ALERT3B" ),22 , "GPPC_A_14" ),23 , "SPI0_CLK_LOOPBK" ),24 , "ESPI_CLK_LOOPBK" ),/* GPP_R */ 25 , "HDA_BCLK" ),26 , "HDA_SYNC" ),27 , "HDA_SDO" ),28 , "HDA_SDI_0" ),29 , "HDA_RSTB" ),30 , "HDA_SDI_1" ),31 , "GPP_R_6" ),32 , "GPP_R_7" ),33 , "GPP_R_8" ),34 , "PCIE_LNK_DOWN" ),35 , "ISH_UART0_RTSB" ),36 , "SX_EXIT_HOLDOFFB" ),37 , "CLKOUT_48" ),38 , "ISH_GP_7" ),39 , "ISH_GP_0" ),40 , "ISH_GP_1" ),41 , "ISH_GP_2" ),42 , "ISH_GP_3" ),43 , "ISH_GP_4" ),44 , "ISH_GP_5" ),/* GPP_B */ 45 , "GSPI0_CS1B" ),46 , "GSPI1_CS1B" ),47 , "VRALERTB" ),48 , "CPU_GP_2" ),49 , "CPU_GP_3" ),50 , "SRCCLKREQB_0" ),51 , "SRCCLKREQB_1" ),52 , "SRCCLKREQB_2" ),53 , "SRCCLKREQB_3" ),54 , "SRCCLKREQB_4" ),55 , "SRCCLKREQB_5" ),56 , "I2S_MCLK" ),57 , "SLP_S0B" ),58 , "PLTRSTB" ),59 , "SPKR" ),60 , "GSPI0_CS0B" ),61 , "GSPI0_CLK" ),62 , "GSPI0_MISO" ),63 , "GSPI0_MOSI" ),64 , "GSPI1_CS0B" ),65 , "GSPI1_CLK" ),66 , "GSPI1_MISO" ),67 , "GSPI1_MOSI" ),68 , "SML1ALERTB" ),69 , "GSPI0_CLK_LOOPBK" ),70 , "GSPI1_CLK_LOOPBK" ),/* vGPIO_0 */ 71 , "ESPI_USB_OCB_0" ),72 , "ESPI_USB_OCB_1" ),73 , "ESPI_USB_OCB_2" ),74 , "ESPI_USB_OCB_3" ),75 , "USB_CPU_OCB_0" ),76 , "USB_CPU_OCB_1" ),77 , "USB_CPU_OCB_2" ),78 , "USB_CPU_OCB_3" ),/* GPP_D */ 79 , "SPI1_CSB" ),80 , "SPI1_CLK" ),81 , "SPI1_MISO_IO_1" ),82 , "SPI1_MOSI_IO_0" ),83 , "SML1CLK" ),84 , "I2S2_SFRM" ),85 , "I2S2_TXD" ),86 , "I2S2_RXD" ),87 , "I2S2_SCLK" ),88 , "SML0CLK" ),89 , "SML0DATA" ),90 , "GPP_D_11" ),91 , "ISH_UART0_CTSB" ),92 , "SPI1_IO_2" ),93 , "SPI1_IO_3" ),94 , "SML1DATA" ),95 , "GSPI3_CS0B" ),96 , "GSPI3_CLK" ),97 , "GSPI3_MISO" ),98 , "GSPI3_MOSI" ),99 , "UART3_RXD" ),100 , "UART3_TXD" ),101 , "UART3_RTSB" ),102 , "UART3_CTSB" ),103 , "SPI1_CLK_LOOPBK" ),104 , "GSPI3_CLK_LOOPBK" ),/* GPP_C */ 105 , "SMBCLK" ),106 , "SMBDATA" ),107 , "SMBALERTB" ),108 , "ISH_UART0_RXD" ),109 , "ISH_UART0_TXD" ),110 , "SML0ALERTB" ),111 , "ISH_I2C2_SDA" ),112 , "ISH_I2C2_SCL" ),113 , "UART0_RXD" ),114 , "UART0_TXD" ),115 , "UART0_RTSB" ),116 , "UART0_CTSB" ),117 , "UART1_RXD" ),118 , "UART1_TXD" ),119 , "UART1_RTSB" ),120 , "UART1_CTSB" ),121 , "I2C0_SDA" ),122 , "I2C0_SCL" ),123 , "I2C1_SDA" ),124 , "I2C1_SCL" ),125 , "UART2_RXD" ),126 , "UART2_TXD" ),127 , "UART2_RTSB" ),128 , "UART2_CTSB" ),/* GPP_S */ 129 , "SNDW1_CLK" ),130 , "SNDW1_DATA" ),131 , "SNDW2_CLK" ),132 , "SNDW2_DATA" ),133 , "SNDW3_CLK" ),134 , "SNDW3_DATA" ),135 , "SNDW4_CLK" ),136 , "SNDW4_DATA" ),/* GPP_G */ 137 , "DDPA_CTRLCLK" ),138 , "DDPA_CTRLDATA" ),139 , "DNX_FORCE_RELOAD" ),140 , "GMII_MDC_0" ),141 , "GMII_MDIO_0" ),142 , "SLP_DRAMB" ),143 , "GPPC_G_6" ),144 , "GPPC_G_7" ),145 , "ISH_SPI_CSB" ),146 , "ISH_SPI_CLK" ),147 , "ISH_SPI_MISO" ),148 , "ISH_SPI_MOSI" ),149 , "DDP1_CTRLCLK" ),150 , "DDP1_CTRLDATA" ),151 , "DDP2_CTRLCLK" ),152 , "DDP2_CTRLDATA" ),153 , "GSPI2_CLK_LOOPBK" ),/* vGPIO */ 154 , "CNV_BTEN" ),155 , "CNV_BT_HOST_WAKEB" ),156 , "CNV_BT_IF_SELECT" ),157 , "vCNV_BT_UART_TXD" ),158 , "vCNV_BT_UART_RXD" ),159 , "vCNV_BT_UART_CTS_B" ),160 , "vCNV_BT_UART_RTS_B" ),161 , "vCNV_MFUART1_TXD" ),162 , "vCNV_MFUART1_RXD" ),163 , "vCNV_MFUART1_CTS_B" ),164 , "vCNV_MFUART1_RTS_B" ),165 , "vUART0_TXD" ),166 , "vUART0_RXD" ),167 , "vUART0_CTS_B" ),168 , "vUART0_RTS_B" ),169 , "vISH_UART0_TXD" ),170 , "vISH_UART0_RXD" ),171 , "vISH_UART0_CTS_B" ),172 , "vISH_UART0_RTS_B" ),173 , "vCNV_BT_I2S_BCLK" ),174 , "vCNV_BT_I2S_WS_SYNC" ),175 , "vCNV_BT_I2S_SDO" ),176 , "vCNV_BT_I2S_SDI" ),177 , "vI2S2_SCLK" ),178 , "vI2S2_SFRM" ),179 , "vI2S2_TXD" ),180 , "vI2S2_RXD" ),/* GPP_E */ 181 , "SATAXPCIE_0" ),182 , "SATAXPCIE_1" ),183 , "SATAXPCIE_2" ),184 , "CPU_GP_0" ),185 , "SATA_DEVSLP_0" ),186 , "SATA_DEVSLP_1" ),187 , "SATA_DEVSLP_2" ),188 , "CPU_GP_1" ),189 , "SATA_LEDB" ),190 , "USB2_OCB_0" ),191 , "USB2_OCB_1" ),192 , "USB2_OCB_2" ),193 , "USB2_OCB_3" ),/* GPP_F */ 194 , "SATAXPCIE_3" ),195 , "SATAXPCIE_4" ),196 , "SATAXPCIE_5" ),197 , "SATAXPCIE_6" ),198 , "SATAXPCIE_7" ),199 , "SATA_DEVSLP_3" ),200 , "SATA_DEVSLP_4" ),201 , "SATA_DEVSLP_5" ),202 , "SATA_DEVSLP_6" ),203 , "SATA_DEVSLP_7" ),204 , "SATA_SCLOCK" ),205 , "SATA_SLOAD" ),206 , "SATA_SDATAOUT1" ),207 , "SATA_SDATAOUT0" ),208 , "PS_ONB" ),209 , "M2_SKT2_CFG_0" ),210 , "M2_SKT2_CFG_1" ),211 , "M2_SKT2_CFG_2" ),212 , "M2_SKT2_CFG_3" ),213 , "L_VDDEN" ),214 , "L_BKLTEN" ),215 , "L_BKLTCTL" ),216 , "VNN_CTRL" ),217 , "GPP_F_23" ),/* GPP_H */ 218 , "SRCCLKREQB_6" ),219 , "SRCCLKREQB_7" ),220 , "SRCCLKREQB_8" ),221 , "SRCCLKREQB_9" ),222 , "SRCCLKREQB_10" ),223 , "SRCCLKREQB_11" ),224 , "SRCCLKREQB_12" ),225 , "SRCCLKREQB_13" ),226 , "SRCCLKREQB_14" ),227 , "SRCCLKREQB_15" ),228 , "SML2CLK" ),229 , "SML2DATA" ),230 , "SML2ALERTB" ),231 , "SML3CLK" ),232 , "SML3DATA" ),233 , "SML3ALERTB" ),234 , "SML4CLK" ),235 , "SML4DATA" ),236 , "SML4ALERTB" ),237 , "ISH_I2C0_SDA" ),238 , "ISH_I2C0_SCL" ),239 , "ISH_I2C1_SDA" ),240 , "ISH_I2C1_SCL" ),241 , "TIME_SYNC_0" ),/* GPP_J */ 242 , "CNV_PA_BLANKING" ),243 , "CPU_C10_GATEB" ),244 , "CNV_BRI_DT" ),245 , "CNV_BRI_RSP" ),246 , "CNV_RGI_DT" ),247 , "CNV_RGI_RSP" ),248 , "CNV_MFUART2_RXD" ),249 , "CNV_MFUART2_TXD" ),250 , "GPP_J_8" ),251 , "GPP_J_9" ),/* GPP_K */ 252 , "GSXDOUT" ),253 , "GSXSLOAD" ),254 , "GSXDIN" ),255 , "GSXSRESETB" ),256 , "GSXCLK" ),257 , "ADR_COMPLETE" ),258 , "DDSP_HPD_A" ),259 , "DDSP_HPD_B" ),260 , "CORE_VID_0" ),261 , "CORE_VID_1" ),262 , "DDSP_HPD_C" ),263 , "GPP_K_11" ),264 , "SYS_PWROK" ),265 , "SYS_RESETB" ),266 , "MLK_RSTB" ),/* GPP_I */ 267 , "PMCALERTB" ),268 , "DDSP_HPD_1" ),269 , "DDSP_HPD_2" ),270 , "DDSP_HPD_3" ),271 , "DDSP_HPD_4" ),272 , "DDPB_CTRLCLK" ),273 , "DDPB_CTRLDATA" ),274 , "DDPC_CTRLCLK" ),275 , "DDPC_CTRLDATA" ),276 , "FUSA_DIAGTEST_EN" ),277 , "FUSA_DIAGTEST_MODE" ),278 , "USB2_OCB_4" ),279 , "USB2_OCB_5" ),280 , "USB2_OCB_6" ),281 , "USB2_OCB_7" ),/* JTAG */ 282 , "JTAG_TDO" ),283 , "JTAGX" ),284 , "PRDYB" ),285 , "PREQB" ),286 , "JTAG_TDI" ),287 , "JTAG_TMS" ),288 , "JTAG_TCK" ),289 , "DBG_PMODE" ),290 , "CPU_TRSTB" ),static const struct intel_padgroup tglh_community0_gpps[] = {0 , 0 , 24 , 0 ), /* GPP_A */ 1 , 25 , 44 , 32 ), /* GPP_R */ 2 , 45 , 70 , 64 ), /* GPP_B */ 3 , 71 , 78 , 96 ), /* vGPIO_0 */ static const struct intel_padgroup tglh_community1_gpps[] = {0 , 79 , 104 , 128 ), /* GPP_D */ 1 , 105 , 128 , 160 ), /* GPP_C */ 2 , 129 , 136 , 192 ), /* GPP_S */ 3 , 137 , 153 , 224 ), /* GPP_G */ 4 , 154 , 180 , 256 ), /* vGPIO */ static const struct intel_padgroup tglh_community3_gpps[] = {0 , 181 , 193 , 288 ), /* GPP_E */ 1 , 194 , 217 , 320 ), /* GPP_F */ static const struct intel_padgroup tglh_community4_gpps[] = {0 , 218 , 241 , 352 ), /* GPP_H */ 1 , 242 , 251 , 384 ), /* GPP_J */ 2 , 252 , 266 , 416 ), /* GPP_K */ static const struct intel_padgroup tglh_community5_gpps[] = {0 , 267 , 281 , 448 ), /* GPP_I */ 1 , 282 , 290 , INTEL_GPIO_BASE_NOMAP), /* JTAG */ static const struct intel_community tglh_communities[] = {0 , 0 , 78 , tglh_community0_gpps),1 , 79 , 180 , tglh_community1_gpps),2 , 181 , 217 , tglh_community3_gpps),3 , 218 , 266 , tglh_community4_gpps),4 , 267 , 290 , tglh_community5_gpps),static const struct intel_pinctrl_soc_data tglh_soc_data = {static const struct acpi_device_id tgl_pinctrl_acpi_match[] = {"INT34C5" , (kernel_ulong_t)&tgllp_soc_data },"INT34C6" , (kernel_ulong_t)&tglh_soc_data },"INTC1055" , (kernel_ulong_t)&tgllp_soc_data },static struct platform_driver tgl_pinctrl_driver = {"tigerlake-pinctrl" ,"Andy Shevchenko <andriy.shevchenko@linux.intel.com>" );"Mika Westerberg <mika.westerberg@linux.intel.com>" );"Intel Tiger Lake PCH pinctrl/GPIO driver" );"GPL v2" );"PINCTRL_INTEL" );
Messung V0.5 in Prozent C=96 H=94 G=94
¤ Dauer der Verarbeitung: 0.12 Sekunden
(vorverarbeitet am 2026-06-07)
¤ *© Formatika GbR, Deutschland
