// SPDX-License-Identifier: GPL-2.0 /* * Intel Merrifield SoC pinctrl driver * * Copyright (C) 2016, Intel Corporation * Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com> #include <linux/array_size.h>#include <linux/init.h>#include <linux/mod_devicetable.h>#include <linux/module.h>#include <linux/platform_device.h>#include <linux/types.h>#include <linux/pinctrl/pinctrl.h>#include "pinctrl-intel.h" #include "pinctrl-tangier.h" static const struct pinctrl_pin_desc mrfld_pins[] = {/* Family 0: OCP2SSC (0 pins) */ /* Family 1: ULPI (13 pins) */ 0 , "ULPI_CLK" ),1 , "ULPI_D0" ),2 , "ULPI_D1" ),3 , "ULPI_D2" ),4 , "ULPI_D3" ),5 , "ULPI_D4" ),6 , "ULPI_D5" ),7 , "ULPI_D6" ),8 , "ULPI_D7" ),9 , "ULPI_DIR" ),10 , "ULPI_NXT" ),11 , "ULPI_REFCLK" ),12 , "ULPI_STP" ),/* Family 2: eMMC (24 pins) */ 13 , "EMMC_CLK" ),14 , "EMMC_CMD" ),15 , "EMMC_D0" ),16 , "EMMC_D1" ),17 , "EMMC_D2" ),18 , "EMMC_D3" ),19 , "EMMC_D4" ),20 , "EMMC_D5" ),21 , "EMMC_D6" ),22 , "EMMC_D7" ),23 , "EMMC_RST_N" ),24 , "GP154" ),25 , "GP155" ),26 , "GP156" ),27 , "GP157" ),28 , "GP158" ),29 , "GP159" ),30 , "GP160" ),31 , "GP161" ),32 , "GP162" ),33 , "GP163" ),34 , "GP97" ),35 , "GP14" ),36 , "GP15" ),/* Family 3: SDIO (20 pins) */ 37 , "GP77_SD_CD" ),38 , "GP78_SD_CLK" ),39 , "GP79_SD_CMD" ),40 , "GP80_SD_D0" ),41 , "GP81_SD_D1" ),42 , "GP82_SD_D2" ),43 , "GP83_SD_D3" ),44 , "GP84_SD_LS_CLK_FB" ),45 , "GP85_SD_LS_CMD_DIR" ),46 , "GP86_SD_LS_D_DIR" ),47 , "GP88_SD_LS_SEL" ),48 , "GP87_SD_PD" ),49 , "GP89_SD_WP" ),50 , "GP90_SDIO_CLK" ),51 , "GP91_SDIO_CMD" ),52 , "GP92_SDIO_D0" ),53 , "GP93_SDIO_D1" ),54 , "GP94_SDIO_D2" ),55 , "GP95_SDIO_D3" ),56 , "GP96_SDIO_PD" ),/* Family 4: HSI (8 pins) */ 57 , "HSI_ACDATA" ),58 , "HSI_ACFLAG" ),59 , "HSI_ACREADY" ),60 , "HSI_ACWAKE" ),61 , "HSI_CADATA" ),62 , "HSI_CAFLAG" ),63 , "HSI_CAREADY" ),64 , "HSI_CAWAKE" ),/* Family 5: SSP Audio (14 pins) */ 65 , "GP70" ),66 , "GP71" ),67 , "GP32_I2S_0_CLK" ),68 , "GP33_I2S_0_FS" ),69 , "GP34_I2S_0_RXD" ),70 , "GP35_I2S_0_TXD" ),71 , "GP36_I2S_1_CLK" ),72 , "GP37_I2S_1_FS" ),73 , "GP38_I2S_1_RXD" ),74 , "GP39_I2S_1_TXD" ),75 , "GP40_I2S_2_CLK" ),76 , "GP41_I2S_2_FS" ),77 , "GP42_I2S_2_RXD" ),78 , "GP43_I2S_2_TXD" ),/* Family 6: GP SSP (22 pins) */ 79 , "GP120_SPI_0_CLK" ),80 , "GP121_SPI_0_SS" ),81 , "GP122_SPI_0_RXD" ),82 , "GP123_SPI_0_TXD" ),83 , "GP102_SPI_1_CLK" ),84 , "GP103_SPI_1_SS0" ),85 , "GP104_SPI_1_SS1" ),86 , "GP105_SPI_1_SS2" ),87 , "GP106_SPI_1_SS3" ),88 , "GP107_SPI_1_RXD" ),89 , "GP108_SPI_1_TXD" ),90 , "GP109_SPI_2_CLK" ),91 , "GP110_SPI_2_SS0" ),92 , "GP111_SPI_2_SS1" ),93 , "GP112_SPI_2_SS2" ),94 , "GP113_SPI_2_SS3" ),95 , "GP114_SPI_2_RXD" ),96 , "GP115_SPI_2_TXD" ),97 , "GP116_SPI_3_CLK" ),98 , "GP117_SPI_3_SS" ),99 , "GP118_SPI_3_RXD" ),100 , "GP119_SPI_3_TXD" ),/* Family 7: I2C (14 pins) */ 101 , "GP19_I2C_1_SCL" ),102 , "GP20_I2C_1_SDA" ),103 , "GP21_I2C_2_SCL" ),104 , "GP22_I2C_2_SDA" ),105 , "GP17_I2C_3_SCL_HDMI" ),106 , "GP18_I2C_3_SDA_HDMI" ),107 , "GP23_I2C_4_SCL" ),108 , "GP24_I2C_4_SDA" ),109 , "GP25_I2C_5_SCL" ),110 , "GP26_I2C_5_SDA" ),111 , "GP27_I2C_6_SCL" ),112 , "GP28_I2C_6_SDA" ),113 , "GP29_I2C_7_SCL" ),114 , "GP30_I2C_7_SDA" ),/* Family 8: UART (12 pins) */ 115 , "GP124_UART_0_CTS" ),116 , "GP125_UART_0_RTS" ),117 , "GP126_UART_0_RX" ),118 , "GP127_UART_0_TX" ),119 , "GP128_UART_1_CTS" ),120 , "GP129_UART_1_RTS" ),121 , "GP130_UART_1_RX" ),122 , "GP131_UART_1_TX" ),123 , "GP132_UART_2_CTS" ),124 , "GP133_UART_2_RTS" ),125 , "GP134_UART_2_RX" ),126 , "GP135_UART_2_TX" ),/* Family 9: GPIO South (19 pins) */ 127 , "GP177" ),128 , "GP178" ),129 , "GP179" ),130 , "GP180" ),131 , "GP181" ),132 , "GP182_PWM2" ),133 , "GP183_PWM3" ),134 , "GP184" ),135 , "GP185" ),136 , "GP186" ),137 , "GP187" ),138 , "GP188" ),139 , "GP189" ),140 , "GP64_FAST_INT0" ),141 , "GP65_FAST_INT1" ),142 , "GP66_FAST_INT2" ),143 , "GP67_FAST_INT3" ),144 , "GP12_PWM0" ),145 , "GP13_PWM1" ),/* Family 10: Camera Sideband (12 pins) */ 146 , "GP0" ),147 , "GP1" ),148 , "GP2" ),149 , "GP3" ),150 , "GP4" ),151 , "GP5" ),152 , "GP6" ),153 , "GP7" ),154 , "GP8" ),155 , "GP9" ),156 , "GP10" ),157 , "GP11" ),/* Family 11: Clock (22 pins) */ 158 , "GP137" ),159 , "GP138" ),160 , "GP139" ),161 , "GP140" ),162 , "GP141" ),163 , "GP142" ),164 , "GP16_HDMI_HPD" ),165 , "GP68_DSI_A_TE" ),166 , "GP69_DSI_C_TE" ),167 , "OSC_CLK_CTRL0" ),168 , "OSC_CLK_CTRL1" ),169 , "OSC_CLK0" ),170 , "OSC_CLK1" ),171 , "OSC_CLK2" ),172 , "OSC_CLK3" ),173 , "OSC_CLK4" ),174 , "RESETOUT" ),175 , "PMODE" ),176 , "PRDY" ),177 , "PREQ" ),178 , "GP190" ),179 , "GP191" ),/* Family 12: MSIC (15 pins) */ 180 , "I2C_0_SCL" ),181 , "I2C_0_SDA" ),182 , "IERR" ),183 , "JTAG_TCK" ),184 , "JTAG_TDI" ),185 , "JTAG_TDO" ),186 , "JTAG_TMS" ),187 , "JTAG_TRST" ),188 , "PROCHOT" ),189 , "RTC_CLK" ),190 , "SVID_ALERT" ),191 , "SVID_CLK" ),192 , "SVID_D" ),193 , "THERMTRIP" ),194 , "STANDBY" ),/* Family 13: Keyboard (20 pins) */ 195 , "GP44" ),196 , "GP45" ),197 , "GP46" ),198 , "GP47" ),199 , "GP48" ),200 , "GP49" ),201 , "GP50" ),202 , "GP51" ),203 , "GP52" ),204 , "GP53" ),205 , "GP54" ),206 , "GP55" ),207 , "GP56" ),208 , "GP57" ),209 , "GP58" ),210 , "GP59" ),211 , "GP60" ),212 , "GP61" ),213 , "GP62" ),214 , "GP63" ),/* Family 14: GPIO North (13 pins) */ 215 , "GP164" ),216 , "GP165" ),217 , "GP166" ),218 , "GP167" ),219 , "GP168_MJTAG_TCK" ),220 , "GP169_MJTAG_TDI" ),221 , "GP170_MJTAG_TDO" ),222 , "GP171_MJTAG_TMS" ),223 , "GP172_MJTAG_TRST" ),224 , "GP173" ),225 , "GP174" ),226 , "GP175" ),227 , "GP176" ),/* Family 15: PTI (5 pins) */ 228 , "GP72_PTI_CLK" ),229 , "GP73_PTI_D0" ),230 , "GP74_PTI_D1" ),231 , "GP75_PTI_D2" ),232 , "GP76_PTI_D3" ),/* Family 16: USB3 (0 pins) */ /* Family 17: HSIC (0 pins) */ /* Family 18: Broadcast (0 pins) */ static const unsigned int mrfld_sdio_pins[] = { 50 , 51 , 52 , 53 , 54 , 55 , 56 };static const unsigned int mrfld_i2s2_pins[] = { 75 , 76 , 77 , 78 };static const unsigned int mrfld_spi5_pins[] = { 90 , 91 , 92 , 93 , 94 , 95 , 96 };static const unsigned int mrfld_uart0_pins[] = { 115 , 116 , 117 , 118 };static const unsigned int mrfld_uart1_pins[] = { 119 , 120 , 121 , 122 };static const unsigned int mrfld_uart2_pins[] = { 123 , 124 , 125 , 126 };static const unsigned int mrfld_pwm0_pins[] = { 144 };static const unsigned int mrfld_pwm1_pins[] = { 145 };static const unsigned int mrfld_pwm2_pins[] = { 132 };static const unsigned int mrfld_pwm3_pins[] = { 133 };static const struct intel_pingroup mrfld_groups[] = {"sdio_grp" , mrfld_sdio_pins, 1 ),"i2s2_grp" , mrfld_i2s2_pins, 1 ),"spi5_grp" , mrfld_spi5_pins, 1 ),"uart0_grp" , mrfld_uart0_pins, 1 ),"uart1_grp" , mrfld_uart1_pins, 1 ),"uart2_grp" , mrfld_uart2_pins, 1 ),"pwm0_grp" , mrfld_pwm0_pins, 1 ),"pwm1_grp" , mrfld_pwm1_pins, 1 ),"pwm2_grp" , mrfld_pwm2_pins, 1 ),"pwm3_grp" , mrfld_pwm3_pins, 1 ),static const char * const mrfld_sdio_groups[] = { "sdio_grp" };static const char * const mrfld_i2s2_groups[] = { "i2s2_grp" };static const char * const mrfld_spi5_groups[] = { "spi5_grp" };static const char * const mrfld_uart0_groups[] = { "uart0_grp" };static const char * const mrfld_uart1_groups[] = { "uart1_grp" };static const char * const mrfld_uart2_groups[] = { "uart2_grp" };static const char * const mrfld_pwm0_groups[] = { "pwm0_grp" };static const char * const mrfld_pwm1_groups[] = { "pwm1_grp" };static const char * const mrfld_pwm2_groups[] = { "pwm2_grp" };static const char * const mrfld_pwm3_groups[] = { "pwm3_grp" };static const struct intel_function mrfld_functions[] = {"sdio" , mrfld_sdio_groups),"i2s2" , mrfld_i2s2_groups),"spi5" , mrfld_spi5_groups),"uart0" , mrfld_uart0_groups),"uart1" , mrfld_uart1_groups),"uart2" , mrfld_uart2_groups),"pwm0" , mrfld_pwm0_groups),"pwm1" , mrfld_pwm1_groups),"pwm2" , mrfld_pwm2_groups),"pwm3" , mrfld_pwm3_groups),static const struct tng_family mrfld_families[] = {1 , 0 , 12 ),2 , 13 , 36 ),3 , 37 , 56 ),4 , 57 , 64 ),5 , 65 , 78 ),6 , 79 , 100 ),7 , 101 , 114 ),8 , 115 , 126 ),9 , 127 , 145 ),10 , 146 , 157 ),11 , 158 , 179 ),12 , 180 , 194 ),13 , 195 , 214 ),14 , 215 , 227 ),15 , 228 , 232 ),static const struct tng_pinctrl mrfld_soc_data = {static const struct acpi_device_id mrfld_acpi_table[] = {"INTC1002" , (kernel_ulong_t)&mrfld_soc_data },static struct platform_driver mrfld_pinctrl_driver = {"pinctrl-merrifield" ,static int __init mrfld_pinctrl_init(void )return platform_driver_register(&mrfld_pinctrl_driver);static void __exit mrfld_pinctrl_exit(void )"Andy Shevchenko <andriy.shevchenko@linux.intel.com>" );"Intel Merrifield SoC pinctrl driver" );"GPL v2" );"platform:pinctrl-merrifield" );"PINCTRL_TANGIER" );
Messung V0.5 in Prozent C=97 H=97 G=96
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(vorverarbeitet am 2026-06-07)
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