// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause /* Copyright(c) 2024 Realtek Corporation #include "chan.h" #include "coex.h" #include "debug.h" #include "fw.h" #include "mac.h" #include "phy.h" #include "reg.h" #include "rtw8852bt.h" #include "rtw8852bt_rfk.h" #include "rtw8852bt_rfk_table.h" #include "rtw8852b_common.h" #define RTW8852BT_RXDCK_VER 0 x1#define RTW8852BT_IQK_VER 0 x2a#define RTW8852BT_SS 2 #define RTW8852BT_TSSI_PATH_NR 2 #define RTW8852BT_DPK_VER 0 x06#define DPK_RF_PATH_MAX_8852BT 2 #define _TSSI_DE_MASK GENMASK(21 , 12 )#define DPK_TXAGC_LOWER 0 x2e#define DPK_TXAGC_UPPER 0 x3f#define DPK_TXAGC_INVAL 0 xff#define RFREG_MASKRXBB 0 x003e0#define RFREG_MASKMODE 0 xf0000enum rf_mode {0 x0,0 x1,0 x2,0 x3,0 x4,0 x5,0 x6,0 x7,enum rtw8852bt_dpk_id {0 x06,0 x10,0 x11,0 x12,0 x13,0 x14,0 x15,0 x16,0 x17,0 x19,0 x28,0 x29,0 x2a,0 x2b,0 x2c,0 x2d,0 x2f,0 x30,0 x31enum dpk_agc_step {enum rtw8852bt_iqk_type {0 x0,0 x1,0 x2,0 x3,0 x4,0 x5,0 x6,0 x7,0 x8,0 x9,0 xa,0 xb,0 xc,0 x10,enum adc_ck {0 ,1 ,2 ,3 ,enum dac_ck {0 ,1 ,2 ,3 ,4 ,5 ,6 ,7 ,static const u32 _tssi_trigger[RTW8852BT_TSSI_PATH_NR] = {0 x5820, 0 x7820};static const u32 _tssi_cw_rpt_addr[RTW8852BT_TSSI_PATH_NR] = {0 x1c18, 0 x3c18};static const u32 _tssi_cw_default_addr[RTW8852BT_TSSI_PATH_NR][4 ] = {0 x5634, 0 x5630, 0 x5630, 0 x5630},0 x7634, 0 x7630, 0 x7630, 0 x7630} };static const u32 _tssi_cw_default_mask[4 ] = {0 x000003ff, 0 x3ff00000, 0 x000ffc00, 0 x000003ff};static const u32 _tssi_de_cck_long[RF_PATH_NUM_8852BT] = {0 x5858, 0 x7858};static const u32 _tssi_de_cck_short[RF_PATH_NUM_8852BT] = {0 x5860, 0 x7860};static const u32 _tssi_de_mcs_20m[RF_PATH_NUM_8852BT] = {0 x5838, 0 x7838};static const u32 _tssi_de_mcs_40m[RF_PATH_NUM_8852BT] = {0 x5840, 0 x7840};static const u32 _tssi_de_mcs_80m[RF_PATH_NUM_8852BT] = {0 x5848, 0 x7848};static const u32 _tssi_de_mcs_80m_80m[RF_PATH_NUM_8852BT] = {0 x5850, 0 x7850};static const u32 _tssi_de_mcs_5m[RF_PATH_NUM_8852BT] = {0 x5828, 0 x7828};static const u32 _tssi_de_mcs_10m[RF_PATH_NUM_8852BT] = {0 x5830, 0 x7830};static const u32 rtw8852bt_backup_bb_regs[] = {0 x2344, 0 x5800, 0 x7800, 0 x0704};static const u32 rtw8852bt_backup_rf_regs[] = {0 xde, 0 xdf, 0 x8b, 0 x90, 0 x97, 0 x85, 0 x5, 0 x10005};static const u32 rtw8852bt_backup_kip_regs[] = {0 x813c, 0 x8124, 0 x8120, 0 xc0d4, 0 xc0d8, 0 xc0c4, 0 xc0ec,0 x823c, 0 x8224, 0 x8220, 0 xc1d4, 0 xc1d8, 0 xc1c4, 0 xc1ec};#define BACKUP_BB_REGS_NR ARRAY_SIZE(rtw8852bt_backup_bb_regs)#define BACKUP_RF_REGS_NR ARRAY_SIZE(rtw8852bt_backup_rf_regs)#define BACKUP_KIP_REGS_NR ARRAY_SIZE(rtw8852bt_backup_kip_regs)static void _rfk_get_thermal(struct rtw89_dev *rtwdev, u8 kidx, enum rtw89_rf_path path)struct rtw89_dpk_info *dpk = &rtwdev->dpk;0 x1);0 x0);0 x1);200 );"[DPK] thermal@DPK = 0x%x\n" ,static void _rfk_backup_bb_reg(struct rtw89_dev *rtwdev, u32 backup_bb_reg_val[])for (i = 0 ; i < BACKUP_BB_REGS_NR; i++) {"[RFK]backup bb reg : %x, value =%x\n" ,static void _rfk_backup_kip_reg(struct rtw89_dev *rtwdev, u32 backup_kip_reg_val[])for (i = 0 ; i < BACKUP_KIP_REGS_NR; i++) {"[DPK] Backup 0x%x = %x\n" ,static void _rfk_backup_rf_reg(struct rtw89_dev *rtwdev, u32 backup_rf_reg_val[], u8 rf_path)for (i = 0 ; i < BACKUP_RF_REGS_NR; i++) {"[DPK] Backup RF S%d 0x%x = %x\n" ,static void _rfk_reload_bb_reg(struct rtw89_dev *rtwdev, const u32 backup_bb_reg_val[])for (i = 0 ; i < BACKUP_BB_REGS_NR; i++) {"[RFK]restore bb reg : %x, value =%x\n" ,static void _rfk_reload_kip_reg(struct rtw89_dev *rtwdev, u32 backup_kip_reg_val[])for (i = 0 ; i < BACKUP_KIP_REGS_NR; i++) {"[RFK]restore kip reg : %x, value =%x\n" ,static void _rfk_reload_rf_reg(struct rtw89_dev *rtwdev,const u32 backup_rf_reg_val[], u8 rf_path)for (i = 0 ; i < BACKUP_RF_REGS_NR; i++) {"[RFK]restore rf S%d reg: %x, value =%x\n" , rf_path,static u8 _kpath(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx)"[RFK]dbcc_en: %x,PHY%d\n" ,if (!rtwdev->dbcc_en) {else {if (phy_idx == RTW89_PHY_0)else return val;static void _txck_force(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, bool force,enum dac_ck ck)13 ), B_P0_TXCK_ON, 0 x0);if (!force)return ;13 ), B_P0_TXCK_VAL, ck);13 ), B_P0_TXCK_ON, 0 x1);static void _rxck_force(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, bool force,enum adc_ck ck)0 ;13 ), B_P0_RXCK_ON, 0 x0);if (!force)return ;13 ), B_P0_RXCK_VAL, ck);13 ), B_P0_RXCK_ON, 0 x1);switch (ck) {case ADC_480M:break ;case ADC_960M:break ;case ADC_1920M:break ;default :"%s==>Invalid ck" , __func__);break ;static void _rfk_bb_afe_setting(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy,enum rtw89_rf_path path, u8 kpath)0 x0303);0 x1);0 x1);0 x3);0 x3);0 x1ffffff);0 x1);0 x1);0 x3ff);0 x3);0 x1);0 x1);0 x1);0 x1);0 x1);0 x1);true , DAC_960M);true , DAC_960M);true , ADC_1920M);true , ADC_1920M);0 x5);0 x1);0 x1);0 x1f);1 );0 x13);0 x0001);1 );0 x0041);0 x1);0 x3333);0 x1);0 x0000);0 x1);0 x0000);static void _rfk_bb_afe_restore(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy,enum rtw89_rf_path path, u8 kpath)0 x0303);0 x0);0 x0);0 x0);0 x0);0 x0);0 x0);0 x0);0 x63);0 x00);0 x00);0 x0);0 x0000);0 x0);0 x0);0 x0);0 x0);0 x1);0 x2);0 x0);0 x1);0 x2);static void _set_rx_dck(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy,enum rtw89_rf_path path)0 x0);0 x0);0 x1);1 );static void _rx_dck(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy)"[RX_DCK] ****** RXDCK Start (Ver: 0x%x, CV : 0x%x) ******\n" ,for (path = 0 ; path < RF_PATH_NUM_8852BT; path++) {if (rtwdev->is_tssi_mode[path])13 ),0 x1);0 x0);0 x0);if (rtwdev->is_tssi_mode[path])13 ),0 x0);static void _rck(struct rtw89_dev *rtwdev, enum rtw89_rf_path path)int ret;"[RCK] ====== S%d RCK ======\n" , path);0 x0);"[RCK] RF0x00 = 0x%05x\n" ,/* RCK trigger */ 0 x00240);2 , 30 ,false , rtwdev, path, RR_RCKS, BIT(3 ));"[RCK] rck_val = 0x%x, ret = %d\n" ,"[RCK] RF 0x1b = 0x%x\n" ,static void _drck(struct rtw89_dev *rtwdev)int ret;"[DACK]Ddie RCK start!!!\n" );0 x1);1 , 10000 , false ,if (ret)"[DACK]DRCK timeout\n" );0 x0);0 x1);1 );0 x0);0 x7c00);0 x0);"[DACK]0xc0c4 = 0x%x\n" ,static void _dack_backup_s0(struct rtw89_dev *rtwdev)struct rtw89_dack_info *dack = &rtwdev->dack;0 x1);for (i = 0 ; i < 0 x10; i++) {0 ][0 ][i] =0 ][1 ][i] =0 ][0 ] =0 ][1 ] =0 ][0 ] =0 ][1 ] =static void _dack_backup_s1(struct rtw89_dev *rtwdev)struct rtw89_dack_info *dack = &rtwdev->dack;0 x1);for (i = 0 ; i < 0 x10; i++) {1 ][0 ][i] =1 ][1 ][i] =1 ][0 ] =1 ][1 ] =1 ][0 ] =1 ][1 ] =static void _dack_reset(struct rtw89_dev *rtwdev, enum rtw89_rf_path path)if (path == RF_PATH_A) {0 x0);0 x1);else {0 x0);0 x1);static void _dack_reload_by_path(struct rtw89_dev *rtwdev, u8 path, u8 index)struct rtw89_dack_info *dack = &rtwdev->dack;if (index == 0 )0 ;else 0 x14;if (path == RF_PATH_A)0 ;else 0 x28;0 x1);0 x1);0 x1);0 x1);/* msbk_d: 15/14/13/12 */ 0 x0;for (i = 0 ; i < 4 ; i++)12 ] << (i * 8 );0 xc200 + tmp_offset;"[DACK]0x%x=0x%x\n" , tmp_reg,/* msbk_d: 11/10/9/8 */ 0 x0;for (i = 0 ; i < 4 ; i++)8 ] << (i * 8 );0 xc204 + tmp_offset;"[DACK]0x%x=0x%x\n" , tmp_reg,/* msbk_d: 7/6/5/4 */ 0 x0;for (i = 0 ; i < 4 ; i++)4 ] << (i * 8 );0 xc208 + tmp_offset;"[DACK]0x%x=0x%x\n" , tmp_reg,/* msbk_d: 3/2/1/0 */ 0 x0;for (i = 0 ; i < 4 ; i++)8 );0 xc20c + tmp_offset;"[DACK]0x%x=0x%x\n" , tmp_reg,/* dadak_d/biask_d */ 22 ) |14 );0 xc210 + tmp_offset;"[DACK]0x%x=0x%x\n" , tmp_reg,/* enable DACK result from reg */ 0 x1);static void _dack_reload(struct rtw89_dev *rtwdev, enum rtw89_rf_path path)for (i = 0 ; i < 2 ; i++)static bool _dack_s0_poll(struct rtw89_dev *rtwdev)if (rtw89_phy_read32_mask(rtwdev, R_DACK_S0P0, B_DACK_S0P0_OK) == 0 ||0 ||0 ||0 )return false ;return true ;static void _dack_s0(struct rtw89_dev *rtwdev)struct rtw89_dack_info *dack = &rtwdev->dack;bool done;int ret;true , DAC_160M);0 x1);28 ), 0 x1);0 x0);100 );0 x30);0 x30);0 x1);1 );0 ] = false ;1 , 20000 , false , rtwdev);if (ret) {"[DACK]S0 DACK timeout\n" );0 ] = true ;0 x0);false , DAC_960M);0 x0);static bool _dack_s1_poll(struct rtw89_dev *rtwdev)if (rtw89_phy_read32_mask(rtwdev, R_DACK_S1P0, B_DACK_S1P0_OK) == 0 ||0 ||0 ||0 )return false ;return true ;static void _dack_s1(struct rtw89_dev *rtwdev)struct rtw89_dack_info *dack = &rtwdev->dack;bool done;int ret;true , DAC_160M);0 x1);28 ), 0 x1);0 x0);100 );0 x30);0 x30);0 x1);1 );1 ] = false ;1 , 10000 , false , rtwdev);if (ret) {"[DACK]S1 DACK timeout\n" );1 ] = true ;0 x0);false , DAC_960M);0 x0);static void _dack(struct rtw89_dev *rtwdev)static void _dack_dump(struct rtw89_dev *rtwdev)struct rtw89_dack_info *dack = &rtwdev->dack;"[DACK]S0 ADC_DCK ic = 0x%x, qc = 0x%x\n" ,0 ][0 ], dack->addck_d[0 ][1 ]);"[DACK]S1 ADC_DCK ic = 0x%x, qc = 0x%x\n" ,1 ][0 ], dack->addck_d[1 ][1 ]);"[DACK]S0 DAC_DCK ic = 0x%x, qc = 0x%x\n" ,0 ][0 ], dack->dadck_d[0 ][1 ]);"[DACK]S1 DAC_DCK ic = 0x%x, qc = 0x%x\n" ,1 ][0 ], dack->dadck_d[1 ][1 ]);"[DACK]S0 biask ic = 0x%x, qc = 0x%x\n" ,0 ][0 ], dack->biask_d[0 ][1 ]);"[DACK]S1 biask ic = 0x%x, qc = 0x%x\n" ,1 ][0 ], dack->biask_d[1 ][1 ]);"[DACK]S0 MSBK ic:\n" );for (i = 0 ; i < 0 x10; i++) {0 ][0 ][i];"[DACK]0x%x\n" , t);"[DACK]S0 MSBK qc:\n" );for (i = 0 ; i < RTW89_DACK_MSBK_NR; i++) {0 ][1 ][i];"[DACK]0x%x\n" , t);"[DACK]S1 MSBK ic:\n" );for (i = 0 ; i < RTW89_DACK_MSBK_NR; i++) {1 ][0 ][i];"[DACK]0x%x\n" , t);"[DACK]S1 MSBK qc:\n" );for (i = 0 ; i < RTW89_DACK_MSBK_NR; i++) {1 ][1 ][i];"[DACK]0x%x\n" , t);static void _addck_ori(struct rtw89_dev *rtwdev)struct rtw89_dack_info *dack = &rtwdev->dack;int ret;0 x0);0 x0);0 x1);0 x0);0 x0);0 x1);0 xf);100 );0 x0);4 ), 0 x1);0 x3);0 x1);0 x0);1 );0 x1);0 ] = false ;1 , 10000 , false ,0 ));if (ret) {"[DACK]S0 ADDCK timeout\n" );0 ] = true ;4 ), 0 x0);0 x1);0 xc);0 x1);0 x0);0 ][0 ] =0 ][1 ] =0 x0);0 x1);0 x0);0 x0);0 x1);0 xf);100 );0 x0);4 ), 0 x1);0 x3);0 x1);0 x0);1 );0 x1);1 ] = false ;1 , 10000 , false ,0 ));if (ret) {"[DACK]S1 ADDCK timeout\n" );1 ] = true ;4 ), 0 x0);0 x1);0 xc);0 x1);0 x0);1 ][0 ] =1 ][1 ] =0 x0);static void _addck_reload(struct rtw89_dev *rtwdev)struct rtw89_dack_info *dack = &rtwdev->dack;0 ][0 ]);0 ][1 ]);0 x3);1 ][0 ]);1 ][1 ]);0 x3);static void _dack_manual_off(struct rtw89_dev *rtwdev)0 x0);0 x0);0 x0);0 x0);0 x0);0 x0);static void _dac_cal(struct rtw89_dev *rtwdev, bool force)struct rtw89_dack_info *dack = &rtwdev->dack;false ;"[DACK]DACK start!!!\n" );0 x0);0 x0);0 x337e1);0 x337e1);true , ADC_960M);true , ADC_960M);false , ADC_960M);false , ADC_960M);0 x0);0 x0);true ;0 x1);0 x1);"[DACK]DACK finish!!!\n" );static bool _iqk_check_cal(struct rtw89_dev *rtwdev, u8 path, u8 ktype)bool notready = false ;int ret;0 x55,10 , 8200 , false ,if (ret)"[IQK]NCTL1 IQK timeout!!!\n" );10 );0 x8000,10 , 400 , false ,if (ret) {true ;"[IQK]NCTL2 IQK timeout!!!\n" );10 );0 x0);return notready;static bool _iqk_one_shot(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx,struct rtw89_iqk_info *iqk_info = &rtwdev->iqk;bool fail;switch (ktype) {case ID_TXAGC:0 x008 | (1 << (4 + path)) | (path << 1 );break ;case ID_FLOK_COARSE:0 x108 | (1 << (4 + path));break ;case ID_FLOK_FINE:0 x208 | (1 << (4 + path));break ;case ID_FLOK_VBUFFER:0 x308 | (1 << (4 + path));break ;case ID_TXK:0 x008 | (1 << (path + 4 )) |0 x8 + iqk_info->iqk_bw[path]) & 0 xf) << 8 );break ;case ID_RXAGC:0 x508 | (1 << (4 + path)) | (path << 1 );break ;case ID_RXK:0 x008 | (1 << (path + 4 )) |0 xb + iqk_info->iqk_bw[path]) & 0 xf) << 8 );break ;case ID_NBTXK:0 x408 | (1 << (4 + path));break ;case ID_NBRXK:0 x608 | (1 << (4 + path));break ;default :return false ;"[IQK]===>%s, iqk_cmd = %x\n" ,1 );1 );return fail;static void _iqk_txk_setting(struct rtw89_dev *rtwdev, u8 path)struct rtw89_iqk_info *iqk_info = &rtwdev->iqk;switch (iqk_info->iqk_band[path]) {case RTW89_BAND_2G:0 x0);0 x0);0 x1);0 x0);0 x1);0 x00);0 x403e);0 x0);0 x5);1 );break ;case RTW89_BAND_5G:0 x1);0 x0);0 x1);0 x80);0 x403e);0 x0);0 x4);1 );break ;default :break ;static bool _iqk_2g_lok(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx, u8 path)"[IQK]===>%s\n" , __func__);0 x0);0 x1);8 ), B_KIP_IQP_IQSW, 0 x09);0 x021);0 x00000119 + (path << 4 ));0 x00);0 x0);0 x12);0 x1);8 ), B_KIP_IQP_IQSW, 0 x24);0 x00000319 + (path << 4 ));0 x00);0 x0);0 x0);0 x1);8 ), B_KIP_IQP_IQSW, 0 x09);0 x00000219 + (path << 4 ));0 x00);0 x0);0 x12);0 x1);8 ), B_KIP_IQP_IQSW, 0 x24);0 x00000319 + (path << 4 ));0 x00);0 x0);return false ;static bool _iqk_5g_lok(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx, u8 path)"[IQK]===>%s\n" , __func__);0 x0);0 x1);8 ), B_KIP_IQP_IQSW, 0 x09);0 x021);0 x00000119 + (path << 4 ));0 x00);0 x0);0 x12);0 x1);8 ), B_KIP_IQP_IQSW, 0 x24);0 x00000319 + (path << 4 ));0 x00);0 x0);0 x0);0 x1);8 ), B_KIP_IQP_IQSW, 0 x09);0 x00000219 + (path << 4 ));0 x00);0 x0);0 x12);0 x1);8 ), B_KIP_IQP_IQSW, 0 x24);0 x00000319 + (path << 4 ));0 x00);0 x0);return false ;static bool _iqk_2g_tx(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx, u8 path)static const u32 g_power_range[4 ] = {0 x0, 0 x0, 0 x0, 0 x0};static const u32 g_track_range[4 ] = {0 x4, 0 x4, 0 x6, 0 x6};static const u32 g_gain_bb[4 ] = {0 x08, 0 x0e, 0 x08, 0 x0e};static const u32 g_itqt[4 ] = {0 x09, 0 x12, 0 x1b, 0 x24};struct rtw89_iqk_info *iqk_info = &rtwdev->iqk;bool notready = false ;bool kfail = false ;"[IQK]===>%s\n" , __func__);for (gp = 0 x0; gp < 0 x4; gp++) {8 ),0 x00000100, 0 x1);8 ),0 x00000010, 0 x1);8 ),0 x00000004, 0 x0);8 ),0 x00000003, gp);0 x009);8 ),8 ), MASKDWORD);if (iqk_info->is_nbiqk)break ;8 ),0 x00);"[IQK]S%x, gp = 0x%x, 0x8%x38 = 0x%x\n" ,1 << path, iqk_info->nb_txcfir[path]);if (!notready)if (kfail) {0 x40000002;8 ),0 x0);return kfail;static bool _iqk_5g_tx(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx, u8 path)static const u32 a_power_range[4 ] = {0 x0, 0 x0, 0 x0, 0 x0};static const u32 a_track_range[4 ] = {0 x3, 0 x3, 0 x6, 0 x6};static const u32 a_gain_bb[4 ] = {0 x08, 0 x10, 0 x08, 0 x0e};static const u32 a_itqt[4 ] = {0 x09, 0 x12, 0 x1b, 0 x24};struct rtw89_iqk_info *iqk_info = &rtwdev->iqk;bool notready = false ;bool kfail = false ;for (gp = 0 x0; gp < 0 x4; gp++) {8 ),8 ),0 x00000100, 0 x1);8 ),0 x00000010, 0 x1);8 ),0 x00000004, 0 x0);8 ),0 x00000003, gp);0 x009);8 ),8 ), MASKDWORD);if (iqk_info->is_nbiqk)break ;8 ),0 x00);"[IQK]S%x, gp = 0x%x, 0x8%x38 = 0x%x\n" ,1 << path, iqk_info->nb_txcfir[path]);if (!notready)if (kfail) {0 x40000002;8 ),0 x0);return kfail;static void _iqk_adc_fifo_rst(struct rtw89_dev *rtwdev,enum rtw89_phy_idx phy_idx, u8 path)0 x0303);10 );0 x3333);static void _iqk_rxclk_setting(struct rtw89_dev *rtwdev, u8 path)struct rtw89_iqk_info *iqk_info = &rtwdev->iqk;"[IQK]===>%s\n" , __func__);0 x0303);if (iqk_info->iqk_bw[path] == RTW89_CHANNEL_WIDTH_80) {true , ADC_960M);true , ADC_960M);1 );0 x1);0 x1);0 x2);0 x2);0 x8);0 x8);else {true , ADC_480M);true , ADC_480M);1 );0 x1);0 x0);0 x3);0 x3);0 xf);0 xf);0 x00000780, 0 x8);0 x00000780, 0 x8);0 x00007800, 0 x2);0 x00007800, 0 x2);0 x0);0 x1);0 x1);1 );0 x0f);1 );0 x03);0 xa001);1 );0 xa041);0 x3333);static bool _iqk_2g_rx(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx, u8 path)static const u32 g_idxrxgain[2 ] = {0 x212, 0 x310};static const u32 g_idxattc2[2 ] = {0 x00, 0 x20};static const u32 g_idxattc1[2 ] = {0 x3, 0 x2};static const u32 g_idxrxagc[2 ] = {0 x0, 0 x2};static const u32 g_idx[2 ] = {0 x0, 0 x2};struct rtw89_iqk_info *iqk_info = &rtwdev->iqk;bool notready = false ;bool kfail = false ;"[IQK]===>%s\n" , __func__);0 xc);0 x1);for (gp = 0 x0; gp < 0 x2; gp++) {8 ),0 x00000100, 0 x1);8 ),0 x00000010, 0 x0);8 ),0 x00000007, g_idx[gp]);0 x80013);100 );100 );0 x1);0 x11);0 x0);"[IQK]S%x, rf rxbb = %x\n" , path,0 x003c0));0 x80013);100 );100 );0 x1);0 x011);8 ),0 x2;"[IQK]S%x, gp = 0x%x, 0x8%x3c = 0x%x\n" , path,1 << path, iqk_info->nb_rxcfir[path]);0 x00);0 x0);if (iqk_info->is_nbiqk)break ;0 x1);0 x00);0 x0);if (!notready)if (kfail) {0 x40000002;8 ),0 x0);0 x0);return kfail;static bool _iqk_5g_rx(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx, u8 path)static const u32 a_idxrxgain[2 ] = {0 x110, 0 x290};static const u32 a_idxattc2[2 ] = {0 x0f, 0 x0f};static const u32 a_idxattc1[2 ] = {0 x2, 0 x2};static const u32 a_idxrxagc[2 ] = {0 x4, 0 x6};static const u32 a_idx[2 ] = {0 x0, 0 x2};struct rtw89_iqk_info *iqk_info = &rtwdev->iqk;bool notready = false ;bool kfail = false ;"[IQK]===>%s\n" , __func__);0 xc);0 x1);for (gp = 0 x0; gp < 0 x2; gp++) {8 ),0 x00000100, 0 x1);8 ),0 x00000010, 0 x0);8 ),0 x00000007, a_idx[gp]);0 x80013);100 );100 );0 x1);0 x11);0 x0);"[IQK]S%x, rf rxbb = %x\n" , path,0 x003c0));0 x80013);200 );0 x1);0 x011);8 ),0 x2;"[IQK]S%x, gp = 0x%x, 0x8%x3c = 0x%x\n" ,1 << path, iqk_info->nb_rxcfir[path]);0 x00);0 x0);if (iqk_info->is_nbiqk)break ;0 x1);0 x00);0 x0);if (!notready)if (kfail) {0 x40000002;8 ),0 x0);0 x0);return kfail;static void _iqk_by_path(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx, u8 path)struct rtw89_iqk_info *iqk_info = &rtwdev->iqk;bool lok_result = false ;bool txk_result = false ;bool rxk_result = false ;for (i = 0 ; i < 3 ; i++) {if (iqk_info->iqk_band[path] == RTW89_BAND_2G)else if (!lok_result)break ;if (lok_result) {"[IQK]!!!!!!!!!!LOK by Pass !!!!!!!!!!!\n" );0 x80200);0 x80200);0 x80200);"[IQK]RF_0x08[00:19] = 0x%x\n" ,"[IQK]RF_0x09[00:19] = 0x%x\n" ,"[IQK]RF_0x0a[00:19] = 0x%x\n" ,if (iqk_info->iqk_band[path] == RTW89_BAND_2G)else if (iqk_info->iqk_band[path] == RTW89_BAND_2G)else "[IQK]result : lok_= %x, txk_= %x, rxk_= %x\n" ,static void _iqk_get_ch_info(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, u8 path,enum rtw89_chanctx_idx chanctx_idx)const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, chanctx_idx);struct rtw89_rfk_mcc_info_data *rfk_mcc = rtwdev->rfk_mcc.data;struct rtw89_iqk_info *iqk_info = &rtwdev->iqk;"[IQK]S%x, 0x18= 0x%x, idx = %x\n" ,"[IQK]S%x, 0x18= 0x%x\n" ,"[IQK]S%x, 0x35c= 0x%x\n" ,"[IQK]times = 0x%x, ch =%x\n" ,"[IQK]iqk_mcc_ch[%x][%x] = 0x%x\n" ,static void _iqk_start_iqk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx, u8 path)static void _iqk_restore(struct rtw89_dev *rtwdev, u8 path)struct rtw89_iqk_info *iqk_info = &rtwdev->iqk;"===> %s\n" , __func__);if (iqk_info->is_nbiqk) {8 ),8 ),else {8 ),0 x40000000);8 ),0 x40000000);0 x00000e19 + (path << 4 ));0 x0);0 x00);0 x00000000);0 x80000000);0 x0);0 x0);8 ), BIT(28 ), 0 x0);0 x0);0 x0);0 x3);0 x1);0 x1);static void _iqk_afebb_restore(struct rtw89_dev *rtwdev,enum rtw89_phy_idx phy_idx, u8 path)"===> %s\n" , __func__);0 x0303);0 x0);0 x0);0 x0);0 x0);0 x0000000);0 x0);0 x0);0 x0000001f, 0 x03);0 x000003e0, 0 x03);0 x00);0 x00);0 x0);0 x0);0 x0);0 x0000);0 x0);0 x0);static void _iqk_preset(struct rtw89_dev *rtwdev, u8 path)struct rtw89_rfk_mcc_info_data *rfk_mcc = rtwdev->rfk_mcc.data;8 ), 0 x00000001, idx);8 ), 0 x00000008, idx);8 ), MASKDWORD, 0 x40000000);8 ), MASKDWORD, 0 x40000000);0 x0);0 x0);0 x00000080);0 x81ff010a);static void _iqk_macbb_setting(struct rtw89_dev *rtwdev,enum rtw89_phy_idx phy_idx, u8 path)0 x0303);0 x3);0 x3);0 x1);0 x1);0 x3);0 x3);0 x1ffffff);0 x1);0 x1);0 x3ff);0 x3);0 x1);0 x1);0 x1);0 x1);0 x1);0 x1);true , DAC_960M);true , DAC_960M);true , ADC_1920M);true , ADC_1920M);0 x1);0 x2);0 x1);0 x1);10 );0 x1f);10 );0 x13);0 x0001);10 );0 x0041);0 x1);0 x3333);static void _iqk_init(struct rtw89_dev *rtwdev)struct rtw89_iqk_info *iqk_info = &rtwdev->iqk;0 x0);if (iqk_info->is_iqk_init)return ;"[IQK]===>%s\n" , __func__);true ;false ;false ;false ;false ;false ;0 x0;for (idx = 0 ; idx < RTW89_IQK_CHS_NR; idx++) {0 x0;for (path = 0 ; path < RTW8852BT_SS; path++) {false ;false ;false ;false ;0 x0;0 x0;static void _wait_rx_mode(struct rtw89_dev *rtwdev, u8 kpath)int ret;for (path = 0 ; path < RF_PATH_MAX; path++) {if (!(kpath & BIT(path)))continue ;2 , 2 , 5000 , false ,"[RFK] Wait S%d to Rx mode!! (ret = %d)\n" , path, ret);static void _tmac_tx_pause(struct rtw89_dev *rtwdev, enum rtw89_phy_idx band_idx,bool is_pause)if (!is_pause)return ;static void _doiqk(struct rtw89_dev *rtwdev, bool force,enum rtw89_phy_idx phy_idx, u8 path,enum rtw89_chanctx_idx chanctx_idx)struct rtw89_iqk_info *iqk_info = &rtwdev->iqk;"[IQK]==========IQK start!!!!!==========\n" );"[IQK]Test Ver 0x%x\n" , iqk_info->version);static void _iqk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx, bool force,enum rtw89_chanctx_idx chanctx_idx)switch (kpath) {case RF_A:break ;case RF_B:break ;case RF_AB:break ;default :break ;static void _dpk_onoff(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, bool off)struct rtw89_dpk_info *dpk = &rtwdev->dpk;bool off_reverse;if (off)false ;else true ;8 ) + (kidx << 2 ),24 ), val);"[DPK] S%d[%d] DPK %s !!!\n" , path,static void _dpk_one_shot(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy,enum rtw89_rf_path path, enum rtw8852bt_dpk_id id)int ret;8 ) | (0 x19 + (path << 4 ));0 x55,1 , 30000 , false ,if (ret)"[DPK] one-shot 1 over 30ms!!!!\n" );1 );0 x00030000);0 x8000,1 , 2000 , false ,if (ret)"[DPK] one-shot 2 over 2ms!!!!\n" );0 x0);"[DPK] one-shot for %s = 0x%04x\n" ,0 x06 ? "LBK_RXIQK" :0 x10 ? "SYNC" :0 x11 ? "MDPK_IDL" :0 x12 ? "MDPK_MPA" :0 x13 ? "GAIN_LOSS" :0 x14 ? "PWR_CAL" :0 x15 ? "DPK_RXAGC" :0 x16 ? "KIP_PRESET" :0 x17 ? "KIP_RESTORE" :"DPK_TXAGC" , dpk_cmd);static void _dpk_rx_dck(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy,enum rtw89_rf_path path)0 x0);0 x1);600 );"[DPK] S%d RXDCK\n" , path);static void _dpk_information(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy,enum rtw89_rf_path path, enum rtw89_chanctx_idx chanctx_idx)const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, chanctx_idx);struct rtw89_dpk_info *dpk = &rtwdev->dpk;"[DPK] S%d[%d] (PHY%d): TSSI %s/ DBCC %s/ %s/ CH%d/ %s\n" ,"on" : "off" ,"on" : "off" ,0 ? "2G" :1 ? "5G" : "6G" ,0 ? "20M" :1 ? "40M" : "80M" );static void _dpk_tssi_pause(struct rtw89_dev *rtwdev,enum rtw89_rf_path path, bool is_pause)13 ),"[DPK] S%d TSSI %s\n" , path,"pause" : "resume" );static void _dpk_kip_restore(struct rtw89_dev *rtwdev,enum rtw89_rf_path path)0 x00000000);0 x80000000);if (rtwdev->hal.cv > CHIP_CAV)8 ),0 x1);"[DPK] S%d restore KIP\n" , path);static void _dpk_lbk_rxiqk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy,enum rtw89_rf_path path, u8 cur_rxbb, u32 rf_18)0 x1);8 ), B_IQK_RES_RXCFIR, 0 x0);0 xd);0 x1);if (cur_rxbb >= 0 x11)0 x13);else if (cur_rxbb <= 0 xa)0 x00);else 0 x05);0 x0);0 x0);0 x80014);100 );0 x1);0 x025);0 x0);0 x0);0 x0);0 x0);8 ), B_LOAD_COEF_DI, 0 x1);0 x5);static void _dpk_rf_setting(struct rtw89_dev *rtwdev, u8 gain,enum rtw89_rf_path path, u8 kidx)struct rtw89_dpk_info *dpk = &rtwdev->dpk;if (dpk->bp[path][kidx].band == RTW89_BAND_2G) {0 x50220);0 xf2);0 x1);0 x1);else {0 x50220);0 x5);0 x1);0 x1);0 x920FC);0 x002C0);0 x38800);0 x1);1 );0 x0);static void _dpk_bypass_rxcfir(struct rtw89_dev *rtwdev,enum rtw89_rf_path path, bool is_bypass)if (is_bypass) {8 ),0 x1);8 ),0 x1);else {8 ),0 x0);8 ),0 x0);static void _dpk_tpg_sel(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, u8 kidx)struct rtw89_dpk_info *dpk = &rtwdev->dpk;if (dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_80)0 x0);else if (dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_40)0 x2);else 0 x1);"[DPK] TPG_Select for %s\n" ,"80M" :"40M" : "20M" );static void _dpk_table_select(struct rtw89_dev *rtwdev,enum rtw89_rf_path path, u8 kidx, u8 gain)0 x80 + kidx * 0 x20 + gain * 0 x10;8 ), MASKBYTE3, val);"[DPK] table select for Kidx[%d], Gain[%d] (0x%x)\n" , kidx,static bool _dpk_sync_check(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, u8 kidx)#define DPK_SYNC_TH_DC_I 200 #define DPK_SYNC_TH_DC_Q 200 #define DPK_SYNC_TH_CORR 170 struct rtw89_dpk_info *dpk = &rtwdev->dpk;0 x0);"[DPK] S%d Corr_idx / Corr_val = %d / %d\n" ,0 x9);11 ));11 ));"[DPK] S%d DC I/Q, = %d / %d\n" ,if (dc_i > DPK_SYNC_TH_DC_I || dc_q > DPK_SYNC_TH_DC_Q ||return true ;else return false ;static void _dpk_sync(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy,enum rtw89_rf_path path, u8 kidx)static u16 _dpk_dgain_read(struct rtw89_dev *rtwdev)0 x0);"[DPK] DGain = 0x%x\n" , dgain);return dgain;static s8 _dpk_dgain_mapping(struct rtw89_dev *rtwdev, u16 dgain)static const u16 bnd[15 ] = {0 xbf1, 0 xaa5, 0 x97d, 0 x875, 0 x789, 0 x6b7, 0 x5fc, 0 x556,0 x4c1, 0 x43d, 0 x3c7, 0 x35e, 0 x2ac, 0 x262, 0 x220if (dgain >= bnd[0 ])0 x6;else if (bnd[0 ] > dgain && dgain >= bnd[1 ])0 x6;else if (bnd[1 ] > dgain && dgain >= bnd[2 ])0 x5;else if (bnd[2 ] > dgain && dgain >= bnd[3 ])0 x4;else if (bnd[3 ] > dgain && dgain >= bnd[4 ])0 x3;else if (bnd[4 ] > dgain && dgain >= bnd[5 ])0 x2;else if (bnd[5 ] > dgain && dgain >= bnd[6 ])0 x1;else if (bnd[6 ] > dgain && dgain >= bnd[7 ])0 x0;else if (bnd[7 ] > dgain && dgain >= bnd[8 ])0 xff;else if (bnd[8 ] > dgain && dgain >= bnd[9 ])0 xfe;else if (bnd[9 ] > dgain && dgain >= bnd[10 ])0 xfd;else if (bnd[10 ] > dgain && dgain >= bnd[11 ])0 xfc;else if (bnd[11 ] > dgain && dgain >= bnd[12 ])0 xfb;else if (bnd[12 ] > dgain && dgain >= bnd[13 ])0 xfa;else if (bnd[13 ] > dgain && dgain >= bnd[14 ])0 xf9;else if (bnd[14 ] > dgain)0 xf8;else 0 x0;"[DPK] DGain offset = %d\n" , offset);return offset;static u8 _dpk_gainloss_read(struct rtw89_dev *rtwdev)0 x6);0 x1);return rtw89_phy_read32_mask(rtwdev, R_RPT_COM, B_PRT_COM_GL);static void _dpk_gainloss(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy,enum rtw89_rf_path path, u8 kidx)0 x6);0 x1);static void _dpk_kip_preset(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy,enum rtw89_rf_path path, u8 kidx)static void _dpk_kip_pwr_clk_on(struct rtw89_dev *rtwdev,enum rtw89_rf_path path)0 x00000080);0 x807f030a);8 ), MASKDWORD, 0 xce000a08);"[DPK] KIP Power/CLK on\n" );static struct rtw89_dev *rtwdev, enum rtw89_rf_path path, u8 txagc)struct rtw89_dpk_info *dpk = &rtwdev->dpk;if (txagc >= dpk->max_dpk_txagc[path])"[DPK] Set TxAGC = 0x%x\n" , txagc);return txagc;static void _dpk_kip_set_txagc(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy,enum rtw89_rf_path path, u8 txagc)0 x1);0 x0);"[DPK] set TXAGC = 0x%x\n" , txagc);static void _dpk_kip_set_rxagc(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy,enum rtw89_rf_path path)0 x50220);0 x1);0 x0);static u8 _dpk_set_offset(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy,enum rtw89_rf_path path, u8 txagc, s8 gain_offset)if ((txagc - gain_offset) < DPK_TXAGC_LOWER)else if ((txagc - gain_offset) > DPK_TXAGC_UPPER)else "[DPK] tmp_txagc (GL=%d) = 0x%x\n" ,return txagc;static bool _dpk_pas_read(struct rtw89_dev *rtwdev, enum rtw89_rf_path path,0 , val1_q = 0 , val2_i = 0 , val2_q = 0 ;0 x06);0 x0);0 x08);if (is_check) {0 x00);11 ));11 ));0 x1f);11 ));11 ));"[DPK] PAS_delta = 0x%x\n" ,else {for (i = 0 ; i < 32 ; i++) {"[DPK] PAS_Read[%02d]= 0x%08x\n" , i,if (val1_i * val1_i + val1_q * val1_q >=8 / 5 )return true ;return false ;static u8 _dpk_agc(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy,enum rtw89_rf_path path, u8 kidx, u8 init_txagc,bool loss_only, enum rtw89_chanctx_idx chanctx_idx)const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, chanctx_idx);struct rtw89_dpk_info *dpk = &rtwdev->dpk;0 , agc_cnt = 0 , limited_rxbb = 0 , gl_cnt = 0 ;0 ;int limit = 200 ;0 ;0 ;do {switch (step) {case DPK_AGC_STEP_SYNC_DGAIN:if (agc_cnt == 0 ) {if (chan->band_width < 2 )true );else if (_dpk_sync_check(rtwdev, path, kidx) == true ) {0 xff;1 ;break ;if (loss_only == 1 || limited_rxbb == 1 || offset == 0 )else break ;case DPK_AGC_STEP_GAIN_ADJ:if (tmp_rxbb + offset > 0 x1f) {0 x1f;1 ;else if (tmp_rxbb + offset < 0 ) {0 ;1 ;else {"[DPK] Adjust RXBB (%d) = 0x%x\n" , offset, tmp_rxbb);if (chan->band_width == RTW89_CHANNEL_WIDTH_80)if (dgain > 1922 || dgain < 342 )else break ;case DPK_AGC_STEP_GAIN_LOSS_IDX:if ((tmp_gl_idx == 0 && _dpk_pas_read(rtwdev, path, true )) ||7 )else if (tmp_gl_idx == 0 )else break ;case DPK_AGC_STEP_GL_GT_CRITERION:if (tmp_txagc == 0 x2e ||1 ;"[DPK] Txagc@lower bound!!\n" );else {0 x3);break ;case DPK_AGC_STEP_GL_LT_CRITERION:if (tmp_txagc == 0 x3f || tmp_txagc == dpk->max_dpk_txagc[path]) {1 ;"[DPK] Txagc@upper bound!!\n" );else {0 xfe);break ;case DPK_AGC_STEP_SET_TX_GAIN:1 ;break ;default :1 ;break ;while (!goout && agc_cnt < 6 && limit-- > 0 );if (gl_cnt >= 6 )false );"[DPK] Txagc / RXBB for DPK = 0x%x / 0x%x\n" , tmp_txagc, tmp_rxbb);return tmp_txagc;static void _dpk_set_mdpd_para(struct rtw89_dev *rtwdev,enum rtw89_rf_path path, u8 order)struct rtw89_dpk_info *dpk = &rtwdev->dpk;switch (order) {case 0 : /* (5,3,1) */ 0 x3);0 x1);0 x3;break ;case 1 : /* (5,3,0) */ 0 x0);0 x0);0 x1;break ;case 2 : /* (5,0,0) */ 0 x0);0 x0);0 x0;break ;default :"[DPK] Wrong MDPD order!!(0x%x)\n" , order);break ;"[DPK] Set %s for IDL\n" ,0 x0 ? "(5,3,1)" :0 x1 ? "(5,3,0)" : "(5,0,0)" );"[DPK] Set MDPD order to 0x%x for IDL\n" , order);static void _dpk_idl_mpa(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy,enum rtw89_rf_path path, u8 kidx, u8 gain)struct rtw89_dpk_info *dpk = &rtwdev->dpk;if (dpk->bp[path][kidx].bw < RTW89_CHANNEL_WIDTH_80 &&0 x2);else 0 x0);static void _dpk_fill_result(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy,enum rtw89_rf_path path, u8 kidx, u8 gain, u8 txagc)struct rtw89_dpk_info *dpk = &rtwdev->dpk;0 x78;8 ), BIT(8 ), kidx);"[DPK] Fill txagc/ pwsf/ gs = 0x%x/ 0x%x/ 0x%x\n" ,8 ),0 x3F << ((gain << 3 ) + (kidx << 4 )), txagc);8 ) + (kidx << 2 ),0 x1FF << (gain << 4 ), pwsf);8 ), B_LOAD_COEF_MDPD, 0 x1);8 ), B_LOAD_COEF_MDPD, 0 x0);if (dpk->dpk_gs[phy] == 0 x7f)8 ) + (kidx << 2 ),0 x007f7f7f);else 8 ) + (kidx << 2 ),0 x005b5b5b);8 ) + (kidx << 2 ),8 ), MASKDWORD, 0 x0);0 x0);static bool _dpk_reload_check(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy,enum rtw89_rf_path path, enum rtw89_chanctx_idx chanctx_idx)const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, chanctx_idx);struct rtw89_dpk_info *dpk = &rtwdev->dpk;bool is_reload = false ;for (idx = 0 ; idx < RTW89_DPK_BKUP_NUM; idx++) {if (cur_band != dpk->bp[path][idx].band ||continue ;8 ),true ;"[DPK] reload S%d[%d] success\n" , path, idx);return is_reload;static void _rf_direct_cntrl(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, bool is_bybb)if (is_bybb)0 x1);else 0 x0);static void _drf_direct_cntrl(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, bool is_bybb)if (is_bybb)0 x1);else 0 x0);static bool _dpk_main(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy,enum rtw89_rf_path path, u8 gain,enum rtw89_chanctx_idx chanctx_idx)struct rtw89_dpk_info *dpk = &rtwdev->dpk;0 x38, kidx = dpk->cur_idx[path];bool is_fail = false ;"[DPK] ========= S%d[%d] DPK Start =========\n" , path, kidx);false );false );false , chanctx_idx);if (txagc == 0 xff) {true ;goto _error;if (!is_fail)1 ;else 0 ;"[DPK] S%d[%d] DPK %s\n" , path, kidx,"Check" : "Success" );"[DPK] S%d[%d] DPK %s\n" , path, kidx,"Check" : "Success" );return is_fail;static void _dpk_cal_select(struct rtw89_dev *rtwdev,enum rtw89_phy_idx phy, u8 kpath,enum rtw89_chanctx_idx chanctx_idx)struct rtw89_dpk_info *dpk = &rtwdev->dpk;bool reloaded[2 ] = {false };for (path = 0 ; path < DPK_RF_PATH_MAX_8852BT; path++) {if (!reloaded[path] && dpk->bp[path][0 ].ch != 0 )else false );for (path = 0 ; path < DPK_RF_PATH_MAX_8852BT; path++) {if (rtwdev->is_tssi_mode[path])true );for (path = 0 ; path < DPK_RF_PATH_MAX_8852BT; path++)1 , chanctx_idx);for (path = 0 ; path < DPK_RF_PATH_MAX_8852BT; path++) {if (rtwdev->is_tssi_mode[path])false );static bool _dpk_bypass_check(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy,enum rtw89_chanctx_idx chanctx_idx)const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, chanctx_idx);struct rtw89_fem_info *fem = &rtwdev->fem;if (fem->epa_2g && chan->band_type == RTW89_BAND_2G) {"[DPK] Skip DPK due to 2G_ext_PA exist!!\n" );return true ;else if (fem->epa_5g && chan->band_type == RTW89_BAND_5G) {"[DPK] Skip DPK due to 5G_ext_PA exist!!\n" );return true ;else if (fem->epa_6g && chan->band_type == RTW89_BAND_6G) {"[DPK] Skip DPK due to 6G_ext_PA exist!!\n" );return true ;return false ;static void _dpk_force_bypass(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy)for (path = 0 ; path < RTW8852BT_SS; path++) {if (kpath & BIT(path))true );static void _dpk_track(struct rtw89_dev *rtwdev)struct rtw89_dpk_info *dpk = &rtwdev->dpk;0 , txagc_ofst;2 ] = {};2 ];for (path = 0 ; path < RF_PATH_NUM_8852BT; path++) {"[DPK_TRK] ================[S%d[%d] (CH %d)]================\n" ,"[DPK_TRK] thermal now = %d\n" , cur_ther);if (dpk->bp[path][kidx].ch && cur_ther)if (dpk->bp[path][kidx].band == RTW89_BAND_2G)3 / 2 ;else 5 / 2 ;13 ),if (rtwdev->is_tssi_mode[path]) {"[DPK_TRK] txagc_RF / track_idx = 0x%x / %d\n" ,13 ),13 ),"[DPK_TRK] txagc_bb_tp / txagc_bb = 0x%x / 0x%x\n" ,13 ),"[DPK_TRK] txagc_offset / delta_ther = %d / %d\n" ,8 ),if (tmp == 0 x1) {0 ;"[DPK_TRK] HW txagc offset mode\n" );if (txagc_rf && cur_ther)13 ),if (tmp == 0 x0) {0 ] = dpk->bp[path][kidx].pwsf +1 ] = dpk->bp[path][kidx].pwsf +else {0 ] = dpk->bp[path][kidx].pwsf + ini_diff;1 ] = dpk->bp[path][kidx].pwsf + ini_diff;else {0 ] = (dpk->bp[path][kidx].pwsf + delta_ther[path]) & 0 x1ff;1 ] = (dpk->bp[path][kidx].pwsf + delta_ther[path]) & 0 x1ff;if (!tmp && txagc_rf) {"[DPK_TRK] New pwsf[0] / pwsf[1] = 0x%x / 0x%x\n" ,0 ], pwsf[1 ]);8 ) + (kidx << 2 ),0 ]);8 ) + (kidx << 2 ),1 ]);static void _set_dpd_backoff(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy)struct rtw89_dpk_info *dpk = &rtwdev->dpk;13 ), B_DPD_BF_OFDM);13 ), B_DPD_BF_SCA);if (ofdm_bkof + tx_scale >= 44 ) {/* move dpd backoff to bb, and set dpd backoff to 0 */ 0 x7f;for (path = 0 ; path < RF_PATH_NUM_8852BT; path++) {if (!(kpath & BIT(path)))continue ;8 ),0 x7f7f7f);"[RFK] Set S%d DPD backoff to 0dB\n" , path);else {0 x5b;static void _tssi_dpk_off(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy)24 ), 0 x0);24 ), 0 x0);static void _tssi_rf_setting(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy,enum rtw89_rf_path path, const struct rtw89_chan *chan)enum rtw89_band band = chan->band_type;if (band == RTW89_BAND_2G)0 x1);else 0 x1);static void _tssi_set_sys(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy,enum rtw89_rf_path path, const struct rtw89_chan *chan)enum rtw89_band band = chan->band_type;if (chan->band_width == RTW89_CHANNEL_WIDTH_80)0 x1);else 0 x0);if (path == RF_PATH_A)else static void _tssi_ini_txpwr_ctrl_bb(struct rtw89_dev *rtwdev,enum rtw89_phy_idx phy,enum rtw89_rf_path path)static void _tssi_ini_txpwr_ctrl_bb_he_tb(struct rtw89_dev *rtwdev,enum rtw89_phy_idx phy,enum rtw89_rf_path path)static void _tssi_set_dck(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy,enum rtw89_rf_path path)static void _tssi_set_tmeter_tbl(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy,enum rtw89_rf_path path, const struct rtw89_chan *chan)#define RTW8852BT_TSSI_GET_VAL(ptr, idx) \0 ; \for (__i = 0 ; __i < 4 ; __i++) { \8 * __i)); \struct rtw89_fw_txpwr_track_cfg *trk = rtwdev->fw.elm_info.txpwr_trk;struct rtw89_tssi_info *tssi_info = &rtwdev->tssi;const s8 *thm_up_a = NULL;const s8 *thm_down_a = NULL;const s8 *thm_up_b = NULL;const s8 *thm_down_b = NULL;0 xff;64 ] = {0 };0 ;switch (subband) {default :case RTW89_CH_2G:0 ];0 ];0 ];0 ];break ;case RTW89_CH_5G_BAND_1:0 ];0 ];0 ];0 ];break ;case RTW89_CH_5G_BAND_3:1 ];1 ];1 ];1 ];break ;case RTW89_CH_5G_BAND_4:2 ];2 ];2 ];2 ];break ;if (path == RF_PATH_A) {"[TSSI] ch=%d thermal_pathA=0x%x\n" , ch, thermal);0 x0);0 x1);if (thermal == 0 xff) {32 );32 );for (i = 0 ; i < 64 ; i += 4 ) {0 x0);"[TSSI] write 0x%x val=0x%08x\n" ,0 x0);else {0 ;for (j = 0 ; j < 32 ; j++)1 ];1 ;for (j = 63 ; j >= 32 ; j--)1 ];for (i = 0 ; i < 64 ; i += 4 ) {"[TSSI] write 0x%x val=0x%08x\n" ,0 x5c00 + i, tmp);0 x1);0 x0);else {"[TSSI] ch=%d thermal_pathB=0x%x\n" , ch, thermal);0 x0);0 x1);if (thermal == 0 xff) {32 );32 );for (i = 0 ; i < 64 ; i += 4 ) {0 x0);"[TSSI] write 0x%x val=0x%08x\n" ,0 x7c00 + i, 0 x0);else {0 ;for (j = 0 ; j < 32 ; j++)1 ];1 ;for (j = 63 ; j >= 32 ; j--)1 ];for (i = 0 ; i < 64 ; i += 4 ) {"[TSSI] write 0x%x val=0x%08x\n" ,0 x7c00 + i, tmp);0 x1);0 x0);#undef RTW8852BT_TSSI_GET_VALstatic void _tssi_set_dac_gain_tbl(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy,enum rtw89_rf_path path)static void _tssi_slope_cal_org(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy,enum rtw89_rf_path path, const struct rtw89_chan *chan)enum rtw89_band band = chan->band_type;if (path == RF_PATH_A)else static void _tssi_alignment_default(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy,enum rtw89_rf_path path, bool all,const struct rtw89_chan *chan)enum rtw89_band band = chan->band_type;const struct rtw89_rfk_tbl *tbl = NULL;if (path == RF_PATH_A) {if (band == RTW89_BAND_2G)else if (ch >= 36 && ch <= 64 )else if (ch >= 100 && ch <= 144 )else if (ch >= 149 && ch <= 177 )else {if (ch >= 1 && ch <= 14 )else if (ch >= 36 && ch <= 64 )else if (ch >= 100 && ch <= 144 )else if (ch >= 149 && ch <= 177 )if (tbl)static void _tssi_set_tssi_slope(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy,enum rtw89_rf_path path)static void _tssi_set_tssi_track(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy,enum rtw89_rf_path path)if (path == RF_PATH_A)0 x0);else 0 x0);static void _tssi_set_txagc_offset_mv_avg(struct rtw89_dev *rtwdev,enum rtw89_phy_idx phy,enum rtw89_rf_path path)"======>%s path=%d\n" , __func__,if (path == RF_PATH_A)0 x010);else 0 x010);static void _tssi_enable(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy)for (i = 0 ; i < RF_PATH_NUM_8852BT; i++) {if (i == RF_PATH_A) {0 x0);0 x0);0 x1);0 x1);0 x3);0 xc0);0 x0);0 x1);true ;else {0 x0);0 x0);0 x1);0 x1);0 x3);0 xc0);0 x0);0 x1);true ;static void _tssi_disable(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy)0 x0);0 x1);0 x1);0 x0);0 x1);0 x1);false ;false ;static u32 _tssi_get_cck_group(struct rtw89_dev *rtwdev, u8 ch)switch (ch) {case 1 ... 2 :return 0 ;case 3 ... 5 :return 1 ;case 6 ... 8 :return 2 ;case 9 ... 11 :return 3 ;case 12 ... 13 :return 4 ;case 14 :return 5 ;return 0 ;#define TSSI_EXTRA_GROUP_BIT (BIT(31 ))#define TSSI_EXTRA_GROUP(idx) (TSSI_EXTRA_GROUP_BIT | (idx))#define IS_TSSI_EXTRA_GROUP(group) ((group) & TSSI_EXTRA_GROUP_BIT)#define TSSI_EXTRA_GET_GROUP_IDX1(group) ((group) & ~TSSI_EXTRA_GROUP_BIT)#define TSSI_EXTRA_GET_GROUP_IDX2(group) (TSSI_EXTRA_GET_GROUP_IDX1(group) + 1 )static u32 _tssi_get_ofdm_group(struct rtw89_dev *rtwdev, u8 ch)switch (ch) {case 1 ... 2 :return 0 ;case 3 ... 5 :return 1 ;case 6 ... 8 :return 2 ;case 9 ... 11 :return 3 ;case 12 ... 14 :return 4 ;case 36 ... 40 :return 5 ;case 41 ... 43 :return TSSI_EXTRA_GROUP(5 );case 44 ... 48 :return 6 ;case 49 ... 51 :return TSSI_EXTRA_GROUP(6 );case 52 ... 56 :return 7 ;case 57 ... 59 :return TSSI_EXTRA_GROUP(7 );case 60 ... 64 :return 8 ;case 100 ... 104 :return 9 ;case 105 ... 107 :return TSSI_EXTRA_GROUP(9 );case 108 ... 112 :return 10 ;case 113 ... 115 :return TSSI_EXTRA_GROUP(10 );case 116 ... 120 :return 11 ;case 121 ... 123 :return TSSI_EXTRA_GROUP(11 );case 124 ... 128 :return 12 ;case 129 ... 131 :return TSSI_EXTRA_GROUP(12 );case 132 ... 136 :return 13 ;case 137 ... 139 :return TSSI_EXTRA_GROUP(13 );case 140 ... 144 :return 14 ;case 149 ... 153 :return 15 ;case 154 ... 156 :return TSSI_EXTRA_GROUP(15 );case 157 ... 161 :return 16 ;case 162 ... 164 :return TSSI_EXTRA_GROUP(16 );case 165 ... 169 :return 17 ;case 170 ... 172 :return TSSI_EXTRA_GROUP(17 );case 173 ... 177 :return 18 ;return 0 ;static u32 _tssi_get_trim_group(struct rtw89_dev *rtwdev, u8 ch)switch (ch) {case 1 ... 8 :return 0 ;case 9 ... 14 :return 1 ;case 36 ... 48 :return 2 ;case 52 ... 64 :return 3 ;case 100 ... 112 :return 4 ;case 116 ... 128 :return 5 ;case 132 ... 144 :return 6 ;case 149 ... 177 :return 7 ;return 0 ;static s8 _tssi_get_ofdm_de(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy,enum rtw89_rf_path path, const struct rtw89_chan *chan)struct rtw89_tssi_info *tssi_info = &rtwdev->tssi;"[TSSI][TRIM]: path=%d mcs group_idx=0x%x\n" , path, gidx);if (IS_TSSI_EXTRA_GROUP(gidx)) {2 ;"[TSSI][TRIM]: path=%d mcs de=%d 1st=%d 2nd=%d\n" ,else {"[TSSI][TRIM]: path=%d mcs de=%d\n" , path, val);return val;static s8 _tssi_get_ofdm_trim_de(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy,enum rtw89_rf_path path, const struct rtw89_chan *chan)struct rtw89_tssi_info *tssi_info = &rtwdev->tssi;"[TSSI][TRIM]: path=%d mcs trim_group_idx=0x%x\n" ,if (IS_TSSI_EXTRA_GROUP(tgidx)) {2 ;"[TSSI][TRIM]: path=%d mcs trim_de=%d 1st=%d 2nd=%d\n" ,else {"[TSSI][TRIM]: path=%d mcs trim_de=%d\n" ,return val;static void _tssi_set_efuse_to_de(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy,const struct rtw89_chan *chan)struct rtw89_tssi_info *tssi_info = &rtwdev->tssi;"[TSSI][TRIM]: phy=%d ch=%d\n" ,for (i = RF_PATH_A; i < RF_PATH_NUM_8852BT; i++) {"[TSSI][TRIM]: path=%d cck[%d]=0x%x trim=0x%x\n" ,"[TSSI] Set TSSI CCK DE 0x%x[21:12]=0x%x\n" ,"[TSSI][TRIM]: path=%d mcs=0x%x trim=0x%x\n" ,"[TSSI] Set TSSI MCS DE 0x%x[21:12]=0x%x\n" ,static void _tssi_alimentk_dump_result(struct rtw89_dev *rtwdev, enum rtw89_rf_path path)"[TSSI PA K]\n0x%x = 0x%08x\n0x%x = 0x%08x\n0x%x = 0x%08x\n0x%x = 0x%08x\n" "0x%x = 0x%08x\n0x%x = 0x%08x\n0x%x = 0x%08x\n0x%x = 0x%08x\n" ,13 ),13 )),13 ),13 )),13 ),13 )),13 ),13 )),13 ),13 )),13 ),13 )),13 ),13 )),13 ),13 )));static void _tssi_alimentk_done(struct rtw89_dev *rtwdev,enum rtw89_phy_idx phy, enum rtw89_rf_path path,const struct rtw89_chan *chan)struct rtw89_tssi_info *tssi_info = &rtwdev->tssi;"======>%s phy=%d path=%d\n" , __func__, phy, path);if (channel >= 1 && channel <= 14 )else if (channel >= 36 && channel <= 64 )else if (channel >= 100 && channel <= 144 )else if (channel >= 149 && channel <= 177 )else if (tssi_info->alignment_done[path][band]) {13 ), MASKDWORD,0 ]);13 ), MASKDWORD,1 ]);13 ), MASKDWORD,2 ]);13 ), MASKDWORD,3 ]);static void _tssi_hw_tx(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy,enum rtw89_rf_path path, u16 cnt, u16 period, s16 pwr_dbm,const struct rtw89_chan *chan)enum rtw89_rf_path_bit rx_path;if (path == RF_PATH_A)else if (path == RF_PATH_B)else if (path == RF_PATH_AB)else /* don't change path, but still set others */ if (enable) {20 , phy, chan);static void _tssi_backup_bb_registers(struct rtw89_dev *rtwdev,enum rtw89_phy_idx phy, const u32 reg[],for (i = 0 ; i < reg_num; i++) {"[TSSI] Backup BB 0x%x = 0x%x\n" , reg[i],static void _tssi_reload_bb_registers(struct rtw89_dev *rtwdev,enum rtw89_phy_idx phy, const u32 reg[],for (i = 0 ; i < reg_num; i++) {"[TSSI] Reload BB 0x%x = 0x%x\n" , reg[i],static u8 _tssi_ch_to_idx(struct rtw89_dev *rtwdev, u8 channel)if (channel >= 1 && channel <= 14 )1 ;else if (channel >= 36 && channel <= 64 )36 ) / 2 + 14 ;else if (channel >= 100 && channel <= 144 )100 ) / 2 ) + 15 + 14 ;else if (channel >= 149 && channel <= 177 )149 ) / 2 ) + 38 + 14 ;else 0 ;return channel_index;static bool _tssi_get_cw_report(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy,enum rtw89_rf_path path, const s16 *power,const struct rtw89_chan *chan)const int retry = 100 ;int j, k;for (j = 0 ; j < RTW8852BT_TSSI_PATH_NR; j++) {0 x0);0 x1);"[TSSI PA K] 0x%x = 0x%08x path=%d\n" ,if (j == 0 )100 , 5000 , power[j], true ,else 100 , 5000 , power[j], true ,"[TSSI PA K] First HWTXcounter=%d path=%d\n" ,for (k = 0 ; k < retry; k++) {if (tmp)break ;30 );"[TSSI PA K] Flow k = %d HWTXcounter=%d path=%d\n" ,if (k >= retry) {"[TSSI PA K] TSSI finish bit k > %d mp:100ms normal:30us path=%d\n" ,100 , 5000 , power[j], false , chan);return false ;100 , 5000 , power[j], false , chan);"[TSSI PA K] Final HWTXcounter=%d path=%d\n" ,return true ;static void _tssi_alimentk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy,enum rtw89_rf_path path, const struct rtw89_chan *chan)static const u32 bb_reg[8 ] = {0 x5820, 0 x7820, 0 x4978, 0 x58e4,0 x78e4, 0 x49c0, 0 x0d18, 0 x0d80};static const s16 power_2g[4 ] = {48 , 20 , 4 , -8 };static const s16 power_5g[4 ] = {48 , 20 , 4 , 4 };struct rtw89_tssi_info *tssi_info = &rtwdev->tssi;struct rtw8852bx_bb_tssi_bak tssi_bak;8 ] = {};const s16 *power;bool ok;"======> %s channel=%d path=%d\n" , __func__, channel,if (chan->band_type == RTW89_BAND_2G)else if (channel >= 1 && channel <= 14 )else if (channel >= 36 && channel <= 64 )else if (channel >= 100 && channel <= 144 )else if (channel >= 149 && channel <= 177 )else 0 x8);0 x8);0 x2);0 x2);if (!ok)goto out;for (j = 0 ; j < RTW8852BT_TSSI_PATH_NR; j++) {"[TSSI PA K] power[%d]=%d tssi_cw_rpt[%d]=%d\n" , j,1 ],1 ]);8 );0 ] - ((power[0 ] - power[1 ]) * 2 ) -1 ] + tssi_cw_default;2 ],2 ]);8 );3 ],3 ]);8 );if (path == RF_PATH_A) {"[TSSI PA K] tssi_alim_offset = 0x%x 0x%x 0x%x 0x%x\n" ,else {"[TSSI PA K] tssi_alim_offset = 0x%x 0x%x 0x%x 0x%x\n" ,true ;0 ] =13 ), MASKDWORD);1 ] =13 ), MASKDWORD);2 ] =13 ), MASKDWORD);3 ] =13 ), MASKDWORD);true ;0 ] =13 ), MASKDWORD);1 ] =13 ), MASKDWORD);2 ] =13 ), MASKDWORD);3 ] =13 ), MASKDWORD);"[TSSI PA K] tssi_info->alignment_value[path=%d][band=%d][0], 0x%x = 0x%08x\n" ,13 ),0 ]);"[TSSI PA K] tssi_info->alignment_value[path=%d][band=%d][1], 0x%x = 0x%08x\n" ,13 ),1 ]);"[TSSI PA K] tssi_info->alignment_value[path=%d][band=%d][2], 0x%x = 0x%08x\n" ,13 ),2 ]);"[TSSI PA K] tssi_info->alignment_value[path=%d][band=%d][3], 0x%x = 0x%08x\n" ,13 ),3 ]);0 );"[TSSI PA K] %s processing time = %lld us (acc = %llu us)\n" ,void rtw8852bt_dpk_init(struct rtw89_dev *rtwdev)struct rtw89_dpk_info *dpk = &rtwdev->dpk;for (path = 0 ; path < 2 ; path++) {0 ;0 x3F;true ;false ;void rtw8852bt_rck(struct rtw89_dev *rtwdev)for (path = 0 ; path < RF_PATH_NUM_8852BT; path++)void rtw8852bt_dack(struct rtw89_dev *rtwdev, enum rtw89_chanctx_idx chanctx_idx)0 , chanctx_idx);false );void rtw8852bt_iqk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx,enum rtw89_chanctx_idx chanctx_idx)0 , chanctx_idx);false , chanctx_idx);void rtw8852bt_rx_dck(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx,enum rtw89_chanctx_idx chanctx_idx)0 , chanctx_idx);void rtw8852bt_dpk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx,enum rtw89_chanctx_idx chanctx_idx)"[DPK] ****** DPK Start (Ver: 0x%x) ******\n" , RTW8852BT_DPK_VER);if (_dpk_bypass_check(rtwdev, phy_idx, chanctx_idx))else void rtw8852bt_dpk_track(struct rtw89_dev *rtwdev)void rtw8852bt_tssi(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy,bool hwtx_en, enum rtw89_chanctx_idx chanctx_idx)const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, chanctx_idx);static const u32 reg[2 ] = {R_DPD_CH0A, R_DPD_CH0B};2 ] = {};2 );"[TSSI] %s: phy=%d\n" , __func__, phy);for (i = RF_PATH_A; i < RF_PATH_NUM_8852BT; i++) {true , chan);true );if (hwtx_en)false );2 );void rtw8852bt_tssi_scan(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy,const struct rtw89_chan *chan)struct rtw89_tssi_info *tssi_info = &rtwdev->tssi;"======>%s phy=%d channel=%d\n" , __func__, phy, channel);if (channel >= 1 && channel <= 14 )else if (channel >= 36 && channel <= 64 )else if (channel >= 100 && channel <= 144 )else if (channel >= 149 && channel <= 177 )else for (i = RF_PATH_A; i < RTW8852BT_TSSI_PATH_NR; i++) {if (tssi_info->alignment_done[i][band])else true , chan);static void rtw8852bt_tssi_default_txagc(struct rtw89_dev *rtwdev,enum rtw89_phy_idx phy, bool enable,enum rtw89_chanctx_idx chanctx_idx)const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, chanctx_idx);"======> %s ch=%d\n" ,if (enable)return ;"======>%s 1 SCAN_END Set 0x5818[7:0]=0x%x 0x7818[7:0]=0x%x\n" ,0 xc0);0 xc0);0 x0);0 x1);0 x0);0 x1);"======>%s 2 SCAN_END Set 0x5818[7:0]=0x%x 0x7818[7:0]=0x%x\n" ,"======> %s SCAN_END\n" , __func__);void rtw8852bt_wifi_scan_notify(struct rtw89_dev *rtwdev, bool scan_start,enum rtw89_phy_idx phy_idx,enum rtw89_chanctx_idx chanctx_idx)if (scan_start)true , chanctx_idx);else false , chanctx_idx);static void _bw_setting(struct rtw89_dev *rtwdev, enum rtw89_rf_path path,enum rtw89_bandwidth bw, bool dav)"[RFK]===> %s\n" , __func__);if (rf_reg18 == INV_RF_DATA) {"[RFK]Invalid RF_0x18 for Path-%d\n" , path);return ;switch (bw) {case RTW89_CHANNEL_WIDTH_5:case RTW89_CHANNEL_WIDTH_10:case RTW89_CHANNEL_WIDTH_20:break ;case RTW89_CHANNEL_WIDTH_40:break ;case RTW89_CHANNEL_WIDTH_80:break ;default :"[RFK]Fail to set CH\n" );"[RFK] set %x at path%d, %x =0x%x\n" ,static void _ctrl_bw(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy,enum rtw89_bandwidth bw)true );true );false );false );static bool _set_s0_arfc18(struct rtw89_dev *rtwdev, u32 val)int ret;0 x1);0 , 1 , 1000 ,false , rtwdev, RF_PATH_A, RR_LPF, RR_LPF_BUSY);if (ret)"[LCK]LCK timeout\n" );0 x0);return !!ret;static void _lck_check(struct rtw89_dev *rtwdev)if (rtw89_read_rf(rtwdev, RF_PATH_A, RR_SYNFB, RR_SYNFB_LK) == 0 ) {"[LCK]SYN MMD reset\n" );0 x1);0 x0);0 x1);0 x0);10 );if (rtw89_read_rf(rtwdev, RF_PATH_A, RR_SYNFB, RR_SYNFB_LK) == 0 ) {"[LCK]re-set RF 0x18\n" );0 x1);0 x0);if (rtw89_read_rf(rtwdev, RF_PATH_A, RR_SYNFB, RR_SYNFB_LK) == 0 ) {"[LCK]SYN off/on\n" );0 x1);0 x0);0 x3);0 x0);0 x1);0 x0);"[LCK]0xb2=%x, 0xc5=%x\n" ,static void _set_ch(struct rtw89_dev *rtwdev, u32 val)bool timeout;0 x1);if (!timeout)static void _ch_setting(struct rtw89_dev *rtwdev, enum rtw89_rf_path path,bool dav)bool is_2g_ch = central_ch <= 14 ;"[RFK]===> %s\n" , __func__);if (!is_2g_ch)if (path == RF_PATH_A && dav)else 0 );1 );"[RFK]CH: %d for Path-%d, reg0x%x = 0x%x\n" ,static void _ctrl_ch(struct rtw89_dev *rtwdev, u8 central_ch)true );true );false );false );static void _set_rxbb_bw(struct rtw89_dev *rtwdev, enum rtw89_bandwidth bw,enum rtw89_rf_path path)0 x1);0 x12);if (bw == RTW89_CHANNEL_WIDTH_20)0 x1b);else if (bw == RTW89_CHANNEL_WIDTH_40)0 x13);else if (bw == RTW89_CHANNEL_WIDTH_80)0 xb);else 0 x3);"[RFK] set S%d RXBB BW 0x3F = 0x%x\n" ,0 x0);static void _rxbb_bw(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy,enum rtw89_bandwidth bw)for (path = 0 ; path < RF_PATH_NUM_8852BT; path++) {if (!(kpath & BIT(path)))continue ;static void rtw8852bt_ctrl_bw_ch(struct rtw89_dev *rtwdev,enum rtw89_phy_idx phy, u8 central_ch,enum rtw89_band band, enum rtw89_bandwidth bw)void rtw8852bt_set_channel_rf(struct rtw89_dev *rtwdev,const struct rtw89_chan *chan,enum rtw89_phy_idx phy_idx)void rtw8852bt_mcc_get_ch_info(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx)const struct rtw89_chan *chan = rtw89_mgnt_chan_get(rtwdev, 0 );struct rtw89_rfk_mcc_info_data *rfk_mcc = rtwdev->rfk_mcc.data;struct rtw89_rfk_chan_desc desc[__RTW89_RFK_CHS_NR_V0] = {};for (idx = 0 ; idx < ARRAY_SIZE(desc); idx++) {struct rtw89_rfk_chan_desc *p = &desc[idx];true ;void rtw8852bt_rfk_chanctx_cb(struct rtw89_dev *rtwdev,enum rtw89_chanctx_state state)struct rtw89_dpk_info *dpk = &rtwdev->dpk;switch (state) {case RTW89_CHANCTX_STATE_MCC_START:false ;for (path = 0 ; path < RTW8852BT_SS; path++)false );break ;case RTW89_CHANCTX_STATE_MCC_STOP:true ;for (path = 0 ; path < RTW8852BT_SS; path++)false );break ;default :break ;
Messung V0.5 in Prozent C=99 H=95 G=96
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(vorverarbeitet am 2026-06-07)
¤ *© Formatika GbR, Deutschland
