// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
/* Copyright(c) 2019-2020 Realtek Corporation
*/
#include "rtw8852b_rfk_table.h"
static const struct rtw89_reg5_def rtw8852b_afe_init_defs[] = {
RTW89_DECL_RFK_WM(0 xC0D4, 0 xffffffff, 0 x4486888c),
RTW89_DECL_RFK_WM(0 xC0D8, 0 xffffffff, 0 xc6ba10e0),
RTW89_DECL_RFK_WM(0 xc0dc, 0 xffffffff, 0 x30c52868),
RTW89_DECL_RFK_WM(0 xc0e0, 0 xffffffff, 0 x05008128),
RTW89_DECL_RFK_WM(0 xc0e4, 0 xffffffff, 0 x0000272b),
RTW89_DECL_RFK_WM(0 xC1D4, 0 xffffffff, 0 x4486888c),
RTW89_DECL_RFK_WM(0 xC1D8, 0 xffffffff, 0 xc6ba10e0),
RTW89_DECL_RFK_WM(0 xc1dc, 0 xffffffff, 0 x30c52868),
RTW89_DECL_RFK_WM(0 xc1e0, 0 xffffffff, 0 x05008128),
RTW89_DECL_RFK_WM(0 xc1e4, 0 xffffffff, 0 x0000272b),
};
RTW89_DECLARE_RFK_TBL(rtw8852b_afe_init_defs);
static const struct rtw89_reg5_def rtw8852b_check_addc_defs_a[] = {
RTW89_DECL_RFK_WM(0 x20f4, BIT(24 ), 0 x0),
RTW89_DECL_RFK_WM(0 x20f8, 0 x80000000, 0 x1),
RTW89_DECL_RFK_WM(0 x20f0, 0 xff0000, 0 x1),
RTW89_DECL_RFK_WM(0 x20f0, 0 xf00, 0 x2),
RTW89_DECL_RFK_WM(0 x20f0, 0 xf, 0 x0),
RTW89_DECL_RFK_WM(0 x20f0, 0 xc0, 0 x2),
};
RTW89_DECLARE_RFK_TBL(rtw8852b_check_addc_defs_a);
static const struct rtw89_reg5_def rtw8852b_check_addc_defs_b[] = {
RTW89_DECL_RFK_WM(0 x20f4, BIT(24 ), 0 x0),
RTW89_DECL_RFK_WM(0 x20f8, 0 x80000000, 0 x1),
RTW89_DECL_RFK_WM(0 x20f0, 0 xff0000, 0 x1),
RTW89_DECL_RFK_WM(0 x20f0, 0 xf00, 0 x2),
RTW89_DECL_RFK_WM(0 x20f0, 0 xf, 0 x0),
RTW89_DECL_RFK_WM(0 x20f0, 0 xc0, 0 x3),
};
RTW89_DECLARE_RFK_TBL(rtw8852b_check_addc_defs_b);
static const struct rtw89_reg5_def rtw8852b_check_dadc_en_defs_a[] = {
RTW89_DECL_RFK_WM(0 x032C, BIT(30 ), 0 x0),
RTW89_DECL_RFK_WM(0 x030C, 0 x0f000000, 0 xf),
RTW89_DECL_RFK_WM(0 x030C, 0 x0f000000, 0 x3),
RTW89_DECL_RFK_WM(0 x032C, BIT(16 ), 0 x0),
RTW89_DECL_RFK_WM(0 x12dc, BIT(0 ), 0 x1),
RTW89_DECL_RFK_WM(0 x12e8, BIT(2 ), 0 x1),
RTW89_DECL_RFK_WRF(RF_PATH_A, 0 x8f, BIT(13 ), 0 x1),
};
RTW89_DECLARE_RFK_TBL(rtw8852b_check_dadc_en_defs_a);
static const struct rtw89_reg5_def rtw8852b_check_dadc_en_defs_b[] = {
RTW89_DECL_RFK_WM(0 x032C, BIT(30 ), 0 x0),
RTW89_DECL_RFK_WM(0 x030C, 0 x0f000000, 0 xf),
RTW89_DECL_RFK_WM(0 x030C, 0 x0f000000, 0 x3),
RTW89_DECL_RFK_WM(0 x032C, BIT(16 ), 0 x0),
RTW89_DECL_RFK_WM(0 x32dc, BIT(0 ), 0 x1),
RTW89_DECL_RFK_WM(0 x32e8, BIT(2 ), 0 x1),
RTW89_DECL_RFK_WRF(RF_PATH_B, 0 x8f, BIT(13 ), 0 x1),
};
RTW89_DECLARE_RFK_TBL(rtw8852b_check_dadc_en_defs_b);
static const struct rtw89_reg5_def rtw8852b_check_dadc_dis_defs_a[] = {
RTW89_DECL_RFK_WM(0 x12dc, BIT(0 ), 0 x0),
RTW89_DECL_RFK_WM(0 x12e8, BIT(2 ), 0 x0),
RTW89_DECL_RFK_WRF(RF_PATH_A, 0 x8f, BIT(13 ), 0 x0),
RTW89_DECL_RFK_WM(0 x032C, BIT(16 ), 0 x1),
};
RTW89_DECLARE_RFK_TBL(rtw8852b_check_dadc_dis_defs_a);
static const struct rtw89_reg5_def rtw8852b_check_dadc_dis_defs_b[] = {
RTW89_DECL_RFK_WM(0 x32dc, BIT(0 ), 0 x0),
RTW89_DECL_RFK_WM(0 x32e8, BIT(2 ), 0 x0),
RTW89_DECL_RFK_WRF(RF_PATH_B, 0 x8f, BIT(13 ), 0 x0),
RTW89_DECL_RFK_WM(0 x032C, BIT(16 ), 0 x1),
};
RTW89_DECLARE_RFK_TBL(rtw8852b_check_dadc_dis_defs_b);
static const struct rtw89_reg5_def rtw8852b_dack_s0_1_defs[] = {
RTW89_DECL_RFK_WM(0 x12A0, BIT(15 ), 0 x1),
RTW89_DECL_RFK_WM(0 x12A0, 0 x00007000, 0 x3),
RTW89_DECL_RFK_WM(0 x12B8, BIT(30 ), 0 x1),
RTW89_DECL_RFK_WM(0 x030C, BIT(28 ), 0 x1),
RTW89_DECL_RFK_WM(0 x032C, 0 x80000000, 0 x0),
RTW89_DECL_RFK_WM(0 xC0D8, BIT(16 ), 0 x1),
RTW89_DECL_RFK_WM(0 xc0dc, 0 x0c000000, 0 x3),
RTW89_DECL_RFK_WM(0 xC004, BIT(30 ), 0 x0),
RTW89_DECL_RFK_WM(0 xc024, BIT(30 ), 0 x0),
RTW89_DECL_RFK_WM(0 xC004, 0 x3ff00000, 0 x30),
RTW89_DECL_RFK_WM(0 xC004, 0 xc0000000, 0 x0),
RTW89_DECL_RFK_WM(0 xC004, BIT(17 ), 0 x1),
RTW89_DECL_RFK_WM(0 xc024, BIT(17 ), 0 x1),
RTW89_DECL_RFK_WM(0 xc00c, BIT(2 ), 0 x0),
RTW89_DECL_RFK_WM(0 xc02c, BIT(2 ), 0 x0),
RTW89_DECL_RFK_WM(0 xC004, BIT(0 ), 0 x1),
RTW89_DECL_RFK_WM(0 xc024, BIT(0 ), 0 x1),
RTW89_DECL_RFK_DELAY(1 ),
};
RTW89_DECLARE_RFK_TBL(rtw8852b_dack_s0_1_defs);
static const struct rtw89_reg5_def rtw8852b_dack_s0_2_defs[] = {
RTW89_DECL_RFK_WM(0 xc0dc, 0 x0c000000, 0 x0),
RTW89_DECL_RFK_WM(0 xc00c, BIT(2 ), 0 x1),
RTW89_DECL_RFK_WM(0 xc02c, BIT(2 ), 0 x1),
};
RTW89_DECLARE_RFK_TBL(rtw8852b_dack_s0_2_defs);
static const struct rtw89_reg5_def rtw8852b_dack_s0_3_defs[] = {
RTW89_DECL_RFK_WM(0 xC004, BIT(0 ), 0 x0),
RTW89_DECL_RFK_WM(0 xc024, BIT(0 ), 0 x0),
RTW89_DECL_RFK_WM(0 xC0D8, BIT(16 ), 0 x0),
RTW89_DECL_RFK_WM(0 x12A0, BIT(15 ), 0 x0),
RTW89_DECL_RFK_WM(0 x12A0, 0 x00007000, 0 x7),
};
RTW89_DECLARE_RFK_TBL(rtw8852b_dack_s0_3_defs);
static const struct rtw89_reg5_def rtw8852b_dack_s1_1_defs[] = {
RTW89_DECL_RFK_WM(0 x32a0, BIT(15 ), 0 x1),
RTW89_DECL_RFK_WM(0 x32a0, 0 x7000, 0 x3),
RTW89_DECL_RFK_WM(0 x32B8, BIT(30 ), 0 x1),
RTW89_DECL_RFK_WM(0 x030C, BIT(28 ), 0 x1),
RTW89_DECL_RFK_WM(0 x032C, 0 x80000000, 0 x0),
RTW89_DECL_RFK_WM(0 xC1D8, BIT(16 ), 0 x1),
RTW89_DECL_RFK_WM(0 xc1dc, 0 x0c000000, 0 x3),
RTW89_DECL_RFK_WM(0 xc104, BIT(30 ), 0 x0),
RTW89_DECL_RFK_WM(0 xc124, BIT(30 ), 0 x0),
RTW89_DECL_RFK_WM(0 xc104, 0 x3ff00000, 0 x30),
RTW89_DECL_RFK_WM(0 xc104, 0 xc0000000, 0 x0),
RTW89_DECL_RFK_WM(0 xc104, BIT(17 ), 0 x1),
RTW89_DECL_RFK_WM(0 xc124, BIT(17 ), 0 x1),
RTW89_DECL_RFK_WM(0 xc10c, BIT(2 ), 0 x0),
RTW89_DECL_RFK_WM(0 xc12c, BIT(2 ), 0 x0),
RTW89_DECL_RFK_WM(0 xc104, BIT(0 ), 0 x1),
RTW89_DECL_RFK_WM(0 xc124, BIT(0 ), 0 x1),
RTW89_DECL_RFK_DELAY(1 ),
};
RTW89_DECLARE_RFK_TBL(rtw8852b_dack_s1_1_defs);
static const struct rtw89_reg5_def rtw8852b_dack_s1_2_defs[] = {
RTW89_DECL_RFK_WM(0 xc1dc, 0 x0c000000, 0 x0),
RTW89_DECL_RFK_WM(0 xc10c, BIT(2 ), 0 x1),
RTW89_DECL_RFK_WM(0 xc12c, BIT(2 ), 0 x1),
RTW89_DECL_RFK_DELAY(1 ),
};
RTW89_DECLARE_RFK_TBL(rtw8852b_dack_s1_2_defs);
static const struct rtw89_reg5_def rtw8852b_dack_s1_3_defs[] = {
RTW89_DECL_RFK_WM(0 xc104, BIT(0 ), 0 x0),
RTW89_DECL_RFK_WM(0 xc124, BIT(0 ), 0 x0),
RTW89_DECL_RFK_WM(0 xC1D8, BIT(16 ), 0 x0),
RTW89_DECL_RFK_WM(0 x32a0, BIT(15 ), 0 x0),
RTW89_DECL_RFK_WM(0 x32a0, 0 x7000, 0 x7),
};
RTW89_DECLARE_RFK_TBL(rtw8852b_dack_s1_3_defs);
static const struct rtw89_reg5_def rtw8852b_dpk_afe_defs[] = {
RTW89_DECL_RFK_WM(0 x20fc, 0 xffff0000, 0 x0303),
RTW89_DECL_RFK_WM(0 x12b8, BIT(30 ), 0 x1),
RTW89_DECL_RFK_WM(0 x32b8, BIT(30 ), 0 x1),
RTW89_DECL_RFK_WM(0 x030c, 0 xff000000, 0 x13),
RTW89_DECL_RFK_WM(0 x032c, 0 xffff0000, 0 x0041),
RTW89_DECL_RFK_WM(0 x12b8, BIT(28 ), 0 x1),
RTW89_DECL_RFK_WM(0 x58c8, BIT(24 ), 0 x1),
RTW89_DECL_RFK_WM(0 x78c8, BIT(24 ), 0 x1),
RTW89_DECL_RFK_WM(0 x5864, 0 xc0000000, 0 x3),
RTW89_DECL_RFK_WM(0 x7864, 0 xc0000000, 0 x3),
RTW89_DECL_RFK_WM(0 x2008, 0 x01FFFFFF, 0 x1ffffff),
RTW89_DECL_RFK_WM(0 x0c1c, BIT(2 ), 0 x1),
RTW89_DECL_RFK_WM(0 x0700, BIT(27 ), 0 x1),
RTW89_DECL_RFK_WM(0 x0c70, 0 x000003FF, 0 x3ff),
RTW89_DECL_RFK_WM(0 x0c60, 0 x00000003, 0 x3),
RTW89_DECL_RFK_WM(0 x0c6c, BIT(0 ), 0 x1),
RTW89_DECL_RFK_WM(0 x58ac, BIT(27 ), 0 x1),
RTW89_DECL_RFK_WM(0 x78ac, BIT(27 ), 0 x1),
RTW89_DECL_RFK_WM(0 x0c3c, BIT(9 ), 0 x1),
RTW89_DECL_RFK_WM(0 x2344, BIT(31 ), 0 x1),
RTW89_DECL_RFK_WM(0 x4490, BIT(31 ), 0 x1),
RTW89_DECL_RFK_WM(0 x12a0, 0 x000ff000, 0 xbf),
RTW89_DECL_RFK_WM(0 x32a0, 0 x000f0000, 0 xb),
RTW89_DECL_RFK_WM(0 x0700, 0 x07000000, 0 x5),
RTW89_DECL_RFK_WM(0 x20fc, 0 xffff0000, 0 x3333),
RTW89_DECL_RFK_WM(0 x580c, BIT(15 ), 0 x1),
RTW89_DECL_RFK_WM(0 x5800, 0 x0000ffff, 0 x0000),
RTW89_DECL_RFK_WM(0 x780c, BIT(15 ), 0 x1),
RTW89_DECL_RFK_WM(0 x7800, 0 x0000ffff, 0 x0000),
};
RTW89_DECLARE_RFK_TBL(rtw8852b_dpk_afe_defs);
static const struct rtw89_reg5_def rtw8852b_dpk_afe_restore_defs[] = {
RTW89_DECL_RFK_WM(0 x20fc, 0 xffff0000, 0 x0303),
RTW89_DECL_RFK_WM(0 x12b8, BIT(30 ), 0 x0),
RTW89_DECL_RFK_WM(0 x32b8, BIT(30 ), 0 x0),
RTW89_DECL_RFK_WM(0 x5864, 0 xc0000000, 0 x0),
RTW89_DECL_RFK_WM(0 x7864, 0 xc0000000, 0 x0),
RTW89_DECL_RFK_WM(0 x2008, 0 x01FFFFFF, 0 x0),
RTW89_DECL_RFK_WM(0 x0c1c, BIT(2 ), 0 x0),
RTW89_DECL_RFK_WM(0 x0700, BIT(27 ), 0 x0),
RTW89_DECL_RFK_WM(0 x0c70, 0 x000003FF, 0 x63),
RTW89_DECL_RFK_WM(0 x12a0, 0 x000FF000, 0 x00),
RTW89_DECL_RFK_WM(0 x32a0, 0 x000FF000, 0 x00),
RTW89_DECL_RFK_WM(0 x0700, 0 x07000000, 0 x0),
RTW89_DECL_RFK_WM(0 x5864, BIT(29 ), 0 x0),
RTW89_DECL_RFK_WM(0 x7864, BIT(29 ), 0 x0),
RTW89_DECL_RFK_WM(0 x20fc, 0 xffff0000, 0 x0000),
RTW89_DECL_RFK_WM(0 x58c8, BIT(24 ), 0 x0),
RTW89_DECL_RFK_WM(0 x78c8, BIT(24 ), 0 x0),
RTW89_DECL_RFK_WM(0 x0c3c, BIT(9 ), 0 x0),
RTW89_DECL_RFK_WM(0 x580c, BIT(15 ), 0 x0),
RTW89_DECL_RFK_WM(0 x58e4, 0 x18000000, 0 x1),
RTW89_DECL_RFK_WM(0 x58e4, 0 x18000000, 0 x2),
RTW89_DECL_RFK_WM(0 x780c, BIT(15 ), 0 x0),
RTW89_DECL_RFK_WM(0 x78e4, 0 x18000000, 0 x1),
RTW89_DECL_RFK_WM(0 x78e4, 0 x18000000, 0 x2),
};
RTW89_DECLARE_RFK_TBL(rtw8852b_dpk_afe_restore_defs);
static const struct rtw89_reg5_def rtw8852b_dpk_kip_defs[] = {
RTW89_DECL_RFK_WM(0 x8008, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x8088, 0 xffffffff, 0 x80000000),
};
RTW89_DECLARE_RFK_TBL(rtw8852b_dpk_kip_defs);
static const struct rtw89_reg5_def rtw8852b_tssi_sys_defs[] = {
RTW89_DECL_RFK_WM(0 x12a8, 0 x0000000f, 0 x5),
RTW89_DECL_RFK_WM(0 x32a8, 0 x0000000f, 0 x5),
RTW89_DECL_RFK_WM(0 x12bc, 0 x000ffff0, 0 x5555),
RTW89_DECL_RFK_WM(0 x32bc, 0 x000ffff0, 0 x5555),
RTW89_DECL_RFK_WM(0 x0300, 0 xff000000, 0 x16),
RTW89_DECL_RFK_WM(0 x0304, 0 x000000ff, 0 x19),
RTW89_DECL_RFK_WM(0 x0314, 0 xffff0000, 0 x2041),
RTW89_DECL_RFK_WM(0 x0318, 0 xffffffff, 0 x2041),
RTW89_DECL_RFK_WM(0 x0318, 0 xffffffff, 0 x20012041),
RTW89_DECL_RFK_WM(0 x0020, 0 x00006000, 0 x3),
RTW89_DECL_RFK_WM(0 x0024, 0 x00006000, 0 x3),
RTW89_DECL_RFK_WM(0 x0704, 0 xffff0000, 0 x601e),
RTW89_DECL_RFK_WM(0 x2704, 0 xffff0000, 0 x601e),
RTW89_DECL_RFK_WM(0 x0700, 0 xf0000000, 0 x4),
RTW89_DECL_RFK_WM(0 x2700, 0 xf0000000, 0 x4),
RTW89_DECL_RFK_WM(0 x0650, 0 x3c000000, 0 x0),
RTW89_DECL_RFK_WM(0 x2650, 0 x3c000000, 0 x0),
};
RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_sys_defs);
static const struct rtw89_reg5_def rtw8852b_tssi_sys_a_defs_2g[] = {
RTW89_DECL_RFK_WM(0 x120c, 0 x000000ff, 0 x33),
RTW89_DECL_RFK_WM(0 x12c0, 0 x0ff00000, 0 x33),
RTW89_DECL_RFK_WM(0 x58f8, 0 x40000000, 0 x1),
RTW89_DECL_RFK_WM(0 x0304, 0 x0000ff00, 0 x1e),
};
RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_sys_a_defs_2g);
static const struct rtw89_reg5_def rtw8852b_tssi_sys_a_defs_5g[] = {
RTW89_DECL_RFK_WM(0 x120c, 0 x000000ff, 0 x44),
RTW89_DECL_RFK_WM(0 x12c0, 0 x0ff00000, 0 x44),
RTW89_DECL_RFK_WM(0 x58f8, 0 x40000000, 0 x0),
RTW89_DECL_RFK_WM(0 x0304, 0 x0000ff00, 0 x1d),
};
RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_sys_a_defs_5g);
static const struct rtw89_reg5_def rtw8852b_tssi_sys_b_defs_2g[] = {
RTW89_DECL_RFK_WM(0 x32c0, 0 x0ff00000, 0 x33),
RTW89_DECL_RFK_WM(0 x320c, 0 x000000ff, 0 x33),
RTW89_DECL_RFK_WM(0 x78f8, 0 x40000000, 0 x1),
RTW89_DECL_RFK_WM(0 x0304, 0 x0000ff00, 0 x1e),
};
RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_sys_b_defs_2g);
static const struct rtw89_reg5_def rtw8852b_tssi_sys_b_defs_5g[] = {
RTW89_DECL_RFK_WM(0 x32c0, 0 x0ff00000, 0 x44),
RTW89_DECL_RFK_WM(0 x320c, 0 x000000ff, 0 x44),
RTW89_DECL_RFK_WM(0 x78f8, 0 x40000000, 0 x0),
RTW89_DECL_RFK_WM(0 x0304, 0 x0000ff00, 0 x1d),
};
RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_sys_b_defs_5g);
static const struct rtw89_reg5_def rtw8852b_tssi_init_txpwr_defs_a[] = {
RTW89_DECL_RFK_WM(0 x566c, 0 x00001000, 0 x0),
RTW89_DECL_RFK_WM(0 x5800, 0 xffffffff, 0 x003f807f),
RTW89_DECL_RFK_WM(0 x580c, 0 x0000007f, 0 x40),
RTW89_DECL_RFK_WM(0 x580c, 0 x0fffff00, 0 x00040),
RTW89_DECL_RFK_WM(0 x5810, 0 xffffffff, 0 x59010000),
RTW89_DECL_RFK_WM(0 x5814, 0 x01ffffff, 0 x002d000),
RTW89_DECL_RFK_WM(0 x5814, 0 xf8000000, 0 x00),
RTW89_DECL_RFK_WM(0 x5818, 0 xffffffff, 0 x002c1800),
RTW89_DECL_RFK_WM(0 x581c, 0 x3fffffff, 0 x1dc80280),
RTW89_DECL_RFK_WM(0 x5820, 0 xffffffff, 0 x00002080),
RTW89_DECL_RFK_WM(0 x580c, 0 x10000000, 0 x1),
RTW89_DECL_RFK_WM(0 x580c, 0 x40000000, 0 x1),
RTW89_DECL_RFK_WM(0 x5834, 0 x3fffffff, 0 x000115f2),
RTW89_DECL_RFK_WM(0 x5838, 0 x7fffffff, 0 x0000121),
RTW89_DECL_RFK_WM(0 x5854, 0 x3fffffff, 0 x000115f2),
RTW89_DECL_RFK_WM(0 x5858, 0 x7fffffff, 0 x0000121),
RTW89_DECL_RFK_WM(0 x5860, 0 x80000000, 0 x0),
RTW89_DECL_RFK_WM(0 x5864, 0 x07ffffff, 0 x00801ff),
RTW89_DECL_RFK_WM(0 x5898, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x589c, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x58a4, 0 x000000ff, 0 x16),
RTW89_DECL_RFK_WM(0 x58b0, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x58b4, 0 x7fffffff, 0 x0a002000),
RTW89_DECL_RFK_WM(0 x58b8, 0 x7fffffff, 0 x00007628),
RTW89_DECL_RFK_WM(0 x58bc, 0 x07ffffff, 0 x7a7807f),
RTW89_DECL_RFK_WM(0 x58c0, 0 xfffe0000, 0 x003f),
RTW89_DECL_RFK_WM(0 x58c4, 0 xffffffff, 0 x0003ffff),
RTW89_DECL_RFK_WM(0 x58c8, 0 x00ffffff, 0 x000000),
RTW89_DECL_RFK_WM(0 x58c8, 0 xf0000000, 0 x0),
RTW89_DECL_RFK_WM(0 x58cc, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x58d0, 0 x07ffffff, 0 x2008101),
RTW89_DECL_RFK_WM(0 x58d4, 0 x000000ff, 0 x00),
RTW89_DECL_RFK_WM(0 x58d4, 0 x0003fe00, 0 x0ff),
RTW89_DECL_RFK_WM(0 x58d4, 0 x07fc0000, 0 x100),
RTW89_DECL_RFK_WM(0 x58d8, 0 xffffffff, 0 x8008016c),
RTW89_DECL_RFK_WM(0 x58dc, 0 x0001ffff, 0 x0807f),
RTW89_DECL_RFK_WM(0 x58dc, 0 xfff00000, 0 x800),
RTW89_DECL_RFK_WM(0 x58f0, 0 x0003ffff, 0 x001ff),
RTW89_DECL_RFK_WM(0 x58f4, 0 x000fffff, 0 x000),
};
RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_init_txpwr_defs_a);
static const struct rtw89_reg5_def rtw8852b_tssi_init_txpwr_defs_b[] = {
RTW89_DECL_RFK_WM(0 x566c, 0 x00001000, 0 x0),
RTW89_DECL_RFK_WM(0 x7800, 0 xffffffff, 0 x003f807f),
RTW89_DECL_RFK_WM(0 x780c, 0 x0000007f, 0 x40),
RTW89_DECL_RFK_WM(0 x780c, 0 x0fffff00, 0 x00040),
RTW89_DECL_RFK_WM(0 x7810, 0 xffffffff, 0 x59010000),
RTW89_DECL_RFK_WM(0 x7814, 0 x01ffffff, 0 x002d000),
RTW89_DECL_RFK_WM(0 x7814, 0 xf8000000, 0 x00),
RTW89_DECL_RFK_WM(0 x7818, 0 xffffffff, 0 x002c1800),
RTW89_DECL_RFK_WM(0 x781c, 0 x3fffffff, 0 x1dc80280),
RTW89_DECL_RFK_WM(0 x7820, 0 xffffffff, 0 x00002080),
RTW89_DECL_RFK_WM(0 x780c, 0 x10000000, 0 x1),
RTW89_DECL_RFK_WM(0 x780c, 0 x40000000, 0 x1),
RTW89_DECL_RFK_WM(0 x7834, 0 x3fffffff, 0 x000115f2),
RTW89_DECL_RFK_WM(0 x7838, 0 x7fffffff, 0 x0000121),
RTW89_DECL_RFK_WM(0 x7854, 0 x3fffffff, 0 x000115f2),
RTW89_DECL_RFK_WM(0 x7858, 0 x7fffffff, 0 x0000121),
RTW89_DECL_RFK_WM(0 x7860, 0 x80000000, 0 x0),
RTW89_DECL_RFK_WM(0 x7864, 0 x07ffffff, 0 x00801ff),
RTW89_DECL_RFK_WM(0 x7898, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x789c, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x78a4, 0 x000000ff, 0 x16),
RTW89_DECL_RFK_WM(0 x78b0, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x78b4, 0 x7fffffff, 0 x0a002000),
RTW89_DECL_RFK_WM(0 x78b8, 0 x7fffffff, 0 x00007628),
RTW89_DECL_RFK_WM(0 x78bc, 0 x07ffffff, 0 x7a7807f),
RTW89_DECL_RFK_WM(0 x78c0, 0 xfffe0000, 0 x003f),
RTW89_DECL_RFK_WM(0 x78c4, 0 xffffffff, 0 x0003ffff),
RTW89_DECL_RFK_WM(0 x78c8, 0 x00ffffff, 0 x000000),
RTW89_DECL_RFK_WM(0 x78c8, 0 xf0000000, 0 x0),
RTW89_DECL_RFK_WM(0 x78cc, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x78d0, 0 x07ffffff, 0 x2008101),
RTW89_DECL_RFK_WM(0 x78d4, 0 x000000ff, 0 x00),
RTW89_DECL_RFK_WM(0 x78d4, 0 x0003fe00, 0 x0ff),
RTW89_DECL_RFK_WM(0 x78d4, 0 x07fc0000, 0 x100),
RTW89_DECL_RFK_WM(0 x78d8, 0 xffffffff, 0 x8008016c),
RTW89_DECL_RFK_WM(0 x78dc, 0 x0001ffff, 0 x0807f),
RTW89_DECL_RFK_WM(0 x78dc, 0 xfff00000, 0 x800),
RTW89_DECL_RFK_WM(0 x78f0, 0 x0003ffff, 0 x001ff),
RTW89_DECL_RFK_WM(0 x78f4, 0 x000fffff, 0 x000),
};
RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_init_txpwr_defs_b);
static const struct rtw89_reg5_def rtw8852b_tssi_init_txpwr_he_tb_defs_a[] = {
RTW89_DECL_RFK_WM(0 x58a0, 0 xffffffff, 0 x000000fe),
RTW89_DECL_RFK_WM(0 x58e4, 0 x0000007f, 0 x1f),
};
RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_init_txpwr_he_tb_defs_a);
static const struct rtw89_reg5_def rtw8852b_tssi_init_txpwr_he_tb_defs_b[] = {
RTW89_DECL_RFK_WM(0 x78a0, 0 xffffffff, 0 x000000fe),
RTW89_DECL_RFK_WM(0 x78e4, 0 x0000007f, 0 x1f),
};
RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_init_txpwr_he_tb_defs_b);
static const struct rtw89_reg5_def rtw8852b_tssi_dck_defs_a[] = {
RTW89_DECL_RFK_WM(0 x580c, 0 x0fff0000, 0 x000),
RTW89_DECL_RFK_WM(0 x5814, 0 x003ff000, 0 x0ef),
RTW89_DECL_RFK_WM(0 x5814, 0 x18000000, 0 x0),
};
RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_dck_defs_a);
static const struct rtw89_reg5_def rtw8852b_tssi_dck_defs_b[] = {
RTW89_DECL_RFK_WM(0 x780c, 0 x0fff0000, 0 x000),
RTW89_DECL_RFK_WM(0 x7814, 0 x003ff000, 0 x0ef),
RTW89_DECL_RFK_WM(0 x7814, 0 x18000000, 0 x0),
};
RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_dck_defs_b);
static const struct rtw89_reg5_def rtw8852b_tssi_dac_gain_defs_a[] = {
RTW89_DECL_RFK_WM(0 x58b0, 0 x00000400, 0 x1),
RTW89_DECL_RFK_WM(0 x58b0, 0 x00000fff, 0 x000),
RTW89_DECL_RFK_WM(0 x58b0, 0 x00000800, 0 x1),
RTW89_DECL_RFK_WM(0 x5a00, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x5a04, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x5a08, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x5a0c, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x5a10, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x5a14, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x5a18, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x5a1c, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x5a20, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x5a24, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x5a28, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x5a2c, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x5a30, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x5a34, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x5a38, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x5a3c, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x5a40, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x5a44, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x5a48, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x5a4c, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x5a50, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x5a54, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x5a58, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x5a5c, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x5a60, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x5a64, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x5a68, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x5a6c, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x5a70, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x5a74, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x5a78, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x5a7c, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x5a80, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x5a84, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x5a88, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x5a8c, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x5a90, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x5a94, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x5a98, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x5a9c, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x5aa0, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x5aa4, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x5aa8, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x5aac, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x5ab0, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x5ab4, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x5ab8, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x5abc, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x5ac0, 0 xffffffff, 0 x00000000),
};
RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_dac_gain_defs_a);
static const struct rtw89_reg5_def rtw8852b_tssi_dac_gain_defs_b[] = {
RTW89_DECL_RFK_WM(0 x78b0, 0 x00000fff, 0 x000),
RTW89_DECL_RFK_WM(0 x78b0, 0 x00000800, 0 x1),
RTW89_DECL_RFK_WM(0 x7a00, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x7a04, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x7a08, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x7a0c, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x7a10, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x7a14, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x7a18, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x7a1c, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x7a20, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x7a24, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x7a28, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x7a2c, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x7a30, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x7a34, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x7a38, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x7a3c, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x7a40, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x7a44, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x7a48, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x7a4c, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x7a50, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x7a54, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x7a58, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x7a5c, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x7a60, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x7a64, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x7a68, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x7a6c, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x7a70, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x7a74, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x7a78, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x7a7c, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x7a80, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x7a84, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x7a88, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x7a8c, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x7a90, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x7a94, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x7a98, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x7a9c, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x7aa0, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x7aa4, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x7aa8, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x7aac, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x7ab0, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x7ab4, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x7ab8, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x7abc, 0 xffffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x7ac0, 0 xffffffff, 0 x00000000),
};
RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_dac_gain_defs_b);
static const struct rtw89_reg5_def rtw8852b_tssi_slope_a_defs_2g[] = {
RTW89_DECL_RFK_WM(0 x5608, 0 x07ffffff, 0 x0801008),
RTW89_DECL_RFK_WM(0 x560c, 0 x07ffffff, 0 x0201020),
RTW89_DECL_RFK_WM(0 x5610, 0 x07ffffff, 0 x0201008),
RTW89_DECL_RFK_WM(0 x5614, 0 x07ffffff, 0 x0804008),
RTW89_DECL_RFK_WM(0 x5618, 0 x07ffffff, 0 x0201008),
RTW89_DECL_RFK_WM(0 x561c, 0 x000001ff, 0 x008),
RTW89_DECL_RFK_WM(0 x561c, 0 xffff0000, 0 x0808),
RTW89_DECL_RFK_WM(0 x5620, 0 xffffffff, 0 x08081e28),
RTW89_DECL_RFK_WM(0 x5624, 0 xffffffff, 0 x08080808),
RTW89_DECL_RFK_WM(0 x5628, 0 xffffffff, 0 x08081e28),
RTW89_DECL_RFK_WM(0 x562c, 0 x0000ffff, 0 x0808),
RTW89_DECL_RFK_WM(0 x581c, 0 x00100000, 0 x1),
};
RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_slope_a_defs_2g);
static const struct rtw89_reg5_def rtw8852b_tssi_slope_a_defs_5g[] = {
RTW89_DECL_RFK_WM(0 x5608, 0 x07ffffff, 0 x0201008),
RTW89_DECL_RFK_WM(0 x560c, 0 x07ffffff, 0 x0201020),
RTW89_DECL_RFK_WM(0 x5610, 0 x07ffffff, 0 x0201008),
RTW89_DECL_RFK_WM(0 x5614, 0 x07ffffff, 0 x0201008),
RTW89_DECL_RFK_WM(0 x5618, 0 x07ffffff, 0 x0201008),
RTW89_DECL_RFK_WM(0 x561c, 0 x000001ff, 0 x008),
RTW89_DECL_RFK_WM(0 x561c, 0 xffff0000, 0 x0808),
RTW89_DECL_RFK_WM(0 x5620, 0 xffffffff, 0 x08081e08),
RTW89_DECL_RFK_WM(0 x5624, 0 xffffffff, 0 x08080808),
RTW89_DECL_RFK_WM(0 x5628, 0 xffffffff, 0 x08080808),
RTW89_DECL_RFK_WM(0 x562c, 0 x0000ffff, 0 x0808),
RTW89_DECL_RFK_WM(0 x581c, 0 x00100000, 0 x1),
};
RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_slope_a_defs_5g);
static const struct rtw89_reg5_def rtw8852b_tssi_slope_b_defs_2g[] = {
RTW89_DECL_RFK_WM(0 x7608, 0 x07ffffff, 0 x0801008),
RTW89_DECL_RFK_WM(0 x760c, 0 x07ffffff, 0 x0201020),
RTW89_DECL_RFK_WM(0 x7610, 0 x07ffffff, 0 x0201008),
RTW89_DECL_RFK_WM(0 x7614, 0 x07ffffff, 0 x0804008),
RTW89_DECL_RFK_WM(0 x7618, 0 x07ffffff, 0 x0201008),
RTW89_DECL_RFK_WM(0 x761c, 0 x000001ff, 0 x008),
RTW89_DECL_RFK_WM(0 x761c, 0 xffff0000, 0 x0808),
RTW89_DECL_RFK_WM(0 x7620, 0 xffffffff, 0 x08081e28),
RTW89_DECL_RFK_WM(0 x7624, 0 xffffffff, 0 x08080808),
RTW89_DECL_RFK_WM(0 x7628, 0 xffffffff, 0 x08081e28),
RTW89_DECL_RFK_WM(0 x762c, 0 x0000ffff, 0 x0808),
RTW89_DECL_RFK_WM(0 x781c, 0 x00100000, 0 x1),
};
RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_slope_b_defs_2g);
static const struct rtw89_reg5_def rtw8852b_tssi_slope_b_defs_5g[] = {
RTW89_DECL_RFK_WM(0 x7608, 0 x07ffffff, 0 x0201008),
RTW89_DECL_RFK_WM(0 x760c, 0 x07ffffff, 0 x0201020),
RTW89_DECL_RFK_WM(0 x7610, 0 x07ffffff, 0 x0201008),
RTW89_DECL_RFK_WM(0 x7614, 0 x07ffffff, 0 x0201008),
RTW89_DECL_RFK_WM(0 x7618, 0 x07ffffff, 0 x0201008),
RTW89_DECL_RFK_WM(0 x761c, 0 x000001ff, 0 x008),
RTW89_DECL_RFK_WM(0 x761c, 0 xffff0000, 0 x0808),
RTW89_DECL_RFK_WM(0 x7620, 0 xffffffff, 0 x08081e08),
RTW89_DECL_RFK_WM(0 x7624, 0 xffffffff, 0 x08080808),
RTW89_DECL_RFK_WM(0 x7628, 0 xffffffff, 0 x08080808),
RTW89_DECL_RFK_WM(0 x762c, 0 x0000ffff, 0 x0808),
RTW89_DECL_RFK_WM(0 x781c, 0 x00100000, 0 x1),
};
RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_slope_b_defs_5g);
static const struct rtw89_reg5_def rtw8852b_tssi_align_a_2g_all_defs[] = {
RTW89_DECL_RFK_WM(0 x5604, 0 x80000000, 0 x1),
RTW89_DECL_RFK_WM(0 x5600, 0 x3fffffff, 0 x3f2d2721),
RTW89_DECL_RFK_WM(0 x5604, 0 x003fffff, 0 x010101),
RTW89_DECL_RFK_WM(0 x5630, 0 x3fffffff, 0 x01ef27af),
RTW89_DECL_RFK_WM(0 x5634, 0 x3fffffff, 0 x00000075),
RTW89_DECL_RFK_WM(0 x5638, 0 x000fffff, 0 x00000),
RTW89_DECL_RFK_WM(0 x563c, 0 x3fffffff, 0 x017f13ae),
RTW89_DECL_RFK_WM(0 x5640, 0 x3fffffff, 0 x0000006e),
RTW89_DECL_RFK_WM(0 x5644, 0 x000fffff, 0 x00000),
};
RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_align_a_2g_all_defs);
static const struct rtw89_reg5_def rtw8852b_tssi_align_a_2g_part_defs[] = {
RTW89_DECL_RFK_WM(0 x5630, 0 x3fffffff, 0 x01ef27af),
RTW89_DECL_RFK_WM(0 x5634, 0 x3fffffff, 0 x00000075),
RTW89_DECL_RFK_WM(0 x563c, 0 x3fffffff, 0 x017f13ae),
RTW89_DECL_RFK_WM(0 x5640, 0 x3fffffff, 0 x0000006e),
};
RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_align_a_2g_part_defs);
static const struct rtw89_reg5_def rtw8852b_tssi_align_a_5g1_all_defs[] = {
RTW89_DECL_RFK_WM(0 x5604, 0 x80000000, 0 x1),
RTW89_DECL_RFK_WM(0 x5600, 0 x3fffffff, 0 x3f2d2721),
RTW89_DECL_RFK_WM(0 x5604, 0 x003fffff, 0 x010101),
RTW89_DECL_RFK_WM(0 x5630, 0 x3fffffff, 0 x016037e7),
RTW89_DECL_RFK_WM(0 x5634, 0 x3fffffff, 0 x0000006f),
RTW89_DECL_RFK_WM(0 x5638, 0 x000fffff, 0 x00000),
RTW89_DECL_RFK_WM(0 x563c, 0 x3fffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x5640, 0 x3fffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x5644, 0 x000fffff, 0 x00000),
};
RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_align_a_5g1_all_defs);
static const struct rtw89_reg5_def rtw8852b_tssi_align_a_5g1_part_defs[] = {
RTW89_DECL_RFK_WM(0 x5630, 0 x3fffffff, 0 x016037e7),
RTW89_DECL_RFK_WM(0 x5634, 0 x3fffffff, 0 x0000006f),
RTW89_DECL_RFK_WM(0 x563c, 0 x3fffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x5640, 0 x3fffffff, 0 x00000000),
};
RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_align_a_5g1_part_defs);
static const struct rtw89_reg5_def rtw8852b_tssi_align_a_5g2_all_defs[] = {
RTW89_DECL_RFK_WM(0 x5604, 0 x80000000, 0 x1),
RTW89_DECL_RFK_WM(0 x5600, 0 x3fffffff, 0 x3f2d2721),
RTW89_DECL_RFK_WM(0 x5604, 0 x003fffff, 0 x010101),
RTW89_DECL_RFK_WM(0 x5630, 0 x3fffffff, 0 x01f053f1),
RTW89_DECL_RFK_WM(0 x5634, 0 x3fffffff, 0 x00000070),
RTW89_DECL_RFK_WM(0 x5638, 0 x000fffff, 0 x00000),
RTW89_DECL_RFK_WM(0 x563c, 0 x3fffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x5640, 0 x3fffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x5644, 0 x000fffff, 0 x00000),
};
RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_align_a_5g2_all_defs);
static const struct rtw89_reg5_def rtw8852b_tssi_align_a_5g2_part_defs[] = {
RTW89_DECL_RFK_WM(0 x5630, 0 x3fffffff, 0 x01f053f1),
RTW89_DECL_RFK_WM(0 x5634, 0 x3fffffff, 0 x00000070),
RTW89_DECL_RFK_WM(0 x563c, 0 x3fffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x5640, 0 x3fffffff, 0 x00000000),
};
RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_align_a_5g2_part_defs);
static const struct rtw89_reg5_def rtw8852b_tssi_align_a_5g3_all_defs[] = {
RTW89_DECL_RFK_WM(0 x5604, 0 x80000000, 0 x1),
RTW89_DECL_RFK_WM(0 x5600, 0 x3fffffff, 0 x3f2d2721),
RTW89_DECL_RFK_WM(0 x5604, 0 x003fffff, 0 x010101),
RTW89_DECL_RFK_WM(0 x5630, 0 x3fffffff, 0 x01c047ee),
RTW89_DECL_RFK_WM(0 x5634, 0 x3fffffff, 0 x00000070),
RTW89_DECL_RFK_WM(0 x5638, 0 x000fffff, 0 x00000),
RTW89_DECL_RFK_WM(0 x563c, 0 x3fffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x5640, 0 x3fffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x5644, 0 x000fffff, 0 x00000),
};
RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_align_a_5g3_all_defs);
static const struct rtw89_reg5_def rtw8852b_tssi_align_a_5g3_part_defs[] = {
RTW89_DECL_RFK_WM(0 x5630, 0 x3fffffff, 0 x01c047ee),
RTW89_DECL_RFK_WM(0 x5634, 0 x3fffffff, 0 x00000070),
RTW89_DECL_RFK_WM(0 x563c, 0 x3fffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x5640, 0 x3fffffff, 0 x00000000),
};
RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_align_a_5g3_part_defs);
static const struct rtw89_reg5_def rtw8852b_tssi_align_b_2g_all_defs[] = {
RTW89_DECL_RFK_WM(0 x7604, 0 x80000000, 0 x1),
RTW89_DECL_RFK_WM(0 x7600, 0 x3fffffff, 0 x3f2d2721),
RTW89_DECL_RFK_WM(0 x7604, 0 x003fffff, 0 x010101),
RTW89_DECL_RFK_WM(0 x7630, 0 x3fffffff, 0 x01ff2bb5),
RTW89_DECL_RFK_WM(0 x7634, 0 x3fffffff, 0 x00000078),
RTW89_DECL_RFK_WM(0 x7638, 0 x000fffff, 0 x00000),
RTW89_DECL_RFK_WM(0 x763c, 0 x3fffffff, 0 x018f2bb0),
RTW89_DECL_RFK_WM(0 x7640, 0 x3fffffff, 0 x00000072),
RTW89_DECL_RFK_WM(0 x7644, 0 x000fffff, 0 x00000),
};
RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_align_b_2g_all_defs);
static const struct rtw89_reg5_def rtw8852b_tssi_align_b_2g_part_defs[] = {
RTW89_DECL_RFK_WM(0 x7630, 0 x3fffffff, 0 x01ff2bb5),
RTW89_DECL_RFK_WM(0 x7634, 0 x3fffffff, 0 x00000078),
RTW89_DECL_RFK_WM(0 x763c, 0 x3fffffff, 0 x018f2bb0),
RTW89_DECL_RFK_WM(0 x7640, 0 x3fffffff, 0 x00000072),
};
RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_align_b_2g_part_defs);
static const struct rtw89_reg5_def rtw8852b_tssi_align_b_5g1_all_defs[] = {
RTW89_DECL_RFK_WM(0 x7604, 0 x80000000, 0 x1),
RTW89_DECL_RFK_WM(0 x7600, 0 x3fffffff, 0 x3f2d2721),
RTW89_DECL_RFK_WM(0 x7604, 0 x003fffff, 0 x010101),
RTW89_DECL_RFK_WM(0 x7630, 0 x3fffffff, 0 x009003da),
RTW89_DECL_RFK_WM(0 x7634, 0 x3fffffff, 0 x00000069),
RTW89_DECL_RFK_WM(0 x7638, 0 x000fffff, 0 x00000),
RTW89_DECL_RFK_WM(0 x763c, 0 x3fffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x7640, 0 x3fffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x7644, 0 x000fffff, 0 x00000),
};
RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_align_b_5g1_all_defs);
static const struct rtw89_reg5_def rtw8852b_tssi_align_b_5g1_part_defs[] = {
RTW89_DECL_RFK_WM(0 x7630, 0 x3fffffff, 0 x009003da),
RTW89_DECL_RFK_WM(0 x7634, 0 x3fffffff, 0 x00000069),
RTW89_DECL_RFK_WM(0 x763c, 0 x3fffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x7640, 0 x3fffffff, 0 x00000000),
};
RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_align_b_5g1_part_defs);
static const struct rtw89_reg5_def rtw8852b_tssi_align_b_5g2_all_defs[] = {
RTW89_DECL_RFK_WM(0 x7604, 0 x80000000, 0 x1),
RTW89_DECL_RFK_WM(0 x7600, 0 x3fffffff, 0 x3f2d2721),
RTW89_DECL_RFK_WM(0 x7604, 0 x003fffff, 0 x010101),
RTW89_DECL_RFK_WM(0 x7630, 0 x3fffffff, 0 x013027e6),
RTW89_DECL_RFK_WM(0 x7634, 0 x3fffffff, 0 x00000069),
RTW89_DECL_RFK_WM(0 x7638, 0 x000fffff, 0 x00000),
RTW89_DECL_RFK_WM(0 x763c, 0 x3fffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x7640, 0 x3fffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x7644, 0 x000fffff, 0 x00000),
};
RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_align_b_5g2_all_defs);
static const struct rtw89_reg5_def rtw8852b_tssi_align_b_5g2_part_defs[] = {
RTW89_DECL_RFK_WM(0 x7630, 0 x3fffffff, 0 x013027e6),
RTW89_DECL_RFK_WM(0 x7634, 0 x3fffffff, 0 x00000069),
RTW89_DECL_RFK_WM(0 x763c, 0 x3fffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x7640, 0 x3fffffff, 0 x00000000),
};
RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_align_b_5g2_part_defs);
static const struct rtw89_reg5_def rtw8852b_tssi_align_b_5g3_all_defs[] = {
RTW89_DECL_RFK_WM(0 x7604, 0 x80000000, 0 x1),
RTW89_DECL_RFK_WM(0 x7600, 0 x3fffffff, 0 x3f2d2721),
RTW89_DECL_RFK_WM(0 x7604, 0 x003fffff, 0 x010101),
RTW89_DECL_RFK_WM(0 x7630, 0 x3fffffff, 0 x009003da),
RTW89_DECL_RFK_WM(0 x7634, 0 x3fffffff, 0 x00000069),
RTW89_DECL_RFK_WM(0 x7638, 0 x000fffff, 0 x00000),
RTW89_DECL_RFK_WM(0 x763c, 0 x3fffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x7640, 0 x3fffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x7644, 0 x000fffff, 0 x00000),
};
RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_align_b_5g3_all_defs);
static const struct rtw89_reg5_def rtw8852b_tssi_align_b_5g3_part_defs[] = {
RTW89_DECL_RFK_WM(0 x7630, 0 x3fffffff, 0 x009003da),
RTW89_DECL_RFK_WM(0 x7634, 0 x3fffffff, 0 x00000069),
RTW89_DECL_RFK_WM(0 x763c, 0 x3fffffff, 0 x00000000),
RTW89_DECL_RFK_WM(0 x7640, 0 x3fffffff, 0 x00000000),
};
RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_align_b_5g3_part_defs);
static const struct rtw89_reg5_def rtw8852b_tssi_slope_defs_a[] = {
RTW89_DECL_RFK_WM(0 x5814, 0 x00000800, 0 x1),
RTW89_DECL_RFK_WM(0 x581c, 0 x20000000, 0 x1),
RTW89_DECL_RFK_WM(0 x5814, 0 x20000000, 0 x1),
};
RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_slope_defs_a);
static const struct rtw89_reg5_def rtw8852b_tssi_slope_defs_b[] = {
RTW89_DECL_RFK_WM(0 x7814, 0 x00000800, 0 x1),
RTW89_DECL_RFK_WM(0 x781c, 0 x20000000, 0 x1),
RTW89_DECL_RFK_WM(0 x7814, 0 x20000000, 0 x1),
};
RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_slope_defs_b);
Messung V0.5 in Prozent C=95 H=94 G=94
¤ Dauer der Verarbeitung: 0.14 Sekunden
(vorverarbeitet am 2026-06-07)
¤
*© Formatika GbR, Deutschland