/** * fimc_pipeline_prepare - update pipeline information with subdevice pointers * @p: fimc pipeline * @me: media entity terminating the pipeline * * Caller holds the graph mutex.
*/ staticvoid fimc_pipeline_prepare(struct fimc_pipeline *p, struct media_entity *me)
{ struct fimc_md *fmd = entity_to_fimc_mdev(me); struct v4l2_subdev *sd; struct v4l2_subdev *sensor = NULL; int i;
for (i = 0; i < IDX_MAX; i++)
p->subdevs[i] = NULL;
while (1) { struct media_pad *pad = NULL;
/* Find remote source pad */ for (i = 0; i < me->num_pads; i++) { struct media_pad *spad = &me->pads[i]; if (!(spad->flags & MEDIA_PAD_FL_SINK)) continue;
pad = media_pad_remote_pad_first(spad); if (pad) break;
}
if (!pad || !is_media_entity_v4l2_subdev(pad->entity)) break;
sd = media_entity_to_v4l2_subdev(pad->entity);
switch (sd->grp_id) { case GRP_ID_SENSOR:
sensor = sd;
fallthrough; case GRP_ID_FIMC_IS_SENSOR:
p->subdevs[IDX_SENSOR] = sd; break; case GRP_ID_CSIS:
p->subdevs[IDX_CSIS] = sd; break; case GRP_ID_FLITE:
p->subdevs[IDX_FLITE] = sd; break; case GRP_ID_FIMC:
p->subdevs[IDX_FIMC] = sd; break; case GRP_ID_FIMC_IS:
p->subdevs[IDX_IS_ISP] = sd; break; default: break;
}
me = &sd->entity; if (me->num_pads == 1) break;
}
if (sensor && p->subdevs[IDX_FIMC])
__setup_sensor_notification(fmd, sensor, p->subdevs[IDX_FIMC]);
}
/** * __subdev_set_power - change power state of a single subdev * @sd: subdevice to change power state for * @on: 1 to enable power or 0 to disable * * Return result of s_power subdev operation or -ENXIO if sd argument * is NULL. Return 0 if the subdevice does not implement s_power.
*/ staticint __subdev_set_power(struct v4l2_subdev *sd, int on)
{ int *use_count; int ret;
if (sd == NULL) return -ENXIO;
use_count = &sd->entity.use_count; if (on && (*use_count)++ > 0) return 0; elseif (!on && (*use_count == 0 || --(*use_count) > 0)) return 0;
ret = v4l2_subdev_call(sd, core, s_power, on);
return ret != -ENOIOCTLCMD ? ret : 0;
}
/** * fimc_pipeline_s_power - change power state of all pipeline subdevs * @p: fimc device terminating the pipeline * @on: true to power on, false to power off * * Needs to be called with the graph mutex held.
*/ staticint fimc_pipeline_s_power(struct fimc_pipeline *p, bool on)
{ staticconst u8 seq[2][IDX_MAX - 1] = {
{ IDX_IS_ISP, IDX_SENSOR, IDX_CSIS, IDX_FLITE },
{ IDX_CSIS, IDX_FLITE, IDX_SENSOR, IDX_IS_ISP },
}; int i, ret = 0;
if (p->subdevs[IDX_SENSOR] == NULL) return -ENXIO;
for (i = 0; i < IDX_MAX - 1; i++) { unsignedint idx = seq[on][i];
ret = __subdev_set_power(p->subdevs[idx], on);
if (ret < 0 && ret != -ENXIO) goto error;
} return 0;
error: for (; i >= 0; i--) { unsignedint idx = seq[on][i];
__subdev_set_power(p->subdevs[idx], !on);
} return ret;
}
/** * __fimc_pipeline_enable - enable power of all pipeline subdevs * and the sensor clock * @ep: video pipeline structure * @fmd: fimc media device * * Called with the graph mutex held.
*/ staticint __fimc_pipeline_enable(struct exynos_media_pipeline *ep, struct fimc_md *fmd)
{ struct fimc_pipeline *p = to_fimc_pipeline(ep); int ret;
/* Enable PXLASYNC clock if this pipeline includes FIMC-IS */ if (!IS_ERR(fmd->wbclk[CLK_IDX_WB_B]) && p->subdevs[IDX_IS_ISP]) {
ret = clk_prepare_enable(fmd->wbclk[CLK_IDX_WB_B]); if (ret < 0) return ret;
}
ret = fimc_pipeline_s_power(p, 1); if (!ret) return 0;
if (!IS_ERR(fmd->wbclk[CLK_IDX_WB_B]) && p->subdevs[IDX_IS_ISP])
clk_disable_unprepare(fmd->wbclk[CLK_IDX_WB_B]);
return ret;
}
/** * __fimc_pipeline_open - update the pipeline information, enable power * of all pipeline subdevs and the sensor clock * @ep: fimc device terminating the pipeline * @me: media entity to start graph walk with * @prepare: true to walk the current pipeline and acquire all subdevs * * Called with the graph mutex held.
*/ staticint __fimc_pipeline_open(struct exynos_media_pipeline *ep, struct media_entity *me, bool prepare)
{ struct fimc_md *fmd = entity_to_fimc_mdev(me); struct fimc_pipeline *p = to_fimc_pipeline(ep); struct v4l2_subdev *sd;
if (WARN_ON(p == NULL || me == NULL)) return -EINVAL;
if (prepare)
fimc_pipeline_prepare(p, me);
sd = p->subdevs[IDX_SENSOR]; if (sd == NULL) {
pr_warn("%s(): No sensor subdev\n", __func__); /* * Pipeline open cannot fail so as to make it possible * for the user space to configure the pipeline.
*/ return 0;
}
return __fimc_pipeline_enable(ep, fmd);
}
/** * __fimc_pipeline_close - disable the sensor clock and pipeline power * @ep: fimc device terminating the pipeline * * Disable power of all subdevs and turn the external sensor clock off.
*/ staticint __fimc_pipeline_close(struct exynos_media_pipeline *ep)
{ struct fimc_pipeline *p = to_fimc_pipeline(ep); struct v4l2_subdev *sd = p ? p->subdevs[IDX_SENSOR] : NULL; struct fimc_md *fmd; int ret;
if (sd == NULL) {
pr_warn("%s(): No sensor subdev\n", __func__); return 0;
}
ret = fimc_pipeline_s_power(p, 0);
fmd = entity_to_fimc_mdev(&sd->entity);
/* Disable PXLASYNC clock if this pipeline includes FIMC-IS */ if (!IS_ERR(fmd->wbclk[CLK_IDX_WB_B]) && p->subdevs[IDX_IS_ISP])
clk_disable_unprepare(fmd->wbclk[CLK_IDX_WB_B]);
return ret == -ENXIO ? 0 : ret;
}
/** * __fimc_pipeline_s_stream - call s_stream() on pipeline subdevs * @ep: video pipeline structure * @on: passed as the s_stream() callback argument
*/ staticint __fimc_pipeline_s_stream(struct exynos_media_pipeline *ep, bool on)
{ staticconst u8 seq[2][IDX_MAX] = {
{ IDX_FIMC, IDX_SENSOR, IDX_IS_ISP, IDX_CSIS, IDX_FLITE },
{ IDX_CSIS, IDX_FLITE, IDX_FIMC, IDX_SENSOR, IDX_IS_ISP },
}; struct fimc_pipeline *p = to_fimc_pipeline(ep); enum fimc_subdev_index sd_id; int i, ret = 0;
ret = v4l2_fwnode_endpoint_parse(of_fwnode_handle(ep), &endpoint); if (ret) {
of_node_put(ep); return ret;
}
if (WARN_ON(endpoint.base.port == 0) || index >= FIMC_MAX_SENSORS) {
of_node_put(ep); return -EINVAL;
}
pd->mux_id = (endpoint.base.port - 1) & 0x1;
rem = of_graph_get_remote_port_parent(ep); if (rem == NULL) {
v4l2_info(&fmd->v4l2_dev, "Remote device at %pOF not found\n",
ep);
of_node_put(ep); return 0;
}
if (fimc_input_is_parallel(endpoint.base.port)) { if (endpoint.bus_type == V4L2_MBUS_PARALLEL)
pd->sensor_bus_type = FIMC_BUS_TYPE_ITU_601; else
pd->sensor_bus_type = FIMC_BUS_TYPE_ITU_656;
pd->flags = endpoint.bus.parallel.flags;
} elseif (fimc_input_is_mipi_csi(endpoint.base.port)) { /* * MIPI CSI-2: only input mux selection and * the sensor's clock frequency is needed.
*/
pd->sensor_bus_type = FIMC_BUS_TYPE_MIPI_CSI2;
} else {
v4l2_err(&fmd->v4l2_dev, "Wrong port id (%u) at node %pOF\n",
endpoint.base.port, rem);
} /* * For FIMC-IS handled sensors, that are placed under i2c-isp device * node, FIMC is connected to the FIMC-IS through its ISP Writeback * input. Sensors are attached to the FIMC-LITE hostdata interface * directly or through MIPI-CSIS, depending on the external media bus * used. This needs to be handled in a more reliable way, not by just * checking parent's node name.
*/
np = of_get_parent(rem);
of_node_put(rem);
/* Parse port node and register as a sub-device any sensor specified there. */ staticint fimc_md_parse_port_node(struct fimc_md *fmd, struct device_node *port)
{ int ret;
for_each_child_of_node_scoped(port, ep) {
ret = fimc_md_parse_one_endpoint(fmd, ep); if (ret < 0) return ret;
}
if (!of_node_name_eq(node, "csis")) continue; /* The csis node can have only port subnode. */
port = of_get_next_child(node, NULL); if (!port) continue;
ret = fimc_md_parse_port_node(fmd, port);
of_node_put(port); if (ret < 0) goto cleanup;
}
/* Attach sensors listed in the parallel-ports node */
ports = of_get_child_by_name(parent, "parallel-ports"); if (!ports) goto rpm_put;
for_each_child_of_node_scoped(ports, node) {
ret = fimc_md_parse_port_node(fmd, node); if (ret < 0) goto cleanup;
}
of_node_put(ports);
/* Allocate pipeline object for the ISP capture video node. */
ep = fimc_md_pipeline_create(fmd); if (!ep) return -ENOMEM;
v4l2_set_subdev_hostdata(sd, ep);
ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd); if (ret) {
v4l2_err(&fmd->v4l2_dev, "Failed to register FIMC-ISP (%d)\n", ret); return ret;
}
fmd->fimc_is = is; return 0;
}
staticint fimc_md_register_platform_entity(struct fimc_md *fmd, struct platform_device *pdev, int plat_entity)
{ struct device *dev = &pdev->dev; int ret = -EPROBE_DEFER; void *drvdata;
/* Lock to ensure dev->driver won't change. */
device_lock(dev);
if (!dev->driver || !try_module_get(dev->driver->owner)) goto dev_unlock;
drvdata = dev_get_drvdata(dev); /* Some subdev didn't probe successfully id drvdata is NULL */ if (drvdata) { switch (plat_entity) { case IDX_FIMC:
ret = register_fimc_entity(fmd, drvdata); break; case IDX_FLITE:
ret = register_fimc_lite_entity(fmd, drvdata); break; case IDX_CSIS:
ret = register_csis_entity(fmd, pdev, drvdata); break; case IDX_IS_ISP:
ret = register_fimc_is_entity(fmd, drvdata); break; default:
ret = -ENODEV;
}
}
/* Register FIMC, FIMC-LITE and CSIS media entities */ staticint fimc_md_register_platform_entities(struct fimc_md *fmd, struct device_node *parent)
{ int ret = 0;
for_each_available_child_of_node_scoped(parent, node) { struct platform_device *pdev; int plat_entity = -1;
pdev = of_find_device_by_node(node); if (!pdev) continue;
/* If driver of any entity isn't ready try all again later. */ if (of_node_name_eq(node, CSIS_OF_NODE_NAME))
plat_entity = IDX_CSIS; elseif (of_node_name_eq(node, FIMC_IS_OF_NODE_NAME))
plat_entity = IDX_IS_ISP; elseif (of_node_name_eq(node, FIMC_LITE_OF_NODE_NAME))
plat_entity = IDX_FLITE; elseif (of_node_name_eq(node, FIMC_OF_NODE_NAME) &&
!of_property_read_bool(node, "samsung,lcd-wb"))
plat_entity = IDX_FIMC;
if (plat_entity >= 0)
ret = fimc_md_register_platform_entity(fmd, pdev,
plat_entity);
put_device(&pdev->dev); if (ret < 0) break;
}
return ret;
}
staticvoid fimc_md_unregister_entities(struct fimc_md *fmd)
{ int i;
for (i = 0; i < FIMC_MAX_DEVS; i++) { struct fimc_dev *dev = fmd->fimc[i]; if (dev == NULL) continue;
v4l2_device_unregister_subdev(&dev->vid_cap.subdev);
dev->vid_cap.ve.pipe = NULL;
fmd->fimc[i] = NULL;
} for (i = 0; i < FIMC_LITE_MAX_DEVS; i++) { struct fimc_lite *dev = fmd->fimc_lite[i]; if (dev == NULL) continue;
v4l2_device_unregister_subdev(&dev->subdev);
dev->ve.pipe = NULL;
fmd->fimc_lite[i] = NULL;
} for (i = 0; i < CSIS_MAX_ENTITIES; i++) { if (fmd->csis[i].sd == NULL) continue;
v4l2_device_unregister_subdev(fmd->csis[i].sd);
fmd->csis[i].sd = NULL;
}
if (fmd->fimc_is)
v4l2_device_unregister_subdev(&fmd->fimc_is->isp.subdev);
v4l2_info(&fmd->v4l2_dev, "Unregistered all entities\n");
}
/** * __fimc_md_create_fimc_sink_links - create links to all FIMC entities * @fmd: fimc media device * @source: the source entity to create links to all fimc entities from * @sensor: sensor subdev linked to FIMC[fimc_id] entity, may be null * @pad: the source entity pad index * @link_mask: bitmask of the fimc devices for which link should be enabled
*/ staticint __fimc_md_create_fimc_sink_links(struct fimc_md *fmd, struct media_entity *source, struct v4l2_subdev *sensor, int pad, int link_mask)
{ struct fimc_source_info *si = NULL; struct media_entity *sink; unsignedint flags = 0; int i, ret = 0;
if (sensor) {
si = v4l2_get_subdev_hostdata(sensor); /* Skip direct FIMC links in the logical FIMC-IS sensor path */ if (si && si->fimc_bus_type == FIMC_BUS_TYPE_ISP_WRITEBACK)
ret = 1;
}
for (i = 0; !ret && i < FIMC_MAX_DEVS; i++) { if (!fmd->fimc[i]) continue; /* * Some FIMC variants are not fitted with camera capture * interface. Skip creating a link from sensor for those.
*/ if (!fmd->fimc[i]->variant->has_cam_if) continue;
/* Create links from FIMC-LITE source pads to other entities */ staticint __fimc_md_create_flite_source_links(struct fimc_md *fmd)
{ struct media_entity *source, *sink; int i, ret = 0;
for (i = 0; i < FIMC_LITE_MAX_DEVS; i++) { struct fimc_lite *fimc = fmd->fimc_lite[i];
if (fimc == NULL) continue;
source = &fimc->subdev.entity;
sink = &fimc->ve.vdev.entity; /* FIMC-LITE's subdev and video node */
ret = media_create_pad_link(source, FLITE_SD_PAD_SOURCE_DMA,
sink, 0, 0); if (ret) break; /* Link from FIMC-LITE to IS-ISP subdev */
sink = &fmd->fimc_is->isp.subdev.entity;
ret = media_create_pad_link(source, FLITE_SD_PAD_SOURCE_ISP,
sink, 0, 0); if (ret) break;
}
for (i = 0; i < FIMC_MAX_DEVS; i++) { if (fmd->fimc[i] == NULL) continue;
/* Link from FIMC-IS-ISP subdev to FIMC */
sink = &fmd->fimc[i]->vid_cap.subdev.entity;
ret = media_create_pad_link(source, FIMC_ISP_SD_PAD_SRC_FIFO,
sink, FIMC_SD_PAD_SINK_FIFO, 0); if (ret) return ret;
}
/* Link from FIMC-IS-ISP subdev to fimc-is-isp.capture video node */
sink = &isp->video_capture.ve.vdev.entity;
/* Skip this link if the fimc-is-isp video node driver isn't built-in */ if (sink->num_pads == 0) return 0;
/** * fimc_md_create_links - create default links between registered entities * @fmd: fimc media device * * Parallel interface sensor entities are connected directly to FIMC capture * entities. The sensors using MIPI CSIS bus are connected through immutable * link with CSI receiver entity specified by mux_id. Any registered CSIS * entity has a link to each registered FIMC capture entity. Enabled links * are created by default between each subsequent registered sensor and * subsequent FIMC capture entity. The number of default active links is * determined by the number of available sensors or FIMC entities, * whichever is less.
*/ staticint fimc_md_create_links(struct fimc_md *fmd)
{ struct v4l2_subdev *csi_sensors[CSIS_MAX_ENTITIES] = { NULL }; struct v4l2_subdev *sensor, *csis; struct fimc_source_info *pdata; struct media_entity *source, *sink; int i, pad, fimc_id = 0, ret = 0;
u32 flags, link_mask = 0;
for (i = 0; i < fmd->num_sensors; i++) { if (fmd->sensor[i].subdev == NULL) continue;
sensor = fmd->sensor[i].subdev;
pdata = v4l2_get_subdev_hostdata(sensor); if (!pdata) continue;
source = NULL;
switch (pdata->sensor_bus_type) { case FIMC_BUS_TYPE_MIPI_CSI2: if (WARN(pdata->mux_id >= CSIS_MAX_ENTITIES, "Wrong CSI channel id: %d\n", pdata->mux_id)) return -EINVAL;
csis = fmd->csis[pdata->mux_id].sd; if (WARN(csis == NULL, "MIPI-CSI interface specified but s5p-csis module is not loaded!\n")) return -EINVAL;
pad = sensor->entity.num_pads - 1;
ret = media_create_pad_link(&sensor->entity, pad,
&csis->entity, CSIS_PAD_SINK,
MEDIA_LNK_FL_IMMUTABLE |
MEDIA_LNK_FL_ENABLED); if (ret) return ret;
v4l2_info(&fmd->v4l2_dev, "created link [%s] => [%s]\n",
sensor->entity.name, csis->entity.name);
/* Create immutable links between each FIMC's subdev and video node */
flags = MEDIA_LNK_FL_IMMUTABLE | MEDIA_LNK_FL_ENABLED; for (i = 0; i < FIMC_MAX_DEVS; i++) { if (!fmd->fimc[i]) continue;
ret = media_create_pad_link(source, FIMC_SD_PAD_SOURCE,
sink, 0, flags); if (ret) break;
}
ret = __fimc_md_create_flite_source_links(fmd); if (ret < 0) return ret;
if (fmd->use_isp)
ret = __fimc_md_create_fimc_is_links(fmd);
return ret;
}
/* * The peripheral sensor and CAM_BLK (PIXELASYNCMx) clocks management.
*/ staticvoid fimc_md_put_clocks(struct fimc_md *fmd)
{ int i = FIMC_MAX_CAMCLKS;
while (--i >= 0) { if (IS_ERR(fmd->camclk[i].clock)) continue;
clk_put(fmd->camclk[i].clock);
fmd->camclk[i].clock = ERR_PTR(-EINVAL);
}
/* Writeback (PIXELASYNCMx) clocks */ for (i = 0; i < FIMC_MAX_WBCLKS; i++) { if (IS_ERR(fmd->wbclk[i])) continue;
clk_put(fmd->wbclk[i]);
fmd->wbclk[i] = ERR_PTR(-EINVAL);
}
}
staticint fimc_md_get_clocks(struct fimc_md *fmd)
{ struct device *dev = &fmd->pdev->dev; char clk_name[32]; struct clk *clock; int i, ret = 0;
for (i = 0; i < FIMC_MAX_CAMCLKS; i++)
fmd->camclk[i].clock = ERR_PTR(-EINVAL);
for (i = 0; i < FIMC_MAX_CAMCLKS; i++) {
snprintf(clk_name, sizeof(clk_name), "sclk_cam%u", i);
clock = clk_get(dev, clk_name);
if (IS_ERR(clock)) {
dev_err(dev, "Failed to get clock: %s\n", clk_name);
ret = PTR_ERR(clock); break;
}
fmd->camclk[i].clock = clock;
} if (ret)
fimc_md_put_clocks(fmd);
if (!fmd->use_isp) return 0; /* * For now get only PIXELASYNCM1 clock (Writeback B/ISP), * leave PIXELASYNCM0 out for the LCD Writeback driver.
*/
fmd->wbclk[CLK_IDX_WB_A] = ERR_PTR(-EINVAL);
for (i = CLK_IDX_WB_B; i < FIMC_MAX_WBCLKS; i++) {
snprintf(clk_name, sizeof(clk_name), "pxl_async%u", i);
clock = clk_get(dev, clk_name); if (IS_ERR(clock)) {
v4l2_err(&fmd->v4l2_dev, "Failed to get clock: %s\n",
clk_name);
ret = PTR_ERR(clock); break;
}
fmd->wbclk[i] = clock;
} if (ret)
fimc_md_put_clocks(fmd);
vdev = media_entity_to_video_device(entity); if (vdev->entity.use_count == 0) return 0;
ve = vdev_to_exynos_video_entity(vdev);
p = to_fimc_pipeline(ve->pipe); /* * Nothing to do if we are disabling the pipeline, some link * has been disconnected and p->subdevs array is cleared now.
*/ if (!enable && p->subdevs[IDX_SENSOR] == NULL) return 0;
if (enable)
ret = __fimc_pipeline_open(ve->pipe, entity, true); else
ret = __fimc_pipeline_close(ve->pipe);
if (ret == 0 && !enable)
memset(p->subdevs, 0, sizeof(p->subdevs));
return ret;
}
/* Locking: called with entity->graph_obj.mdev->graph_mutex mutex held. */ staticint __fimc_md_modify_pipelines(struct media_entity *entity, bool enable, struct media_graph *graph)
{ struct media_entity *entity_err = entity; int ret;
/* * Walk current graph and call the pipeline open/close routine for each * opened video node that belongs to the graph of entities connected * through active links. This is needed as we cannot power on/off the * subdevs in random order.
*/
media_graph_walk_start(graph, entity);
while ((entity = media_graph_walk_next(graph))) { if (!is_media_entity_v4l2_video_device(entity)) continue;
ret = __fimc_md_modify_pipeline(entity, enable);
if (ret < 0) goto err;
}
return 0;
err:
media_graph_walk_start(graph, entity_err);
while ((entity_err = media_graph_walk_next(graph))) { if (!is_media_entity_v4l2_video_device(entity_err)) continue;
/* Before link disconnection */ if (notification == MEDIA_DEV_NOTIFY_PRE_LINK_CH) {
ret = media_graph_walk_init(graph,
link->graph_obj.mdev); if (ret) return ret; if (!(flags & MEDIA_LNK_FL_ENABLED))
ret = __fimc_md_modify_pipelines(sink, false, graph); #if 0 else /* TODO: Link state change validation */ #endif /* After link activation */
} elseif (notification == MEDIA_DEV_NOTIFY_POST_LINK_CH) { if (link->flags & MEDIA_LNK_FL_ENABLED)
ret = __fimc_md_modify_pipelines(sink, true, graph);
media_graph_walk_cleanup(graph);
}
fmd->user_subdev_api = subdev_api; for (i = 0; i < FIMC_MAX_DEVS; i++) if (fmd->fimc[i])
fmd->fimc[i]->vid_cap.user_subdev_api = subdev_api; return count;
} /* * This device attribute is to select video pipeline configuration method. * There are following valid values: * vid-dev - for V4L2 video node API only, subdevice will be configured * by the host driver. * sub-dev - for media controller API, subdevs must be configured in user * space before starting streaming.
*/ static DEVICE_ATTR_RW(subdev_conf_mode);
ret = fimc_md_register_platform_entities(fmd, dev->of_node); if (ret) goto err_clk;
ret = fimc_md_register_sensor_entities(fmd); if (ret) goto err_m_ent;
ret = device_create_file(&pdev->dev, &dev_attr_subdev_conf_mode); if (ret) goto err_cleanup; /* * FIMC platform devices need to be registered before the sclk_cam * clocks provider, as one of these devices needs to be activated * to enable the clock.
*/
ret = fimc_md_register_clk_provider(fmd); if (ret < 0) {
v4l2_err(v4l2_dev, "clock provider registration failed\n"); goto err_attr;
}
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