staticunsignedint netup_card_rev = 4;
module_param(netup_card_rev, int, 0644);
MODULE_PARM_DESC(netup_card_rev, "NetUP Dual DVB-T/C CI card revision"); staticunsignedint enable_885_ir;
module_param(enable_885_ir, int, 0644);
MODULE_PARM_DESC(enable_885_ir, "Enable integrated IR controller for supported\n" "\t\t CX2388[57] boards that are wired for it:\n" "\t\t\tHVR-1250 (reported safe)\n" "\t\t\tTerraTec Cinergy T PCIe Dual (not well tested, appears to be safe)\n" "\t\t\tTeVii S470 (reported unsafe)\n" "\t\t This can cause an interrupt storm with some cards.\n" "\t\t Default: 0 [Disabled]");
/* ------------------------------------------------------------------ */ /* board config info */
void cx23885_card_list(struct cx23885_dev *dev)
{ int i;
if (0 == dev->pci->subsystem_vendor &&
0 == dev->pci->subsystem_device) {
pr_info("%s: Board has no valid PCIe Subsystem ID and can't\n" "%s: be autodetected. Pass card=<n> insmod option\n" "%s: to workaround that. Redirect complaints to the\n" "%s: vendor of the TV card. Best regards,\n" "%s: -- tux\n",
dev->name, dev->name, dev->name, dev->name, dev->name);
} else {
pr_info("%s: Your board isn't known (yet) to the driver.\n" "%s: Try to pick one of the existing card configs via\n" "%s: card=<n> insmod option. Updating to the latest\n" "%s: version might help as well.\n",
dev->name, dev->name, dev->name, dev->name);
}
pr_info("%s: Here is a list of valid choices for the card=<n> insmod option:\n",
dev->name); for (i = 0; i < cx23885_bcount; i++)
pr_info("%s: card=%d -> %s\n",
dev->name, i, cx23885_boards[i].name);
}
/* The serial number record begins with tag 0x59 */ if (*(eeprom_data + 0x00) != 0x59) {
pr_info("%s() eeprom records are undefined, no serial number\n",
__func__); return;
}
/* Make sure we support the board model */ switch (tv.model) { case 22001: /* WinTV-HVR1270 (PCIe, Retail, half height)
* ATSC/QAM and basic analog, IR Blast */ case 22009: /* WinTV-HVR1210 (PCIe, Retail, half height)
* DVB-T and basic analog, IR Blast */ case 22011: /* WinTV-HVR1270 (PCIe, Retail, half height)
* ATSC/QAM and basic analog, IR Recv */ case 22019: /* WinTV-HVR1210 (PCIe, Retail, half height)
* DVB-T and basic analog, IR Recv */ case 22021: /* WinTV-HVR1275 (PCIe, Retail, half height)
* ATSC/QAM and basic analog, IR Recv */ case 22029: /* WinTV-HVR1210 (PCIe, Retail, half height)
* DVB-T and basic analog, IR Recv */ case 22101: /* WinTV-HVR1270 (PCIe, Retail, full height)
* ATSC/QAM and basic analog, IR Blast */ case 22109: /* WinTV-HVR1210 (PCIe, Retail, full height)
* DVB-T and basic analog, IR Blast */ case 22111: /* WinTV-HVR1270 (PCIe, Retail, full height)
* ATSC/QAM and basic analog, IR Recv */ case 22119: /* WinTV-HVR1210 (PCIe, Retail, full height)
* DVB-T and basic analog, IR Recv */ case 22121: /* WinTV-HVR1275 (PCIe, Retail, full height)
* ATSC/QAM and basic analog, IR Recv */ case 22129: /* WinTV-HVR1210 (PCIe, Retail, full height)
* DVB-T and basic analog, IR Recv */ case 71009: /* WinTV-HVR1200 (PCIe, Retail, full height)
* DVB-T and basic analog */ case 71100: /* WinTV-ImpactVCB-e (PCIe, Retail, half height)
* Basic analog */ case 71359: /* WinTV-HVR1200 (PCIe, OEM, half height)
* DVB-T and basic analog */ case 71439: /* WinTV-HVR1200 (PCIe, OEM, half height)
* DVB-T and basic analog */ case 71449: /* WinTV-HVR1200 (PCIe, OEM, full height)
* DVB-T and basic analog */ case 71939: /* WinTV-HVR1200 (PCIe, OEM, half height)
* DVB-T and basic analog */ case 71949: /* WinTV-HVR1200 (PCIe, OEM, full height)
* DVB-T and basic analog */ case 71959: /* WinTV-HVR1200 (PCIe, OEM, full height)
* DVB-T and basic analog */ case 71979: /* WinTV-HVR1200 (PCIe, OEM, half height)
* DVB-T and basic analog */ case 71999: /* WinTV-HVR1200 (PCIe, OEM, full height)
* DVB-T and basic analog */ case 76601: /* WinTV-HVR1800lp (PCIe, Retail, No IR, Dual
channel ATSC and MPEG2 HW Encoder */ case 77001: /* WinTV-HVR1500 (Express Card, OEM, No IR, ATSC
and Basic analog */ case 77011: /* WinTV-HVR1500 (Express Card, Retail, No IR, ATSC
and Basic analog */ case 77041: /* WinTV-HVR1500Q (Express Card, OEM, No IR, ATSC/QAM
and Basic analog */ case 77051: /* WinTV-HVR1500Q (Express Card, Retail, No IR, ATSC/QAM
and Basic analog */ case 78011: /* WinTV-HVR1800 (PCIe, Retail, 3.5mm in, IR, No FM,
Dual channel ATSC and MPEG2 HW Encoder */ case 78501: /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
Dual channel ATSC and MPEG2 HW Encoder */ case 78521: /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
Dual channel ATSC and MPEG2 HW Encoder */ case 78531: /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, No FM,
Dual channel ATSC and MPEG2 HW Encoder */ case 78631: /* WinTV-HVR1800 (PCIe, OEM, No IR, No FM,
Dual channel ATSC and MPEG2 HW Encoder */ case 79001: /* WinTV-HVR1250 (PCIe, Retail, IR, full height,
ATSC and Basic analog */ case 79101: /* WinTV-HVR1250 (PCIe, Retail, IR, half height,
ATSC and Basic analog */ case 79501: /* WinTV-HVR1250 (PCIe, No IR, half height,
ATSC [at least] and Basic analog) */ case 79561: /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
ATSC and Basic analog */ case 79571: /* WinTV-HVR1250 (PCIe, OEM, No IR, full height,
ATSC and Basic analog */ case 79671: /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
ATSC and Basic analog */ case 80019: /* WinTV-HVR1400 (Express Card, Retail, IR,
* DVB-T and Basic analog */ case 81509: /* WinTV-HVR1700 (PCIe, OEM, No IR, half height)
* DVB-T and MPEG2 HW Encoder */ case 81519: /* WinTV-HVR1700 (PCIe, OEM, No IR, full height)
* DVB-T and MPEG2 HW Encoder */ break; case 85021: /* WinTV-HVR1850 (PCIe, Retail, 3.5mm in, IR, FM,
Dual channel ATSC and MPEG2 HW Encoder */ break; case 85721: /* WinTV-HVR1290 (PCIe, OEM, RCA in, IR,
Dual channel ATSC and Basic analog */ case 121019: /* WinTV-HVR4400 (PCIe, DVB-S2, DVB-C/T) */ break; case 121029: /* WinTV-HVR5500 (PCIe, DVB-S2, DVB-C/T) */ break; case 150329: /* WinTV-HVR5525 (PCIe, DVB-S/S2, DVB-T/T2/C) */ break; case 161111: /* WinTV-HVR-1265 K4 (PCIe, Analog/ATSC/QAM-B) */ break; case 166100: /* 888 version, hybrid */ case 166200: /* 885 version, DVB only */ /* WinTV-QuadHD (DVB) Tuner Pair 1 (PCIe, IR, half height,
DVB-T/T2/C, DVB-T/T2/C */ break; case 166101: /* 888 version, hybrid */ case 166201: /* 885 version, DVB only */ /* WinTV-QuadHD (DVB) Tuner Pair 2 (PCIe, IR, half height,
DVB-T/T2/C, DVB-T/T2/C */ break; case 165100: /* 888 version, hybrid */ case 165200: /* 885 version, digital only */ /* WinTV-QuadHD (ATSC) Tuner Pair 1 (PCIe, IR, half height,
* ATSC/QAM-B, ATSC/QAM-B */ break; case 165101: /* 888 version, hybrid */ case 165201: /* 885 version, digital only */ /* WinTV-QuadHD (ATSC) Tuner Pair 2 (PCIe, IR, half height,
* ATSC/QAM-B, ATSC/QAM-B */ break; default:
pr_warn("%s: warning: unknown hauppauge model #%d\n",
dev->name, tv.model); break;
}
/* Some TBS cards require initing a chip using a bitbanged SPI attached to the cx23885 gpio's. If this chip doesn't get init'ed the demod
doesn't respond to any command. */ staticvoid tbs_card_init(struct cx23885_dev *dev)
{ int i; staticconst u8 buf[] = {
0xe0, 0x06, 0x66, 0x33, 0x65,
0x01, 0x17, 0x06, 0xde};
switch (dev->board) { case CX23885_BOARD_TBS_6980: case CX23885_BOARD_TBS_6981:
cx_set(GP0_IO, 0x00070007);
usleep_range(1000, 10000);
cx_clear(GP0_IO, 2);
usleep_range(1000, 10000); for (i = 0; i < 9 * 8; i++) {
cx_clear(GP0_IO, 7);
usleep_range(1000, 10000);
cx_set(GP0_IO,
((buf[i >> 3] >> (7 - (i & 7))) & 1) | 4);
usleep_range(1000, 10000);
}
cx_set(GP0_IO, 7); break;
}
}
int cx23885_tuner_callback(void *priv, int component, int command, int arg)
{ struct cx23885_tsport *port = priv; struct cx23885_dev *dev = port->dev;
u32 bitmask = 0;
if ((command == XC2028_RESET_CLK) || (command == XC2028_I2C_FLUSH)) return 0;
switch (dev->board) { case CX23885_BOARD_HAUPPAUGE_HVR1400: case CX23885_BOARD_HAUPPAUGE_HVR1500: case CX23885_BOARD_HAUPPAUGE_HVR1500Q: case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H: case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200: case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000: case CX23885_BOARD_COMPRO_VIDEOMATE_E650F: case CX23885_BOARD_COMPRO_VIDEOMATE_E800: case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200: /* Tuner Reset Command */
bitmask = 0x04; break; case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP: case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP: case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2: /* Two identical tuners on two different i2c buses,
* we need to reset the correct gpio. */ if (port->nr == 1)
bitmask = 0x01; elseif (port->nr == 2)
bitmask = 0x04; break; case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID: /* Tuner Reset Command */
bitmask = 0x02; break; case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
altera_ci_tuner_reset(dev, port->nr); break; case CX23885_BOARD_AVERMEDIA_HC81R: /* XC3028L Reset Command */
bitmask = 1 << 2; break;
}
if (bitmask) { /* Drive the tuner into reset and back out */
cx_clear(GP0_IO, bitmask);
mdelay(200);
cx_set(GP0_IO, bitmask);
}
return 0;
}
void cx23885_gpio_setup(struct cx23885_dev *dev)
{ switch (dev->board) { case CX23885_BOARD_HAUPPAUGE_HVR1250: /* GPIO-0 cx24227 demodulator reset */
cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */ break; case CX23885_BOARD_HAUPPAUGE_HVR1500: /* GPIO-0 cx24227 demodulator */ /* GPIO-2 xc3028 tuner */
/* Put the parts into reset */
cx_set(GP0_IO, 0x00050000);
cx_clear(GP0_IO, 0x00000005);
msleep(5);
/* Bring the parts out of reset */
cx_set(GP0_IO, 0x00050005); break; case CX23885_BOARD_HAUPPAUGE_HVR1500Q: /* GPIO-0 cx24227 demodulator reset */ /* GPIO-2 xc5000 tuner reset */
cx_set(GP0_IO, 0x00050005); /* Bring the part out of reset */ break; case CX23885_BOARD_HAUPPAUGE_HVR1800: /* GPIO-0 656_CLK */ /* GPIO-1 656_D0 */ /* GPIO-2 8295A Reset */ /* GPIO-3-10 cx23417 data0-7 */ /* GPIO-11-14 cx23417 addr0-3 */ /* GPIO-15-18 cx23417 READY, CS, RD, WR */ /* GPIO-19 IR_RX */
/* Put the demod into reset and protect the eeprom */
mc417_gpio_clear(dev, GPIO_15 | GPIO_14);
msleep(100);
/* Bring the demod and blaster out of reset */
mc417_gpio_set(dev, GPIO_15 | GPIO_14);
msleep(100);
/* Force the TDA8295A into reset and back */
cx23885_gpio_enable(dev, GPIO_2, 1);
cx23885_gpio_set(dev, GPIO_2);
msleep(20);
cx23885_gpio_clear(dev, GPIO_2);
msleep(20);
cx23885_gpio_set(dev, GPIO_2);
msleep(20); break; case CX23885_BOARD_HAUPPAUGE_HVR1200: /* GPIO-0 tda10048 demodulator reset */ /* GPIO-2 tda18271 tuner reset */
/* Put the parts into reset and back */
cx_set(GP0_IO, 0x00050000);
msleep(20);
cx_clear(GP0_IO, 0x00000005);
msleep(20);
cx_set(GP0_IO, 0x00050005); break; case CX23885_BOARD_HAUPPAUGE_HVR1700: /* GPIO-0 TDA10048 demodulator reset */ /* GPIO-2 TDA8295A Reset */ /* GPIO-3-10 cx23417 data0-7 */ /* GPIO-11-14 cx23417 addr0-3 */ /* GPIO-15-18 cx23417 READY, CS, RD, WR */
/* The following GPIO's are on the interna AVCore (cx25840) */ /* GPIO-19 IR_RX */ /* GPIO-20 IR_TX 416/DVBT Select */ /* GPIO-21 IIS DAT */ /* GPIO-22 IIS WCLK */ /* GPIO-23 IIS BCLK */
/* Put the parts into reset and back */
cx_set(GP0_IO, 0x00050000);
msleep(20);
cx_clear(GP0_IO, 0x00000005);
msleep(20);
cx_set(GP0_IO, 0x00050005); break; case CX23885_BOARD_HAUPPAUGE_HVR1400: /* GPIO-0 Dibcom7000p demodulator reset */ /* GPIO-2 xc3028L tuner reset */ /* GPIO-13 LED */
/* Put the parts into reset and back */
cx_set(GP0_IO, 0x00050000);
msleep(20);
cx_clear(GP0_IO, 0x00000005);
msleep(20);
cx_set(GP0_IO, 0x00050005); break; case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP: /* GPIO-0 xc5000 tuner reset i2c bus 0 */ /* GPIO-1 s5h1409 demod reset i2c bus 0 */ /* GPIO-2 xc5000 tuner reset i2c bus 1 */ /* GPIO-3 s5h1409 demod reset i2c bus 0 */
/* Put the parts into reset and back */
cx_set(GP0_IO, 0x000f0000);
msleep(20);
cx_clear(GP0_IO, 0x0000000f);
msleep(20);
cx_set(GP0_IO, 0x000f000f); break; case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP: case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2: /* GPIO-0 portb xc3028 reset */ /* GPIO-1 portb zl10353 reset */ /* GPIO-2 portc xc3028 reset */ /* GPIO-3 portc zl10353 reset */
/* Put the parts into reset and back */
cx_set(GP0_IO, 0x000f0000);
msleep(20);
cx_clear(GP0_IO, 0x0000000f);
msleep(20);
cx_set(GP0_IO, 0x000f000f); break; case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H: case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200: case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000: case CX23885_BOARD_COMPRO_VIDEOMATE_E650F: case CX23885_BOARD_COMPRO_VIDEOMATE_E800: case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200: /* GPIO-2 xc3028 tuner reset */
/* The following GPIO's are on the internal AVCore (cx25840) */ /* GPIO-? zl10353 demod reset */
/* Put the parts into reset and back */
cx_set(GP0_IO, 0x00040000);
msleep(20);
cx_clear(GP0_IO, 0x00000004);
msleep(20);
cx_set(GP0_IO, 0x00040004); break; case CX23885_BOARD_TBS_6920: case CX23885_BOARD_TBS_6980: case CX23885_BOARD_TBS_6981: case CX23885_BOARD_PROF_8000:
cx_write(MC417_CTL, 0x00000036);
cx_write(MC417_OEN, 0x00001000);
cx_set(MC417_RWD, 0x00000002);
msleep(200);
cx_clear(MC417_RWD, 0x00000800);
msleep(200);
cx_set(MC417_RWD, 0x00000800);
msleep(200); break; case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: /* GPIO-0 INTA from CiMax1 GPIO-1 INTB from CiMax2 GPIO-2 reset chips GPIO-3 to GPIO-10 data/addr for CA GPIO-11 ~CS0 to CiMax1 GPIO-12 ~CS1 to CiMax2 GPIO-13 ADL0 load LSB addr GPIO-14 ADL1 load MSB addr GPIO-15 ~RDY from CiMax GPIO-17 ~RD to CiMax GPIO-18 ~WR to CiMax
*/
cx_set(GP0_IO, 0x00040000); /* GPIO as out */ /* GPIO1 and GPIO2 as INTA and INTB from CiMaxes, reset low */
cx_clear(GP0_IO, 0x00030004);
msleep(100);/* reset delay */
cx_set(GP0_IO, 0x00040004); /* GPIO as out, reset high */
cx_write(MC417_CTL, 0x00000037);/* enable GPIO3-18 pins */ /* GPIO-15 IN as ~ACK, rest as OUT */
cx_write(MC417_OEN, 0x00001000); /* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */
cx_write(MC417_RWD, 0x0000c300); /* enable irq */
cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/ break; case CX23885_BOARD_HAUPPAUGE_HVR1270: case CX23885_BOARD_HAUPPAUGE_HVR1275: case CX23885_BOARD_HAUPPAUGE_HVR1255: case CX23885_BOARD_HAUPPAUGE_HVR1255_22111: case CX23885_BOARD_HAUPPAUGE_HVR1210: /* GPIO-5 RF Control: 0 = RF1 Terrestrial, 1 = RF2 Cable */ /* GPIO-6 I2C Gate which can isolate the demod from the bus */ /* GPIO-9 Demod reset */
/* Put the parts into reset and back */
cx23885_gpio_enable(dev, GPIO_9 | GPIO_6 | GPIO_5, 1);
cx23885_gpio_set(dev, GPIO_9 | GPIO_6 | GPIO_5);
cx23885_gpio_clear(dev, GPIO_9);
msleep(20);
cx23885_gpio_set(dev, GPIO_9); break; case CX23885_BOARD_MYGICA_X8506: case CX23885_BOARD_MAGICPRO_PROHDTVE2: case CX23885_BOARD_MYGICA_X8507: /* GPIO-0 (0)Analog / (1)Digital TV */ /* GPIO-1 reset XC5000 */ /* GPIO-2 demod reset */
cx23885_gpio_enable(dev, GPIO_0 | GPIO_1 | GPIO_2, 1);
cx23885_gpio_clear(dev, GPIO_1 | GPIO_2);
msleep(100);
cx23885_gpio_set(dev, GPIO_0 | GPIO_1 | GPIO_2);
msleep(100); break; case CX23885_BOARD_MYGICA_X8558PRO: /* GPIO-0 reset first ATBM8830 */ /* GPIO-1 reset second ATBM8830 */
cx23885_gpio_enable(dev, GPIO_0 | GPIO_1, 1);
cx23885_gpio_clear(dev, GPIO_0 | GPIO_1);
msleep(100);
cx23885_gpio_set(dev, GPIO_0 | GPIO_1);
msleep(100); break; case CX23885_BOARD_HAUPPAUGE_HVR1850: case CX23885_BOARD_HAUPPAUGE_HVR1290: /* GPIO-0 656_CLK */ /* GPIO-1 656_D0 */ /* GPIO-2 Wake# */ /* GPIO-3-10 cx23417 data0-7 */ /* GPIO-11-14 cx23417 addr0-3 */ /* GPIO-15-18 cx23417 READY, CS, RD, WR */ /* GPIO-19 IR_RX */ /* GPIO-20 C_IR_TX */ /* GPIO-21 I2S DAT */ /* GPIO-22 I2S WCLK */ /* GPIO-23 I2S BCLK */ /* ALT GPIO: EXP GPIO LATCH */
/* Put the demod into reset and protect the eeprom */
mc417_gpio_clear(dev, GPIO_14 | GPIO_13);
msleep(100);
/* Bring the demod out of reset */
mc417_gpio_set(dev, GPIO_14);
msleep(100);
/* CX24228 GPIO */ /* Connected to IF / Mux */ break; case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */ break; case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: /* GPIO-0 ~INT in GPIO-1 TMS out GPIO-2 ~reset chips out GPIO-3 to GPIO-10 data/addr for CA in/out GPIO-11 ~CS out GPIO-12 ADDR out GPIO-13 ~WR out GPIO-14 ~RD out GPIO-15 ~RDY in GPIO-16 TCK out GPIO-17 TDO in GPIO-18 TDI out
*/
cx_set(GP0_IO, 0x00060000); /* GPIO-1,2 as out */ /* GPIO-0 as INT, reset & TMS low */
cx_clear(GP0_IO, 0x00010006);
msleep(100);/* reset delay */
cx_set(GP0_IO, 0x00000004); /* reset high */
cx_write(MC417_CTL, 0x00000037);/* enable GPIO-3..18 pins */ /* GPIO-17 is TDO in, GPIO-15 is ~RDY in, rest is out */
cx_write(MC417_OEN, 0x00005000); /* ~RD, ~WR high; ADDR low; ~CS high */
cx_write(MC417_RWD, 0x00000d00); /* enable irq */
cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/ break; case CX23885_BOARD_HAUPPAUGE_HVR4400: case CX23885_BOARD_HAUPPAUGE_STARBURST: /* GPIO-8 tda10071 demod reset */ /* GPIO-9 si2165 demod reset (only HVR4400/HVR5500)*/
/* Put the parts into reset and back */
cx23885_gpio_enable(dev, GPIO_8 | GPIO_9, 1);
struct v4l2_subdev_ir_parameters params; int ret = 0; switch (dev->board) { case CX23885_BOARD_HAUPPAUGE_HVR1500: case CX23885_BOARD_HAUPPAUGE_HVR1500Q: case CX23885_BOARD_HAUPPAUGE_HVR1800: case CX23885_BOARD_HAUPPAUGE_HVR1200: case CX23885_BOARD_HAUPPAUGE_HVR1400: case CX23885_BOARD_HAUPPAUGE_HVR1275: case CX23885_BOARD_HAUPPAUGE_HVR1255: case CX23885_BOARD_HAUPPAUGE_HVR1255_22111: case CX23885_BOARD_HAUPPAUGE_HVR1210: case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB: case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC: /* FIXME: Implement me */ break; case CX23885_BOARD_HAUPPAUGE_HVR1270:
ret = cx23888_ir_probe(dev); if (ret) break;
dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR);
v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
ir_rx_pin_cfg_count, ir_rx_pin_cfg); break; case CX23885_BOARD_HAUPPAUGE_HVR1850: case CX23885_BOARD_HAUPPAUGE_HVR1290:
ret = cx23888_ir_probe(dev); if (ret) break;
dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR);
v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
ir_rxtx_pin_cfg_count, ir_rxtx_pin_cfg); /* * For these boards we need to invert the Tx output via the * IR controller to have the LED off while idle
*/
v4l2_subdev_call(dev->sd_ir, ir, tx_g_parameters, ¶ms);
params.enable = false;
params.shutdown = false;
params.invert_level = true;
v4l2_subdev_call(dev->sd_ir, ir, tx_s_parameters, ¶ms);
params.shutdown = true;
v4l2_subdev_call(dev->sd_ir, ir, tx_s_parameters, ¶ms); break; case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL: case CX23885_BOARD_TEVII_S470: case CX23885_BOARD_MYGICA_X8507: case CX23885_BOARD_TBS_6980: case CX23885_BOARD_TBS_6981: case CX23885_BOARD_DVBSKY_T9580: case CX23885_BOARD_DVBSKY_T980C: case CX23885_BOARD_DVBSKY_S950C: case CX23885_BOARD_TT_CT2_4500_CI: case CX23885_BOARD_DVBSKY_S950: case CX23885_BOARD_DVBSKY_S952: case CX23885_BOARD_DVBSKY_T982: if (!enable_885_ir) break;
dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE); if (dev->sd_ir == NULL) {
ret = -ENODEV; break;
}
v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
ir_rx_pin_cfg_count, ir_rx_pin_cfg); break; case CX23885_BOARD_HAUPPAUGE_HVR1250: if (!enable_885_ir) break;
dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE); if (dev->sd_ir == NULL) {
ret = -ENODEV; break;
}
v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
ir_rxtx_pin_cfg_count, ir_rxtx_pin_cfg); break; case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP: case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2:
request_module("ir-kbd-i2c"); break;
}
return ret;
}
void cx23885_ir_fini(struct cx23885_dev *dev)
{ switch (dev->board) { case CX23885_BOARD_HAUPPAUGE_HVR1270: case CX23885_BOARD_HAUPPAUGE_HVR1850: case CX23885_BOARD_HAUPPAUGE_HVR1290:
cx23885_irq_remove(dev, PCI_MSK_IR);
cx23888_ir_remove(dev);
dev->sd_ir = NULL; break; case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL: case CX23885_BOARD_TEVII_S470: case CX23885_BOARD_HAUPPAUGE_HVR1250: case CX23885_BOARD_MYGICA_X8507: case CX23885_BOARD_TBS_6980: case CX23885_BOARD_TBS_6981: case CX23885_BOARD_DVBSKY_T9580: case CX23885_BOARD_DVBSKY_T980C: case CX23885_BOARD_DVBSKY_S950C: case CX23885_BOARD_TT_CT2_4500_CI: case CX23885_BOARD_DVBSKY_S950: case CX23885_BOARD_DVBSKY_S952: case CX23885_BOARD_DVBSKY_T982:
cx23885_irq_remove(dev, PCI_MSK_AV_CORE); /* sd_ir is a duplicate pointer to the AV Core, just clear it */
dev->sd_ir = NULL; break;
}
}
staticint netup_jtag_io(void *device, int tms, int tdi, int read_tdo)
{ int data; int tdo = 0; struct cx23885_dev *dev = (struct cx23885_dev *)device; /*TMS*/
data = ((cx_read(GP0_IO)) & (~0x00000002));
data |= (tms ? 0x00020002 : 0x00020000);
cx_write(GP0_IO, data);
/*TDI*/
data = ((cx_read(MC417_RWD)) & (~0x0000a000));
data |= (tdi ? 0x00008000 : 0);
cx_write(MC417_RWD, data); if (read_tdo)
tdo = (data & 0x00004000) ? 1 : 0; /*TDO*/
cx_write(MC417_RWD, data | 0x00002000);
udelay(1); /*TCK*/
cx_write(MC417_RWD, data);
return tdo;
}
void cx23885_ir_pci_int_enable(struct cx23885_dev *dev)
{ switch (dev->board) { case CX23885_BOARD_HAUPPAUGE_HVR1270: case CX23885_BOARD_HAUPPAUGE_HVR1850: case CX23885_BOARD_HAUPPAUGE_HVR1290: if (dev->sd_ir)
cx23885_irq_add_enable(dev, PCI_MSK_IR); break; case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL: case CX23885_BOARD_TEVII_S470: case CX23885_BOARD_HAUPPAUGE_HVR1250: case CX23885_BOARD_MYGICA_X8507: case CX23885_BOARD_TBS_6980: case CX23885_BOARD_TBS_6981: case CX23885_BOARD_DVBSKY_T9580: case CX23885_BOARD_DVBSKY_T980C: case CX23885_BOARD_DVBSKY_S950C: case CX23885_BOARD_TT_CT2_4500_CI: case CX23885_BOARD_DVBSKY_S950: case CX23885_BOARD_DVBSKY_S952: case CX23885_BOARD_DVBSKY_T982: if (dev->sd_ir)
cx23885_irq_add_enable(dev, PCI_MSK_AV_CORE); break;
}
}
switch (dev->board) { case CX23885_BOARD_HAUPPAUGE_HVR1250: if (dev->i2c_bus[0].i2c_rc == 0) { if (eeprom[0x80] != 0x84)
hauppauge_eeprom(dev, eeprom+0xc0); else
hauppauge_eeprom(dev, eeprom+0x80);
} break; case CX23885_BOARD_HAUPPAUGE_HVR1500: case CX23885_BOARD_HAUPPAUGE_HVR1500Q: case CX23885_BOARD_HAUPPAUGE_HVR1400: if (dev->i2c_bus[0].i2c_rc == 0)
hauppauge_eeprom(dev, eeprom+0x80); break; case CX23885_BOARD_HAUPPAUGE_HVR1800: case CX23885_BOARD_HAUPPAUGE_HVR1800lp: case CX23885_BOARD_HAUPPAUGE_HVR1200: case CX23885_BOARD_HAUPPAUGE_HVR1700: case CX23885_BOARD_HAUPPAUGE_HVR1270: case CX23885_BOARD_HAUPPAUGE_HVR1275: case CX23885_BOARD_HAUPPAUGE_HVR1255: case CX23885_BOARD_HAUPPAUGE_HVR1255_22111: case CX23885_BOARD_HAUPPAUGE_HVR1210: case CX23885_BOARD_HAUPPAUGE_HVR1850: case CX23885_BOARD_HAUPPAUGE_HVR1290: case CX23885_BOARD_HAUPPAUGE_HVR4400: case CX23885_BOARD_HAUPPAUGE_STARBURST: case CX23885_BOARD_HAUPPAUGE_IMPACTVCBE: case CX23885_BOARD_HAUPPAUGE_HVR5525: case CX23885_BOARD_HAUPPAUGE_HVR1265_K4: case CX23885_BOARD_HAUPPAUGE_STARBURST2: case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB: case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB_885: case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC: case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC_885: if (dev->i2c_bus[0].i2c_rc == 0)
hauppauge_eeprom(dev, eeprom+0xc0); break; case CX23885_BOARD_VIEWCAST_260E: case CX23885_BOARD_VIEWCAST_460E:
dev->i2c_bus[1].i2c_client.addr = 0xa0 >> 1;
tveeprom_read(&dev->i2c_bus[1].i2c_client,
eeprom, sizeof(eeprom)); if (dev->i2c_bus[0].i2c_rc == 0)
viewcast_eeprom(dev, eeprom); break;
}
switch (dev->board) { case CX23885_BOARD_AVERMEDIA_HC81R: /* Defaults for VID B */
ts1->gen_ctrl_val = 0x4; /* Parallel */
ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; /* Defaults for VID C */ /* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
ts2->gen_ctrl_val = 0x10e;
ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; break; case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP: case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP: case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2:
ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
fallthrough; case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; break; case CX23885_BOARD_HAUPPAUGE_HVR1850: case CX23885_BOARD_HAUPPAUGE_HVR1800: /* Defaults for VID B - Analog encoder */ /* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
ts1->gen_ctrl_val = 0x10e;
ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
/* Defaults for VID C */
ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; break; case CX23885_BOARD_TBS_6920:
ts1->gen_ctrl_val = 0x4; /* Parallel */
ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; break; case CX23885_BOARD_TEVII_S470: case CX23885_BOARD_TEVII_S471: case CX23885_BOARD_DVBWORLD_2005: case CX23885_BOARD_PROF_8000: case CX23885_BOARD_DVBSKY_T980C: case CX23885_BOARD_DVBSKY_S950C: case CX23885_BOARD_TT_CT2_4500_CI: case CX23885_BOARD_DVBSKY_S950:
ts1->gen_ctrl_val = 0x5; /* Parallel */
ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; break; case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; break; case CX23885_BOARD_TBS_6980: case CX23885_BOARD_TBS_6981:
ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
tbs_card_init(dev); break; case CX23885_BOARD_MYGICA_X8506: case CX23885_BOARD_MAGICPRO_PROHDTVE2: case CX23885_BOARD_MYGICA_X8507:
ts1->gen_ctrl_val = 0x5; /* Parallel */
ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; break; case CX23885_BOARD_MYGICA_X8558PRO:
ts1->gen_ctrl_val = 0x5; /* Parallel */
ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; break; case CX23885_BOARD_HAUPPAUGE_HVR4400:
ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; break; case CX23885_BOARD_HAUPPAUGE_STARBURST:
ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; break; case CX23885_BOARD_DVBSKY_T9580: case CX23885_BOARD_DVBSKY_T982:
ts1->gen_ctrl_val = 0x5; /* Parallel */
ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
ts2->gen_ctrl_val = 0x8; /* Serial bus */
ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; break; case CX23885_BOARD_DVBSKY_S952:
ts1->gen_ctrl_val = 0x5; /* Parallel */
ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
ts2->gen_ctrl_val = 0xe; /* Serial bus */
ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; break; case CX23885_BOARD_HAUPPAUGE_HVR5525: case CX23885_BOARD_HAUPPAUGE_STARBURST2:
ts1->gen_ctrl_val = 0x5; /* Parallel */
ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; break; case CX23885_BOARD_HAUPPAUGE_HVR1265_K4: case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB: case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB_885: case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC: case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC_885:
ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; break; case CX23885_BOARD_HAUPPAUGE_HVR1250: case CX23885_BOARD_HAUPPAUGE_HVR1500: case CX23885_BOARD_HAUPPAUGE_HVR1500Q: case CX23885_BOARD_HAUPPAUGE_HVR1800lp: case CX23885_BOARD_HAUPPAUGE_HVR1200: case CX23885_BOARD_HAUPPAUGE_HVR1700: case CX23885_BOARD_HAUPPAUGE_HVR1400: case CX23885_BOARD_HAUPPAUGE_IMPACTVCBE: case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H: case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200: case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000: case CX23885_BOARD_COMPRO_VIDEOMATE_E650F: case CX23885_BOARD_HAUPPAUGE_HVR1270: case CX23885_BOARD_HAUPPAUGE_HVR1275: case CX23885_BOARD_HAUPPAUGE_HVR1255: case CX23885_BOARD_HAUPPAUGE_HVR1255_22111: case CX23885_BOARD_HAUPPAUGE_HVR1210: case CX23885_BOARD_COMPRO_VIDEOMATE_E800: case CX23885_BOARD_HAUPPAUGE_HVR1290: case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID: default:
ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
}
/* Certain boards support analog, or require the avcore to be * loaded, ensure this happens.
*/ switch (dev->board) { case CX23885_BOARD_TEVII_S470: /* Currently only enabled for the integrated IR controller */ if (!enable_885_ir) break;
fallthrough; case CX23885_BOARD_HAUPPAUGE_HVR1250: case CX23885_BOARD_HAUPPAUGE_HVR1800: case CX23885_BOARD_HAUPPAUGE_IMPACTVCBE: case CX23885_BOARD_HAUPPAUGE_HVR1800lp: case CX23885_BOARD_HAUPPAUGE_HVR1700: case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H: case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200: case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000: case CX23885_BOARD_COMPRO_VIDEOMATE_E650F: case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: case CX23885_BOARD_COMPRO_VIDEOMATE_E800: case CX23885_BOARD_HAUPPAUGE_HVR1255: case CX23885_BOARD_HAUPPAUGE_HVR1255_22111: case CX23885_BOARD_HAUPPAUGE_HVR1265_K4: case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB: case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC: case CX23885_BOARD_HAUPPAUGE_HVR1270: case CX23885_BOARD_HAUPPAUGE_HVR1850: case CX23885_BOARD_HAUPPAUGE_HVR5525: case CX23885_BOARD_MYGICA_X8506: case CX23885_BOARD_MAGICPRO_PROHDTVE2: case CX23885_BOARD_HAUPPAUGE_HVR1290: case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200: case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID: case CX23885_BOARD_HAUPPAUGE_HVR1500: case CX23885_BOARD_MPX885: case CX23885_BOARD_MYGICA_X8507: case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL: case CX23885_BOARD_AVERMEDIA_HC81R: case CX23885_BOARD_TBS_6980: case CX23885_BOARD_TBS_6981: case CX23885_BOARD_DVBSKY_T9580: case CX23885_BOARD_DVBSKY_T980C: case CX23885_BOARD_DVBSKY_S950C: case CX23885_BOARD_TT_CT2_4500_CI: case CX23885_BOARD_DVBSKY_S950: case CX23885_BOARD_DVBSKY_S952: case CX23885_BOARD_DVBSKY_T982: case CX23885_BOARD_VIEWCAST_260E: case CX23885_BOARD_VIEWCAST_460E: case CX23885_BOARD_AVERMEDIA_CE310B: case CX23885_BOARD_AVERMEDIA_H789C:
dev->sd_cx25840 = v4l2_i2c_new_subdev(&dev->v4l2_dev,
&dev->i2c_bus[2].i2c_adap, "cx25840", 0x88 >> 1, NULL); if (dev->sd_cx25840) { /* set host data for clk_freq configuration */
v4l2_set_subdev_hostdata(dev->sd_cx25840,
&dev->clk_freq);
ret = request_firmware(&fw, filename, &dev->pci->dev); if (ret != 0)
pr_err("did not find the firmware file '%s'. You can use <kernel_dir>/scripts/get_dvb_firmware to get the firmware.",
filename); else
altera_init(&netup_config, fw);
Die Informationen auf dieser Webseite wurden
nach bestem Wissen sorgfältig zusammengestellt. Es wird jedoch weder Vollständigkeit, noch Richtigkeit,
noch Qualität der bereit gestellten Informationen zugesichert.
Bemerkung:
Die farbliche Syntaxdarstellung und die Messung sind noch experimentell.