/* * Copyright (c) 2016 Hisilicon Limited. * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved. * * This software is available to you under a choice of one of two * licenses. You may choose to be licensed under the terms of the GNU * General Public License (GPL) Version 2, available from the file * COPYING in the main directory of this source tree, or the * OpenIB.org BSD license below: * * Redistribution and use in source and binary forms, with or * without modification, are permitted provided that the following * conditions are met: * * - Redistributions of source code must retain the above * copyright notice, this list of conditions and the following * disclaimer. * * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials * provided with the distribution. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE.
*/
ret = calc_hem_config(hr_dev, table, obj, &mhop, &index); if (ret) {
dev_err(dev, "calc hem config failed!\n"); return ret;
}
mutex_lock(&table->mutex); if (table->hem[index.buf]) {
refcount_inc(&table->hem[index.buf]->refcount); goto out;
}
ret = alloc_mhop_hem(hr_dev, table, &mhop, &index); if (ret) {
dev_err(dev, "alloc mhop hem failed!\n"); goto out;
}
/* set HEM base address to hardware */ if (table->type < HEM_TYPE_MTT) {
ret = set_mhop_hem(hr_dev, table, obj, &mhop, &index); if (ret) {
dev_err(dev, "set HEM address to HW failed!\n"); goto err_alloc;
}
}
int hns_roce_table_get(struct hns_roce_dev *hr_dev, struct hns_roce_hem_table *table, unsignedlong obj)
{ struct device *dev = hr_dev->dev; unsignedlong i; int ret = 0;
if (hns_roce_check_whether_mhop(hr_dev, table->type)) return hns_roce_table_mhop_get(hr_dev, table, obj);
i = obj / (table->table_chunk_size / table->obj_size);
mutex_lock(&table->mutex);
if (table->hem[i]) {
refcount_inc(&table->hem[i]->refcount); goto out;
}
table->hem[i] = hns_roce_alloc_hem(hr_dev, table->table_chunk_size); if (!table->hem[i]) {
ret = -ENOMEM; goto out;
}
/* Set HEM base address(128K/page, pa) to Hardware */
ret = hr_dev->hw->set_hem(hr_dev, table, obj, HEM_HOP_STEP_DIRECT); if (ret) {
hns_roce_free_hem(hr_dev, table->hem[i]);
table->hem[i] = NULL;
dev_err(dev, "set HEM base address to HW failed, ret = %d.\n",
ret); goto out;
}
if (table->type < HEM_TYPE_MTT) { if (hop_num == HNS_ROCE_HOP_NUM_0)
step_idx = 0; else
step_idx = hop_num;
ret = hr_dev->hw->clear_hem(hr_dev, table, obj, step_idx); if (ret)
dev_warn(dev, "failed to clear hop%u HEM, ret = %d.\n",
hop_num, ret);
if (index->inited & HEM_INDEX_L1) {
ret = hr_dev->hw->clear_hem(hr_dev, table, obj, 1); if (ret)
dev_warn(dev, "failed to clear HEM step 1, ret = %d.\n",
ret);
}
if (index->inited & HEM_INDEX_L0) {
ret = hr_dev->hw->clear_hem(hr_dev, table, obj, 0); if (ret)
dev_warn(dev, "failed to clear HEM step 0, ret = %d.\n",
ret);
}
}
}
staticvoid hns_roce_table_mhop_put(struct hns_roce_dev *hr_dev, struct hns_roce_hem_table *table, unsignedlong obj, int check_refcount)
{ struct hns_roce_hem_index index = {}; struct hns_roce_hem_mhop mhop = {}; struct device *dev = hr_dev->dev; int ret;
ret = calc_hem_config(hr_dev, table, obj, &mhop, &index); if (ret) {
dev_err(dev, "calc hem config failed!\n"); return;
}
if (!check_refcount)
mutex_lock(&table->mutex); elseif (!refcount_dec_and_mutex_lock(&table->hem[index.buf]->refcount,
&table->mutex)) return;
if (hns_roce_check_whether_mhop(hr_dev, table->type)) {
hns_roce_table_mhop_put(hr_dev, table, obj, 1); return;
}
i = obj / (table->table_chunk_size / table->obj_size);
if (!refcount_dec_and_mutex_lock(&table->hem[i]->refcount,
&table->mutex)) return;
ret = hr_dev->hw->clear_hem(hr_dev, table, obj, HEM_HOP_STEP_DIRECT); if (ret)
dev_warn_ratelimited(dev, "failed to clear HEM base address, ret = %d.\n",
ret);
for (i = 0; i < table->num_hem; ++i) {
obj = i * buf_chunk_size / table->obj_size; if (table->hem[i])
hns_roce_table_mhop_put(hr_dev, table, obj, 0);
}
void hns_roce_cleanup_hem_table(struct hns_roce_dev *hr_dev, struct hns_roce_hem_table *table)
{ struct device *dev = hr_dev->dev; unsignedlong i; int obj; int ret;
if (hns_roce_check_whether_mhop(hr_dev, table->type)) {
hns_roce_cleanup_mhop_hem_table(hr_dev, table);
mutex_destroy(&table->mutex); return;
}
for (i = 0; i < table->num_hem; ++i) if (table->hem[i]) {
obj = i * table->table_chunk_size / table->obj_size;
ret = hr_dev->hw->clear_hem(hr_dev, table, obj, 0); if (ret)
dev_err(dev, "clear HEM base address failed, ret = %d.\n",
ret);
struct hns_roce_hem_item { struct list_head list; /* link all hems in the same bt level */ struct list_head sibling; /* link all hems in last hop for mtt */ void *addr;
dma_addr_t dma_addr;
size_t count; /* max ba numbers */ int start; /* start buf offset in this hem */ int end; /* end buf offset in this hem */ bool exist_bt;
};
/* All HEM items are linked in a tree structure */ struct hns_roce_hem_head { struct list_head branch[HNS_ROCE_MAX_BT_REGION]; struct list_head root; struct list_head leaf;
};
staticstruct hns_roce_hem_item *
hem_list_alloc_item(struct hns_roce_dev *hr_dev, int start, int end, int count, bool exist_bt)
{ struct hns_roce_hem_item *hem;
hem = kzalloc(sizeof(*hem), GFP_KERNEL); if (!hem) return NULL;
if (exist_bt) {
hem->addr = dma_alloc_coherent(hr_dev->dev, count * BA_BYTE_LEN,
&hem->dma_addr, GFP_KERNEL); if (!hem->addr) {
kfree(hem); return NULL;
}
}
/* * calc base address entries num * @hopnum: num of mutihop addressing * @bt_level: base address table level * @unit: ba entries per bt page
*/ static u64 hem_list_calc_ba_range(int hopnum, int bt_level, int unit)
{
u64 step; int max; int i;
if (hopnum <= bt_level) return 0; /* * hopnum bt_level range * 1 0 unit * ------------ * 2 0 unit * unit * 2 1 unit * ------------ * 3 0 unit * unit * unit * 3 1 unit * unit * 3 2 unit
*/
step = 1;
max = hopnum - bt_level; for (i = 0; i < max; i++)
step = step * unit;
return step;
}
/* * calc the root ba entries which could cover all regions * @regions: buf region array * @region_cnt: array size of @regions * @unit: ba entries per bt page
*/ int hns_roce_hem_list_calc_root_ba(conststruct hns_roce_buf_region *regions, int region_cnt, int unit)
{ struct hns_roce_buf_region *r; int total = 0;
u64 step; int i;
for (i = 0; i < region_cnt; i++) {
r = (struct hns_roce_buf_region *)®ions[i]; /* when r->hopnum = 0, the region should not occupy root_ba. */ if (!r->hopnum) continue;
if (r->hopnum > 1) {
step = hem_list_calc_ba_range(r->hopnum, 1, unit); if (step > 0)
total += (r->count + step - 1) / step;
} else {
total += r->count;
}
}
return total;
}
staticint hem_list_alloc_mid_bt(struct hns_roce_dev *hr_dev, conststruct hns_roce_buf_region *r, int unit, int offset, struct list_head *mid_bt, struct list_head *btm_bt)
{ struct hns_roce_hem_item *hem_ptrs[HNS_ROCE_MAX_BT_LEVEL] = { NULL }; struct list_head temp_list[HNS_ROCE_MAX_BT_LEVEL]; struct hns_roce_hem_item *cur, *pre; constint hopnum = r->hopnum; int start_aligned; int distance; int ret = 0; int max_ofs; int level;
u64 step; int end;
/* config L1 bt to last bt and link them to corresponding parent */ for (level = 1; level < hopnum; level++) { if (!hem_list_is_bottom_bt(hopnum, level)) {
cur = hem_list_search_item(&mid_bt[level], offset); if (cur) {
hem_ptrs[level] = cur; continue;
}
}
step = hem_list_calc_ba_range(hopnum, level, unit); if (step < 1) {
ret = -EINVAL; goto err_exit;
}
start_aligned = (distance / step) * step + r->offset;
end = min_t(u64, start_aligned + step - 1, max_ofs);
cur = hem_list_alloc_item(hr_dev, start_aligned, end, unit, true); if (!cur) {
ret = -ENOMEM; goto err_exit;
}
hem_ptrs[level] = cur;
list_add(&cur->list, &temp_list[level]); if (hem_list_is_bottom_bt(hopnum, level))
list_add(&cur->sibling, &temp_list[0]);
/* link bt to parent bt */ if (level > 1) {
pre = hem_ptrs[level - 1];
step = (cur->start - pre->start) / step * BA_BYTE_LEN;
hem_list_link_bt(pre->addr + step, cur->dma_addr);
}
}
staticstruct hns_roce_hem_item *
alloc_root_hem(struct hns_roce_dev *hr_dev, int unit, int *max_ba_num, conststruct hns_roce_buf_region *regions, int region_cnt)
{ conststruct hns_roce_buf_region *r; struct hns_roce_hem_item *hem; int ba_num; int offset;
offset = regions[0].offset; /* indicate to last region */
r = ®ions[region_cnt - 1];
hem = hem_list_alloc_item(hr_dev, offset, r->offset + r->count - 1,
ba_num, true); if (!hem) return ERR_PTR(-ENOMEM);
/* This is on the has_mtt branch, if r->hopnum * is 0, there is no root_ba to reuse for the * region's fake hem, so a dma_alloc request is * necessary here.
*/
hem = hem_list_alloc_item(hr_dev, r->offset, r->offset + r->count - 1,
r->count, !r->hopnum); if (!hem) return -ENOMEM;
/* The root_ba can be reused only when r->hopnum > 0. */ if (r->hopnum)
hem_list_assign_bt(hem, cpu_base, phy_base);
list_add(&hem->list, branch_head);
list_add(&hem->sibling, leaf_head);
/* If r->hopnum == 0, 0 is returned, * so that the root_bt entry is not occupied.
*/ return r->hopnum ? r->count : 0;
}
staticint setup_middle_bt(struct hns_roce_dev *hr_dev, void *cpu_base, int unit, conststruct hns_roce_buf_region *r, conststruct list_head *branch_head)
{ struct hns_roce_hem_item *hem, *temp_hem; int total = 0; int offset;
u64 step;
/* if exist mid bt, link L1 to L0 */
list_for_each_entry_safe(hem, temp_hem, branch_head, list) {
offset = (hem->start - r->offset) / step * BA_BYTE_LEN;
hem_list_link_bt(cpu_base + offset, hem->dma_addr);
total++;
}
return total;
}
staticint
setup_root_hem(struct hns_roce_dev *hr_dev, struct hns_roce_hem_list *hem_list, int unit, int max_ba_num, struct hns_roce_hem_head *head, conststruct hns_roce_buf_region *regions, int region_cnt)
{ conststruct hns_roce_buf_region *r; struct hns_roce_hem_item *root_hem; void *cpu_base;
u64 phy_base; int i, total; int ret;
root_hem = list_first_entry(&head->root, struct hns_roce_hem_item, list); if (!root_hem) return -ENOMEM;
total = 0; for (i = 0; i < region_cnt && total <= max_ba_num; i++) {
r = ®ions[i]; if (!r->count) continue;
/* all regions's mid[x][0] shared the root_bt's trunk */
cpu_base = root_hem->addr + total * BA_BYTE_LEN;
phy_base = root_hem->dma_addr + total * BA_BYTE_LEN;
/* if hopnum is 0 or 1, cut a new fake hem from the root bt * which's address share to all regions.
*/ if (hem_list_is_bottom_bt(r->hopnum, 0))
ret = alloc_fake_root_bt(hr_dev, cpu_base, phy_base, r,
&head->branch[i], &head->leaf); else
ret = setup_middle_bt(hr_dev, cpu_base, unit, r,
&hem_list->mid_bt[i][1]);
if (ret < 0) return ret;
total += ret;
}
list_splice(&head->leaf, &hem_list->btm_bt);
list_splice(&head->root, &hem_list->root_bt); for (i = 0; i < region_cnt; i++)
list_splice(&head->branch[i], &hem_list->mid_bt[i][0]);
return 0;
}
staticint hem_list_alloc_root_bt(struct hns_roce_dev *hr_dev, struct hns_roce_hem_list *hem_list, int unit, conststruct hns_roce_buf_region *regions, int region_cnt)
{ struct hns_roce_hem_item *root_hem; struct hns_roce_hem_head head; int max_ba_num; int ret; int i;
root_hem = hem_list_search_item(&hem_list->root_bt, regions[0].offset); if (root_hem) return 0;
max_ba_num = 0;
root_hem = alloc_root_hem(hr_dev, unit, &max_ba_num, regions,
region_cnt); if (IS_ERR(root_hem)) return PTR_ERR(root_hem);
/* List head for storing all allocated HEM items */
INIT_LIST_HEAD(&head.root);
INIT_LIST_HEAD(&head.leaf); for (i = 0; i < region_cnt; i++)
INIT_LIST_HEAD(&head.branch[i]);
hem_list->root_ba = root_hem->dma_addr;
list_add(&root_hem->list, &head.root);
ret = setup_root_hem(hr_dev, hem_list, unit, max_ba_num, &head, regions,
region_cnt); if (ret) { for (i = 0; i < region_cnt; i++)
hem_list_free_all(hr_dev, &head.branch[i]);
hem_list_free_all(hr_dev, &head.root);
}
return ret;
}
/* This is the bottom bt pages number of a 100G MR on 4K OS, assuming * the bt page size is not expanded by cal_best_bt_pg_sz()
*/ #define RESCHED_LOOP_CNT_THRESHOLD_ON_4K 12800
/* construct the base address table and link them by address hop config */ int hns_roce_hem_list_request(struct hns_roce_dev *hr_dev, struct hns_roce_hem_list *hem_list, conststruct hns_roce_buf_region *regions, int region_cnt, unsignedint bt_pg_shift)
{ conststruct hns_roce_buf_region *r; int ofs, end; int loop; int unit; int ret; int i;
if (region_cnt > HNS_ROCE_MAX_BT_REGION) {
dev_err(hr_dev->dev, "invalid region region_cnt %d!\n",
region_cnt); return -EINVAL;
}
unit = (1 << bt_pg_shift) / BA_BYTE_LEN; for (i = 0; i < region_cnt; i++) {
r = ®ions[i]; if (!r->count) continue;
end = r->offset + r->count; for (ofs = r->offset, loop = 1; ofs < end; ofs += unit, loop++) { if (!(loop % RESCHED_LOOP_CNT_THRESHOLD_ON_4K))
cond_resched();
ret = hem_list_alloc_mid_bt(hr_dev, r, unit, ofs,
hem_list->mid_bt[i],
&hem_list->btm_bt); if (ret) {
dev_err(hr_dev->dev, "alloc hem trunk fail ret = %d!\n", ret); goto err_alloc;
}
}
}
ret = hem_list_alloc_root_bt(hr_dev, hem_list, unit, regions,
region_cnt); if (ret)
dev_err(hr_dev->dev, "alloc hem root fail ret = %d!\n", ret); else return 0;
void hns_roce_hem_list_init(struct hns_roce_hem_list *hem_list)
{ int i, j;
INIT_LIST_HEAD(&hem_list->root_bt);
INIT_LIST_HEAD(&hem_list->btm_bt); for (i = 0; i < HNS_ROCE_MAX_BT_REGION; i++) for (j = 0; j < HNS_ROCE_MAX_BT_LEVEL; j++)
INIT_LIST_HEAD(&hem_list->mid_bt[i][j]);
}
void *hns_roce_hem_list_find_mtt(struct hns_roce_dev *hr_dev, struct hns_roce_hem_list *hem_list, int offset, int *mtt_cnt)
{ struct list_head *head = &hem_list->btm_bt; struct hns_roce_hem_item *hem, *temp_hem; void *cpu_base = NULL; int loop = 1; int nr = 0;
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