/* * Virtual registers. * Useful to support attributes which are not supported by standard PMBus * registers but exist as manufacturer specific registers on individual chips. * Must be mapped to real registers in device specific code. * * Semantics: * Virtual registers are all word size. * READ registers are read-only; writes are either ignored or return an error. * RESET registers are read/write. Reading reset registers returns zero * (used for detection), writing any value causes the associated history to be * reset. * Virtual registers have to be handled in device specific driver code. Chip * driver code returns non-negative register values if a virtual register is * supported, or a negative error code if not. The chip driver may return * -ENODATA or any other error code in this case, though an error code other * than -ENODATA is handled more efficiently and thus preferred. Either case, * the calling PMBus core code will abort if the chip driver returns an error * code when reading or writing virtual registers.
*/
PMBUS_VIRT_BASE = 0x100,
PMBUS_VIRT_READ_TEMP_AVG,
PMBUS_VIRT_READ_TEMP_MIN,
PMBUS_VIRT_READ_TEMP_MAX,
PMBUS_VIRT_RESET_TEMP_HISTORY,
PMBUS_VIRT_READ_VIN_AVG,
PMBUS_VIRT_READ_VIN_MIN,
PMBUS_VIRT_READ_VIN_MAX,
PMBUS_VIRT_RESET_VIN_HISTORY,
PMBUS_VIRT_READ_IIN_AVG,
PMBUS_VIRT_READ_IIN_MIN,
PMBUS_VIRT_READ_IIN_MAX,
PMBUS_VIRT_RESET_IIN_HISTORY,
PMBUS_VIRT_READ_PIN_AVG,
PMBUS_VIRT_READ_PIN_MIN,
PMBUS_VIRT_READ_PIN_MAX,
PMBUS_VIRT_RESET_PIN_HISTORY,
PMBUS_VIRT_READ_POUT_AVG,
PMBUS_VIRT_READ_POUT_MIN,
PMBUS_VIRT_READ_POUT_MAX,
PMBUS_VIRT_RESET_POUT_HISTORY,
PMBUS_VIRT_READ_VOUT_AVG,
PMBUS_VIRT_READ_VOUT_MIN,
PMBUS_VIRT_READ_VOUT_MAX,
PMBUS_VIRT_RESET_VOUT_HISTORY,
PMBUS_VIRT_READ_IOUT_AVG,
PMBUS_VIRT_READ_IOUT_MIN,
PMBUS_VIRT_READ_IOUT_MAX,
PMBUS_VIRT_RESET_IOUT_HISTORY,
PMBUS_VIRT_READ_TEMP2_AVG,
PMBUS_VIRT_READ_TEMP2_MIN,
PMBUS_VIRT_READ_TEMP2_MAX,
PMBUS_VIRT_RESET_TEMP2_HISTORY,
/* * RPM and PWM Fan control * * Drivers wanting to expose PWM control must define the behaviour of * PMBUS_VIRT_PWM_[1-4] and PMBUS_VIRT_PWM_ENABLE_[1-4] in the * {read,write}_word_data callback. * * pmbus core provides a default implementation for * PMBUS_VIRT_FAN_TARGET_[1-4]. * * TARGET, PWM and PWM_ENABLE members must be defined sequentially; * pmbus core uses the difference between the provided register and * it's _1 counterpart to calculate the FAN/PWM ID.
*/
PMBUS_VIRT_FAN_TARGET_1,
PMBUS_VIRT_FAN_TARGET_2,
PMBUS_VIRT_FAN_TARGET_3,
PMBUS_VIRT_FAN_TARGET_4,
PMBUS_VIRT_PWM_1,
PMBUS_VIRT_PWM_2,
PMBUS_VIRT_PWM_3,
PMBUS_VIRT_PWM_4,
PMBUS_VIRT_PWM_ENABLE_1,
PMBUS_VIRT_PWM_ENABLE_2,
PMBUS_VIRT_PWM_ENABLE_3,
PMBUS_VIRT_PWM_ENABLE_4,
/* Samples for average * * Drivers wanting to expose functionality for changing the number of * samples used for average values should implement support in * {read,write}_word_data callback for either PMBUS_VIRT_SAMPLES if it * applies to all types of measurements, or any number of specific * PMBUS_VIRT_*_SAMPLES registers to allow for individual control.
*/
PMBUS_VIRT_SAMPLES,
PMBUS_VIRT_IN_SAMPLES,
PMBUS_VIRT_CURR_SAMPLES,
PMBUS_VIRT_POWER_SAMPLES,
PMBUS_VIRT_TEMP_SAMPLES,
};
struct pmbus_driver_info { int pages; /* Total number of pages */
u8 phases[PMBUS_PAGES]; /* Number of phases per page */ enum pmbus_data_format format[PSC_NUM_CLASSES]; enum vrm_version vrm_version[PMBUS_PAGES]; /* vrm version per page */ /* * Support one set of coefficients for each sensor type * Used for chips providing data in direct mode.
*/ int m[PSC_NUM_CLASSES]; /* mantissa for direct data format */ int b[PSC_NUM_CLASSES]; /* offset */ int R[PSC_NUM_CLASSES]; /* exponent */
u32 func[PMBUS_PAGES]; /* Functionality, per page */
u32 pfunc[PMBUS_PHASES];/* Functionality, per phase */ /* * The following functions map manufacturing specific register values * to PMBus standard register values. Specify only if mapping is * necessary. * Functions return the register value (read) or zero (write) if * successful. A return value of -ENODATA indicates that there is no * manufacturer specific register, but that a standard PMBus register * may exist. Any other negative return value indicates that the * register does not exist, and that no attempt should be made to read * the standard register.
*/ int (*read_byte_data)(struct i2c_client *client, int page, int reg); int (*read_word_data)(struct i2c_client *client, int page, int phase, int reg); int (*write_byte_data)(struct i2c_client *client, int page, int reg,
u8 byte); int (*write_word_data)(struct i2c_client *client, int page, int reg,
u16 word); int (*write_byte)(struct i2c_client *client, int page, u8 value); /* * The identify function determines supported PMBus functionality. * This function is only necessary if a chip driver supports multiple * chips, and the chip functionality is not pre-determined.
*/ int (*identify)(struct i2c_client *client, struct pmbus_driver_info *info);
/* Regulator functionality, if supported by this chip driver. */ int num_regulators; conststruct regulator_desc *reg_desc;
/* * Some chips need a little delay between SMBus communication. When * set, the generic PMBus helper functions will wait if necessary * to meet this requirement. The access delay is honored after * every SMBus operation. The write delay is only honored after * SMBus write operations.
*/ int access_delay; /* in microseconds */ int write_delay; /* in microseconds */ int page_change_delay; /* in microseconds */
};
/* Regulator ops */
externconststruct regulator_ops pmbus_regulator_ops; int pmbus_regulator_init_cb(struct regulator_dev *rdev, struct regulator_config *config);
/* * _NODE macros are defined for historic reasons and MUST NOT be used in new * drivers.
*/ #define PMBUS_REGULATOR_STEP_ONE_NODE(_name, _voltages, _step, _min_uV) \
__PMBUS_REGULATOR_STEP_ONE(_name, "regulators", _voltages, _step, _min_uV)
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