// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (c) 2018 MediaTek Inc.
* Author: Jitao Shi <jitao.shi@mediatek.com>
*/
#include <linux/delay.h>
#include <linux/gpio/consumer.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/regulator/consumer.h>
#include <drm/drm_connector.h>
#include <drm/drm_crtc.h>
#include <drm/drm_mipi_dsi.h>
#include <drm/drm_panel.h>
#include <video/mipi_display.h>
struct boe_panel;
struct panel_desc {
const struct drm_display_mode *modes;
unsigned int bpc;
/**
* @width_mm: width of the panel's active display area
* @height_mm: height of the panel's active display area
*/
struct {
unsigned int width_mm;
unsigned int height_mm;
} size;
unsigned long mode_flags;
enum mipi_dsi_pixel_format format;
int (*init)(struct boe_panel *boe);
unsigned int lanes;
bool discharge_on_disable;
bool lp11_before_reset;
};
struct boe_panel {
struct drm_panel base;
struct mipi_dsi_device *dsi;
const struct panel_desc *desc;
enum drm_panel_orientation orientation;
struct regulator *pp3300;
struct regulator *pp1800;
struct regulator *avee;
struct regulator *avdd;
struct gpio_desc *enable_gpio;
};
#define NT36523_DCS_SWITCH_PAGE 0 xff
#define nt36523_switch_page(ctx, page) \
mipi_dsi_dcs_write_seq_multi(ctx, NT36523_DCS_SWITCH_PAGE, (page))
static void nt36523_enable_reload_cmds(struct mipi_dsi_multi_context *ctx)
{
mipi_dsi_dcs_write_seq_multi(ctx, 0 xfb, 0 x01);
}
static int boe_tv110c9m_init(struct boe_panel *boe)
{
struct mipi_dsi_multi_context ctx = { .dsi = boe->dsi };
nt36523_switch_page(&ctx, 0 x20);
nt36523_enable_reload_cmds(&ctx);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x05, 0 xd9);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x07, 0 x78);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x08, 0 x5a);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x0d, 0 x63);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x0e, 0 x91);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x0f, 0 x73);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x95, 0 xe6);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x96, 0 xf0);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x30, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x6d, 0 x66);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x75, 0 xa2);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x77, 0 x3b);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb0, 0 x00, 0 x08, 0 x00, 0 x23, 0 x00, 0 x4d, 0 x00, 0 x6d,
0 x00, 0 x89, 0 x00, 0 xa1, 0 x00, 0 xb6, 0 x00, 0 xc9);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb1, 0 x00, 0 xda, 0 x01, 0 x13, 0 x01, 0 x3c, 0 x01, 0 x7e,
0 x01, 0 xab, 0 x01, 0 xf7, 0 x02, 0 x2f, 0 x02, 0 x31);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb2, 0 x02, 0 x67, 0 x02, 0 xa6, 0 x02, 0 xd1, 0 x03, 0 x08,
0 x03, 0 x2e, 0 x03, 0 x5b, 0 x03, 0 x6b, 0 x03, 0 x7b);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb3, 0 x03, 0 x8e, 0 x03, 0 xa2, 0 x03, 0 xb7, 0 x03, 0 xe7,
0 x03, 0 xfd, 0 x03, 0 xff);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb4, 0 x00, 0 x08, 0 x00, 0 x23, 0 x00, 0 x4d, 0 x00, 0 x6d,
0 x00, 0 x89, 0 x00, 0 xa1, 0 x00, 0 xb6, 0 x00, 0 xc9);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb5, 0 x00, 0 xda, 0 x01, 0 x13, 0 x01, 0 x3c, 0 x01, 0 x7e,
0 x01, 0 xab, 0 x01, 0 xf7, 0 x02, 0 x2f, 0 x02, 0 x31);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb6, 0 x02, 0 x67, 0 x02, 0 xa6, 0 x02, 0 xd1, 0 x03, 0 x08,
0 x03, 0 x2e, 0 x03, 0 x5b, 0 x03, 0 x6b, 0 x03, 0 x7b);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb7, 0 x03, 0 x8e, 0 x03, 0 xa2, 0 x03, 0 xb7, 0 x03, 0 xe7,
0 x03, 0 xfd, 0 x03, 0 xff);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb8, 0 x00, 0 x08, 0 x00, 0 x23, 0 x00, 0 x4d, 0 x00, 0 x6d,
0 x00, 0 x89, 0 x00, 0 xa1, 0 x00, 0 xb6, 0 x00, 0 xc9);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb9, 0 x00, 0 xda, 0 x01, 0 x13, 0 x01, 0 x3c, 0 x01, 0 x7e,
0 x01, 0 xab, 0 x01, 0 xf7, 0 x02, 0 x2f, 0 x02, 0 x31);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xba, 0 x02, 0 x67, 0 x02, 0 xa6, 0 x02, 0 xd1, 0 x03, 0 x08,
0 x03, 0 x2e, 0 x03, 0 x5b, 0 x03, 0 x6b, 0 x03, 0 x7b);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xbb, 0 x03, 0 x8e, 0 x03, 0 xa2, 0 x03, 0 xb7, 0 x03, 0 xe7,
0 x03, 0 xfd, 0 x03, 0 xff);
nt36523_switch_page(&ctx, 0 x21);
nt36523_enable_reload_cmds(&ctx);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb0, 0 x00, 0 x00, 0 x00, 0 x1b, 0 x00, 0 x45, 0 x00, 0 x65,
0 x00, 0 x81, 0 x00, 0 x99, 0 x00, 0 xae, 0 x00, 0 xc1);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb1, 0 x00, 0 xd2, 0 x01, 0 x0b, 0 x01, 0 x34, 0 x01, 0 x76,
0 x01, 0 xa3, 0 x01, 0 xef, 0 x02, 0 x27, 0 x02, 0 x29);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb2, 0 x02, 0 x5f, 0 x02, 0 x9e, 0 x02, 0 xc9, 0 x03, 0 x00,
0 x03, 0 x26, 0 x03, 0 x53, 0 x03, 0 x63, 0 x03, 0 x73);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb3, 0 x03, 0 x86, 0 x03, 0 x9a, 0 x03, 0 xaf, 0 x03, 0 xdf,
0 x03, 0 xf5, 0 x03, 0 xe0);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb4, 0 x00, 0 x00, 0 x00, 0 x1b, 0 x00, 0 x45, 0 x00, 0 x65,
0 x00, 0 x81, 0 x00, 0 x99, 0 x00, 0 xae, 0 x00, 0 xc1);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb5, 0 x00, 0 xd2, 0 x01, 0 x0b, 0 x01, 0 x34, 0 x01, 0 x76,
0 x01, 0 xa3, 0 x01, 0 xef, 0 x02, 0 x27, 0 x02, 0 x29);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb6, 0 x02, 0 x5f, 0 x02, 0 x9e, 0 x02, 0 xc9, 0 x03, 0 x00,
0 x03, 0 x26, 0 x03, 0 x53, 0 x03, 0 x63, 0 x03, 0 x73);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb7, 0 x03, 0 x86, 0 x03, 0 x9a, 0 x03, 0 xaf, 0 x03, 0 xdf,
0 x03, 0 xf5, 0 x03, 0 xe0);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb8, 0 x00, 0 x00, 0 x00, 0 x1b, 0 x00, 0 x45, 0 x00, 0 x65,
0 x00, 0 x81, 0 x00, 0 x99, 0 x00, 0 xae, 0 x00, 0 xc1);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb9, 0 x00, 0 xd2, 0 x01, 0 x0b, 0 x01, 0 x34, 0 x01, 0 x76,
0 x01, 0 xa3, 0 x01, 0 xef, 0 x02, 0 x27, 0 x02, 0 x29);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xba, 0 x02, 0 x5f, 0 x02, 0 x9e, 0 x02, 0 xc9, 0 x03, 0 x00,
0 x03, 0 x26, 0 x03, 0 x53, 0 x03, 0 x63, 0 x03, 0 x73);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xbb, 0 x03, 0 x86, 0 x03, 0 x9a, 0 x03, 0 xaf, 0 x03, 0 xdf,
0 x03, 0 xf5, 0 x03, 0 xe0);
nt36523_switch_page(&ctx, 0 x24);
nt36523_enable_reload_cmds(&ctx);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x00, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x01, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x02, 0 x1c);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x03, 0 x1c);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x04, 0 x1d);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x05, 0 x1d);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x06, 0 x04);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x07, 0 x04);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x08, 0 x0f);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x09, 0 x0f);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x0a, 0 x0e);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x0b, 0 x0e);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x0c, 0 x0d);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x0d, 0 x0d);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x0e, 0 x0c);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x0f, 0 x0c);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x10, 0 x08);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x11, 0 x08);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x12, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x13, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x14, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x15, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x16, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x17, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x18, 0 x1c);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x19, 0 x1c);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x1a, 0 x1d);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x1b, 0 x1d);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x1c, 0 x04);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x1d, 0 x04);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x1e, 0 x0f);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x1f, 0 x0f);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x20, 0 x0e);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x21, 0 x0e);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x22, 0 x0d);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x23, 0 x0d);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x24, 0 x0c);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x25, 0 x0c);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x26, 0 x08);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x27, 0 x08);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x28, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x29, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x2a, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x2b, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x2d, 0 x20);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x2f, 0 x0a);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x30, 0 x44);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x33, 0 x0c);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x34, 0 x32);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x37, 0 x44);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x38, 0 x40);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x39, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x3a, 0 x5d);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x3b, 0 x60);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x3d, 0 x42);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x3f, 0 x06);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x43, 0 x06);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x47, 0 x66);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x4a, 0 x5d);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x4b, 0 x60);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x4c, 0 x91);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x4d, 0 x21);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x4e, 0 x43);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x51, 0 x12);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x52, 0 x34);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x55, 0 x82, 0 x02);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x56, 0 x04);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x58, 0 x21);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x59, 0 x30);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x5a, 0 x60);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x5b, 0 x50);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x5e, 0 x00, 0 x06);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x5f, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x65, 0 x82);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x7e, 0 x20);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x7f, 0 x3c);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x82, 0 x04);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x97, 0 xc0);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb6, 0 x05, 0 x00, 0 x05, 0 x00, 0 x00, 0 x00, 0 x00, 0 x00,
0 x05, 0 x05, 0 x00, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x91, 0 x44);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x92, 0 xa9);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x93, 0 x1a);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x94, 0 x96);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xd7, 0 x55);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xda, 0 x0a);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xde, 0 x08);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xdb, 0 x05);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xdc, 0 xa9);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xdd, 0 x22);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xdf, 0 x05);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xe0, 0 xa9);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xe1, 0 x05);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xe2, 0 xa9);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xe3, 0 x05);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xe4, 0 xa9);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xe5, 0 x05);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xe6, 0 xa9);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x5c, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x5d, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x8d, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x8e, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb5, 0 x90);
nt36523_switch_page(&ctx, 0 x25);
nt36523_enable_reload_cmds(&ctx);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x05, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x19, 0 x07);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x1f, 0 x60);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x20, 0 x50);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x26, 0 x60);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x27, 0 x50);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x33, 0 x60);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x34, 0 x50);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x3f, 0 xe0);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x40, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x44, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x45, 0 x40);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x48, 0 x60);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x49, 0 x50);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x5b, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x5c, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x5d, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x5e, 0 xd0);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x61, 0 x60);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x62, 0 x50);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xf1, 0 x10);
nt36523_switch_page(&ctx, 0 x2a);
nt36523_enable_reload_cmds(&ctx);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x64, 0 x16);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x67, 0 x16);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x6a, 0 x16);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x70, 0 x30);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xa2, 0 xf3);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xa3, 0 xff);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xa4, 0 xff);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xa5, 0 xff);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xd6, 0 x08);
nt36523_switch_page(&ctx, 0 x26);
nt36523_enable_reload_cmds(&ctx);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x00, 0 xa1);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x02, 0 x31);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x04, 0 x28);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x06, 0 x30);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x0c, 0 x16);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x0d, 0 x0d);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x0f, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x11, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x12, 0 x50);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x13, 0 x56);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x14, 0 x57);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x15, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x16, 0 x10);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x17, 0 xa0);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x18, 0 x86);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x19, 0 x0d);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x1a, 0 x7f);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x1b, 0 x0c);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x1c, 0 xbf);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x22, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x23, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x2a, 0 x0d);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x2b, 0 x7f);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x1d, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x1e, 0 x65);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x1f, 0 x65);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x24, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x25, 0 x65);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x2f, 0 x05);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x30, 0 x65);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x31, 0 x05);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x32, 0 x7d);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x39, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x3a, 0 x65);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x20, 0 x01);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x33, 0 x11);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x34, 0 x78);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x35, 0 x16);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc8, 0 x04);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc9, 0 x9e);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xca, 0 x4e);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xcb, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xa9, 0 x49);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xaa, 0 x4b);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xab, 0 x48);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xac, 0 x43);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xad, 0 x40);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xae, 0 x50);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xaf, 0 x44);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb0, 0 x54);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb1, 0 x4e);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb2, 0 x4d);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb3, 0 x4c);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb4, 0 x41);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb5, 0 x47);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb6, 0 x53);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb7, 0 x3e);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb8, 0 x51);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb9, 0 x3c);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xba, 0 x3b);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xbb, 0 x46);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xbc, 0 x45);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xbd, 0 x55);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xbe, 0 x3d);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xbf, 0 x3f);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc0, 0 x52);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc1, 0 x4a);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc2, 0 x39);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc3, 0 x4f);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc4, 0 x3a);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc5, 0 x42);
nt36523_switch_page(&ctx, 0 x27);
nt36523_enable_reload_cmds(&ctx);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x56, 0 x06);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x58, 0 x80);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x59, 0 x75);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x5a, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x5b, 0 x02);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x5c, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x5d, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x5e, 0 x20);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x5f, 0 x10);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x60, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x61, 0 x2e);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x62, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x63, 0 x01);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x64, 0 x43);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x65, 0 x2d);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x66, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x67, 0 x01);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x68, 0 x44);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x00, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x78, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc3, 0 x00);
nt36523_switch_page(&ctx, 0 x2a);
nt36523_enable_reload_cmds(&ctx);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x22, 0 x2f);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x23, 0 x08);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x24, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x25, 0 x65);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x26, 0 xf8);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x27, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x28, 0 x1a);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x29, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x2a, 0 x1a);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x2b, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x2d, 0 x1a);
nt36523_switch_page(&ctx, 0 x23);
nt36523_enable_reload_cmds(&ctx);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x00, 0 x80);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x07, 0 x00);
nt36523_switch_page(&ctx, 0 xe0);
nt36523_enable_reload_cmds(&ctx);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x14, 0 x60);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x16, 0 xc0);
nt36523_switch_page(&ctx, 0 xf0);
nt36523_enable_reload_cmds(&ctx);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x3a, 0 x08);
nt36523_switch_page(&ctx, 0 x10);
nt36523_enable_reload_cmds(&ctx);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb9, 0 x01);
nt36523_switch_page(&ctx, 0 x20);
nt36523_enable_reload_cmds(&ctx);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x18, 0 x40);
nt36523_switch_page(&ctx, 0 x10);
nt36523_enable_reload_cmds(&ctx);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb9, 0 x02);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x35, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x51, 0 x00, 0 xff);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x53, 0 x24);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x55, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xbb, 0 x13);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x3b, 0 x03, 0 x96, 0 x1a, 0 x04, 0 x04);
mipi_dsi_msleep(&ctx, 100 );
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x11);
mipi_dsi_msleep(&ctx, 200 );
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x29);
mipi_dsi_msleep(&ctx, 100 );
return 0 ;
};
static int inx_hj110iz_init(struct boe_panel *boe)
{
struct mipi_dsi_multi_context ctx = { .dsi = boe->dsi };
nt36523_switch_page(&ctx, 0 x20);
nt36523_enable_reload_cmds(&ctx);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x05, 0 xd1);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x06, 0 xc0);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x07, 0 x87);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x08, 0 x4b);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x0d, 0 x63);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x0e, 0 x91);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x0f, 0 x69);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x94, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x95, 0 xf5);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x96, 0 xf5);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x9d, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x9e, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x69, 0 x98);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x75, 0 xa2);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x77, 0 xb3);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x58, 0 x43);
nt36523_switch_page(&ctx, 0 x24);
nt36523_enable_reload_cmds(&ctx);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x91, 0 x44);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x92, 0 x4c);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x94, 0 x86);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x60, 0 x96);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x61, 0 xd0);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x63, 0 x70);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc2, 0 xca);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x00, 0 x03);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x01, 0 x03);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x02, 0 x03);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x03, 0 x29);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x04, 0 x22);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x05, 0 x22);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x06, 0 x0b);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x07, 0 x1d);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x08, 0 x1c);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x09, 0 x05);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x0a, 0 x08);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x0b, 0 x09);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x0c, 0 x0a);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x0d, 0 x0c);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x0e, 0 x0d);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x0f, 0 x0e);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x10, 0 x0f);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x11, 0 x10);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x12, 0 x11);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x13, 0 x04);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x14, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x15, 0 x03);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x16, 0 x03);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x17, 0 x03);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x18, 0 x03);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x19, 0 x29);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x1a, 0 x22);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x1b, 0 x22);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x1c, 0 x0b);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x1d, 0 x1d);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x1e, 0 x1c);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x1f, 0 x05);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x20, 0 x08);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x21, 0 x09);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x22, 0 x0a);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x23, 0 x0c);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x24, 0 x0d);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x25, 0 x0e);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x26, 0 x0f);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x27, 0 x10);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x28, 0 x11);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x29, 0 x04);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x2a, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x2b, 0 x03);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x2f, 0 x0a);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x30, 0 x35);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x37, 0 xa7);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x39, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x3a, 0 x46);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x3b, 0 x32);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x3d, 0 x12);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x3f, 0 x33);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x40, 0 x31);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x41, 0 x40);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x42, 0 x42);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x47, 0 x77);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x48, 0 x77);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x4a, 0 x45);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x4b, 0 x45);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x4c, 0 x14);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x4d, 0 x21);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x4e, 0 x43);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x4f, 0 x65);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x55, 0 x06);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x56, 0 x06);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x58, 0 x21);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x59, 0 x70);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x5a, 0 x46);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x5b, 0 x32);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x5c, 0 x88);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x5e, 0 x00, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x5f, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x7a, 0 xff);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x7b, 0 xff);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x7c, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x7d, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x7e, 0 x20);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x7f, 0 x3c);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x80, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x81, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x82, 0 x08);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x97, 0 x02);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc5, 0 x10);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xd7, 0 x55);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xd8, 0 x55);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xd9, 0 x23);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xda, 0 x05);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xdb, 0 x01);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xdc, 0 x65);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xdd, 0 x55);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xde, 0 x27);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xdf, 0 x01);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xe0, 0 x65);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xe1, 0 x01);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xe2, 0 x65);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xe3, 0 x01);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xe4, 0 x65);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xe5, 0 x01);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xe6, 0 x65);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xe7, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xe8, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xe9, 0 x01);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xea, 0 x65);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xeb, 0 x01);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xee, 0 x65);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xef, 0 x01);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xf0, 0 x65);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb6, 0 x05, 0 x00, 0 x05, 0 x00, 0 x00, 0 x00, 0 x00, 0 x00,
0 x05, 0 x05, 0 x00, 0 x00);
nt36523_switch_page(&ctx, 0 x25);
nt36523_enable_reload_cmds(&ctx);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x05, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xf1, 0 x10);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x1e, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x1f, 0 x46);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x20, 0 x32);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x25, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x26, 0 x46);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x27, 0 x32);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x3f, 0 x80);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x40, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x43, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x44, 0 x46);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x45, 0 x46);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x48, 0 x46);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x49, 0 x32);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x5b, 0 x80);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x5c, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x5d, 0 x46);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x5e, 0 x32);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x5f, 0 x46);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x60, 0 x32);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x61, 0 x46);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x62, 0 x32);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x68, 0 x0c);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x6c, 0 x0d);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x6e, 0 x0d);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x78, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x79, 0 xc5);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x7a, 0 x0c);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x7b, 0 xb0);
nt36523_switch_page(&ctx, 0 x26);
nt36523_enable_reload_cmds(&ctx);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x00, 0 xa1);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x02, 0 x31);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x0a, 0 xf4);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x04, 0 x50);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x06, 0 x30);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x0c, 0 x16);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x0d, 0 x0d);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x0f, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x11, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x12, 0 x50);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x13, 0 x40);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x14, 0 x58);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x15, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x16, 0 x10);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x17, 0 xa0);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x18, 0 x86);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x22, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x23, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x19, 0 x0e);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x1a, 0 x31);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x1b, 0 x0d);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x1c, 0 x29);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x2a, 0 x0e);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x2b, 0 x31);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x1d, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x1e, 0 x62);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x1f, 0 x62);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x2f, 0 x06);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x30, 0 x62);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x31, 0 x06);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x32, 0 x7f);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x33, 0 x11);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x34, 0 x89);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x35, 0 x67);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x39, 0 x0b);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x3a, 0 x62);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x3b, 0 x06);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc8, 0 x04);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc9, 0 x89);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xca, 0 x4e);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xcb, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xa9, 0 x3f);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xaa, 0 x3e);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xab, 0 x3d);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xac, 0 x3c);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xad, 0 x3b);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xae, 0 x3a);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xaf, 0 x39);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb0, 0 x38);
nt36523_switch_page(&ctx, 0 x27);
nt36523_enable_reload_cmds(&ctx);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xd0, 0 x11);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xd1, 0 x54);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xde, 0 x43);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xdf, 0 x02);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc0, 0 x18);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc1, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc2, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x00, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc3, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x56, 0 x06);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x58, 0 x80);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x59, 0 x78);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x5a, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x5b, 0 x18);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x5c, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x5d, 0 x01);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x5e, 0 x20);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x5f, 0 x10);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x60, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x61, 0 x1c);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x62, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x63, 0 x01);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x64, 0 x44);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x65, 0 x1b);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x66, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x67, 0 x01);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x68, 0 x44);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x98, 0 x01);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb4, 0 x03);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x9b, 0 xbe);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xab, 0 x14);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xbc, 0 x08);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xbd, 0 x28);
nt36523_switch_page(&ctx, 0 x2a);
nt36523_enable_reload_cmds(&ctx);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x22, 0 x2f);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x23, 0 x08);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x24, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x25, 0 x62);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x26, 0 xf8);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x27, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x28, 0 x1a);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x29, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x2a, 0 x1a);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x2b, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x2d, 0 x1a);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x64, 0 x96);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x65, 0 x10);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x66, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x67, 0 x96);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x68, 0 x10);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x69, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x6a, 0 x96);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x6b, 0 x10);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x6c, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x70, 0 x92);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x71, 0 x10);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x72, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x79, 0 x96);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x7a, 0 x10);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x88, 0 x96);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x89, 0 x10);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xa2, 0 x3f);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xa3, 0 x30);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xa4, 0 xc0);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xa5, 0 x03);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xe8, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x97, 0 x3c);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x98, 0 x02);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x99, 0 x95);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x9a, 0 x06);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x9b, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x9c, 0 x0b);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x9d, 0 x0a);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x9e, 0 x90);
nt36523_switch_page(&ctx, 0 x25);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x13, 0 x02);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x14, 0 xd7);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xdb, 0 x02);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xdc, 0 xd7);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x17, 0 xcf);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x19, 0 x0f);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x1b, 0 x5b);
nt36523_switch_page(&ctx, 0 x20);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb0, 0 x00, 0 x00, 0 x00, 0 x0c, 0 x00, 0 x24, 0 x00, 0 x38,
0 x00, 0 x4c, 0 x00, 0 x5e, 0 x00, 0 x6f, 0 x00, 0 x7e);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb1, 0 x00, 0 x8c, 0 x00, 0 xbe, 0 x00, 0 xe5, 0 x01, 0 x27,
0 x01, 0 x58, 0 x01, 0 xa8, 0 x01, 0 xe8, 0 x01, 0 xea);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb2, 0 x02, 0 x28, 0 x02, 0 x71, 0 x02, 0 x9e, 0 x02, 0 xda,
0 x03, 0 x00, 0 x03, 0 x31, 0 x03, 0 x40, 0 x03, 0 x51);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb3, 0 x03, 0 x62, 0 x03, 0 x75, 0 x03, 0 x89, 0 x03, 0 x9c,
0 x03, 0 xaa, 0 x03, 0 xb2);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb4, 0 x00, 0 x00, 0 x00, 0 x0d, 0 x00, 0 x27, 0 x00, 0 x3d,
0 x00, 0 x52, 0 x00, 0 x64, 0 x00, 0 x75, 0 x00, 0 x84);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb5, 0 x00, 0 x93, 0 x00, 0 xc5, 0 x00, 0 xec, 0 x01, 0 x2c,
0 x01, 0 x5d, 0 x01, 0 xac, 0 x01, 0 xec, 0 x01, 0 xee);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb6, 0 x02, 0 x2b, 0 x02, 0 x73, 0 x02, 0 xa0, 0 x02, 0 xdb,
0 x03, 0 x01, 0 x03, 0 x31, 0 x03, 0 x41, 0 x03, 0 x51);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb7, 0 x03, 0 x63, 0 x03, 0 x75, 0 x03, 0 x89, 0 x03, 0 x9c,
0 x03, 0 xaa, 0 x03, 0 xb2);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb8, 0 x00, 0 x00, 0 x00, 0 x0e, 0 x00, 0 x2a, 0 x00, 0 x40,
0 x00, 0 x56, 0 x00, 0 x68, 0 x00, 0 x7a, 0 x00, 0 x89);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb9, 0 x00, 0 x98, 0 x00, 0 xc9, 0 x00, 0 xf1, 0 x01, 0 x30,
0 x01, 0 x61, 0 x01, 0 xb0, 0 x01, 0 xef, 0 x01, 0 xf1);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xba, 0 x02, 0 x2e, 0 x02, 0 x76, 0 x02, 0 xa3, 0 x02, 0 xdd,
0 x03, 0 x02, 0 x03, 0 x32, 0 x03, 0 x42, 0 x03, 0 x53);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xbb, 0 x03, 0 x66, 0 x03, 0 x75, 0 x03, 0 x89, 0 x03, 0 x9c,
0 x03, 0 xaa, 0 x03, 0 xb2);
nt36523_switch_page(&ctx, 0 x21);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb0, 0 x00, 0 x00, 0 x00, 0 x0c, 0 x00, 0 x24, 0 x00, 0 x38,
0 x00, 0 x4c, 0 x00, 0 x5e, 0 x00, 0 x6f, 0 x00, 0 x7e);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb1, 0 x00, 0 x8c, 0 x00, 0 xbe, 0 x00, 0 xe5, 0 x01, 0 x27,
0 x01, 0 x58, 0 x01, 0 xa8, 0 x01, 0 xe8, 0 x01, 0 xea);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb2, 0 x02, 0 x28, 0 x02, 0 x71, 0 x02, 0 x9e, 0 x02, 0 xda,
0 x03, 0 x00, 0 x03, 0 x31, 0 x03, 0 x40, 0 x03, 0 x51);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb3, 0 x03, 0 x62, 0 x03, 0 x77, 0 x03, 0 x90, 0 x03, 0 xac,
0 x03, 0 xca, 0 x03, 0 xda);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb4, 0 x00, 0 x00, 0 x00, 0 x0d, 0 x00, 0 x27, 0 x00, 0 x3d,
0 x00, 0 x52, 0 x00, 0 x64, 0 x00, 0 x75, 0 x00, 0 x84);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb5, 0 x00, 0 x93, 0 x00, 0 xc5, 0 x00, 0 xec, 0 x01, 0 x2c,
0 x01, 0 x5d, 0 x01, 0 xac, 0 x01, 0 xec, 0 x01, 0 xee);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb6, 0 x02, 0 x2b, 0 x02, 0 x73, 0 x02, 0 xa0, 0 x02, 0 xdb,
0 x03, 0 x01, 0 x03, 0 x31, 0 x03, 0 x41, 0 x03, 0 x51);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb7, 0 x03, 0 x63, 0 x03, 0 x77, 0 x03, 0 x90, 0 x03, 0 xac,
0 x03, 0 xca, 0 x03, 0 xda);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb8, 0 x00, 0 x00, 0 x00, 0 x0e, 0 x00, 0 x2a, 0 x00, 0 x40,
0 x00, 0 x56, 0 x00, 0 x68, 0 x00, 0 x7a, 0 x00, 0 x89);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb9, 0 x00, 0 x98, 0 x00, 0 xc9, 0 x00, 0 xf1, 0 x01, 0 x30,
0 x01, 0 x61, 0 x01, 0 xb0, 0 x01, 0 xef, 0 x01, 0 xf1);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xba, 0 x02, 0 x2e, 0 x02, 0 x76, 0 x02, 0 xa3, 0 x02, 0 xdd,
0 x03, 0 x02, 0 x03, 0 x32, 0 x03, 0 x42, 0 x03, 0 x53);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xbb, 0 x03, 0 x66, 0 x03, 0 x77, 0 x03, 0 x90, 0 x03, 0 xac,
0 x03, 0 xca, 0 x03, 0 xda);
nt36523_switch_page(&ctx, 0 xf0);
nt36523_enable_reload_cmds(&ctx);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x3a, 0 x08);
nt36523_switch_page(&ctx, 0 x10);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb9, 0 x01);
nt36523_switch_page(&ctx, 0 x20);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x18, 0 x40);
nt36523_switch_page(&ctx, 0 x10);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb9, 0 x02);
nt36523_switch_page(&ctx, 0 x10);
nt36523_enable_reload_cmds(&ctx);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb0, 0 x01);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x35, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x3b, 0 x03, 0 xae, 0 x1a, 0 x04, 0 x04);
mipi_dsi_msleep(&ctx, 100 );
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x11);
mipi_dsi_msleep(&ctx, 200 );
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x29);
mipi_dsi_msleep(&ctx, 100 );
return 0 ;
};
static int boe_init(struct boe_panel *boe)
{
struct mipi_dsi_multi_context ctx = { .dsi = boe->dsi };
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb0, 0 x05);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb1, 0 xe5);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb3, 0 x52);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb0, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb3, 0 x88);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb0, 0 x04);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb8, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb0, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb6, 0 x03);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xba, 0 x8b);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xbf, 0 x1a);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc0, 0 x0f);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc2, 0 x0c);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc3, 0 x02);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc4, 0 x0c);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc5, 0 x02);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb0, 0 x01);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xe0, 0 x26);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xe1, 0 x26);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xdc, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xdd, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xcc, 0 x26);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xcd, 0 x26);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc8, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc9, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xd2, 0 x03);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xd3, 0 x03);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xe6, 0 x04);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xe7, 0 x04);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc4, 0 x09);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc5, 0 x09);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xd8, 0 x0a);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xd9, 0 x0a);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc2, 0 x0b);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc3, 0 x0b);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xd6, 0 x0c);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xd7, 0 x0c);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc0, 0 x05);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc1, 0 x05);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xd4, 0 x06);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xd5, 0 x06);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xca, 0 x07);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xcb, 0 x07);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xde, 0 x08);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xdf, 0 x08);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb0, 0 x02);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc0, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc1, 0 x0d);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc2, 0 x17);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc3, 0 x26);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc4, 0 x31);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc5, 0 x1c);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc6, 0 x2c);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc7, 0 x33);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc8, 0 x31);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc9, 0 x37);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xca, 0 x37);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xcb, 0 x37);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xcc, 0 x39);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xcd, 0 x2e);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xce, 0 x2f);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xcf, 0 x2f);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xd0, 0 x07);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xd2, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xd3, 0 x0d);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xd4, 0 x17);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xd5, 0 x26);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xd6, 0 x31);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xd7, 0 x3f);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xd8, 0 x3f);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xd9, 0 x3f);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xda, 0 x3f);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xdb, 0 x37);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xdc, 0 x37);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xdd, 0 x37);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xde, 0 x39);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xdf, 0 x2e);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xe0, 0 x2f);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xe1, 0 x2f);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xe2, 0 x07);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb0, 0 x03);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc8, 0 x0b);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc9, 0 x07);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc3, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xe7, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc5, 0 x2a);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xde, 0 x2a);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xca, 0 x43);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc9, 0 x07);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xe4, 0 xc0);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xe5, 0 x0d);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xcb, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb0, 0 x06);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb8, 0 xa5);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc0, 0 xa5);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc7, 0 x0f);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xd5, 0 x32);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb8, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc0, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xbc, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb0, 0 x07);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb1, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb2, 0 x02);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb3, 0 x0f);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb4, 0 x25);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb5, 0 x39);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb6, 0 x4e);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb7, 0 x72);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb8, 0 x97);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb9, 0 xdc);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xba, 0 x22);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xbb, 0 xa4);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xbc, 0 x2b);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xbd, 0 x2f);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xbe, 0 xa9);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xbf, 0 x25);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc0, 0 x61);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc1, 0 x97);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc2, 0 xb2);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc3, 0 xcd);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc4, 0 xd9);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc5, 0 xe7);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc6, 0 xf4);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc7, 0 xfa);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc8, 0 xfc);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc9, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xca, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xcb, 0 x16);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xcc, 0 xaf);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xcd, 0 xff);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xce, 0 xff);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb0, 0 x08);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb1, 0 x04);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb2, 0 x05);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb3, 0 x11);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb4, 0 x24);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb5, 0 x39);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb6, 0 x4f);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb7, 0 x72);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb8, 0 x98);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb9, 0 xdc);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xba, 0 x23);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xbb, 0 xa6);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xbc, 0 x2c);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xbd, 0 x30);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xbe, 0 xaa);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xbf, 0 x26);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc0, 0 x62);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc1, 0 x9b);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc2, 0 xb5);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc3, 0 xcf);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc4, 0 xdb);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc5, 0 xe8);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc6, 0 xf5);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc7, 0 xfa);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc8, 0 xfc);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc9, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xca, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xcb, 0 x16);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xcc, 0 xaf);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xcd, 0 xff);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xce, 0 xff);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb0, 0 x09);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb1, 0 x04);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb2, 0 x02);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb3, 0 x16);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb4, 0 x24);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb5, 0 x3b);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb6, 0 x4f);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb7, 0 x73);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb8, 0 x99);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb9, 0 xe0);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xba, 0 x26);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xbb, 0 xad);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xbc, 0 x36);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xbd, 0 x3a);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xbe, 0 xae);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xbf, 0 x2a);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc0, 0 x66);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc1, 0 x9e);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc2, 0 xb8);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc3, 0 xd1);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc4, 0 xdd);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc5, 0 xe9);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc6, 0 xf6);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc7, 0 xfa);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc8, 0 xfc);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc9, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xca, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xcb, 0 x16);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xcc, 0 xaf);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xcd, 0 xff);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xce, 0 xff);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb0, 0 x0a);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb1, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb2, 0 x02);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb3, 0 x0f);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb4, 0 x25);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb5, 0 x39);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb6, 0 x4e);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb7, 0 x72);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb8, 0 x97);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb9, 0 xdc);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xba, 0 x22);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xbb, 0 xa4);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xbc, 0 x2b);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xbd, 0 x2f);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xbe, 0 xa9);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xbf, 0 x25);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc0, 0 x61);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc1, 0 x97);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc2, 0 xb2);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc3, 0 xcd);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc4, 0 xd9);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc5, 0 xe7);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc6, 0 xf4);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc7, 0 xfa);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc8, 0 xfc);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc9, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xca, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xcb, 0 x16);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xcc, 0 xaf);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xcd, 0 xff);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xce, 0 xff);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb0, 0 x0b);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb1, 0 x04);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb2, 0 x05);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb3, 0 x11);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb4, 0 x24);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb5, 0 x39);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb6, 0 x4f);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb7, 0 x72);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb8, 0 x98);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb9, 0 xdc);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xba, 0 x23);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xbb, 0 xa6);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xbc, 0 x2c);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xbd, 0 x30);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xbe, 0 xaa);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xbf, 0 x26);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc0, 0 x62);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc1, 0 x9b);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc2, 0 xb5);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc3, 0 xcf);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc4, 0 xdb);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc5, 0 xe8);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc6, 0 xf5);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc7, 0 xfa);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc8, 0 xfc);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc9, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xca, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xcb, 0 x16);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xcc, 0 xaf);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xcd, 0 xff);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xce, 0 xff);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb0, 0 x0c);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb1, 0 x04);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb2, 0 x02);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb3, 0 x16);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb4, 0 x24);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb5, 0 x3b);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb6, 0 x4f);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb7, 0 x73);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb8, 0 x99);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb9, 0 xe0);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xba, 0 x26);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xbb, 0 xad);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xbc, 0 x36);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xbd, 0 x3a);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xbe, 0 xae);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xbf, 0 x2a);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc0, 0 x66);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc1, 0 x9e);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc2, 0 xb8);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc3, 0 xd1);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc4, 0 xdd);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc5, 0 xe9);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc6, 0 xf6);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc7, 0 xfa);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc8, 0 xfc);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc9, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xca, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xcb, 0 x16);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xcc, 0 xaf);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xcd, 0 xff);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xce, 0 xff);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb0, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb3, 0 x08);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb0, 0 x04);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb8, 0 x68);
mipi_dsi_msleep(&ctx, 150 );
return 0 ;
};
static int auo_kd101n80_45na_init(struct boe_panel *boe)
{
struct mipi_dsi_multi_context ctx = { .dsi = boe->dsi };
msleep(24 );
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x11);
mipi_dsi_msleep(&ctx, 120 );
mipi_dsi_dcs_write_seq_multi(&ctx, 0 x29);
mipi_dsi_msleep(&ctx, 120 );
return 0 ;
};
static int auo_b101uan08_3_init(struct boe_panel *boe)
{
struct mipi_dsi_multi_context ctx = { .dsi = boe->dsi };
msleep(24 );
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb0, 0 x01);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc0, 0 x48);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc1, 0 x48);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc2, 0 x47);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc3, 0 x47);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc4, 0 x46);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc5, 0 x46);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc6, 0 x45);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc7, 0 x45);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc8, 0 x64);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc9, 0 x64);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xca, 0 x4f);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xcb, 0 x4f);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xcc, 0 x40);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xcd, 0 x40);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xce, 0 x66);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xcf, 0 x66);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xd0, 0 x4f);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xd1, 0 x4f);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xd2, 0 x41);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xd3, 0 x41);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xd4, 0 x48);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xd5, 0 x48);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xd6, 0 x47);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xd7, 0 x47);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xd8, 0 x46);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xd9, 0 x46);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xda, 0 x45);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xdb, 0 x45);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xdc, 0 x64);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xdd, 0 x64);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xde, 0 x4f);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xdf, 0 x4f);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xe0, 0 x40);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xe1, 0 x40);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xe2, 0 x66);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xe3, 0 x66);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xe4, 0 x4f);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xe5, 0 x4f);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xe6, 0 x41);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xe7, 0 x41);
mipi_dsi_msleep(&ctx, 150 );
return 0 ;
};
static int starry_qfh032011_53g_init(struct boe_panel *boe)
{
struct mipi_dsi_multi_context ctx = { .dsi = boe->dsi };
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb0, 0 x01);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc3, 0 x4f);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc4, 0 x40);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc5, 0 x40);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc6, 0 x40);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc7, 0 x40);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc8, 0 x4d);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc9, 0 x52);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xca, 0 x51);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xcd, 0 x5d);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xce, 0 x5b);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xcf, 0 x4b);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xd0, 0 x49);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xd1, 0 x47);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xd2, 0 x45);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xd3, 0 x41);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xd7, 0 x50);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xd8, 0 x40);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xd9, 0 x40);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xda, 0 x40);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xdb, 0 x40);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xdc, 0 x4e);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xdd, 0 x52);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xde, 0 x51);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xe1, 0 x5e);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xe2, 0 x5c);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xe3, 0 x4c);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xe4, 0 x4a);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xe5, 0 x48);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xe6, 0 x46);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xe7, 0 x42);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb0, 0 x03);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xbe, 0 x03);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xcc, 0 x44);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc8, 0 x07);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc9, 0 x05);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xca, 0 x42);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xcd, 0 x3e);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xcf, 0 x60);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xd2, 0 x04);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xd3, 0 x04);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xd4, 0 x01);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xd5, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xd6, 0 x03);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xd7, 0 x04);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xd9, 0 x01);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xdb, 0 x01);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xe4, 0 xf0);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xe5, 0 x0a);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb0, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xcc, 0 x08);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc2, 0 x08);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc4, 0 x10);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xb0, 0 x02);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc0, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc1, 0 x0a);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc2, 0 x20);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc3, 0 x24);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc4, 0 x23);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc5, 0 x29);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc6, 0 x23);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc7, 0 x1c);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc8, 0 x19);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xc9, 0 x17);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xca, 0 x17);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xcb, 0 x18);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xcc, 0 x1a);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xcd, 0 x1e);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xce, 0 x20);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xcf, 0 x23);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xd0, 0 x07);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xd1, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xd2, 0 x00);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xd3, 0 x0a);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xd4, 0 x13);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xd5, 0 x1c);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xd6, 0 x1a);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xd7, 0 x13);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xd8, 0 x17);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xd9, 0 x1c);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xda, 0 x19);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xdb, 0 x17);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xdc, 0 x17);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xdd, 0 x18);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xde, 0 x1a);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xdf, 0 x1e);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xe0, 0 x20);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xe1, 0 x23);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 xe2, 0 x07);
mipi_dsi_dcs_write_seq_multi(&ctx, 0 X11);
mipi_dsi_msleep(&ctx, 120 );
mipi_dsi_dcs_write_seq_multi(&ctx, 0 X29);
mipi_dsi_msleep(&ctx, 80 );
return 0 ;
};
static inline struct boe_panel *to_boe_panel(struct drm_panel *panel)
{
return container_of(panel, struct boe_panel, base);
}
static int boe_panel_disable(struct drm_panel *panel)
{
struct boe_panel *boe = to_boe_panel(panel);
struct mipi_dsi_multi_context ctx = { .dsi = boe->dsi };
boe->dsi->mode_flags &= ~MIPI_DSI_MODE_LPM;
mipi_dsi_dcs_set_display_off_multi(&ctx);
mipi_dsi_dcs_enter_sleep_mode_multi(&ctx);
mipi_dsi_msleep(&ctx, 150 );
return ctx.accum_err;
}
static int boe_panel_unprepare(struct drm_panel *panel)
{
struct boe_panel *boe = to_boe_panel(panel);
if (boe->desc->discharge_on_disable) {
regulator_disable(boe->avee);
regulator_disable(boe->avdd);
usleep_range(5000 , 7000 );
gpiod_set_value(boe->enable_gpio, 0 );
usleep_range(5000 , 7000 );
regulator_disable(boe->pp1800);
regulator_disable(boe->pp3300);
} else {
gpiod_set_value(boe->enable_gpio, 0 );
usleep_range(1000 , 2000 );
regulator_disable(boe->avee);
regulator_disable(boe->avdd);
usleep_range(5000 , 7000 );
regulator_disable(boe->pp1800);
regulator_disable(boe->pp3300);
}
return 0 ;
}
static int boe_panel_prepare(struct drm_panel *panel)
{
struct boe_panel *boe = to_boe_panel(panel);
int ret;
gpiod_set_value(boe->enable_gpio, 0 );
usleep_range(1000 , 1500 );
ret = regulator_enable(boe->pp3300);
if (ret < 0 )
return ret;
ret = regulator_enable(boe->pp1800);
if (ret < 0 )
return ret;
usleep_range(3000 , 5000 );
ret = regulator_enable(boe->avdd);
if (ret < 0 )
goto poweroff1v8;
ret = regulator_enable(boe->avee);
if (ret < 0 )
goto poweroffavdd;
usleep_range(10000 , 11000 );
if (boe->desc->lp11_before_reset) {
ret = mipi_dsi_dcs_nop(boe->dsi);
if (ret < 0 ) {
dev_err(&boe->dsi->dev, "Failed to send NOP: %d\n" , ret);
goto poweroff;
}
usleep_range(1000 , 2000 );
}
gpiod_set_value(boe->enable_gpio, 1 );
usleep_range(1000 , 2000 );
gpiod_set_value(boe->enable_gpio, 0 );
usleep_range(1000 , 2000 );
gpiod_set_value(boe->enable_gpio, 1 );
usleep_range(6000 , 10000 );
ret = boe->desc->init(boe);
if (ret < 0 )
goto poweroff;
return 0 ;
poweroff:
gpiod_set_value(boe->enable_gpio, 0 );
regulator_disable(boe->avee);
poweroffavdd:
regulator_disable(boe->avdd);
poweroff1v8:
usleep_range(5000 , 7000 );
regulator_disable(boe->pp1800);
return ret;
}
static int boe_panel_enable(struct drm_panel *panel)
{
msleep(130 );
return 0 ;
}
static const struct drm_display_mode boe_tv110c9m_default_mode = {
.clock = 166594 ,
.hdisplay = 1200 ,
.hsync_start = 1200 + 40 ,
.hsync_end = 1200 + 40 + 8 ,
.htotal = 1200 + 40 + 8 + 28 ,
.vdisplay = 2000 ,
.vsync_start = 2000 + 26 ,
.vsync_end = 2000 + 26 + 2 ,
.vtotal = 2000 + 26 + 2 + 148 ,
.type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
};
static const struct panel_desc boe_tv110c9m_desc = {
.modes = &boe_tv110c9m_default_mode,
.bpc = 8 ,
.size = {
.width_mm = 143 ,
.height_mm = 238 ,
},
.lanes = 4 ,
.format = MIPI_DSI_FMT_RGB888,
.mode_flags = MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_VIDEO
| MIPI_DSI_MODE_VIDEO_HSE
| MIPI_DSI_CLOCK_NON_CONTINUOUS
| MIPI_DSI_MODE_VIDEO_BURST,
.init = boe_tv110c9m_init,
};
static const struct drm_display_mode inx_hj110iz_default_mode = {
.clock = 168432 ,
.hdisplay = 1200 ,
.hsync_start = 1200 + 40 ,
.hsync_end = 1200 + 40 + 8 ,
.htotal = 1200 + 40 + 8 + 28 ,
.vdisplay = 2000 ,
.vsync_start = 2000 + 26 ,
.vsync_end = 2000 + 26 + 2 ,
.vtotal = 2000 + 26 + 2 + 172 ,
.type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
};
static const struct panel_desc inx_hj110iz_desc = {
.modes = &inx_hj110iz_default_mode,
.bpc = 8 ,
.size = {
.width_mm = 143 ,
.height_mm = 238 ,
},
.lanes = 4 ,
.format = MIPI_DSI_FMT_RGB888,
.mode_flags = MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_VIDEO
| MIPI_DSI_MODE_VIDEO_HSE
| MIPI_DSI_CLOCK_NON_CONTINUOUS
| MIPI_DSI_MODE_VIDEO_BURST,
.init = inx_hj110iz_init,
};
static const struct drm_display_mode boe_tv101wum_nl6_default_mode = {
.clock = 159425 ,
.hdisplay = 1200 ,
.hsync_start = 1200 + 100 ,
.hsync_end = 1200 + 100 + 40 ,
.htotal = 1200 + 100 + 40 + 24 ,
.vdisplay = 1920 ,
.vsync_start = 1920 + 10 ,
.vsync_end = 1920 + 10 + 14 ,
.vtotal = 1920 + 10 + 14 + 4 ,
};
static const struct panel_desc boe_tv101wum_nl6_desc = {
.modes = &boe_tv101wum_nl6_default_mode,
.bpc = 8 ,
.size = {
.width_mm = 135 ,
.height_mm = 216 ,
},
.lanes = 4 ,
.format = MIPI_DSI_FMT_RGB888,
.mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
MIPI_DSI_MODE_LPM,
.init = boe_init,
.discharge_on_disable = false ,
};
static const struct drm_display_mode auo_kd101n80_45na_default_mode = {
.clock = 157000 ,
.hdisplay = 1200 ,
.hsync_start = 1200 + 60 ,
.hsync_end = 1200 + 60 + 24 ,
.htotal = 1200 + 60 + 24 + 56 ,
.vdisplay = 1920 ,
.vsync_start = 1920 + 16 ,
.vsync_end = 1920 + 16 + 4 ,
.vtotal = 1920 + 16 + 4 + 16 ,
};
static const struct panel_desc auo_kd101n80_45na_desc = {
.modes = &auo_kd101n80_45na_default_mode,
.bpc = 8 ,
.size = {
.width_mm = 135 ,
.height_mm = 216 ,
},
.lanes = 4 ,
.format = MIPI_DSI_FMT_RGB888,
.mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
MIPI_DSI_MODE_LPM,
.init = auo_kd101n80_45na_init,
.discharge_on_disable = true ,
};
static const struct drm_display_mode boe_tv101wum_n53_default_mode = {
.clock = 159916 ,
.hdisplay = 1200 ,
.hsync_start = 1200 + 80 ,
.hsync_end = 1200 + 80 + 24 ,
.htotal = 1200 + 80 + 24 + 60 ,
.vdisplay = 1920 ,
.vsync_start = 1920 + 20 ,
.vsync_end = 1920 + 20 + 4 ,
.vtotal = 1920 + 20 + 4 + 10 ,
.type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
};
static const struct panel_desc boe_tv101wum_n53_desc = {
.modes = &boe_tv101wum_n53_default_mode,
.bpc = 8 ,
.size = {
.width_mm = 135 ,
.height_mm = 216 ,
},
.lanes = 4 ,
.format = MIPI_DSI_FMT_RGB888,
.mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
MIPI_DSI_MODE_LPM,
.init = boe_init,
};
static const struct drm_display_mode auo_b101uan08_3_default_mode = {
.clock = 159667 ,
.hdisplay = 1200 ,
.hsync_start = 1200 + 60 ,
.hsync_end = 1200 + 60 + 4 ,
.htotal = 1200 + 60 + 4 + 80 ,
.vdisplay = 1920 ,
.vsync_start = 1920 + 34 ,
.vsync_end = 1920 + 34 + 2 ,
.vtotal = 1920 + 34 + 2 + 24 ,
.type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
};
static const struct panel_desc auo_b101uan08_3_desc = {
.modes = &auo_b101uan08_3_default_mode,
.bpc = 8 ,
.size = {
.width_mm = 135 ,
.height_mm = 216 ,
},
.lanes = 4 ,
.format = MIPI_DSI_FMT_RGB888,
.mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
MIPI_DSI_MODE_LPM,
.init = auo_b101uan08_3_init,
.lp11_before_reset = true ,
};
static const struct drm_display_mode boe_tv105wum_nw0_default_mode = {
.clock = 159916 ,
.hdisplay = 1200 ,
.hsync_start = 1200 + 80 ,
.hsync_end = 1200 + 80 + 24 ,
.htotal = 1200 + 80 + 24 + 60 ,
.vdisplay = 1920 ,
.vsync_start = 1920 + 20 ,
.vsync_end = 1920 + 20 + 4 ,
.vtotal = 1920 + 20 + 4 + 10 ,
.type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
};
static const struct panel_desc boe_tv105wum_nw0_desc = {
.modes = &boe_tv105wum_nw0_default_mode,
.bpc = 8 ,
.size = {
.width_mm = 141 ,
.height_mm = 226 ,
},
.lanes = 4 ,
.format = MIPI_DSI_FMT_RGB888,
.mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
MIPI_DSI_MODE_LPM,
.init = boe_init,
.lp11_before_reset = true ,
};
static const struct drm_display_mode starry_qfh032011_53g_default_mode = {
.clock = 165731 ,
.hdisplay = 1200 ,
.hsync_start = 1200 + 100 ,
.hsync_end = 1200 + 100 + 10 ,
.htotal = 1200 + 100 + 10 + 100 ,
.vdisplay = 1920 ,
.vsync_start = 1920 + 14 ,
.vsync_end = 1920 + 14 + 10 ,
.vtotal = 1920 + 14 + 10 + 15 ,
};
static const struct panel_desc starry_qfh032011_53g_desc = {
.modes = &starry_qfh032011_53g_default_mode,
.bpc = 8 ,
.size = {
.width_mm = 135 ,
.height_mm = 216 ,
},
.lanes = 4 ,
.format = MIPI_DSI_FMT_RGB888,
.mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
MIPI_DSI_MODE_LPM,
.init = starry_qfh032011_53g_init,
.lp11_before_reset = true ,
};
static int boe_panel_get_modes(struct drm_panel *panel,
struct drm_connector *connector)
{
struct boe_panel *boe = to_boe_panel(panel);
const struct drm_display_mode *m = boe->desc->modes;
struct drm_display_mode *mode;
mode = drm_mode_duplicate(connector->dev, m);
if (!mode) {
dev_err(panel->dev, "failed to add mode %ux%u@%u\n" ,
m->hdisplay, m->vdisplay, drm_mode_vrefresh(m));
return -ENOMEM;
}
mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
drm_mode_set_name(mode);
drm_mode_probed_add(connector, mode);
connector->display_info.width_mm = boe->desc->size.width_mm;
connector->display_info.height_mm = boe->desc->size.height_mm;
connector->display_info.bpc = boe->desc->bpc;
/*
* TODO: Remove once all drm drivers call
* drm_connector_set_orientation_from_panel()
*/
drm_connector_set_panel_orientation(connector, boe->orientation);
return 1 ;
}
static enum drm_panel_orientation boe_panel_get_orientation(struct drm_panel *panel)
{
struct boe_panel *boe = to_boe_panel(panel);
return boe->orientation;
}
static const struct drm_panel_funcs boe_panel_funcs = {
.disable = boe_panel_disable,
.unprepare = boe_panel_unprepare,
.prepare = boe_panel_prepare,
.enable = boe_panel_enable,
.get_modes = boe_panel_get_modes,
.get_orientation = boe_panel_get_orientation,
};
static int boe_panel_add(struct boe_panel *boe)
{
struct device *dev = &boe->dsi->dev;
int err;
boe->avdd = devm_regulator_get(dev, "avdd" );
if (IS_ERR(boe->avdd))
return PTR_ERR(boe->avdd);
boe->avee = devm_regulator_get(dev, "avee" );
if (IS_ERR(boe->avee))
return PTR_ERR(boe->avee);
boe->pp3300 = devm_regulator_get(dev, "pp3300" );
if (IS_ERR(boe->pp3300))
return PTR_ERR(boe->pp3300);
boe->pp1800 = devm_regulator_get(dev, "pp1800" );
if (IS_ERR(boe->pp1800))
return PTR_ERR(boe->pp1800);
boe->enable_gpio = devm_gpiod_get(dev, "enable" , GPIOD_OUT_LOW);
if (IS_ERR(boe->enable_gpio)) {
dev_err(dev, "cannot get reset-gpios %ld\n" ,
PTR_ERR(boe->enable_gpio));
return PTR_ERR(boe->enable_gpio);
}
gpiod_set_value(boe->enable_gpio, 0 );
boe->base.prepare_prev_first = true ;
err = of_drm_get_panel_orientation(dev->of_node, &boe->orientation);
if (err < 0 ) {
dev_err(dev, "%pOF: failed to get orientation %d\n" , dev->of_node, err);
return err;
}
err = drm_panel_of_backlight(&boe->base);
if (err)
return err;
boe->base.funcs = &boe_panel_funcs;
boe->base.dev = &boe->dsi->dev;
drm_panel_add(&boe->base);
return 0 ;
}
static int boe_panel_probe(struct mipi_dsi_device *dsi)
{
struct boe_panel *boe;
int ret;
const struct panel_desc *desc;
boe = devm_drm_panel_alloc(&dsi->dev, __typeof(*boe), base,
&boe_panel_funcs, DRM_MODE_CONNECTOR_DSI);
if (IS_ERR(boe))
return PTR_ERR(boe);
desc = of_device_get_match_data(&dsi->dev);
dsi->lanes = desc->lanes;
dsi->format = desc->format;
dsi->mode_flags = desc->mode_flags;
boe->desc = desc;
boe->dsi = dsi;
ret = boe_panel_add(boe);
if (ret < 0 )
return ret;
mipi_dsi_set_drvdata(dsi, boe);
ret = mipi_dsi_attach(dsi);
if (ret)
drm_panel_remove(&boe->base);
return ret;
}
static void boe_panel_remove(struct mipi_dsi_device *dsi)
{
struct boe_panel *boe = mipi_dsi_get_drvdata(dsi);
int ret;
ret = mipi_dsi_detach(dsi);
if (ret < 0 )
dev_err(&dsi->dev, "failed to detach from DSI host: %d\n" , ret);
if (boe->base.dev)
drm_panel_remove(&boe->base);
}
static const struct of_device_id boe_of_match[] = {
{ .compatible = "boe,tv101wum-nl6" ,
.data = &boe_tv101wum_nl6_desc
},
{ .compatible = "auo,kd101n80-45na" ,
.data = &auo_kd101n80_45na_desc
},
{ .compatible = "boe,tv101wum-n53" ,
.data = &boe_tv101wum_n53_desc
},
{ .compatible = "auo,b101uan08.3" ,
.data = &auo_b101uan08_3_desc
},
{ .compatible = "boe,tv105wum-nw0" ,
.data = &boe_tv105wum_nw0_desc
},
{ .compatible = "boe,tv110c9m-ll3" ,
.data = &boe_tv110c9m_desc
},
{ .compatible = "innolux,hj110iz-01a" ,
.data = &inx_hj110iz_desc
},
{ .compatible = "starry,2081101qfh032011-53g" ,
.data = &starry_qfh032011_53g_desc
},
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, boe_of_match);
static struct mipi_dsi_driver boe_panel_driver = {
.driver = {
.name = "panel-boe-tv101wum-nl6" ,
.of_match_table = boe_of_match,
},
.probe = boe_panel_probe,
.remove = boe_panel_remove,
};
module_mipi_dsi_driver(boe_panel_driver);
MODULE_AUTHOR("Jitao Shi <jitao.shi@mediatek.com>" );
MODULE_DESCRIPTION("BOE tv101wum-nl6 1200x1920 video mode panel driver" );
MODULE_LICENSE("GPL v2" );
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(vorverarbeitet am 2026-06-07)
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