/* * Copyright 2009 Marcin Kościelnicki * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. #define CP_FLAG_CLEAR 0 #define CP_FLAG_SET 1 #define CP_FLAG_SWAP_DIRECTION ((0 * 32 ) + 0 )#define CP_FLAG_SWAP_DIRECTION_LOAD 0 #define CP_FLAG_SWAP_DIRECTION_SAVE 1 #define CP_FLAG_UNK01 ((0 * 32 ) + 1 )#define CP_FLAG_UNK01_CLEAR 0 #define CP_FLAG_UNK01_SET 1 #define CP_FLAG_UNK03 ((0 * 32 ) + 3 )#define CP_FLAG_UNK03_CLEAR 0 #define CP_FLAG_UNK03_SET 1 #define CP_FLAG_USER_SAVE ((0 * 32 ) + 5 )#define CP_FLAG_USER_SAVE_NOT_PENDING 0 #define CP_FLAG_USER_SAVE_PENDING 1 #define CP_FLAG_USER_LOAD ((0 * 32 ) + 6 )#define CP_FLAG_USER_LOAD_NOT_PENDING 0 #define CP_FLAG_USER_LOAD_PENDING 1 #define CP_FLAG_UNK0B ((0 * 32 ) + 0 xb)#define CP_FLAG_UNK0B_CLEAR 0 #define CP_FLAG_UNK0B_SET 1 #define CP_FLAG_XFER_SWITCH ((0 * 32 ) + 0 xe)#define CP_FLAG_XFER_SWITCH_DISABLE 0 #define CP_FLAG_XFER_SWITCH_ENABLE 1 #define CP_FLAG_STATE ((0 * 32 ) + 0 x1c)#define CP_FLAG_STATE_STOPPED 0 #define CP_FLAG_STATE_RUNNING 1 #define CP_FLAG_UNK1D ((0 * 32 ) + 0 x1d)#define CP_FLAG_UNK1D_CLEAR 0 #define CP_FLAG_UNK1D_SET 1 #define CP_FLAG_UNK20 ((1 * 32 ) + 0 )#define CP_FLAG_UNK20_CLEAR 0 #define CP_FLAG_UNK20_SET 1 #define CP_FLAG_STATUS ((2 * 32 ) + 0 )#define CP_FLAG_STATUS_BUSY 0 #define CP_FLAG_STATUS_IDLE 1 #define CP_FLAG_AUTO_SAVE ((2 * 32 ) + 4 )#define CP_FLAG_AUTO_SAVE_NOT_PENDING 0 #define CP_FLAG_AUTO_SAVE_PENDING 1 #define CP_FLAG_AUTO_LOAD ((2 * 32 ) + 5 )#define CP_FLAG_AUTO_LOAD_NOT_PENDING 0 #define CP_FLAG_AUTO_LOAD_PENDING 1 #define CP_FLAG_NEWCTX ((2 * 32 ) + 10 )#define CP_FLAG_NEWCTX_BUSY 0 #define CP_FLAG_NEWCTX_DONE 1 #define CP_FLAG_XFER ((2 * 32 ) + 11 )#define CP_FLAG_XFER_IDLE 0 #define CP_FLAG_XFER_BUSY 1 #define CP_FLAG_ALWAYS ((2 * 32 ) + 13 )#define CP_FLAG_ALWAYS_FALSE 0 #define CP_FLAG_ALWAYS_TRUE 1 #define CP_FLAG_INTR ((2 * 32 ) + 15 )#define CP_FLAG_INTR_NOT_PENDING 0 #define CP_FLAG_INTR_PENDING 1 #define CP_CTX 0 x00100000#define CP_CTX_COUNT 0 x000f0000#define CP_CTX_COUNT_SHIFT 16 #define CP_CTX_REG 0 x00003fff#define CP_LOAD_SR 0 x00200000#define CP_LOAD_SR_VALUE 0 x000fffff#define CP_BRA 0 x00400000#define CP_BRA_IP 0 x0001ff00#define CP_BRA_IP_SHIFT 8 #define CP_BRA_IF_CLEAR 0 x00000080#define CP_BRA_FLAG 0 x0000007f#define CP_WAIT 0 x00500000#define CP_WAIT_SET 0 x00000080#define CP_WAIT_FLAG 0 x0000007f#define CP_SET 0 x00700000#define CP_SET_1 0 x00000080#define CP_SET_FLAG 0 x0000007f#define CP_NEWCTX 0 x00600004#define CP_NEXT_TO_SWAP 0 x00600005#define CP_SET_CONTEXT_POINTER 0 x00600006#define CP_SET_XFER_POINTER 0 x00600007#define CP_ENABLE 0 x00600009#define CP_END 0 x0060000c#define CP_NEXT_TO_CURRENT 0 x0060000d#define CP_DISABLE1 0 x0090ffff#define CP_DISABLE2 0 x0091ffff#define CP_XFER_1 0 x008000ff#define CP_XFER_2 0 x008800ff#define CP_SEEK_1 0 x00c000ff#define CP_SEEK_2 0 x00c800ff#include "ctxnv40.h" #include "nv50.h" #include <subdev/fb.h>#define IS_NVA3F(x) (((x) > 0 xa0 && (x) < 0 xaa) || (x) == 0 xaf)#define IS_NVAAF(x) ((x) >= 0 xaa && (x) <= 0 xac)/* * This code deals with PGRAPH contexts on NV50 family cards. Like NV40, it's * the GPU itself that does context-switching, but it needs a special * microcode to do it. And it's the driver's task to supply this microcode, * further known as ctxprog, as well as the initial context values, known * as ctxvals. * * Without ctxprog, you cannot switch contexts. Not even in software, since * the majority of context [xfer strands] isn't accessible directly. You're * stuck with a single channel, and you also suffer all the problems resulting * from missing ctxvals, since you cannot load them. * * Without ctxvals, you're stuck with PGRAPH's default context. It's enough to * run 2d operations, but trying to utilise 3d or CUDA will just lock you up, * since you don't have... some sort of needed setup. * * Nouveau will just disable acceleration if not given ctxprog + ctxvals, since * it's too much hassle to handle no-ctxprog as a special case. /* * How ctxprogs work. * * The ctxprog is written in its own kind of microcode, with very small and * crappy set of available commands. You upload it to a small [512 insns] * area of memory on PGRAPH, and it'll be run when PFIFO wants PGRAPH to * switch channel. or when the driver explicitely requests it. Stuff visible * to ctxprog consists of: PGRAPH MMIO registers, PGRAPH context strands, * the per-channel context save area in VRAM [known as ctxvals or grctx], * 4 flags registers, a scratch register, two grctx pointers, plus many * random poorly-understood details. * * When ctxprog runs, it's supposed to check what operations are asked of it, * save old context if requested, optionally reset PGRAPH and switch to the * new channel, and load the new context. Context consists of three major * parts: subset of MMIO registers and two "xfer areas". /* TODO: * - document unimplemented bits compared to nvidia * - NVAx: make a TP subroutine, use it. * - use 0x4008fc instead of 0x1540? enum cp_label {1 ,static void nv50_gr_construct_mmio(struct nvkm_grctx *ctx);static void nv50_gr_construct_xfer1(struct nvkm_grctx *ctx);static void nv50_gr_construct_xfer2(struct nvkm_grctx *ctx);/* Main function: construct the ctxprog skeleton, call the other functions. */ static int struct nvkm_grctx *ctx)/* decide whether we're loading/unloading the context */ TRUE , cp_prepare_exit);/* setup for context load */ TRUE , cp_swap_state);/* setup for context save */ /* general PGRAPH state */ 0 x00004/4 );0 x400828, 1 ); /* needed. otherwise, flickering happens. */ 0 x00100/4 );/* no idea why this is needed, but fixes at least one lockup. */ 4 );/* pre-exit state updates */ 0 x400; /* padding... no idea why you need it */ return 0 ;void struct nvkm_device *device, struct nvkm_gpuobj *mem)struct nvkm_grctx) {int struct nvkm_device *device, u32 *size)512 * 4 , GFP_KERNEL), i;struct nvkm_grctx ctx = {512 ,if (!ctxprog)return -ENOMEM;0 x400324, 0 );for (i = 0 ; i < ctx.ctxprog_len; i++)0 x400328, ctxprog[i]);4 ;return 0 ;/* * Constructs MMIO part of ctxprog and ctxvals. Just a matter of knowing which * registers to save/restore and the default values for them. static void struct nvkm_grctx *ctx);static void struct nvkm_grctx *ctx)struct nvkm_device *device = ctx->device;int i, j;int offset, base;0 x1540);/* 0800: DISPATCH */ 0 x400808, 7 );0 x400814, 0 x00000030);0 x400834, 0 x32);if (device->chipset == 0 x50) {0 x400834, 0 xff400040);0 x400838, 0 xfff00080);0 x40083c, 0 xfff70090);0 x400840, 0 xffe806a8);0 x400844, 0 x00000002);if (IS_NVA3F(device->chipset))0 x400894, 0 x00001000);0 x4008e8, 0 x00000003);0 x4008ec, 0 x00001000);if (device->chipset == 0 x50)0 x400908, 0 xb);else if (device->chipset < 0 xa0)0 x400908, 0 xc);else 0 x400908, 0 xe);if (device->chipset >= 0 xa0)0 x400b00, 0 x1);if (IS_NVA3F(device->chipset)) {0 x400b10, 0 x1);0 x400b10, 0 x0001629d);0 x400b20, 0 x1);0 x400b20, 0 x0001629d);/* 0C00: VFETCH */ 0 x400c08, 0 x2);0 x400c08, 0 x0000fe0c);/* 1000 */ if (device->chipset < 0 xa0) {0 x401008, 0 x4);0 x401014, 0 x00001000);else if (!IS_NVA3F(device->chipset)) {0 x401008, 0 x5);0 x401018, 0 x00001000);else {0 x401008, 0 x5);0 x401018, 0 x00004000);/* 1400 */ 0 x401400, 0 x8);0 x401424, 0 x3);if (device->chipset == 0 x50)0 x40142c, 0 x0001fd87);else 0 x40142c, 0 x00000187);0 x401540, 0 x5);0 x401550, 0 x00001018);/* 1800: STREAMOUT */ 0 x401814, 0 x1);0 x401814, 0 x000000ff);if (device->chipset == 0 x50) {0 x40181c, 0 xe);0 x401850, 0 x00000004);else if (device->chipset < 0 xa0) {0 x40181c, 0 xf);0 x401854, 0 x00000004);else {0 x40181c, 0 x13);0 x401864, 0 x00000004);/* 1C00 */ 0 x401c00, 0 x1);switch (device->chipset) {case 0 x50:0 x401c00, 0 x0001005f);break ;case 0 x84:case 0 x86:case 0 x94:0 x401c00, 0 x044d00df);break ;case 0 x92:case 0 x96:case 0 x98:case 0 xa0:case 0 xaa:case 0 xac:0 x401c00, 0 x042500df);break ;case 0 xa3:case 0 xa5:case 0 xa8:case 0 xaf:0 x401c00, 0 x142500df);break ;/* 2000 */ /* 2400 */ 0 x402400, 0 x1);if (device->chipset == 0 x50)0 x402408, 0 x1);else 0 x402408, 0 x2);0 x402408, 0 x00000600);/* 2800: CSCHED */ 0 x402800, 0 x1);if (device->chipset == 0 x50)0 x402800, 0 x00000006);/* 2C00: ZCULL */ 0 x402c08, 0 x6);if (device->chipset != 0 x50)0 x402c14, 0 x01000000);0 x402c18, 0 x000000ff);if (device->chipset == 0 x50)0 x402ca0, 0 x1);else 0 x402ca0, 0 x2);if (device->chipset < 0 xa0)0 x402ca0, 0 x00000400);else if (!IS_NVA3F(device->chipset))0 x402ca0, 0 x00000800);else 0 x402ca0, 0 x00000400);0 x402cac, 0 x4);/* 3000: ENG2D */ 0 x403004, 0 x1);0 x403004, 0 x00000001);/* 3400 */ if (device->chipset >= 0 xa0) {0 x403404, 0 x1);0 x403404, 0 x00000001);/* 5000: CCACHE */ 0 x405000, 0 x1);switch (device->chipset) {case 0 x50:0 x405000, 0 x00300080);break ;case 0 x84:case 0 xa0:case 0 xa3:case 0 xa5:case 0 xa8:case 0 xaa:case 0 xac:case 0 xaf:0 x405000, 0 x000e0080);break ;case 0 x86:case 0 x92:case 0 x94:case 0 x96:case 0 x98:0 x405000, 0 x00000080);break ;0 x405014, 0 x1);0 x405014, 0 x00000004);0 x40501c, 0 x1);0 x405024, 0 x1);0 x40502c, 0 x1);/* 6000? */ if (device->chipset == 0 x50)0 x4063e0, 0 x1);/* 6800: M2MF */ if (device->chipset < 0 x90) {0 x406814, 0 x2b);0 x406818, 0 x00000f80);0 x406860, 0 x007f0080);0 x40689c, 0 x007f0080);else {0 x406814, 0 x4);if (device->chipset == 0 x98)0 x406818, 0 x00000f80);else 0 x406818, 0 x00001f80);if (IS_NVA3F(device->chipset))0 x40681c, 0 x00000030);0 x406830, 0 x3);/* 7000: per-ROP group state */ for (i = 0 ; i < 8 ; i++) {if (units & (1 <<(i+16 ))) {0 x407000 + (i<<8 ), 3 );if (device->chipset == 0 x50)0 x407000 + (i<<8 ), 0 x1b74f820);else if (device->chipset != 0 xa5)0 x407000 + (i<<8 ), 0 x3b74f821);else 0 x407000 + (i<<8 ), 0 x7b74f821);0 x407004 + (i<<8 ), 0 x89058001);if (device->chipset == 0 x50) {0 x407010 + (i<<8 ), 1 );else if (device->chipset < 0 xa0) {0 x407010 + (i<<8 ), 2 );0 x407010 + (i<<8 ), 0 x00001000);0 x407014 + (i<<8 ), 0 x0000001f);else {0 x407010 + (i<<8 ), 3 );0 x407010 + (i<<8 ), 0 x00001000);if (device->chipset != 0 xa5)0 x407014 + (i<<8 ), 0 x000000ff);else 0 x407014 + (i<<8 ), 0 x000001ff);0 x407080 + (i<<8 ), 4 );if (device->chipset != 0 xa5)0 x407080 + (i<<8 ), 0 x027c10fa);else 0 x407080 + (i<<8 ), 0 x827c10fa);if (device->chipset == 0 x50)0 x407084 + (i<<8 ), 0 x000000c0);else 0 x407084 + (i<<8 ), 0 x400000c0);0 x407088 + (i<<8 ), 0 xb7892080);if (device->chipset < 0 xa0)0 x407094 + (i<<8 ), 1 );else if (!IS_NVA3F(device->chipset))0 x407094 + (i<<8 ), 3 );else {0 x407094 + (i<<8 ), 4 );0 x4070a0 + (i<<8 ), 1 );0 x407c00, 0 x3);if (device->chipset < 0 x90)0 x407c00, 0 x00010040);else if (device->chipset < 0 xa0)0 x407c00, 0 x00390040);else 0 x407c00, 0 x003d0040);0 x407c08, 0 x00000022);if (device->chipset >= 0 xa0) {0 x407c10, 0 x3);0 x407c20, 0 x1);0 x407c2c, 0 x1);if (device->chipset < 0 xa0) {0 x407d00, 0 x9);else {0 x407d00, 0 x15);if (device->chipset == 0 x98)0 x407d08, 0 x00380040);else {if (device->chipset < 0 x90)0 x407d08, 0 x00010040);else if (device->chipset < 0 xa0)0 x407d08, 0 x00390040);else {if (device->fb->ram->type != NVKM_RAM_TYPE_GDDR5)0 x407d08, 0 x003d0040);else 0 x407d08, 0 x003c0040);0 x407d0c, 0 x00000022);/* 8000+: per-TP state */ for (i = 0 ; i < 10 ; i++) {if (units & (1 <<i)) {if (device->chipset < 0 xa0)0 x408000 + (i<<12 );else 0 x408000 + (i<<11 );if (device->chipset < 0 xa0)0 xc00;else 0 x80;0 x00, 1 );0 x00, 0 x0000ff0a);0 x08, 1 );/* per-MP state */ for (j = 0 ; j < (device->chipset < 0 xa0 ? 2 : 4 ); j++) {if (!(units & (1 << (j+24 )))) continue ;if (device->chipset < 0 xa0)0 x200 + (j<<7 );else 0 x100 + (j<<7 );0 x20);0 x00, 0 x01800000);0 x04, 0 x00160000);0 x08, 0 x01800000);0 x18, 0 x0003ffff);switch (device->chipset) {case 0 x50:0 x1c, 0 x00080000);break ;case 0 x84:0 x1c, 0 x00880000);break ;case 0 x86:0 x1c, 0 x018c0000);break ;case 0 x92:case 0 x96:case 0 x98:0 x1c, 0 x118c0000);break ;case 0 x94:0 x1c, 0 x10880000);break ;case 0 xa0:case 0 xa5:0 x1c, 0 x310c0000);break ;case 0 xa3:case 0 xa8:case 0 xaa:case 0 xac:case 0 xaf:0 x1c, 0 x300c0000);break ;0 x40, 0 x00010401);if (device->chipset == 0 x50)0 x48, 0 x00000040);else 0 x48, 0 x00000078);0 x50, 0 x000000bf);0 x58, 0 x00001210);if (device->chipset == 0 x50)0 x5c, 0 x00000080);else 0 x5c, 0 x08000080);if (device->chipset >= 0 xa0)0 x68, 0 x0000003e);if (device->chipset < 0 xa0)0 x300, 0 x4);else 0 x300, 0 x5);if (device->chipset == 0 x50)0 x304, 0 x00007070);else if (device->chipset < 0 xa0)0 x304, 0 x00027070);else if (!IS_NVA3F(device->chipset))0 x304, 0 x01127070);else 0 x304, 0 x05127070);if (device->chipset < 0 xa0)0 x318, 1 );else 0 x320, 1 );if (device->chipset == 0 x50)0 x318, 0 x0003ffff);else if (device->chipset < 0 xa0)0 x318, 0 x03ffffff);else 0 x320, 0 x07ffffff);if (device->chipset < 0 xa0)0 x324, 5 );else 0 x328, 4 );if (device->chipset < 0 xa0) {0 x340, 9 );0 x340;else if (!IS_NVA3F(device->chipset)) {0 x33c, 0 xb);0 x344;else {0 x33c, 0 xd);0 x344;0 x0, 0 x00120407);0 x4, 0 x05091507);if (device->chipset == 0 x84)0 x8, 0 x05100202);else 0 x8, 0 x05010202);0 xc, 0 x00030201);if (device->chipset == 0 xa3)0 x36c, 1 );0 x400, 2 );0 x404, 0 x00000040);0 x40c, 2 );0 x40c, 0 x0d0c0b0a);0 x410, 0 x00141210);if (device->chipset < 0 xa0)0 x800;else 0 x500;6 );0 x0, 0 x000001f0);0 x4, 0 x00000001);0 x8, 0 x00000003);if (device->chipset == 0 x50 || IS_NVAAF(device->chipset))0 xc, 0 x00008000);0 x14, 0 x00039e00);0 x1c, 2 );if (device->chipset == 0 x50)0 x1c, 0 x00000040);else 0 x1c, 0 x00000100);0 x20, 0 x00003800);if (device->chipset >= 0 xa0) {0 x54c, 2 );if (!IS_NVA3F(device->chipset))0 x54c, 0 x003fe006);else 0 x54c, 0 x003fe007);0 x550, 0 x003fe000);if (device->chipset < 0 xa0)0 xa00;else 0 x680;1 );0 x00404040);if (device->chipset < 0 xa0)0 xe00;else 0 x700;2 );if (device->chipset < 0 xa0)0 x0077f005);else if (device->chipset == 0 xa5)0 x6cf7f007);else if (device->chipset == 0 xa8)0 x6cfff007);else if (device->chipset == 0 xac)0 x0cfff007);else 0 x0cf7f007);if (device->chipset == 0 x50)0 x4, 0 x00007fff);else if (device->chipset < 0 xa0)0 x4, 0 x003f7fff);else 0 x4, 0 x02bf7fff);0 x2c, 1 );if (device->chipset == 0 x50) {0 x50, 9 );0 x54, 0 x000003ff);0 x58, 0 x00000003);0 x5c, 0 x00000003);0 x60, 0 x000001ff);0 x64, 0 x0000001f);0 x68, 0 x0000000f);0 x6c, 0 x0000000f);else if (device->chipset < 0 xa0) {0 x50, 1 );0 x70, 1 );else {0 x50, 1 );0 x60, 5 );static void struct nvkm_grctx *ctx, int num, u32 val) {int i;if (val && ctx->mode == NVKM_GRCTX_VALS) {for (i = 0 ; i < num; i++)4 * (ctx->ctxvals_pos + i), val);static void struct nvkm_grctx *ctx)struct nvkm_device *device = ctx->device;int base, num;/* tesla state */ 1 , 0 ); /* 00000001 UNK0F90 */ 1 , 0 ); /* 00000001 UNK135C */ /* SRC_TIC state */ 1 , 0 ); /* 00000007 SRC_TILE_MODE_Z */ 1 , 2 ); /* 00000007 SRC_TILE_MODE_Y */ 1 , 1 ); /* 00000001 SRC_LINEAR #1 */ 1 , 0 ); /* 000000ff SRC_ADDRESS_HIGH */ 1 , 0 ); /* 00000001 SRC_SRGB */ if (device->chipset >= 0 x94)1 , 0 ); /* 00000003 eng2d UNK0258 */ 1 , 1 ); /* 00000fff SRC_DEPTH */ 1 , 0 x100); /* 0000ffff SRC_HEIGHT */ /* turing state */ 1 , 0 ); /* 0000000f TEXTURES_LOG2 */ 1 , 0 ); /* 0000000f SAMPLERS_LOG2 */ 1 , 0 ); /* 000000ff CB_DEF_ADDRESS_HIGH */ 1 , 0 ); /* ffffffff CB_DEF_ADDRESS_LOW */ 1 , 0 ); /* ffffffff SHARED_SIZE */ 1 , 2 ); /* ffffffff REG_MODE */ 1 , 1 ); /* 0000ffff BLOCK_ALLOC_THREADS */ 1 , 1 ); /* 00000001 LANES32 */ 1 , 0 ); /* 000000ff UNK370 */ 1 , 0 ); /* 000000ff USER_PARAM_UNK */ 1 , 0 ); /* 000000ff USER_PARAM_COUNT */ 1 , 1 ); /* 000000ff UNK384 bits 8-15 */ 1 , 0 x3fffff); /* 003fffff TIC_LIMIT */ 1 , 0 x1fff); /* 000fffff TSC_LIMIT */ 1 , 0 ); /* 0000ffff CB_ADDR_INDEX */ 1 , 1 ); /* 000007ff BLOCKDIM_X */ 1 , 1 ); /* 000007ff BLOCKDIM_XMY */ 1 , 0 ); /* 00000001 BLOCKDIM_XMY_OVERFLOW */ 1 , 1 ); /* 0003ffff BLOCKDIM_XMYMZ */ 1 , 1 ); /* 000007ff BLOCKDIM_Y */ 1 , 1 ); /* 0000007f BLOCKDIM_Z */ 1 , 4 ); /* 000000ff CP_REG_ALLOC_TEMP */ 1 , 1 ); /* 00000001 BLOCKDIM_DIRTY */ if (IS_NVA3F(device->chipset))1 , 0 ); /* 00000003 UNK03E8 */ 1 , 1 ); /* 0000007f BLOCK_ALLOC_HALFWARPS */ 1 , 1 ); /* 00000007 LOCAL_WARPS_NO_CLAMP */ 1 , 7 ); /* 00000007 LOCAL_WARPS_LOG_ALLOC */ 1 , 1 ); /* 00000007 STACK_WARPS_NO_CLAMP */ 1 , 7 ); /* 00000007 STACK_WARPS_LOG_ALLOC */ 1 , 1 ); /* 00001fff BLOCK_ALLOC_REGSLOTS_PACKED */ 1 , 1 ); /* 00001fff BLOCK_ALLOC_REGSLOTS_STRIDED */ 1 , 1 ); /* 000007ff BLOCK_ALLOC_THREADS */ /* compat 2d state */ if (device->chipset == 0 x50) {4 , 0 ); /* 0000ffff clip X, Y, W, H */ 1 , 1 ); /* ffffffff chroma COLOR_FORMAT */ 1 , 1 ); /* ffffffff pattern COLOR_FORMAT */ 1 , 0 ); /* ffffffff pattern SHAPE */ 1 , 1 ); /* ffffffff pattern PATTERN_SELECT */ 1 , 0 xa); /* ffffffff surf2d SRC_FORMAT */ 1 , 0 ); /* ffffffff surf2d DMA_SRC */ 1 , 0 ); /* 000000ff surf2d SRC_ADDRESS_HIGH */ 1 , 0 ); /* ffffffff surf2d SRC_ADDRESS_LOW */ 1 , 0 x40); /* 0000ffff surf2d SRC_PITCH */ 1 , 0 ); /* 0000000f surf2d SRC_TILE_MODE_Z */ 1 , 2 ); /* 0000000f surf2d SRC_TILE_MODE_Y */ 1 , 0 x100); /* ffffffff surf2d SRC_HEIGHT */ 1 , 1 ); /* 00000001 surf2d SRC_LINEAR */ 1 , 0 x100); /* ffffffff surf2d SRC_WIDTH */ 1 , 0 ); /* 0000ffff gdirect CLIP_B_X */ 1 , 0 ); /* 0000ffff gdirect CLIP_B_Y */ 1 , 0 ); /* 0000ffff gdirect CLIP_C_X */ 1 , 0 ); /* 0000ffff gdirect CLIP_C_Y */ 1 , 0 ); /* 0000ffff gdirect CLIP_D_X */ 1 , 0 ); /* 0000ffff gdirect CLIP_D_Y */ 1 , 1 ); /* ffffffff gdirect COLOR_FORMAT */ 1 , 0 ); /* ffffffff gdirect OPERATION */ 1 , 0 ); /* 0000ffff gdirect POINT_X */ 1 , 0 ); /* 0000ffff gdirect POINT_Y */ 1 , 0 ); /* 0000ffff blit SRC_Y */ 1 , 0 ); /* ffffffff blit OPERATION */ 1 , 0 ); /* ffffffff ifc OPERATION */ 1 , 0 ); /* ffffffff iifc INDEX_FORMAT */ 1 , 0 ); /* ffffffff iifc LUT_OFFSET */ 1 , 4 ); /* ffffffff iifc COLOR_FORMAT */ 1 , 0 ); /* ffffffff iifc OPERATION */ /* m2mf state */ 1 , 0 ); /* ffffffff m2mf LINE_COUNT */ 1 , 0 ); /* ffffffff m2mf LINE_LENGTH_IN */ 2 , 0 ); /* ffffffff m2mf OFFSET_IN, OFFSET_OUT */ 1 , 1 ); /* ffffffff m2mf TILING_DEPTH_OUT */ 1 , 0 x100); /* ffffffff m2mf TILING_HEIGHT_OUT */ 1 , 0 ); /* ffffffff m2mf TILING_POSITION_OUT_Z */ 1 , 1 ); /* 00000001 m2mf LINEAR_OUT */ 2 , 0 ); /* 0000ffff m2mf TILING_POSITION_OUT_X, Y */ 1 , 0 x100); /* ffffffff m2mf TILING_PITCH_OUT */ 1 , 1 ); /* ffffffff m2mf TILING_DEPTH_IN */ 1 , 0 x100); /* ffffffff m2mf TILING_HEIGHT_IN */ 1 , 0 ); /* ffffffff m2mf TILING_POSITION_IN_Z */ 1 , 1 ); /* 00000001 m2mf LINEAR_IN */ 2 , 0 ); /* 0000ffff m2mf TILING_POSITION_IN_X, Y */ 1 , 0 x100); /* ffffffff m2mf TILING_PITCH_IN */ /* more compat 2d state */ if (device->chipset == 0 x50) {1 , 1 ); /* ffffffff line COLOR_FORMAT */ 1 , 0 ); /* ffffffff line OPERATION */ 1 , 1 ); /* ffffffff triangle COLOR_FORMAT */ 1 , 0 ); /* ffffffff triangle OPERATION */ 1 , 0 ); /* 0000000f sifm TILE_MODE_Z */ 1 , 2 ); /* 0000000f sifm TILE_MODE_Y */ 1 , 0 ); /* 000000ff sifm FORMAT_FILTER */ 1 , 1 ); /* 000000ff sifm FORMAT_ORIGIN */ 1 , 0 ); /* 0000ffff sifm SRC_PITCH */ 1 , 1 ); /* 00000001 sifm SRC_LINEAR */ 1 , 0 ); /* 000000ff sifm SRC_OFFSET_HIGH */ 1 , 0 ); /* ffffffff sifm SRC_OFFSET */ 1 , 0 ); /* 0000ffff sifm SRC_HEIGHT */ 1 , 0 ); /* 0000ffff sifm SRC_WIDTH */ 1 , 3 ); /* ffffffff sifm COLOR_FORMAT */ 1 , 0 ); /* ffffffff sifm OPERATION */ 1 , 0 ); /* ffffffff sifc OPERATION */ /* tesla state */ 1 , 0 ); /* 0000000f GP_TEXTURES_LOG2 */ 1 , 0 ); /* 0000000f GP_SAMPLERS_LOG2 */ 1 , 0 ); /* 000000ff */ 1 , 0 ); /* ffffffff */ 1 , 4 ); /* 000000ff UNK12B0_0 */ 1 , 0 x70); /* 000000ff UNK12B0_1 */ 1 , 0 x80); /* 000000ff UNK12B0_3 */ 1 , 0 ); /* 000000ff UNK12B0_2 */ 1 , 0 ); /* 0000000f FP_TEXTURES_LOG2 */ 1 , 0 ); /* 0000000f FP_SAMPLERS_LOG2 */ if (IS_NVA3F(device->chipset)) {1 , 0 ); /* ffffffff */ 1 , 0 ); /* 0000007f MULTISAMPLE_SAMPLES_LOG2 */ else {1 , 0 ); /* 0000000f MULTISAMPLE_SAMPLES_LOG2 */ 1 , 0 xc); /* 000000ff SEMANTIC_COLOR.BFC0_ID */ if (device->chipset != 0 x50)1 , 0 ); /* 00000001 SEMANTIC_COLOR.CLMP_EN */ 1 , 8 ); /* 000000ff SEMANTIC_COLOR.COLR_NR */ 1 , 0 x14); /* 000000ff SEMANTIC_COLOR.FFC0_ID */ if (device->chipset == 0 x50) {1 , 0 ); /* 000000ff SEMANTIC_LAYER */ 1 , 0 ); /* 00000001 */ else {1 , 0 ); /* 00000001 SEMANTIC_PTSZ.ENABLE */ 1 , 0 x29); /* 000000ff SEMANTIC_PTSZ.PTSZ_ID */ 1 , 0 x27); /* 000000ff SEMANTIC_PRIM */ 1 , 0 x26); /* 000000ff SEMANTIC_LAYER */ 1 , 8 ); /* 0000000f SMENATIC_CLIP.CLIP_HIGH */ 1 , 4 ); /* 000000ff SEMANTIC_CLIP.CLIP_LO */ 1 , 0 x27); /* 000000ff UNK0FD4 */ 1 , 0 ); /* 00000001 UNK1900 */ 1 , 0 ); /* 00000007 RT_CONTROL_MAP0 */ 1 , 1 ); /* 00000007 RT_CONTROL_MAP1 */ 1 , 2 ); /* 00000007 RT_CONTROL_MAP2 */ 1 , 3 ); /* 00000007 RT_CONTROL_MAP3 */ 1 , 4 ); /* 00000007 RT_CONTROL_MAP4 */ 1 , 5 ); /* 00000007 RT_CONTROL_MAP5 */ 1 , 6 ); /* 00000007 RT_CONTROL_MAP6 */ 1 , 7 ); /* 00000007 RT_CONTROL_MAP7 */ 1 , 1 ); /* 0000000f RT_CONTROL_COUNT */ 8 , 0 ); /* 00000001 RT_HORIZ_UNK */ 8 , 0 ); /* ffffffff RT_ADDRESS_LOW */ 1 , 0 xcf); /* 000000ff RT_FORMAT */ 7 , 0 ); /* 000000ff RT_FORMAT */ if (device->chipset != 0 x50)3 , 0 ); /* 1, 1, 1 */ else 2 , 0 ); /* 1, 1 */ 1 , 0 ); /* ffffffff GP_ENABLE */ 1 , 0 x80); /* 0000ffff GP_VERTEX_OUTPUT_COUNT*/ 1 , 4 ); /* 000000ff GP_REG_ALLOC_RESULT */ 1 , 4 ); /* 000000ff GP_RESULT_MAP_SIZE */ if (IS_NVA3F(device->chipset)) {1 , 3 ); /* 00000003 */ 1 , 0 ); /* 00000001 UNK1418. Alone. */ if (device->chipset != 0 x50)1 , 3 ); /* 00000003 UNK15AC */ 1 , 1 ); /* ffffffff RASTERIZE_ENABLE */ 1 , 0 ); /* 00000001 FP_CONTROL.EXPORTS_Z */ if (device->chipset != 0 x50)1 , 0 ); /* 00000001 FP_CONTROL.MULTIPLE_RESULTS */ 1 , 0 x12); /* 000000ff FP_INTERPOLANT_CTRL.COUNT */ 1 , 0 x10); /* 000000ff FP_INTERPOLANT_CTRL.COUNT_NONFLAT */ 1 , 0 xc); /* 000000ff FP_INTERPOLANT_CTRL.OFFSET */ 1 , 1 ); /* 00000001 FP_INTERPOLANT_CTRL.UMASK.W */ 1 , 0 ); /* 00000001 FP_INTERPOLANT_CTRL.UMASK.X */ 1 , 0 ); /* 00000001 FP_INTERPOLANT_CTRL.UMASK.Y */ 1 , 0 ); /* 00000001 FP_INTERPOLANT_CTRL.UMASK.Z */ 1 , 4 ); /* 000000ff FP_RESULT_COUNT */ 1 , 2 ); /* ffffffff REG_MODE */ 1 , 4 ); /* 000000ff FP_REG_ALLOC_TEMP */ if (device->chipset >= 0 xa0)1 , 0 ); /* ffffffff */ 1 , 0 ); /* 00000001 GP_BUILTIN_RESULT_EN.LAYER_IDX */ 1 , 0 ); /* ffffffff STRMOUT_ENABLE */ 1 , 0 x3fffff); /* 003fffff TIC_LIMIT */ 1 , 0 x1fff); /* 000fffff TSC_LIMIT */ 1 , 0 ); /* 00000001 VERTEX_TWO_SIDE_ENABLE*/ if (device->chipset != 0 x50)8 , 0 ); /* 00000001 */ if (device->chipset >= 0 xa0) {1 , 1 ); /* 00000007 VTX_ATTR_DEFINE.COMP */ 1 , 1 ); /* 00000007 VTX_ATTR_DEFINE.SIZE */ 1 , 2 ); /* 00000007 VTX_ATTR_DEFINE.TYPE */ 1 , 0 ); /* 000000ff VTX_ATTR_DEFINE.ATTR */ 1 , 4 ); /* 0000007f VP_RESULT_MAP_SIZE */ 1 , 0 x14); /* 0000001f ZETA_FORMAT */ 1 , 1 ); /* 00000001 ZETA_ENABLE */ 1 , 0 ); /* 0000000f VP_TEXTURES_LOG2 */ 1 , 0 ); /* 0000000f VP_SAMPLERS_LOG2 */ if (IS_NVA3F(device->chipset))1 , 0 ); /* 00000001 */ 1 , 2 ); /* 00000003 POLYGON_MODE_BACK */ if (device->chipset >= 0 xa0)1 , 0 ); /* 00000003 VTX_ATTR_DEFINE.SIZE - 1 */ 1 , 0 ); /* 0000ffff CB_ADDR_INDEX */ if (device->chipset >= 0 xa0)1 , 0 ); /* 00000003 */ 1 , 0 ); /* 00000001 CULL_FACE_ENABLE */ 1 , 1 ); /* 00000003 CULL_FACE */ 1 , 0 ); /* 00000001 FRONT_FACE */ 1 , 2 ); /* 00000003 POLYGON_MODE_FRONT */ 1 , 0 x1000); /* 00007fff UNK141C */ if (device->chipset != 0 x50) {1 , 0 xe00); /* 7fff */ 1 , 0 x1000); /* 7fff */ 1 , 0 x1e00); /* 7fff */ 1 , 0 ); /* 00000001 BEGIN_END_ACTIVE */ 1 , 1 ); /* 00000001 POLYGON_MODE_??? */ 1 , 1 ); /* 000000ff GP_REG_ALLOC_TEMP / 4 rounded up */ 1 , 1 ); /* 000000ff FP_REG_ALLOC_TEMP... without /4? */ 1 , 1 ); /* 000000ff VP_REG_ALLOC_TEMP / 4 rounded up */ 1 , 1 ); /* 00000001 */ 1 , 0 ); /* 00000001 */ 1 , 0 ); /* 00000001 VTX_ATTR_MASK_UNK0 nonempty */ 1 , 0 ); /* 00000001 VTX_ATTR_MASK_UNK1 nonempty */ 1 , 0 x200); /* 0003ffff GP_VERTEX_OUTPUT_COUNT*GP_REG_ALLOC_RESULT */ if (IS_NVA3F(device->chipset))1 , 0 x200);1 , 0 ); /* 00000001 */ if (device->chipset < 0 xa0) {1 , 1 ); /* 00000001 */ 1 , 0 x70); /* 000000ff */ 1 , 0 x80); /* 000000ff */ 1 , 0 ); /* 000000ff */ 1 , 0 ); /* 00000001 */ 1 , 1 ); /* 00000001 */ 1 , 0 x70); /* 000000ff */ 1 , 0 x80); /* 000000ff */ 1 , 0 ); /* 000000ff */ else {1 , 1 ); /* 00000001 */ 1 , 0 xf0); /* 000000ff */ 1 , 0 xff); /* 000000ff */ 1 , 0 ); /* 000000ff */ 1 , 0 ); /* 00000001 */ 1 , 1 ); /* 00000001 */ 1 , 0 xf0); /* 000000ff */ 1 , 0 xff); /* 000000ff */ 1 , 0 ); /* 000000ff */ 1 , 9 ); /* 0000003f UNK114C.COMP,SIZE */ /* eng2d state */ 1 , 0 ); /* 00000001 eng2d COLOR_KEY_ENABLE */ 1 , 0 ); /* 00000007 eng2d COLOR_KEY_FORMAT */ 1 , 1 ); /* ffffffff eng2d DST_DEPTH */ 1 , 0 xcf); /* 000000ff eng2d DST_FORMAT */ 1 , 0 ); /* ffffffff eng2d DST_LAYER */ 1 , 1 ); /* 00000001 eng2d DST_LINEAR */ 1 , 0 ); /* 00000007 eng2d PATTERN_COLOR_FORMAT */ 1 , 0 ); /* 00000007 eng2d OPERATION */ 1 , 0 ); /* 00000003 eng2d PATTERN_SELECT */ 1 , 0 xcf); /* 000000ff eng2d SIFC_FORMAT */ 1 , 0 ); /* 00000001 eng2d SIFC_BITMAP_ENABLE */ 1 , 2 ); /* 00000003 eng2d SIFC_BITMAP_UNK808 */ 1 , 0 ); /* ffffffff eng2d BLIT_DU_DX_FRACT */ 1 , 1 ); /* ffffffff eng2d BLIT_DU_DX_INT */ 1 , 0 ); /* ffffffff eng2d BLIT_DV_DY_FRACT */ 1 , 1 ); /* ffffffff eng2d BLIT_DV_DY_INT */ 1 , 0 ); /* 00000001 eng2d BLIT_CONTROL_FILTER */ 1 , 0 xcf); /* 000000ff eng2d DRAW_COLOR_FORMAT */ 1 , 0 xcf); /* 000000ff eng2d SRC_FORMAT */ 1 , 1 ); /* 00000001 eng2d SRC_LINEAR #2 */ if (IS_NVA3F(device->chipset))0 x404800, num);else 0 x405400, num);/* * xfer areas. These are a pain. * * There are 2 xfer areas: the first one is big and contains all sorts of * stuff, the second is small and contains some per-TP context. * * Each area is split into 8 "strands". The areas, when saved to grctx, * are made of 8-word blocks. Each block contains a single word from * each strand. The strands are independent of each other, their * addresses are unrelated to each other, and data in them is closely * packed together. The strand layout varies a bit between cards: here * and there, a single word is thrown out in the middle and the whole * strand is offset by a bit from corresponding one on another chipset. * For this reason, addresses of stuff in strands are almost useless. * Knowing sequence of stuff and size of gaps between them is much more * useful, and that's how we build the strands in our generator. * * NVA0 takes this mess to a whole new level by cutting the old strands * into a few dozen pieces [known as genes], rearranging them randomly, * and putting them back together to make new strands. Hopefully these * genes correspond more or less directly to the same PGRAPH subunits * as in 400040 register. * * The most common value in default context is 0, and when the genes * are separated by 0's, gene bounduaries are quite speculative... * some of them can be clearly deduced, others can be guessed, and yet * others won't be resolved without figuring out the real meaning of * given ctxval. For the same reason, ending point of each strand * is unknown. Except for strand 0, which is the longest strand and * its end corresponds to end of the whole xfer. * * An unsolved mystery is the seek instruction: it takes an argument * in bits 8-18, and that argument is clearly the place in strands to * seek to... but the offsets don't seem to correspond to offsets as * seen in grctx. Perhaps there's another, real, not randomly-changing * addressing in strands, and the xfer insn just happens to skip over * the unused bits? NV10-NV30 PIPE comes to mind... * * As far as I know, there's no way to access the xfer areas directly * without the help of ctxprog. static void struct nvkm_grctx *ctx, int num, u32 val) {int i;if (val && ctx->mode == NVKM_GRCTX_VALS) {for (i = 0 ; i < num; i++)4 * (ctx->ctxvals_pos + (i << 3 )), val);3 ;/* Gene declarations... */ static void nv50_gr_construct_gene_dispatch(struct nvkm_grctx *ctx);static void nv50_gr_construct_gene_m2mf(struct nvkm_grctx *ctx);static void nv50_gr_construct_gene_ccache(struct nvkm_grctx *ctx);static void nv50_gr_construct_gene_unk10xx(struct nvkm_grctx *ctx);static void nv50_gr_construct_gene_unk14xx(struct nvkm_grctx *ctx);static void nv50_gr_construct_gene_zcull(struct nvkm_grctx *ctx);static void nv50_gr_construct_gene_clipid(struct nvkm_grctx *ctx);static void nv50_gr_construct_gene_unk24xx(struct nvkm_grctx *ctx);static void nv50_gr_construct_gene_vfetch(struct nvkm_grctx *ctx);static void nv50_gr_construct_gene_eng2d(struct nvkm_grctx *ctx);static void nv50_gr_construct_gene_csched(struct nvkm_grctx *ctx);static void nv50_gr_construct_gene_unk1cxx(struct nvkm_grctx *ctx);static void nv50_gr_construct_gene_strmout(struct nvkm_grctx *ctx);static void nv50_gr_construct_gene_unk34xx(struct nvkm_grctx *ctx);static void nv50_gr_construct_gene_ropm1(struct nvkm_grctx *ctx);static void nv50_gr_construct_gene_ropm2(struct nvkm_grctx *ctx);static void nv50_gr_construct_gene_ropc(struct nvkm_grctx *ctx);static void nv50_gr_construct_xfer_tp(struct nvkm_grctx *ctx);static void struct nvkm_grctx *ctx)struct nvkm_device *device = ctx->device;int i;int offset;int size = 0 ;0 x1540);0 x3f)&~0 x3f;if (device->chipset < 0 xa0) {/* Strand 0 */ if ((ctx->ctxvals_pos-offset)/8 > size)8 ;/* Strand 1 */ 0 x1;if ((ctx->ctxvals_pos-offset)/8 > size)8 ;/* Strand 2 */ 0 x2;if ((ctx->ctxvals_pos-offset)/8 > size)8 ;/* Strand 3: per-ROP group state */ 3 ;for (i = 0 ; i < 6 ; i++)if (units & (1 << (i + 16 )))if ((ctx->ctxvals_pos-offset)/8 > size)8 ;/* Strands 4-7: per-TP state */ for (i = 0 ; i < 4 ; i++) {4 + i;if (units & (1 << (2 * i)))if (units & (1 << (2 * i + 1 )))if ((ctx->ctxvals_pos-offset)/8 > size)8 ;else {/* Strand 0 */ if ((ctx->ctxvals_pos-offset)/8 > size)8 ;/* Strand 1 */ 1 ;if ((ctx->ctxvals_pos-offset)/8 > size)8 ;/* Strand 2 */ 2 ;if (device->chipset == 0 xa0)if ((ctx->ctxvals_pos-offset)/8 > size)8 ;/* Strand 3 */ 3 ;if ((ctx->ctxvals_pos-offset)/8 > size)8 ;/* Strand 4 */ 4 ;if ((ctx->ctxvals_pos-offset)/8 > size)8 ;/* Strand 5 */ 5 ;/* per-ROP context */ for (i = 0 ; i < 8 ; i++)if (units & (1 <<(i+16 )))if ((ctx->ctxvals_pos-offset)/8 > size)8 ;/* Strand 6 */ 6 ;if (units & (1 << 0 ))if (units & (1 << 1 ))if (units & (1 << 2 ))if (units & (1 << 3 ))if ((ctx->ctxvals_pos-offset)/8 > size)8 ;/* Strand 7 */ 7 ;if (device->chipset == 0 xa0) {if (units & (1 << 4 ))if (units & (1 << 5 ))if (units & (1 << 6 ))if (units & (1 << 7 ))if (units & (1 << 8 ))if (units & (1 << 9 ))else {if ((ctx->ctxvals_pos-offset)/8 > size)8 ;8 ;0 x3f)&~0 x3f;/* * non-trivial demagiced parts of ctx init go here static void struct nvkm_grctx *ctx)/* start of strand 0 */ struct nvkm_device *device = ctx->device;/* SEEK */ if (device->chipset == 0 x50)5 , 0 );else if (!IS_NVA3F(device->chipset))6 , 0 );else 4 , 0 );/* SEEK */ /* the PGRAPH's internal FIFO */ if (device->chipset == 0 x50)8 *3 , 0 );else 0 x100*3 , 0 );/* and another bonus slot?!? */ 3 , 0 );/* and YET ANOTHER bonus slot? */ if (IS_NVA3F(device->chipset))3 , 0 );/* SEEK */ /* CTX_SWITCH: caches of gr objects bound to subchannels. 8 values, last used index */ 9 , 0 );/* SEEK */ 9 , 0 );/* SEEK */ 9 , 0 );/* SEEK */ 9 , 0 );/* SEEK */ if (device->chipset < 0 x90)4 , 0 );/* SEEK */ 2 , 0 );/* SEEK */ 6 *2 , 0 );2 , 0 );/* SEEK */ 2 , 0 );/* SEEK */ 6 *2 , 0 );2 , 0 );/* SEEK */ if (device->chipset == 0 x50)0 x1c, 0 );else if (device->chipset < 0 xa0)0 x1e, 0 );else 0 x22, 0 );/* SEEK */ 0 x15, 0 );static void struct nvkm_grctx *ctx)/* Strand 0, right after dispatch */ struct nvkm_device *device = ctx->device;int smallm2mf = 0 ;if (device->chipset < 0 x92 || device->chipset == 0 x98)1 ;/* SEEK */ 1 , 0 ); /* DMA_NOTIFY instance >> 4 */ 1 , 0 ); /* DMA_BUFFER_IN instance >> 4 */ 1 , 0 ); /* DMA_BUFFER_OUT instance >> 4 */ 1 , 0 ); /* OFFSET_IN */ 1 , 0 ); /* OFFSET_OUT */ 1 , 0 ); /* PITCH_IN */ 1 , 0 ); /* PITCH_OUT */ 1 , 0 ); /* LINE_LENGTH */ 1 , 0 ); /* LINE_COUNT */ 1 , 0 x21); /* FORMAT: bits 0-4 INPUT_INC, bits 5-9 OUTPUT_INC */ 1 , 1 ); /* LINEAR_IN */ 1 , 0 x2); /* TILING_MODE_IN: bits 0-2 y tiling, bits 3-5 z tiling */ 1 , 0 x100); /* TILING_PITCH_IN */ 1 , 0 x100); /* TILING_HEIGHT_IN */ 1 , 1 ); /* TILING_DEPTH_IN */ 1 , 0 ); /* TILING_POSITION_IN_Z */ 1 , 0 ); /* TILING_POSITION_IN */ 1 , 1 ); /* LINEAR_OUT */ 1 , 0 x2); /* TILING_MODE_OUT: bits 0-2 y tiling, bits 3-5 z tiling */ 1 , 0 x100); /* TILING_PITCH_OUT */ 1 , 0 x100); /* TILING_HEIGHT_OUT */ 1 , 1 ); /* TILING_DEPTH_OUT */ 1 , 0 ); /* TILING_POSITION_OUT_Z */ 1 , 0 ); /* TILING_POSITION_OUT */ 1 , 0 ); /* OFFSET_IN_HIGH */ 1 , 0 ); /* OFFSET_OUT_HIGH */ /* SEEK */ if (smallm2mf)0 x40, 0 ); /* 20 * ffffffff, 3ffff */ else 0 x100, 0 ); /* 80 * ffffffff, 3ffff */ 4 , 0 ); /* 1f/7f, 0, 1f/7f, 0 [1f for smallm2mf, 7f otherwise] */ /* SEEK */ if (smallm2mf)0 x400, 0 ); /* ffffffff */ else 0 x800, 0 ); /* ffffffff */ 4 , 0 ); /* ff/1ff, 0, 0, 0 [ff for smallm2mf, 1ff otherwise] */ /* SEEK */ 0 x40, 0 ); /* 20 * bits ffffffff, 3ffff */ 0 x6, 0 ); /* 1f, 0, 1f, 0, 1f, 0 */ static void struct nvkm_grctx *ctx)struct nvkm_device *device = ctx->device;2 , 0 ); /* RO */ 0 x800, 0 ); /* ffffffff */ switch (device->chipset) {case 0 x50:case 0 x92:case 0 xa0:0 x2b, 0 );break ;case 0 x84:0 x29, 0 );break ;case 0 x94:case 0 x96:case 0 xa3:0 x27, 0 );break ;case 0 x86:case 0 x98:case 0 xa5:case 0 xa8:case 0 xaa:case 0 xac:case 0 xaf:0 x25, 0 );break ;/* CB bindings, 0x80 of them. first word is address >> 8, second is 0 x100, 0 ); /* ffffffff CB_DEF */ 1 , 0 ); /* 0000007f CB_ADDR_BUFFER */ 1 , 0 ); /* 0 */ 0 x30, 0 ); /* ff SET_PROGRAM_CB */ 1 , 0 ); /* 3f last SET_PROGRAM_CB */ 4 , 0 ); /* RO */ 0 x100, 0 ); /* ffffffff */ 8 , 0 ); /* 1f, 0, 0, ... */ 8 , 0 ); /* ffffffff */ 4 , 0 ); /* ffffffff */ 1 , 0 ); /* 3 */ 1 , 0 ); /* ffffffff */ 1 , 0 ); /* 0000ffff DMA_CODE_CB */ 1 , 0 ); /* 0000ffff DMA_TIC */ 1 , 0 ); /* 0000ffff DMA_TSC */ 1 , 0 ); /* 00000001 LINKED_TSC */ 1 , 0 ); /* 000000ff TIC_ADDRESS_HIGH */ 1 , 0 ); /* ffffffff TIC_ADDRESS_LOW */ 1 , 0 x3fffff); /* 003fffff TIC_LIMIT */ 1 , 0 ); /* 000000ff TSC_ADDRESS_HIGH */ 1 , 0 ); /* ffffffff TSC_ADDRESS_LOW */ 1 , 0 x1fff); /* 000fffff TSC_LIMIT */ 1 , 0 ); /* 000000ff VP_ADDRESS_HIGH */ 1 , 0 ); /* ffffffff VP_ADDRESS_LOW */ 1 , 0 ); /* 00ffffff VP_START_ID */ 1 , 0 ); /* 000000ff CB_DEF_ADDRESS_HIGH */ 1 , 0 ); /* ffffffff CB_DEF_ADDRESS_LOW */ 1 , 0 ); /* 00000001 GP_ENABLE */ 1 , 0 ); /* 000000ff GP_ADDRESS_HIGH */ 1 , 0 ); /* ffffffff GP_ADDRESS_LOW */ 1 , 0 ); /* 00ffffff GP_START_ID */ 1 , 0 ); /* 000000ff FP_ADDRESS_HIGH */ 1 , 0 ); /* ffffffff FP_ADDRESS_LOW */ 1 , 0 ); /* 00ffffff FP_START_ID */ static void struct nvkm_grctx *ctx)struct nvkm_device *device = ctx->device;int i;/* end of area 2 on pre-NVA0, area 1 on NVAx */ 1 , 4 ); /* 000000ff GP_RESULT_MAP_SIZE */ 1 , 4 ); /* 0000007f VP_RESULT_MAP_SIZE */ 1 , 0 ); /* 00000001 GP_ENABLE */ 1 , 0 x80); /* 0000ffff GP_VERTEX_OUTPUT_COUNT */ 1 , 4 ); /* 000000ff GP_REG_ALLOC_RESULT */ 1 , 0 x80c14); /* 01ffffff SEMANTIC_COLOR */ 1 , 0 ); /* 00000001 VERTEX_TWO_SIDE_ENABLE */ if (device->chipset == 0 x50)1 , 0 x3ff);else 1 , 0 x7ff); /* 000007ff */ 1 , 0 ); /* 111/113 */ 1 , 0 ); /* ffffffff tesla UNK1A30 */ for (i = 0 ; i < 8 ; i++) {switch (device->chipset) {case 0 x50:case 0 x86:case 0 x98:case 0 xaa:case 0 xac:0 xa0, 0 ); /* ffffffff */ break ;case 0 x84:case 0 x92:case 0 x94:case 0 x96:0 x120, 0 );break ;case 0 xa5:case 0 xa8:0 x100, 0 ); /* ffffffff */ break ;case 0 xa0:case 0 xa3:case 0 xaf:0 x400, 0 ); /* ffffffff */ break ;4 , 0 ); /* 3f, 0, 0, 0 */ 4 , 0 ); /* ffffffff */ 1 , 4 ); /* 000000ff GP_RESULT_MAP_SIZE */ 1 , 4 ); /* 0000007f VP_RESULT_MAP_SIZE */ 1 , 0 ); /* 00000001 GP_ENABLE */ 1 , 0 x80); /* 0000ffff GP_VERTEX_OUTPUT_COUNT */ 1 , 4 ); /* 000000ff GP_REG_ALLOC_TEMP */ 1 , 1 ); /* 00000001 RASTERIZE_ENABLE */ 1 , 0 ); /* 00000001 tesla UNK1900 */ 1 , 0 x27); /* 000000ff UNK0FD4 */ 1 , 0 ); /* 0001ffff GP_BUILTIN_RESULT_EN */ 1 , 0 x26); /* 000000ff SEMANTIC_LAYER */ 1 , 0 ); /* ffffffff tesla UNK1A30 */ static void struct nvkm_grctx *ctx)struct nvkm_device *device = ctx->device;/* end of area 2 on pre-NVA0, area 1 on NVAx */ 1 , 0 ); /* 00000001 VIEWPORT_CLIP_RECTS_EN */ 1 , 0 ); /* 00000003 VIEWPORT_CLIP_MODE */ 0 x10, 0 x04000000); /* 07ffffff VIEWPORT_CLIP_HORIZ*8, VIEWPORT_CLIP_VERT*8 */ 1 , 0 ); /* 00000001 POLYGON_STIPPLE_ENABLE */ 0 x20, 0 ); /* ffffffff POLYGON_STIPPLE */ 2 , 0 ); /* 00007fff WINDOW_OFFSET_XY */ 1 , 0 ); /* ffff0ff3 */ 1 , 0 x04e3bfdf); /* ffffffff UNK0D64 */ 1 , 0 x04e3bfdf); /* ffffffff UNK0DF4 */ 1 , 0 ); /* 00000003 WINDOW_ORIGIN */ 1 , 0 ); /* 00000007 */ 1 , 0 x1fe21); /* 0001ffff tesla UNK0FAC */ if (device->chipset >= 0 xa0)1 , 0 x0fac6881);if (IS_NVA3F(device->chipset)) {1 , 1 );3 , 0 );static void struct nvkm_grctx *ctx)struct nvkm_device *device = ctx->device;/* middle of area 2 on pre-NVA0, beginning of area 2 on NVA0, area 7 on >NVA0 */ if (device->chipset != 0 x50) {5 , 0 ); /* ffffffff */ 1 , 0 x80c14); /* 01ffffff SEMANTIC_COLOR */ 1 , 0 ); /* 00000001 */ 1 , 0 ); /* 000003ff */ 1 , 0 x804); /* 00000fff SEMANTIC_CLIP */ 1 , 0 ); /* 00000001 */ 2 , 4 ); /* 7f, ff */ 1 , 0 x8100c12); /* 1fffffff FP_INTERPOLANT_CTRL */ 1 , 0 ); /* ffffffff tesla UNK1A30 */ 1 , 4 ); /* 0000007f VP_RESULT_MAP_SIZE */ 1 , 4 ); /* 000000ff GP_RESULT_MAP_SIZE */ 1 , 0 ); /* 00000001 GP_ENABLE */ 1 , 0 x10); /* 7f/ff VIEW_VOLUME_CLIP_CTRL */ 1 , 0 ); /* 000000ff VP_CLIP_DISTANCE_ENABLE */ if (device->chipset != 0 x50)1 , 0 ); /* 3ff */ 1 , 0 ); /* 000000ff tesla UNK1940 */ 1 , 0 ); /* 00000001 tesla UNK0D7C */ 1 , 0 x804); /* 00000fff SEMANTIC_CLIP */ 1 , 1 ); /* 00000001 VIEWPORT_TRANSFORM_EN */ 1 , 0 x1a); /* 0000001f POLYGON_MODE */ if (device->chipset != 0 x50)1 , 0 x7f); /* 000000ff tesla UNK0FFC */ 1 , 0 ); /* ffffffff tesla UNK1A30 */ 1 , 1 ); /* 00000001 SHADE_MODEL */ 1 , 0 x80c14); /* 01ffffff SEMANTIC_COLOR */ 1 , 0 ); /* 00000001 tesla UNK1900 */ 1 , 0 x8100c12); /* 1fffffff FP_INTERPOLANT_CTRL */ 1 , 4 ); /* 0000007f VP_RESULT_MAP_SIZE */ 1 , 4 ); /* 000000ff GP_RESULT_MAP_SIZE */ 1 , 0 ); /* 00000001 GP_ENABLE */ 1 , 0 x10); /* 7f/ff VIEW_VOLUME_CLIP_CTRL */ 1 , 0 ); /* 00000001 tesla UNK0D7C */ 1 , 0 ); /* 00000001 tesla UNK0F8C */ 1 , 0 ); /* ffffffff tesla UNK1A30 */ 1 , 1 ); /* 00000001 VIEWPORT_TRANSFORM_EN */ 1 , 0 x8100c12); /* 1fffffff FP_INTERPOLANT_CTRL */ 4 , 0 ); /* ffffffff NOPERSPECTIVE_BITMAP */ 1 , 0 ); /* 00000001 tesla UNK1900 */ 1 , 0 ); /* 0000000f */ if (device->chipset == 0 x50)1 , 0 x3ff); /* 000003ff tesla UNK0D68 */ else 1 , 0 x7ff); /* 000007ff tesla UNK0D68 */ 1 , 0 x80c14); /* 01ffffff SEMANTIC_COLOR */ 1 , 0 ); /* 00000001 VERTEX_TWO_SIDE_ENABLE */ 0 x30, 0 ); /* ffffffff VIEWPORT_SCALE: X0, Y0, Z0, X1, Y1, ... */ 3 , 0 ); /* f, 0, 0 */ 3 , 0 ); /* ffffffff last VIEWPORT_SCALE? */ 1 , 0 ); /* ffffffff tesla UNK1A30 */ 1 , 1 ); /* 00000001 VIEWPORT_TRANSFORM_EN */ 1 , 0 ); /* 00000001 tesla UNK1900 */ 1 , 0 ); /* 00000001 tesla UNK1924 */ 1 , 0 x10); /* 000000ff VIEW_VOLUME_CLIP_CTRL */ 1 , 0 ); /* 00000001 */ 0 x30, 0 ); /* ffffffff VIEWPORT_TRANSLATE */ 3 , 0 ); /* f, 0, 0 */ 3 , 0 ); /* ffffffff */ 1 , 0 ); /* ffffffff tesla UNK1A30 */ 2 , 0 x88); /* 000001ff tesla UNK19D8 */ 1 , 0 ); /* 00000001 tesla UNK1924 */ 1 , 0 ); /* ffffffff tesla UNK1A30 */ 1 , 4 ); /* 0000000f CULL_MODE */ 2 , 0 ); /* 07ffffff SCREEN_SCISSOR */ 2 , 0 ); /* 00007fff WINDOW_OFFSET_XY */ 1 , 0 ); /* 00000003 WINDOW_ORIGIN */ 0 x10, 0 ); /* 00000001 SCISSOR_ENABLE */ 1 , 0 ); /* 0001ffff GP_BUILTIN_RESULT_EN */ 1 , 0 x26); /* 000000ff SEMANTIC_LAYER */ 1 , 0 ); /* 00000001 tesla UNK1900 */ 1 , 0 ); /* 0000000f */ 1 , 0 x3f800000); /* ffffffff LINE_WIDTH */ 1 , 0 ); /* 00000001 LINE_STIPPLE_ENABLE */ 1 , 0 ); /* 00000001 LINE_SMOOTH_ENABLE */ 1 , 0 ); /* 00000007 MULTISAMPLE_SAMPLES_LOG2 */ if (IS_NVA3F(device->chipset))1 , 0 ); /* 00000001 */ 1 , 0 x1a); /* 0000001f POLYGON_MODE */ 1 , 0 x10); /* 000000ff VIEW_VOLUME_CLIP_CTRL */ if (device->chipset != 0 x50) {1 , 0 ); /* ffffffff */ 1 , 0 ); /* 00000001 */ 1 , 0 ); /* 000003ff */ 0 x20, 0 ); /* 10xbits ffffffff, 3fffff. SCISSOR_* */ 1 , 0 ); /* f */ 1 , 0 ); /* 0? */ 1 , 0 ); /* ffffffff */ 1 , 0 ); /* 003fffff */ 1 , 0 ); /* ffffffff tesla UNK1A30 */ 1 , 0 x52); /* 000001ff SEMANTIC_PTSZ */ 1 , 0 ); /* 0001ffff GP_BUILTIN_RESULT_EN */ 1 , 0 x26); /* 000000ff SEMANTIC_LAYER */ 1 , 0 ); /* 00000001 tesla UNK1900 */ 1 , 4 ); /* 0000007f VP_RESULT_MAP_SIZE */ 1 , 4 ); /* 000000ff GP_RESULT_MAP_SIZE */ 1 , 0 ); /* 00000001 GP_ENABLE */ 1 , 0 x1a); /* 0000001f POLYGON_MODE */ 1 , 0 ); /* 00000001 LINE_SMOOTH_ENABLE */ 1 , 0 ); /* 00000001 LINE_STIPPLE_ENABLE */ 1 , 0 x00ffff00); /* 00ffffff LINE_STIPPLE_PATTERN */ 1 , 0 ); /* 0000000f */ static void struct nvkm_grctx *ctx)struct nvkm_device *device = ctx->device;/* end of strand 0 on pre-NVA0, beginning of strand 6 on NVAx */ /* SEEK */ 1 , 0 x3f); /* 0000003f UNK1590 */ 1 , 0 ); /* 00000001 ALPHA_TEST_ENABLE */ 1 , 0 ); /* 00000007 MULTISAMPLE_SAMPLES_LOG2 */ 1 , 0 ); /* 00000001 tesla UNK1534 */ 1 , 0 ); /* 00000007 STENCIL_BACK_FUNC_FUNC */ 1 , 0 ); /* 000000ff STENCIL_BACK_FUNC_MASK */ 1 , 0 ); /* 000000ff STENCIL_BACK_FUNC_REF */ 1 , 0 ); /* 000000ff STENCIL_BACK_MASK */ 3 , 0 ); /* 00000007 STENCIL_BACK_OP_FAIL, ZFAIL, ZPASS */ 1 , 2 ); /* 00000003 tesla UNK143C */ 2 , 0 x04000000); /* 07ffffff tesla UNK0D6C */ 1 , 0 ); /* ffff0ff3 */ 1 , 0 ); /* 00000001 CLIPID_ENABLE */ 2 , 0 ); /* ffffffff DEPTH_BOUNDS */ 1 , 0 ); /* 00000001 */ 1 , 0 ); /* 00000007 DEPTH_TEST_FUNC */ 1 , 0 ); /* 00000001 DEPTH_TEST_ENABLE */ 1 , 0 ); /* 00000001 DEPTH_WRITE_ENABLE */ 1 , 4 ); /* 0000000f CULL_MODE */ 1 , 0 ); /* 0000ffff */ 1 , 0 ); /* 00000001 UNK0FB0 */ 1 , 0 ); /* 00000001 POLYGON_STIPPLE_ENABLE */ 1 , 4 ); /* 00000007 FP_CONTROL */ 1 , 0 ); /* ffffffff */ 1 , 0 ); /* 0001ffff GP_BUILTIN_RESULT_EN */ 1 , 0 ); /* 000000ff CLEAR_STENCIL */ 1 , 0 ); /* 00000007 STENCIL_FRONT_FUNC_FUNC */ 1 , 0 ); /* 000000ff STENCIL_FRONT_FUNC_MASK */ 1 , 0 ); /* 000000ff STENCIL_FRONT_FUNC_REF */ 1 , 0 ); /* 000000ff STENCIL_FRONT_MASK */ 3 , 0 ); /* 00000007 STENCIL_FRONT_OP_FAIL, ZFAIL, ZPASS */ 1 , 0 ); /* 00000001 STENCIL_FRONT_ENABLE */ 1 , 0 ); /* 00000001 STENCIL_BACK_ENABLE */ 1 , 0 ); /* ffffffff CLEAR_DEPTH */ 1 , 0 ); /* 00000007 */ if (device->chipset != 0 x50)1 , 0 ); /* 00000003 tesla UNK1108 */ 1 , 0 ); /* 00000001 SAMPLECNT_ENABLE */ 1 , 0 ); /* 0000000f ZETA_FORMAT */ 1 , 1 ); /* 00000001 ZETA_ENABLE */ 1 , 0 x1001); /* 00001fff ZETA_ARRAY_MODE */ /* SEEK */ 4 , 0 xffff); /* 0000ffff MSAA_MASK */ 0 x10, 0 ); /* 00000001 SCISSOR_ENABLE */ 0 x10, 0 ); /* ffffffff DEPTH_RANGE_NEAR */ 0 x10, 0 x3f800000); /* ffffffff DEPTH_RANGE_FAR */ 1 , 0 x10); /* 7f/ff/3ff VIEW_VOLUME_CLIP_CTRL */ 1 , 0 ); /* 00000001 VIEWPORT_CLIP_RECTS_EN */ 1 , 3 ); /* 00000003 FP_CTRL_UNK196C */ 1 , 0 ); /* 00000003 tesla UNK1968 */ if (device->chipset != 0 x50)1 , 0 ); /* 0fffffff tesla UNK1104 */ 1 , 0 ); /* 00000001 tesla UNK151C */ static void struct nvkm_grctx *ctx)/* middle of strand 0 on pre-NVA0 [after 24xx], middle of area 6 on NVAx */ /* SEEK */ 1 , 0 ); /* 00000007 UNK0FB4 */ /* SEEK */ 4 , 0 ); /* 07ffffff CLIPID_REGION_HORIZ */ 4 , 0 ); /* 07ffffff CLIPID_REGION_VERT */ 2 , 0 ); /* 07ffffff SCREEN_SCISSOR */ 2 , 0 x04000000); /* 07ffffff UNK1508 */ 1 , 0 ); /* 00000001 CLIPID_ENABLE */ 1 , 0 x80); /* 00003fff CLIPID_WIDTH */ 1 , 0 ); /* 000000ff CLIPID_ID */ 1 , 0 ); /* 000000ff CLIPID_ADDRESS_HIGH */ 1 , 0 ); /* ffffffff CLIPID_ADDRESS_LOW */ 1 , 0 x80); /* 00003fff CLIPID_HEIGHT */ 1 , 0 ); /* 0000ffff DMA_CLIPID */ static void struct nvkm_grctx *ctx)struct nvkm_device *device = ctx->device;int i;/* middle of strand 0 on pre-NVA0 [after m2mf], end of strand 2 on NVAx */ /* SEEK */ 0 x33, 0 );/* SEEK */ 2 , 0 );/* SEEK */ 1 , 0 ); /* 00000001 GP_ENABLE */ 1 , 4 ); /* 0000007f VP_RESULT_MAP_SIZE */ 1 , 4 ); /* 000000ff GP_RESULT_MAP_SIZE */ /* SEEK */ if (IS_NVA3F(device->chipset)) {4 , 0 ); /* RO */ 0 xe10, 0 ); /* 190 * 9: 8*ffffffff, 7ff */ 1 , 0 ); /* 1ff */ 8 , 0 ); /* 0? */ 9 , 0 ); /* ffffffff, 7ff */ 4 , 0 ); /* RO */ 0 xe10, 0 ); /* 190 * 9: 8*ffffffff, 7ff */ 1 , 0 ); /* 1ff */ 8 , 0 ); /* 0? */ 9 , 0 ); /* ffffffff, 7ff */ else {0 xc, 0 ); /* RO */ /* SEEK */ 0 xe10, 0 ); /* 190 * 9: 8*ffffffff, 7ff */ 1 , 0 ); /* 1ff */ 8 , 0 ); /* 0? */ /* SEEK */ 0 xc, 0 ); /* RO */ /* SEEK */ 0 xe10, 0 ); /* 190 * 9: 8*ffffffff, 7ff */ 1 , 0 ); /* 1ff */ 8 , 0 ); /* 0? */ /* SEEK */ 1 , 0 ); /* 00000001 GP_ENABLE */ 1 , 4 ); /* 000000ff GP_RESULT_MAP_SIZE */ 1 , 4 ); /* 0000007f VP_RESULT_MAP_SIZE */ 1 , 0 x8100c12); /* 1fffffff FP_INTERPOLANT_CTRL */ if (device->chipset != 0 x50)1 , 3 ); /* 00000003 tesla UNK1100 */ /* SEEK */ 1 , 0 ); /* 00000001 GP_ENABLE */ 1 , 0 x8100c12); /* 1fffffff FP_INTERPOLANT_CTRL */ 1 , 0 ); /* 0000000f VP_GP_BUILTIN_ATTR_EN */ 1 , 0 x80c14); /* 01ffffff SEMANTIC_COLOR */ 1 , 1 ); /* 00000001 */ /* SEEK */ if (device->chipset >= 0 xa0)2 , 4 ); /* 000000ff */ 1 , 0 x80c14); /* 01ffffff SEMANTIC_COLOR */ 1 , 0 ); /* 00000001 VERTEX_TWO_SIDE_ENABLE */ 1 , 0 ); /* 00000001 POINT_SPRITE_ENABLE */ 1 , 0 x8100c12); /* 1fffffff FP_INTERPOLANT_CTRL */ 1 , 0 x27); /* 000000ff SEMANTIC_PRIM_ID */ 1 , 0 ); /* 00000001 GP_ENABLE */ 1 , 0 ); /* 0000000f */ 1 , 1 ); /* 00000001 */ for (i = 0 ; i < 10 ; i++) {/* SEEK */ 0 x40, 0 ); /* ffffffff */ 0 x10, 0 ); /* 3, 0, 0.... */ 0 x10, 0 ); /* ffffffff */ /* SEEK */ 1 , 0 ); /* 00000001 POINT_SPRITE_CTRL */ 1 , 1 ); /* 00000001 */ 1 , 0 ); /* ffffffff */ 4 , 0 ); /* ffffffff NOPERSPECTIVE_BITMAP */ 0 x10, 0 ); /* 00ffffff POINT_COORD_REPLACE_MAP */ 1 , 0 ); /* 00000003 WINDOW_ORIGIN */ 1 , 0 x8100c12); /* 1fffffff FP_INTERPOLANT_CTRL */ if (device->chipset != 0 x50)1 , 0 ); /* 000003ff */ static void struct nvkm_grctx *ctx)struct nvkm_device *device = ctx->device;int acnt = 0 x10, rep, i;/* beginning of strand 1 on pre-NVA0, strand 3 on NVAx */ if (IS_NVA3F(device->chipset))0 x20;/* SEEK */ if (device->chipset >= 0 xa0) {1 , 0 ); /* ffffffff tesla UNK13A4 */ 1 , 1 ); /* 00000fff tesla UNK1318 */ 1 , 0 ); /* ffffffff VERTEX_BUFFER_FIRST */ 1 , 0 ); /* 00000001 PRIMITIVE_RESTART_ENABLE */ 1 , 0 ); /* 00000001 UNK0DE8 */ 1 , 0 ); /* ffffffff PRIMITIVE_RESTART_INDEX */ 1 , 0 xf); /* ffffffff VP_ATTR_EN */ 8 )-1 , 0 ); /* ffffffff VP_ATTR_EN */ 8 , 0 ); /* ffffffff VTX_ATR_MASK_UNK0DD0 */ 1 , 0 ); /* 0000000f VP_GP_BUILTIN_ATTR_EN */ 1 , 0 x20); /* 0000ffff tesla UNK129C */ 1 , 0 ); /* 000000ff turing UNK370??? */ 1 , 0 ); /* 0000ffff turing USER_PARAM_COUNT */ 1 , 0 ); /* ffffffff tesla UNK1A30 */ /* SEEK */ if (IS_NVA3F(device->chipset))0 xb, 0 ); /* RO */ else if (device->chipset >= 0 xa0)0 x9, 0 ); /* RO */ else 0 x8, 0 ); /* RO */ /* SEEK */ 1 , 0 ); /* 00000001 EDGE_FLAG */ 1 , 0 ); /* 00000001 PROVOKING_VERTEX_LAST */ 1 , 0 ); /* 00000001 GP_ENABLE */ 1 , 0 x1a); /* 0000001f POLYGON_MODE */ /* SEEK */ 0 xc, 0 ); /* RO */ /* SEEK */ 1 , 0 ); /* 7f/ff */ 1 , 4 ); /* 7f/ff VP_REG_ALLOC_RESULT */ 1 , 4 ); /* 7f/ff VP_RESULT_MAP_SIZE */ 1 , 0 ); /* 0000000f VP_GP_BUILTIN_ATTR_EN */ 1 , 4 ); /* 000001ff UNK1A28 */ 1 , 8 ); /* 000001ff UNK0DF0 */ 1 , 0 ); /* 00000001 GP_ENABLE */ if (device->chipset == 0 x50)1 , 0 x3ff); /* 3ff tesla UNK0D68 */ else 1 , 0 x7ff); /* 7ff tesla UNK0D68 */ if (device->chipset == 0 xa8)1 , 0 x1e00); /* 7fff */ /* SEEK */ 0 xc, 0 ); /* RO or close */ /* SEEK */ 1 , 0 xf); /* ffffffff VP_ATTR_EN */ 8 )-1 , 0 ); /* ffffffff VP_ATTR_EN */ 1 , 0 ); /* 0000000f VP_GP_BUILTIN_ATTR_EN */ if (device->chipset > 0 x50 && device->chipset < 0 xa0)2 , 0 ); /* ffffffff */ else 1 , 0 ); /* ffffffff */ 1 , 0 ); /* 00000003 tesla UNK0FD8 */ /* SEEK */ if (IS_NVA3F(device->chipset)) {0 x10, 0 ); /* 0? */ 2 , 0 ); /* weird... */ 2 , 0 ); /* RO */ else {8 , 0 ); /* 0? */ 1 , 0 ); /* weird... */ 2 , 0 ); /* RO */ /* SEEK */ 1 , 0 ); /* ffffffff VB_ELEMENT_BASE */ 1 , 0 ); /* ffffffff UNK1438 */ 0 ); /* 1 tesla UNK1000 */ if (device->chipset >= 0 xa0)1 , 0 ); /* ffffffff tesla UNK1118? */ /* SEEK */ 0 ); /* ffffffff VERTEX_ARRAY_UNK90C */ 1 , 0 ); /* f/1f */ /* SEEK */ 0 ); /* ffffffff VERTEX_ARRAY_UNK90C */ 1 , 0 ); /* f/1f */ /* SEEK */ 0 ); /* RO */ 2 , 0 ); /* RO */ /* SEEK */ 1 , 0 ); /* ffffffff tesla UNK111C? */ 1 , 0 ); /* RO */ /* SEEK */ 1 , 0 ); /* 000000ff UNK15F4_ADDRESS_HIGH */ 1 , 0 ); /* ffffffff UNK15F4_ADDRESS_LOW */ 1 , 0 ); /* 000000ff UNK0F84_ADDRESS_HIGH */ 1 , 0 ); /* ffffffff UNK0F84_ADDRESS_LOW */ /* SEEK */ 0 ); /* 00003fff VERTEX_ARRAY_ATTRIB_OFFSET */ 3 , 0 ); /* f/1f */ /* SEEK */ 0 ); /* 00000fff VERTEX_ARRAY_STRIDE */ 3 , 0 ); /* f/1f */ /* SEEK */ 0 ); /* ffffffff VERTEX_ARRAY_LOW */ 3 , 0 ); /* f/1f */ /* SEEK */ 0 ); /* 000000ff VERTEX_ARRAY_HIGH */ 3 , 0 ); /* f/1f */ /* SEEK */ 0 ); /* ffffffff VERTEX_LIMIT_LOW */ 3 , 0 ); /* f/1f */ /* SEEK */ 0 ); /* 000000ff VERTEX_LIMIT_HIGH */ 3 , 0 ); /* f/1f */ /* SEEK */ if (IS_NVA3F(device->chipset)) {0 ); /* f */ 3 , 0 ); /* f/1f */ /* SEEK */ if (IS_NVA3F(device->chipset))2 , 0 ); /* RO */ else 5 , 0 ); /* RO */ /* SEEK */ 1 , 0 ); /* ffff DMA_VTXBUF */ /* SEEK */ if (device->chipset < 0 xa0) {0 x41, 0 ); /* RO */ /* SEEK */ 0 x11, 0 ); /* RO */ else if (!IS_NVA3F(device->chipset))0 x50, 0 ); /* RO */ else 0 x58, 0 ); /* RO */ /* SEEK */ 1 , 0 xf); /* ffffffff VP_ATTR_EN */ 8 )-1 , 0 ); /* ffffffff VP_ATTR_EN */ 1 , 1 ); /* 1 UNK0DEC */ /* SEEK */ 4 , 0 ); /* ffffffff VTX_ATTR */ 4 , 0 ); /* f/1f, 0, 0, 0 */ /* SEEK */ if (IS_NVA3F(device->chipset))0 x1d, 0 ); /* RO */ else 0 x16, 0 ); /* RO */ /* SEEK */ 1 , 0 xf); /* ffffffff VP_ATTR_EN */ 8 )-1 , 0 ); /* ffffffff VP_ATTR_EN */ /* SEEK */ if (device->chipset < 0 xa0)8 , 0 ); /* RO */ else if (IS_NVA3F(device->chipset))0 xc, 0 ); /* RO */ else 7 , 0 ); /* RO */ /* SEEK */ 0 xa, 0 ); /* RO */ if (device->chipset == 0 xa0)0 xc;else 4 ;for (i = 0 ; i < rep; i++) {/* SEEK */ if (IS_NVA3F(device->chipset))0 x20, 0 ); /* ffffffff */ 0 x200, 0 ); /* ffffffff */ 4 , 0 ); /* 7f/ff, 0, 0, 0 */ 4 , 0 ); /* ffffffff */ /* SEEK */ 1 , 0 ); /* 113/111 */ 1 , 0 xf); /* ffffffff VP_ATTR_EN */ 8 )-1 , 0 ); /* ffffffff VP_ATTR_EN */ 8 , 0 ); /* ffffffff VTX_ATTR_MASK_UNK0DD0 */ 1 , 0 ); /* 0000000f VP_GP_BUILTIN_ATTR_EN */ 1 , 0 ); /* ffffffff tesla UNK1A30 */ /* SEEK */ if (IS_NVA3F(device->chipset))7 , 0 ); /* weird... */ else 5 , 0 ); /* weird... */ static void struct nvkm_grctx *ctx)struct nvkm_device *device = ctx->device;/* middle of strand 1 on pre-NVA0 [after vfetch], middle of strand 6 on NVAx */ /* SEEK */ 2 , 0 ); /* 0001ffff CLIP_X, CLIP_Y */ 2 , 0 ); /* 0000ffff CLIP_W, CLIP_H */ 1 , 0 ); /* 00000001 CLIP_ENABLE */ if (device->chipset < 0 xa0) {/* this is useless on everything but the original NV50, 2 , 0 ); /* 0000ffff IFC_CLIP_X, Y */ 2 , 1 ); /* 0000ffff IFC_CLIP_W, H */ 1 , 0 ); /* 00000001 IFC_CLIP_ENABLE */ 1 , 1 ); /* 00000001 DST_LINEAR */ 1 , 0 x100); /* 0001ffff DST_WIDTH */ 1 , 0 x100); /* 0001ffff DST_HEIGHT */ 1 , 0 x11); /* 3f[NV50]/7f[NV84+] DST_FORMAT */ 1 , 0 ); /* 0001ffff DRAW_POINT_X */ 1 , 8 ); /* 0000000f DRAW_UNK58C */ 1 , 0 ); /* 000fffff SIFC_DST_X_FRACT */ 1 , 0 ); /* 0001ffff SIFC_DST_X_INT */ 1 , 0 ); /* 000fffff SIFC_DST_Y_FRACT */ 1 , 0 ); /* 0001ffff SIFC_DST_Y_INT */ 1 , 0 ); /* 000fffff SIFC_DX_DU_FRACT */ 1 , 1 ); /* 0001ffff SIFC_DX_DU_INT */ 1 , 0 ); /* 000fffff SIFC_DY_DV_FRACT */ 1 , 1 ); /* 0001ffff SIFC_DY_DV_INT */ 1 , 1 ); /* 0000ffff SIFC_WIDTH */ 1 , 1 ); /* 0000ffff SIFC_HEIGHT */ 1 , 0 xcf); /* 000000ff SIFC_FORMAT */ 1 , 2 ); /* 00000003 SIFC_BITMAP_UNK808 */ 1 , 0 ); /* 00000003 SIFC_BITMAP_LINE_PACK_MODE */ 1 , 0 ); /* 00000001 SIFC_BITMAP_LSB_FIRST */ 1 , 0 ); /* 00000001 SIFC_BITMAP_ENABLE */ 1 , 0 ); /* 0000ffff BLIT_DST_X */ 1 , 0 ); /* 0000ffff BLIT_DST_Y */ 1 , 0 ); /* 000fffff BLIT_DU_DX_FRACT */ 1 , 1 ); /* 0001ffff BLIT_DU_DX_INT */ 1 , 0 ); /* 000fffff BLIT_DV_DY_FRACT */ 1 , 1 ); /* 0001ffff BLIT_DV_DY_INT */ 1 , 1 ); /* 0000ffff BLIT_DST_W */ 1 , 1 ); /* 0000ffff BLIT_DST_H */ 1 , 0 ); /* 000fffff BLIT_SRC_X_FRACT */ 1 , 0 ); /* 0001ffff BLIT_SRC_X_INT */ 1 , 0 ); /* 000fffff BLIT_SRC_Y_FRACT */ 1 , 0 ); /* 00000001 UNK888 */ 1 , 4 ); /* 0000003f UNK884 */ 1 , 0 ); /* 00000007 UNK880 */ 1 , 1 ); /* 0000001f tesla UNK0FB8 */ 1 , 0 x15); /* 000000ff tesla UNK128C */ 2 , 0 ); /* 00000007, ffff0ff3 */ 1 , 0 ); /* 00000001 UNK260 */ 1 , 0 x4444480); /* 1fffffff UNK870 */ /* SEEK */ 0 x10, 0 );/* SEEK */ 0 x27, 0 );static void struct nvkm_grctx *ctx)struct nvkm_device *device = ctx->device;/* middle of strand 1 on pre-NVA0 [after eng2d], middle of strand 0 on NVAx */ /* SEEK */ 2 , 0 ); /* 00007fff WINDOW_OFFSET_XY... what is it doing here??? */ 1 , 0 ); /* 00000001 tesla UNK1924 */ 1 , 0 ); /* 00000003 WINDOW_ORIGIN */ 1 , 0 x8100c12); /* 1fffffff FP_INTERPOLANT_CTRL */ 1 , 0 ); /* 000003ff */ /* SEEK */ 1 , 0 ); /* ffffffff turing UNK364 */ 1 , 0 ); /* 0000000f turing UNK36C */ 1 , 0 ); /* 0000ffff USER_PARAM_COUNT */ 1 , 0 x100); /* 00ffffff turing UNK384 */ 1 , 0 ); /* 0000000f turing UNK2A0 */ 1 , 0 ); /* 0000ffff GRIDID */ 1 , 0 x10001); /* ffffffff GRIDDIM_XY */ 1 , 0 ); /* ffffffff */ 1 , 0 x10001); /* ffffffff BLOCKDIM_XY */ 1 , 1 ); /* 0000ffff BLOCKDIM_Z */ 1 , 0 x10001); /* 00ffffff BLOCK_ALLOC */ 1 , 1 ); /* 00000001 LANES32 */ 1 , 4 ); /* 000000ff FP_REG_ALLOC_TEMP */ 1 , 2 ); /* 00000003 REG_MODE */ /* SEEK */ 0 x40, 0 ); /* ffffffff USER_PARAM */ switch (device->chipset) {case 0 x50:case 0 x92:8 , 0 ); /* 7, 0, 0, 0, ... */ 0 x80, 0 ); /* fff */ 2 , 0 ); /* ff, fff */ 0 x10*2 , 0 ); /* ffffffff, 1f */ break ;case 0 x84:8 , 0 ); /* 7, 0, 0, 0, ... */ 0 x60, 0 ); /* fff */ 2 , 0 ); /* ff, fff */ 0 xc*2 , 0 ); /* ffffffff, 1f */ break ;case 0 x94:case 0 x96:8 , 0 ); /* 7, 0, 0, 0, ... */ 0 x40, 0 ); /* fff */ 2 , 0 ); /* ff, fff */ 8 *2 , 0 ); /* ffffffff, 1f */ break ;case 0 x86:case 0 x98:4 , 0 ); /* f, 0, 0, 0 */ 0 x10, 0 ); /* fff */ 2 , 0 ); /* ff, fff */ 2 *2 , 0 ); /* ffffffff, 1f */ break ;case 0 xa0:8 , 0 ); /* 7, 0, 0, 0, ... */ 0 xf0, 0 ); /* fff */ 2 , 0 ); /* ff, fff */ 0 x1e*2 , 0 ); /* ffffffff, 1f */ break ;case 0 xa3:8 , 0 ); /* 7, 0, 0, 0, ... */ 0 x60, 0 ); /* fff */ 2 , 0 ); /* ff, fff */ 0 xc*2 , 0 ); /* ffffffff, 1f */ break ;case 0 xa5:case 0 xaf:8 , 0 ); /* 7, 0, 0, 0, ... */ 0 x30, 0 ); /* fff */ 2 , 0 ); /* ff, fff */ 6 *2 , 0 ); /* ffffffff, 1f */ break ;case 0 xaa:0 x12, 0 );break ;case 0 xa8:case 0 xac:4 , 0 ); /* f, 0, 0, 0 */ 0 x10, 0 ); /* fff */ 2 , 0 ); /* ff, fff */ 2 *2 , 0 ); /* ffffffff, 1f */ break ;1 , 0 ); /* 0000000f */ 1 , 0 ); /* 00000000 */ 1 , 0 ); /* ffffffff */ 1 , 0 ); /* 0000001f */ 4 , 0 ); /* ffffffff */ 1 , 0 ); /* 00000003 turing UNK35C */ 1 , 0 ); /* ffffffff */ 4 , 0 ); /* ffffffff */ 1 , 0 ); /* 00000003 turing UNK35C */ 1 , 0 ); /* ffffffff */ 1 , 0 ); /* 000000ff */ static void struct nvkm_grctx *ctx)struct nvkm_device *device = ctx->device;2 , 0 ); /* 00007fff WINDOW_OFFSET_XY */ 1 , 0 x3f800000); /* ffffffff LINE_WIDTH */ 1 , 0 ); /* 00000001 LINE_SMOOTH_ENABLE */ 1 , 0 ); /* 00000001 tesla UNK1658 */ 1 , 0 ); /* 00000001 POLYGON_SMOOTH_ENABLE */ 3 , 0 ); /* 00000001 POLYGON_OFFSET_*_ENABLE */ 1 , 4 ); /* 0000000f CULL_MODE */ 1 , 0 x1a); /* 0000001f POLYGON_MODE */ 1 , 0 ); /* 0000000f ZETA_FORMAT */ 1 , 0 ); /* 00000001 POINT_SPRITE_ENABLE */ 1 , 1 ); /* 00000001 tesla UNK165C */ 0 x10, 0 ); /* 00000001 SCISSOR_ENABLE */ 1 , 0 ); /* 00000001 tesla UNK1534 */ 1 , 0 ); /* 00000001 LINE_STIPPLE_ENABLE */ 1 , 0 x00ffff00); /* 00ffffff LINE_STIPPLE_PATTERN */ 1 , 0 ); /* ffffffff POLYGON_OFFSET_UNITS */ 1 , 0 ); /* ffffffff POLYGON_OFFSET_FACTOR */ 1 , 0 ); /* 00000003 tesla UNK1668 */ 2 , 0 ); /* 07ffffff SCREEN_SCISSOR */ 1 , 0 ); /* 00000001 tesla UNK1900 */ 1 , 0 xf); /* 0000000f COLOR_MASK */ 7 , 0 ); /* 0000000f COLOR_MASK */ 1 , 0 x0fac6881); /* 0fffffff RT_CONTROL */ 1 , 0 x11); /* 0000007f RT_FORMAT */ 7 , 0 ); /* 0000007f RT_FORMAT */ 8 , 0 ); /* 00000001 RT_HORIZ_LINEAR */ 1 , 4 ); /* 00000007 FP_CONTROL */ 1 , 0 ); /* 00000001 ALPHA_TEST_ENABLE */ 1 , 0 ); /* 00000007 ALPHA_TEST_FUNC */ if (IS_NVA3F(device->chipset))1 , 3 ); /* 00000003 UNK16B4 */ else if (device->chipset >= 0 xa0)1 , 1 ); /* 00000001 UNK16B4 */ 1 , 0 ); /* 00000003 MULTISAMPLE_CTRL */ 1 , 0 ); /* 00000003 tesla UNK0F90 */ 1 , 2 ); /* 00000003 tesla UNK143C */ 2 , 0 x04000000); /* 07ffffff tesla UNK0D6C */ 1 , 0 ); /* 000000ff STENCIL_FRONT_MASK */ 1 , 0 ); /* 00000001 DEPTH_WRITE_ENABLE */ 1 , 0 ); /* 00000001 SAMPLECNT_ENABLE */ 1 , 5 ); /* 0000000f UNK1408 */ 1 , 0 x52); /* 000001ff SEMANTIC_PTSZ */ 1 , 0 ); /* ffffffff POINT_SIZE */ 1 , 0 ); /* 00000001 */ 1 , 0 ); /* 00000007 tesla UNK0FB4 */ if (device->chipset != 0 x50) {1 , 0 ); /* 3ff */ 1 , 1 ); /* 00000001 tesla UNK1110 */ if (IS_NVA3F(device->chipset))1 , 0 ); /* 00000003 tesla UNK1928 */ 0 x10, 0 ); /* ffffffff DEPTH_RANGE_NEAR */ 0 x10, 0 x3f800000); /* ffffffff DEPTH_RANGE_FAR */ 1 , 0 x10); /* 000000ff VIEW_VOLUME_CLIP_CTRL */ 0 x20, 0 ); /* 07ffffff VIEWPORT_HORIZ, then VIEWPORT_VERT. (W&0x3fff)<<13 | (X&0x1fff). */ 1 , 0 ); /* ffffffff tesla UNK187C */ 1 , 0 ); /* 00000003 WINDOW_ORIGIN */ 1 , 0 ); /* 00000001 STENCIL_FRONT_ENABLE */ 1 , 0 ); /* 00000001 DEPTH_TEST_ENABLE */ 1 , 0 ); /* 00000001 STENCIL_BACK_ENABLE */ 1 , 0 ); /* 000000ff STENCIL_BACK_MASK */ 1 , 0 x8100c12); /* 1fffffff FP_INTERPOLANT_CTRL */ 1 , 5 ); /* 0000000f tesla UNK1220 */ 1 , 0 ); /* 00000007 MULTISAMPLE_SAMPLES_LOG2 */ 1 , 0 ); /* 000000ff tesla UNK1A20 */ 1 , 1 ); /* 00000001 ZETA_ENABLE */ 1 , 0 ); /* 00000001 VERTEX_TWO_SIDE_ENABLE */ 4 , 0 xffff); /* 0000ffff MSAA_MASK */ if (device->chipset != 0 x50)1 , 3 ); /* 00000003 tesla UNK1100 */ if (device->chipset < 0 xa0)0 x1c, 0 ); /* RO */ else if (IS_NVA3F(device->chipset))0 x9, 0 );1 , 0 ); /* 00000001 UNK1534 */ 1 , 0 ); /* 00000001 LINE_SMOOTH_ENABLE */ 1 , 0 ); /* 00000001 LINE_STIPPLE_ENABLE */ 1 , 0 x00ffff00); /* 00ffffff LINE_STIPPLE_PATTERN */ 1 , 0 x1a); /* 0000001f POLYGON_MODE */ 1 , 0 ); /* 00000003 WINDOW_ORIGIN */ if (device->chipset != 0 x50) {1 , 3 ); /* 00000003 tesla UNK1100 */ 1 , 0 ); /* 3ff */ /* XXX: the following block could belong either to unk1cxx, or if (device->chipset < 0 xa0)0 x25, 0 );else 0 x3b, 0 );static void struct nvkm_grctx *ctx)struct nvkm_device *device = ctx->device;1 , 0 x102); /* 0000ffff STRMOUT_BUFFER_CTRL */ 1 , 0 ); /* ffffffff STRMOUT_PRIMITIVE_COUNT */ 4 , 4 ); /* 000000ff STRMOUT_NUM_ATTRIBS */ if (device->chipset >= 0 xa0) {4 , 0 ); /* ffffffff UNK1A8C */ 4 , 0 ); /* ffffffff UNK1780 */ 1 , 4 ); /* 000000ff GP_RESULT_MAP_SIZE */ 1 , 4 ); /* 0000007f VP_RESULT_MAP_SIZE */ 1 , 0 ); /* 00000001 GP_ENABLE */ if (device->chipset == 0 x50)1 , 0 x3ff); /* 000003ff tesla UNK0D68 */ else 1 , 0 x7ff); /* 000007ff tesla UNK0D68 */ 1 , 0 ); /* ffffffff tesla UNK1A30 */ /* SEEK */ 1 , 0 x102); /* 0000ffff STRMOUT_BUFFER_CTRL */ 1 , 0 ); /* ffffffff STRMOUT_PRIMITIVE_COUNT */ 4 , 0 ); /* 000000ff STRMOUT_ADDRESS_HIGH */ 4 , 0 ); /* ffffffff STRMOUT_ADDRESS_LOW */ 4 , 4 ); /* 000000ff STRMOUT_NUM_ATTRIBS */ if (device->chipset >= 0 xa0) {4 , 0 ); /* ffffffff UNK1A8C */ 4 , 0 ); /* ffffffff UNK1780 */ 1 , 0 ); /* 0000ffff DMA_STRMOUT */ 1 , 0 ); /* 0000ffff DMA_QUERY */ 1 , 0 ); /* 000000ff QUERY_ADDRESS_HIGH */ 2 , 0 ); /* ffffffff QUERY_ADDRESS_LOW QUERY_COUNTER */ 2 , 0 ); /* ffffffff */ 1 , 0 ); /* ffffffff tesla UNK1A30 */ /* SEEK */ 0 x20, 0 ); /* ffffffff STRMOUT_MAP */ 1 , 0 ); /* 0000000f */ 1 , 0 ); /* 00000000? */ 2 , 0 ); /* ffffffff */ static void struct nvkm_grctx *ctx)struct nvkm_device *device = ctx->device;1 , 0 x4e3bfdf); /* ffffffff UNK0D64 */ 1 , 0 x4e3bfdf); /* ffffffff UNK0DF4 */ 1 , 0 ); /* 00000007 */ 1 , 0 ); /* 000003ff */ if (IS_NVA3F(device->chipset))1 , 0 x11); /* 000000ff tesla UNK1968 */ 1 , 0 ); /* ffffffff tesla UNK1A3C */ static void struct nvkm_grctx *ctx)struct nvkm_device *device = ctx->device;/* SEEK */ 1 , 0 ); /* 0000ffff DMA_QUERY */ 1 , 0 x0fac6881); /* 0fffffff RT_CONTROL */ 2 , 0 ); /* ffffffff */ 1 , 0 ); /* 000000ff QUERY_ADDRESS_HIGH */ 2 , 0 ); /* ffffffff QUERY_ADDRESS_LOW, COUNTER */ 1 , 0 ); /* 00000001 SAMPLECNT_ENABLE */ 1 , 0 ); /* 7 */ /* SEEK */ 1 , 0 ); /* 0000ffff DMA_QUERY */ 1 , 0 ); /* 000000ff QUERY_ADDRESS_HIGH */ 2 , 0 ); /* ffffffff QUERY_ADDRESS_LOW, COUNTER */ 1 , 0 x4e3bfdf); /* ffffffff UNK0D64 */ 1 , 0 x4e3bfdf); /* ffffffff UNK0DF4 */ 1 , 0 ); /* 00000001 eng2d UNK260 */ 1 , 0 ); /* ff/3ff */ 1 , 0 ); /* 00000007 */ if (IS_NVA3F(device->chipset))1 , 0 x11); /* 000000ff tesla UNK1968 */ 1 , 0 ); /* ffffffff tesla UNK1A3C */ static void struct nvkm_grctx *ctx)struct nvkm_device *device = ctx->device;int magic2;if (device->chipset == 0 x50) {0 x00003e60;else if (!IS_NVA3F(device->chipset)) {0 x001ffe67;else {0 x00087e67;1 , 0 ); /* f/7 MUTISAMPLE_SAMPLES_LOG2 */ 1 , 0 ); /* 00000001 tesla UNK1534 */ 1 , 0 ); /* 00000007 STENCIL_BACK_FUNC_FUNC */ 1 , 0 ); /* 000000ff STENCIL_BACK_FUNC_MASK */ 1 , 0 ); /* 000000ff STENCIL_BACK_MASK */ 3 , 0 ); /* 00000007 STENCIL_BACK_OP_FAIL, ZFAIL, ZPASS */ 1 , 2 ); /* 00000003 tesla UNK143C */ 1 , 0 ); /* ffff0ff3 */ 1 , magic2); /* 001fffff tesla UNK0F78 */ 1 , 0 ); /* 00000001 DEPTH_BOUNDS_EN */ 1 , 0 ); /* 00000007 DEPTH_TEST_FUNC */ 1 , 0 ); /* 00000001 DEPTH_TEST_ENABLE */ 1 , 0 ); /* 00000001 DEPTH_WRITE_ENABLE */ if (IS_NVA3F(device->chipset))1 , 1 ); /* 0000001f tesla UNK169C */ 1 , 0 ); /* 00000007 STENCIL_FRONT_FUNC_FUNC */ 1 , 0 ); /* 000000ff STENCIL_FRONT_FUNC_MASK */ 1 , 0 ); /* 000000ff STENCIL_FRONT_MASK */ 3 , 0 ); /* 00000007 STENCIL_FRONT_OP_FAIL, ZFAIL, ZPASS */ 1 , 0 ); /* 00000001 STENCIL_FRONT_ENABLE */ if (device->chipset >= 0 xa0 && !IS_NVAAF(device->chipset))1 , 0 x15); /* 000000ff */ 1 , 0 ); /* 00000001 STENCIL_BACK_ENABLE */ 1 , 1 ); /* 00000001 tesla UNK15B4 */ 1 , 0 x10); /* 3ff/ff VIEW_VOLUME_CLIP_CTRL */ 1 , 0 ); /* ffffffff CLEAR_DEPTH */ 1 , 0 ); /* 0000000f ZETA_FORMAT */ 1 , 1 ); /* 00000001 ZETA_ENABLE */ 1 , 0 ); /* ffffffff tesla UNK1A3C */ if (device->chipset == 0 x86 || device->chipset == 0 x92 || device->chipset == 0 x98 || device->chipset >= 0 xa0) {3 , 0 ); /* ff, ffffffff, ffffffff */ 1 , 4 ); /* 7 */ 1 , 0 x400); /* fffffff */ 1 , 0 x300); /* ffff */ 1 , 0 x1001); /* 1fff */ if (device->chipset != 0 xa0) {if (IS_NVA3F(device->chipset))1 , 0 ); /* 0000000f UNK15C8 */ else 1 , 0 x15); /* ff */ 1 , 0 ); /* 00000007 MULTISAMPLE_SAMPLES_LOG2 */ 1 , 0 ); /* 00000001 tesla UNK1534 */ 1 , 0 ); /* 00000007 STENCIL_BACK_FUNC_FUNC */ 1 , 0 ); /* 000000ff STENCIL_BACK_FUNC_MASK */ 1 , 0 ); /* ffff0ff3 */ 1 , 2 ); /* 00000003 tesla UNK143C */ 1 , 0 ); /* 00000001 DEPTH_BOUNDS_EN */ 1 , 0 ); /* 00000007 DEPTH_TEST_FUNC */ 1 , 0 ); /* 00000001 DEPTH_TEST_ENABLE */ 1 , 0 ); /* 00000001 DEPTH_WRITE_ENABLE */ 1 , 0 ); /* 00000007 STENCIL_FRONT_FUNC_FUNC */ 1 , 0 ); /* 000000ff STENCIL_FRONT_FUNC_MASK */ 1 , 0 ); /* 00000001 STENCIL_FRONT_ENABLE */ 1 , 0 ); /* 00000001 STENCIL_BACK_ENABLE */ 1 , 1 ); /* 00000001 tesla UNK15B4 */ 1 , 0 x10); /* 7f/ff VIEW_VOLUME_CLIP_CTRL */ 1 , 0 ); /* 0000000f ZETA_FORMAT */ 1 , 1 ); /* 00000001 ZETA_ENABLE */ 1 , 0 ); /* ffffffff tesla UNK1A3C */ 1 , 0 ); /* 00000001 tesla UNK1534 */ 1 , 0 ); /* 00000001 tesla UNK1900 */ 1 , 0 ); /* 00000007 STENCIL_BACK_FUNC_FUNC */ 1 , 0 ); /* 000000ff STENCIL_BACK_FUNC_MASK */ 1 , 0 ); /* 000000ff STENCIL_BACK_FUNC_REF */ 2 , 0 ); /* ffffffff DEPTH_BOUNDS */ 1 , 0 ); /* 00000001 DEPTH_BOUNDS_EN */ 1 , 0 ); /* 00000007 DEPTH_TEST_FUNC */ 1 , 0 ); /* 00000001 DEPTH_TEST_ENABLE */ 1 , 0 ); /* 00000001 DEPTH_WRITE_ENABLE */ 1 , 0 ); /* 0000000f */ 1 , 0 ); /* 00000001 tesla UNK0FB0 */ 1 , 0 ); /* 00000007 STENCIL_FRONT_FUNC_FUNC */ 1 , 0 ); /* 000000ff STENCIL_FRONT_FUNC_MASK */ 1 , 0 ); /* 000000ff STENCIL_FRONT_FUNC_REF */ 1 , 0 ); /* 00000001 STENCIL_FRONT_ENABLE */ 1 , 0 ); /* 00000001 STENCIL_BACK_ENABLE */ 1 , 0 x10); /* 7f/ff VIEW_VOLUME_CLIP_CTRL */ 0 x10, 0 ); /* ffffffff DEPTH_RANGE_NEAR */ 0 x10, 0 x3f800000); /* ffffffff DEPTH_RANGE_FAR */ 1 , 0 ); /* 0000000f ZETA_FORMAT */ 1 , 0 ); /* 00000007 MULTISAMPLE_SAMPLES_LOG2 */ 1 , 0 ); /* 00000007 STENCIL_BACK_FUNC_FUNC */ 1 , 0 ); /* 000000ff STENCIL_BACK_FUNC_MASK */ 1 , 0 ); /* 000000ff STENCIL_BACK_FUNC_REF */ 1 , 0 ); /* 000000ff STENCIL_BACK_MASK */ 3 , 0 ); /* 00000007 STENCIL_BACK_OP_FAIL, ZFAIL, ZPASS */ 2 , 0 ); /* ffffffff DEPTH_BOUNDS */ 1 , 0 ); /* 00000001 DEPTH_BOUNDS_EN */ 1 , 0 ); /* 00000007 DEPTH_TEST_FUNC */ 1 , 0 ); /* 00000001 DEPTH_TEST_ENABLE */ 1 , 0 ); /* 00000001 DEPTH_WRITE_ENABLE */ 1 , 0 ); /* 000000ff CLEAR_STENCIL */ 1 , 0 ); /* 00000007 STENCIL_FRONT_FUNC_FUNC */ 1 , 0 ); /* 000000ff STENCIL_FRONT_FUNC_MASK */ 1 , 0 ); /* 000000ff STENCIL_FRONT_FUNC_REF */ 1 , 0 ); /* 000000ff STENCIL_FRONT_MASK */ 3 , 0 ); /* 00000007 STENCIL_FRONT_OP_FAIL, ZFAIL, ZPASS */ 1 , 0 ); /* 00000001 STENCIL_FRONT_ENABLE */ 1 , 0 ); /* 00000001 STENCIL_BACK_ENABLE */ 1 , 0 x10); /* 7f/ff VIEW_VOLUME_CLIP_CTRL */ 1 , 0 ); /* 0000000f ZETA_FORMAT */ 1 , 0 x3f); /* 0000003f UNK1590 */ 1 , 0 ); /* 00000007 MULTISAMPLE_SAMPLES_LOG2 */ 1 , 0 ); /* 00000001 tesla UNK1534 */ 2 , 0 ); /* ffff0ff3, ffff */ 1 , 0 ); /* 00000001 tesla UNK0FB0 */ 1 , 0 ); /* 0001ffff GP_BUILTIN_RESULT_EN */ 1 , 1 ); /* 00000001 tesla UNK15B4 */ 1 , 0 ); /* 0000000f ZETA_FORMAT */ 1 , 1 ); /* 00000001 ZETA_ENABLE */ 1 , 0 ); /* ffffffff CLEAR_DEPTH */ 1 , 1 ); /* 00000001 tesla UNK19CC */ if (device->chipset >= 0 xa0) {2 , 0 );1 , 0 x1001);0 xb, 0 );else {1 , 0 ); /* 00000007 */ 1 , 0 ); /* 00000001 tesla UNK1534 */ 1 , 0 ); /* 00000007 MULTISAMPLE_SAMPLES_LOG2 */ 8 , 0 ); /* 00000001 BLEND_ENABLE */ 1 , 0 ); /* ffff0ff3 */ 1 , 0 x11); /* 3f/7f RT_FORMAT */ 7 , 0 ); /* 3f/7f RT_FORMAT */ 1 , 0 xf); /* 0000000f COLOR_MASK */ 7 , 0 ); /* 0000000f COLOR_MASK */ 1 , 0 x11); /* 3f/7f */ 1 , 0 ); /* 00000001 LOGIC_OP_ENABLE */ if (device->chipset != 0 x50) {1 , 0 ); /* 0000000f LOGIC_OP */ 1 , 0 ); /* 000000ff */ 1 , 0 ); /* 00000007 OPERATION */ 1 , 0 ); /* ff/3ff */ 1 , 0 ); /* 00000003 UNK0F90 */ 2 , 1 ); /* 00000007 BLEND_EQUATION_RGB, ALPHA */ 1 , 1 ); /* 00000001 UNK133C */ 1 , 2 ); /* 0000001f BLEND_FUNC_SRC_RGB */ 1 , 1 ); /* 0000001f BLEND_FUNC_DST_RGB */ 1 , 2 ); /* 0000001f BLEND_FUNC_SRC_ALPHA */ 1 , 1 ); /* 0000001f BLEND_FUNC_DST_ALPHA */ 1 , 0 ); /* 00000001 */ 1 , magic2); /* 001fffff tesla UNK0F78 */ 1 , 0 ); /* ffffffff tesla UNK1A3C */ 1 , 0 x0fac6881); /* 0fffffff RT_CONTROL */ if (IS_NVA3F(device->chipset)) {1 , 0 ); /* 00000001 tesla UNK12E4 */ 8 , 1 ); /* 00000007 IBLEND_EQUATION_RGB */ 8 , 1 ); /* 00000007 IBLEND_EQUATION_ALPHA */ 8 , 1 ); /* 00000001 IBLEND_UNK00 */ 8 , 2 ); /* 0000001f IBLEND_FUNC_SRC_RGB */ 8 , 1 ); /* 0000001f IBLEND_FUNC_DST_RGB */ 8 , 2 ); /* 0000001f IBLEND_FUNC_SRC_ALPHA */ 8 , 1 ); /* 0000001f IBLEND_FUNC_DST_ALPHA */ 1 , 0 ); /* 00000001 tesla UNK1140 */ 2 , 0 ); /* 00000001 */ 1 , 1 ); /* 0000001f tesla UNK169C */ 1 , 0 ); /* 0000000f */ 1 , 0 ); /* 00000003 */ 1 , 0 ); /* ffffffff */ 2 , 0 ); /* 00000001 */ 1 , 1 ); /* 0000001f tesla UNK169C */ 1 , 0 ); /* 00000001 */ 1 , 0 ); /* 000003ff */ else if (device->chipset >= 0 xa0) {2 , 0 ); /* 00000001 */ 1 , 0 ); /* 00000007 */ 1 , 0 ); /* 00000003 */ 1 , 0 ); /* ffffffff */ 2 , 0 ); /* 00000001 */ else {1 , 0 ); /* 00000007 MULTISAMPLE_SAMPLES_LOG2 */ 1 , 0 ); /* 00000003 tesla UNK1430 */ 1 , 0 ); /* ffffffff tesla UNK1A3C */ 4 , 0 ); /* ffffffff CLEAR_COLOR */ 4 , 0 ); /* ffffffff BLEND_COLOR A R G B */ 1 , 0 ); /* 00000fff eng2d UNK2B0 */ if (device->chipset >= 0 xa0)2 , 0 ); /* 00000001 */ 1 , 0 ); /* 000003ff */ 8 , 0 ); /* 00000001 BLEND_ENABLE */ 1 , 1 ); /* 00000001 UNK133C */ 1 , 2 ); /* 0000001f BLEND_FUNC_SRC_RGB */ 1 , 1 ); /* 0000001f BLEND_FUNC_DST_RGB */ 1 , 1 ); /* 00000007 BLEND_EQUATION_RGB */ 1 , 2 ); /* 0000001f BLEND_FUNC_SRC_ALPHA */ 1 , 1 ); /* 0000001f BLEND_FUNC_DST_ALPHA */ 1 , 1 ); /* 00000007 BLEND_EQUATION_ALPHA */ 1 , 0 ); /* 00000001 UNK19C0 */ 1 , 0 ); /* 00000001 LOGIC_OP_ENABLE */ 1 , 0 ); /* 0000000f LOGIC_OP */ if (device->chipset >= 0 xa0)1 , 0 ); /* 00000001 UNK12E4? NVA3+ only? */ if (IS_NVA3F(device->chipset)) {8 , 1 ); /* 00000001 IBLEND_UNK00 */ 8 , 1 ); /* 00000007 IBLEND_EQUATION_RGB */ 8 , 2 ); /* 0000001f IBLEND_FUNC_SRC_RGB */ 8 , 1 ); /* 0000001f IBLEND_FUNC_DST_RGB */ 8 , 1 ); /* 00000007 IBLEND_EQUATION_ALPHA */ 8 , 2 ); /* 0000001f IBLEND_FUNC_SRC_ALPHA */ 8 , 1 ); /* 0000001f IBLEND_FUNC_DST_ALPHA */ 1 , 0 ); /* 00000001 tesla UNK15C4 */ 1 , 0 ); /* 00000001 */ 1 , 0 ); /* 00000001 tesla UNK1140 */ 1 , 0 x11); /* 3f/7f DST_FORMAT */ 1 , 1 ); /* 00000001 DST_LINEAR */ 1 , 0 ); /* 00000007 PATTERN_COLOR_FORMAT */ 2 , 0 ); /* ffffffff PATTERN_MONO_COLOR */ 1 , 0 ); /* 00000001 PATTERN_MONO_FORMAT */ 2 , 0 ); /* ffffffff PATTERN_MONO_BITMAP */ 1 , 0 ); /* 00000003 PATTERN_SELECT */ 1 , 0 ); /* 000000ff ROP */ 1 , 0 ); /* ffffffff BETA1 */ 1 , 0 ); /* ffffffff BETA4 */ 1 , 0 ); /* 00000007 OPERATION */ 0 x50, 0 ); /* 10x ffffff, ffffff, ffffff, ffffff, 3 PATTERN */ static void struct nvkm_grctx *ctx)struct nvkm_device *device = ctx->device;int magic3;switch (device->chipset) {case 0 x50:0 x1000;break ;case 0 x86:case 0 x98:case 0 xa8:case 0 xaa:case 0 xac:case 0 xaf:0 x1e00;break ;default :0 ;1 , 0 ); /* 00000001 GP_ENABLE */ 1 , 4 ); /* 7f/ff[NVA0+] VP_REG_ALLOC_RESULT */ 1 , 0 ); /* 00000001 GP_ENABLE */ 1 , 0 ); /* ffffffff tesla UNK1A30 */ 1 , 0 ); /* 111/113[NVA0+] */ if (IS_NVA3F(device->chipset))0 x1f, 0 ); /* ffffffff */ else if (device->chipset >= 0 xa0)0 x0f, 0 ); /* ffffffff */ else 0 x10, 0 ); /* fffffff VP_RESULT_MAP_1 up */ 2 , 0 ); /* f/1f[NVA3], fffffff/ffffffff[NVA0+] */ 1 , 4 ); /* 7f/ff VP_REG_ALLOC_RESULT */ 1 , 4 ); /* 7f/ff VP_RESULT_MAP_SIZE */ if (device->chipset >= 0 xa0)1 , 0 x03020100); /* ffffffff */ else 1 , 0 x00608080); /* fffffff VP_RESULT_MAP_0 */ 1 , 0 ); /* 00000001 GP_ENABLE */ 1 , 0 ); /* ffffffff tesla UNK1A30 */ 2 , 0 ); /* 111/113, 7f/ff */ 1 , 4 ); /* 7f/ff VP_RESULT_MAP_SIZE */ 1 , 0 ); /* ffffffff tesla UNK1A30 */ 1 , 0 ); /* 00000001 GP_ENABLE */ 1 , 4 ); /* 000000ff GP_REG_ALLOC_RESULT */ 1 , 4 ); /* 000000ff GP_RESULT_MAP_SIZE */ 1 , 0 x80); /* 0000ffff GP_VERTEX_OUTPUT_COUNT */ if (magic3)1 , magic3); /* 00007fff tesla UNK141C */ 1 , 4 ); /* 7f/ff VP_RESULT_MAP_SIZE */ 1 , 0 ); /* ffffffff tesla UNK1A30 */ 1 , 0 ); /* 111/113 */ 0 x1f, 0 ); /* ffffffff GP_RESULT_MAP_1 up */ 1 , 0 ); /* 0000001f */ 1 , 0 ); /* ffffffff */ 1 , 0 ); /* 00000001 GP_ENABLE */ 1 , 4 ); /* 000000ff GP_REG_ALLOC_RESULT */ 1 , 0 x80); /* 0000ffff GP_VERTEX_OUTPUT_COUNT */ 1 , 4 ); /* 000000ff GP_RESULT_MAP_SIZE */ 1 , 0 x03020100); /* ffffffff GP_RESULT_MAP_0 */ 1 , 3 ); /* 00000003 GP_OUTPUT_PRIMITIVE_TYPE */ if (magic3)1 , magic3); /* 7fff tesla UNK141C */ 1 , 4 ); /* 7f/ff VP_RESULT_MAP_SIZE */ 1 , 0 ); /* 00000001 PROVOKING_VERTEX_LAST */ 1 , 0 ); /* ffffffff tesla UNK1A30 */ 1 , 0 ); /* 111/113 */ 1 , 0 ); /* 00000001 GP_ENABLE */ 1 , 4 ); /* 000000ff GP_RESULT_MAP_SIZE */ 1 , 3 ); /* 00000003 GP_OUTPUT_PRIMITIVE_TYPE */ 1 , 0 ); /* 00000001 PROVOKING_VERTEX_LAST */ 1 , 0 ); /* ffffffff tesla UNK1A30 */ 1 , 0 ); /* 00000003 tesla UNK13A0 */ 1 , 4 ); /* 7f/ff VP_REG_ALLOC_RESULT */ 1 , 0 ); /* 00000001 GP_ENABLE */ 1 , 0 ); /* ffffffff tesla UNK1A30 */ 1 , 0 ); /* 111/113 */ if (device->chipset == 0 x94 || device->chipset == 0 x96)0 x1020, 0 ); /* 4 x (0x400 x 0xffffffff, ff, 0, 0, 0, 4 x ffffffff) */ else if (device->chipset < 0 xa0)0 xa20, 0 ); /* 4 x (0x280 x 0xffffffff, ff, 0, 0, 0, 4 x ffffffff) */ else if (!IS_NVA3F(device->chipset))0 x210, 0 ); /* ffffffff */ else 0 x410, 0 ); /* ffffffff */ 1 , 0 ); /* 00000001 GP_ENABLE */ 1 , 4 ); /* 000000ff GP_RESULT_MAP_SIZE */ 1 , 3 ); /* 00000003 GP_OUTPUT_PRIMITIVE_TYPE */ 1 , 0 ); /* 00000001 PROVOKING_VERTEX_LAST */ 1 , 0 ); /* ffffffff tesla UNK1A30 */ static void struct nvkm_grctx *ctx)struct nvkm_device *device = ctx->device;int magic1, magic2;if (device->chipset == 0 x50) {0 x3ff;0 x00003e60;else if (!IS_NVA3F(device->chipset)) {0 x7ff;0 x001ffe67;else {0 x7ff;0 x00087e67;1 , 0 ); /* 00000007 ALPHA_TEST_FUNC */ 1 , 0 ); /* ffffffff ALPHA_TEST_REF */ 1 , 0 ); /* 00000001 ALPHA_TEST_ENABLE */ if (IS_NVA3F(device->chipset))1 , 1 ); /* 0000000f UNK16A0 */ 1 , 0 ); /* 7/f MULTISAMPLE_SAMPLES_LOG2 */ 1 , 0 ); /* 00000001 tesla UNK1534 */ 1 , 0 ); /* 000000ff STENCIL_BACK_MASK */ 3 , 0 ); /* 00000007 STENCIL_BACK_OP_FAIL, ZFAIL, ZPASS */ 4 , 0 ); /* ffffffff BLEND_COLOR */ 1 , 0 ); /* 00000001 UNK19C0 */ 1 , 0 ); /* 00000001 UNK0FDC */ 1 , 0 xf); /* 0000000f COLOR_MASK */ 7 , 0 ); /* 0000000f COLOR_MASK */ 1 , 0 ); /* 00000001 DEPTH_TEST_ENABLE */ 1 , 0 ); /* 00000001 DEPTH_WRITE_ENABLE */ 1 , 0 ); /* 00000001 LOGIC_OP_ENABLE */ 1 , 0 ); /* ff[NV50]/3ff[NV84+] */ 1 , 4 ); /* 00000007 FP_CONTROL */ 4 , 0 xffff); /* 0000ffff MSAA_MASK */ 1 , 0 ); /* 000000ff STENCIL_FRONT_MASK */ 3 , 0 ); /* 00000007 STENCIL_FRONT_OP_FAIL, ZFAIL, ZPASS */ 1 , 0 ); /* 00000001 STENCIL_FRONT_ENABLE */ 1 , 0 ); /* 00000001 STENCIL_BACK_ENABLE */ 2 , 0 ); /* 00007fff WINDOW_OFFSET_XY */ 1 , 1 ); /* 00000001 tesla UNK19CC */ 1 , 0 ); /* 7 */ 1 , 0 ); /* 00000001 SAMPLECNT_ENABLE */ 1 , 0 ); /* 0000000f ZETA_FORMAT */ 1 , 1 ); /* 00000001 ZETA_ENABLE */ 1 , 0 ); /* ffffffff COLOR_KEY */ 1 , 0 ); /* 00000001 COLOR_KEY_ENABLE */ 1 , 0 ); /* 00000007 COLOR_KEY_FORMAT */ 2 , 0 ); /* ffffffff SIFC_BITMAP_COLOR */ 1 , 1 ); /* 00000001 SIFC_BITMAP_WRITE_BIT0_ENABLE */ 1 , 0 ); /* 00000007 ALPHA_TEST_FUNC */ 1 , 0 ); /* 00000001 ALPHA_TEST_ENABLE */ if (IS_NVA3F(device->chipset)) {1 , 3 ); /* 00000003 tesla UNK16B4 */ 1 , 0 ); /* 00000003 */ 1 , 0 ); /* 00000003 tesla UNK1298 */ else if (device->chipset >= 0 xa0) {1 , 1 ); /* 00000001 tesla UNK16B4 */ 1 , 0 ); /* 00000003 */ else {1 , 0 ); /* 00000003 MULTISAMPLE_CTRL */ 1 , 0 ); /* 00000001 tesla UNK1534 */ 8 , 0 ); /* 00000001 BLEND_ENABLE */ 1 , 1 ); /* 0000001f BLEND_FUNC_DST_ALPHA */ 1 , 1 ); /* 00000007 BLEND_EQUATION_ALPHA */ 1 , 2 ); /* 0000001f BLEND_FUNC_SRC_ALPHA */ 1 , 1 ); /* 0000001f BLEND_FUNC_DST_RGB */ 1 , 1 ); /* 00000007 BLEND_EQUATION_RGB */ 1 , 2 ); /* 0000001f BLEND_FUNC_SRC_RGB */ if (IS_NVA3F(device->chipset)) {1 , 0 ); /* 00000001 UNK12E4 */ 8 , 1 ); /* 00000007 IBLEND_EQUATION_RGB */ 8 , 1 ); /* 00000007 IBLEND_EQUATION_ALPHA */ 8 , 1 ); /* 00000001 IBLEND_UNK00 */ 8 , 2 ); /* 0000001f IBLEND_SRC_RGB */ 8 , 1 ); /* 0000001f IBLEND_DST_RGB */ 8 , 2 ); /* 0000001f IBLEND_SRC_ALPHA */ 8 , 1 ); /* 0000001f IBLEND_DST_ALPHA */ 1 , 0 ); /* 00000001 UNK1140 */ 1 , 1 ); /* 00000001 UNK133C */ 1 , 0 ); /* ffff0ff3 */ 1 , 0 x11); /* 3f/7f RT_FORMAT */ 7 , 0 ); /* 3f/7f RT_FORMAT */ 1 , 0 x0fac6881); /* 0fffffff RT_CONTROL */ 1 , 0 ); /* 00000001 LOGIC_OP_ENABLE */ 1 , 0 ); /* ff/3ff */ 1 , 4 ); /* 00000007 FP_CONTROL */ 1 , 0 ); /* 00000003 UNK0F90 */ 1 , 0 ); /* 00000001 FRAMEBUFFER_SRGB */ 1 , 0 ); /* 7 */ 1 , 0 x11); /* 3f/7f DST_FORMAT */ 1 , 1 ); /* 00000001 DST_LINEAR */ 1 , 0 ); /* 00000007 OPERATION */ 1 , 0 xcf); /* 000000ff SIFC_FORMAT */ 1 , 0 xcf); /* 000000ff DRAW_COLOR_FORMAT */ 1 , 0 xcf); /* 000000ff SRC_FORMAT */ if (IS_NVA3F(device->chipset))1 , 1 ); /* 0000001f tesla UNK169C */ 1 , 0 ); /* ffffffff tesla UNK1A3C */ 1 , 0 ); /* 7/f[NVA3] MULTISAMPLE_SAMPLES_LOG2 */ 8 , 0 ); /* 00000001 BLEND_ENABLE */ 1 , 1 ); /* 0000001f BLEND_FUNC_DST_ALPHA */ 1 , 1 ); /* 00000007 BLEND_EQUATION_ALPHA */ 1 , 2 ); /* 0000001f BLEND_FUNC_SRC_ALPHA */ 1 , 1 ); /* 0000001f BLEND_FUNC_DST_RGB */ 1 , 1 ); /* 00000007 BLEND_EQUATION_RGB */ 1 , 2 ); /* 0000001f BLEND_FUNC_SRC_RGB */ 1 , 1 ); /* 00000001 UNK133C */ 1 , 0 ); /* ffff0ff3 */ 8 , 1 ); /* 00000001 UNK19E0 */ 1 , 0 x11); /* 3f/7f RT_FORMAT */ 7 , 0 ); /* 3f/7f RT_FORMAT */ 1 , 0 x0fac6881); /* 0fffffff RT_CONTROL */ 1 , 0 xf); /* 0000000f COLOR_MASK */ 7 , 0 ); /* 0000000f COLOR_MASK */ 1 , magic2); /* 001fffff tesla UNK0F78 */ 1 , 0 ); /* 00000001 DEPTH_BOUNDS_EN */ 1 , 0 ); /* 00000001 DEPTH_TEST_ENABLE */ 1 , 0 x11); /* 3f/7f DST_FORMAT */ 1 , 1 ); /* 00000001 DST_LINEAR */ if (IS_NVA3F(device->chipset))1 , 1 ); /* 0000001f tesla UNK169C */ if (device->chipset == 0 x50)1 , 0 ); /* ff */ else 3 , 0 ); /* 1, 7, 3ff */ 1 , 4 ); /* 00000007 FP_CONTROL */ 1 , 0 ); /* 00000003 UNK0F90 */ 1 , 0 ); /* 00000001 STENCIL_FRONT_ENABLE */ 1 , 0 ); /* 00000007 */ 1 , 0 ); /* 00000001 SAMPLECNT_ENABLE */ 1 , 0 ); /* 0000000f ZETA_FORMAT */ 1 , 1 ); /* 00000001 ZETA_ENABLE */ 1 , 0 ); /* ffffffff tesla UNK1A3C */ 1 , 0 ); /* 7/f MULTISAMPLE_SAMPLES_LOG2 */ 1 , 0 ); /* 00000001 tesla UNK1534 */ 1 , 0 ); /* ffff0ff3 */ 1 , 0 x11); /* 3f/7f RT_FORMAT */ 7 , 0 ); /* 3f/7f RT_FORMAT */ 1 , 0 x0fac6881); /* 0fffffff RT_CONTROL */ 1 , 0 ); /* 00000001 DEPTH_BOUNDS_EN */ 1 , 0 ); /* 00000001 DEPTH_TEST_ENABLE */ 1 , 0 ); /* 00000001 DEPTH_WRITE_ENABLE */ 1 , 0 x11); /* 3f/7f DST_FORMAT */ 1 , 1 ); /* 00000001 DST_LINEAR */ 1 , 0 ); /* 000fffff BLIT_DU_DX_FRACT */ 1 , 1 ); /* 0001ffff BLIT_DU_DX_INT */ 1 , 0 ); /* 000fffff BLIT_DV_DY_FRACT */ 1 , 1 ); /* 0001ffff BLIT_DV_DY_INT */ 1 , 0 ); /* ff/3ff */ 1 , magic1); /* 3ff/7ff tesla UNK0D68 */ 1 , 0 ); /* 00000001 STENCIL_FRONT_ENABLE */ 1 , 1 ); /* 00000001 tesla UNK15B4 */ 1 , 0 ); /* 0000000f ZETA_FORMAT */ 1 , 1 ); /* 00000001 ZETA_ENABLE */ 1 , 0 ); /* 00000007 */ 1 , 0 ); /* ffffffff tesla UNK1A3C */ if (IS_NVA3F(device->chipset))1 , 1 ); /* 0000001f tesla UNK169C */ 8 , 0 ); /* 0000ffff DMA_COLOR */ 1 , 0 ); /* 0000ffff DMA_GLOBAL */ 1 , 0 ); /* 0000ffff DMA_LOCAL */ 1 , 0 ); /* 0000ffff DMA_STACK */ 1 , 0 ); /* ff/3ff */ 1 , 0 ); /* 0000ffff DMA_DST */ 1 , 0 ); /* 7 */ 1 , 0 ); /* 7/f MULTISAMPLE_SAMPLES_LOG2 */ 1 , 0 ); /* ffff0ff3 */ 8 , 0 ); /* 000000ff RT_ADDRESS_HIGH */ 8 , 0 ); /* ffffffff RT_LAYER_STRIDE */ 8 , 0 ); /* ffffffff RT_ADDRESS_LOW */ 8 , 8 ); /* 0000007f RT_TILE_MODE */ 1 , 0 x11); /* 3f/7f RT_FORMAT */ 7 , 0 ); /* 3f/7f RT_FORMAT */ 1 , 0 x0fac6881); /* 0fffffff RT_CONTROL */ 8 , 0 x400); /* 0fffffff RT_HORIZ */ 8 , 0 x300); /* 0000ffff RT_VERT */ 1 , 1 ); /* 00001fff RT_ARRAY_MODE */ 1 , 0 xf); /* 0000000f COLOR_MASK */ 7 , 0 ); /* 0000000f COLOR_MASK */ 1 , 0 x20); /* 00000fff DST_TILE_MODE */ 1 , 0 x11); /* 3f/7f DST_FORMAT */ 1 , 0 x100); /* 0001ffff DST_HEIGHT */ 1 , 0 ); /* 000007ff DST_LAYER */ 1 , 1 ); /* 00000001 DST_LINEAR */ 1 , 0 ); /* ffffffff DST_ADDRESS_LOW */ 1 , 0 ); /* 000000ff DST_ADDRESS_HIGH */ 1 , 0 x40); /* 0007ffff DST_PITCH */ 1 , 0 x100); /* 0001ffff DST_WIDTH */ 1 , 0 ); /* 0000ffff */ 1 , 3 ); /* 00000003 tesla UNK15AC */ 1 , 0 ); /* ff/3ff */ 1 , 0 ); /* 0001ffff GP_BUILTIN_RESULT_EN */ 1 , 0 ); /* 00000003 UNK0F90 */ 1 , 0 ); /* 00000007 */ if (IS_NVA3F(device->chipset))1 , 1 ); /* 0000001f tesla UNK169C */ 1 , magic2); /* 001fffff tesla UNK0F78 */ 1 , 0 ); /* 7/f MULTISAMPLE_SAMPLES_LOG2 */ 1 , 0 ); /* 00000001 tesla UNK1534 */ 1 , 0 ); /* ffff0ff3 */ 1 , 2 ); /* 00000003 tesla UNK143C */ 1 , 0 x0fac6881); /* 0fffffff RT_CONTROL */ 1 , 0 ); /* 0000ffff DMA_ZETA */ 1 , 0 ); /* 00000001 DEPTH_BOUNDS_EN */ 1 , 0 ); /* 00000001 DEPTH_TEST_ENABLE */ 1 , 0 ); /* 00000001 DEPTH_WRITE_ENABLE */ 2 , 0 ); /* ffff, ff/3ff */ 1 , 0 ); /* 0001ffff GP_BUILTIN_RESULT_EN */ 1 , 0 ); /* 00000001 STENCIL_FRONT_ENABLE */ 1 , 0 ); /* 000000ff STENCIL_FRONT_MASK */ 1 , 1 ); /* 00000001 tesla UNK15B4 */ 1 , 0 ); /* 00000007 */ 1 , 0 ); /* ffffffff ZETA_LAYER_STRIDE */ 1 , 0 ); /* 000000ff ZETA_ADDRESS_HIGH */ 1 , 0 ); /* ffffffff ZETA_ADDRESS_LOW */ 1 , 4 ); /* 00000007 ZETA_TILE_MODE */ 1 , 0 ); /* 0000000f ZETA_FORMAT */ 1 , 1 ); /* 00000001 ZETA_ENABLE */ 1 , 0 x400); /* 0fffffff ZETA_HORIZ */ 1 , 0 x300); /* 0000ffff ZETA_VERT */ 1 , 0 x1001); /* 00001fff ZETA_ARRAY_MODE */ 1 , 0 ); /* ffffffff tesla UNK1A3C */ 1 , 0 ); /* 7/f MULTISAMPLE_SAMPLES_LOG2 */ if (IS_NVA3F(device->chipset))1 , 0 ); /* 00000001 */ 1 , 0 ); /* ffff0ff3 */ 1 , 0 x11); /* 3f/7f RT_FORMAT */ 7 , 0 ); /* 3f/7f RT_FORMAT */ 1 , 0 x0fac6881); /* 0fffffff RT_CONTROL */ 1 , 0 xf); /* 0000000f COLOR_MASK */ 7 , 0 ); /* 0000000f COLOR_MASK */ 1 , 0 ); /* ff/3ff */ 8 , 0 ); /* 00000001 BLEND_ENABLE */ 1 , 0 ); /* 00000003 UNK0F90 */ 1 , 0 ); /* 00000001 FRAMEBUFFER_SRGB */ 1 , 0 ); /* 7 */ 1 , 0 ); /* 00000001 LOGIC_OP_ENABLE */ if (IS_NVA3F(device->chipset)) {1 , 0 ); /* 00000001 UNK1140 */ 1 , 1 ); /* 0000001f tesla UNK169C */ 1 , 0 ); /* 7/f MULTISAMPLE_SAMPLES_LOG2 */ 1 , 0 ); /* 00000001 UNK1534 */ 1 , 0 ); /* ffff0ff3 */ if (device->chipset >= 0 xa0)1 , 0 x0fac6881); /* fffffff */ 1 , magic2); /* 001fffff tesla UNK0F78 */ 1 , 0 ); /* 00000001 DEPTH_BOUNDS_EN */ 1 , 0 ); /* 00000001 DEPTH_TEST_ENABLE */ 1 , 0 ); /* 00000001 DEPTH_WRITE_ENABLE */ 1 , 0 x11); /* 3f/7f DST_FORMAT */ 1 , 0 ); /* 00000001 tesla UNK0FB0 */ 1 , 0 ); /* ff/3ff */ 1 , 4 ); /* 00000007 FP_CONTROL */ 1 , 0 ); /* 00000001 STENCIL_FRONT_ENABLE */ 1 , 1 ); /* 00000001 tesla UNK15B4 */ 1 , 1 ); /* 00000001 tesla UNK19CC */ 1 , 0 ); /* 00000007 */ 1 , 0 ); /* 00000001 SAMPLECNT_ENABLE */ 1 , 0 ); /* 0000000f ZETA_FORMAT */ 1 , 1 ); /* 00000001 ZETA_ENABLE */ if (IS_NVA3F(device->chipset)) {1 , 1 ); /* 0000001f tesla UNK169C */ 1 , 0 ); /* 0000000f tesla UNK15C8 */ 1 , 0 ); /* ffffffff tesla UNK1A3C */ if (device->chipset >= 0 xa0) {3 , 0 ); /* 7/f, 1, ffff0ff3 */ 1 , 0 xfac6881); /* fffffff */ 4 , 0 ); /* 1, 1, 1, 3ff */ 1 , 4 ); /* 7 */ 1 , 0 ); /* 1 */ 2 , 1 ); /* 1 */ 2 , 0 ); /* 7, f */ 1 , 1 ); /* 1 */ 1 , 0 ); /* 7/f */ if (IS_NVA3F(device->chipset))0 x9, 0 ); /* 1 */ else 0 x8, 0 ); /* 1 */ 1 , 0 ); /* ffff0ff3 */ 8 , 1 ); /* 1 */ 1 , 0 x11); /* 7f */ 7 , 0 ); /* 7f */ 1 , 0 xfac6881); /* fffffff */ 1 , 0 xf); /* f */ 7 , 0 ); /* f */ 1 , 0 x11); /* 7f */ 1 , 1 ); /* 1 */ 5 , 0 ); /* 1, 7, 3ff, 3, 7 */ if (IS_NVA3F(device->chipset)) {1 , 0 ); /* 00000001 UNK1140 */ 1 , 1 ); /* 0000001f tesla UNK169C */ static void struct nvkm_grctx *ctx)struct nvkm_device *device = ctx->device;2 , 0 ); /* 1 LINKED_TSC. yes, 2. */ if (device->chipset != 0 x50)1 , 0 ); /* 3 */ 1 , 1 ); /* 1ffff BLIT_DU_DX_INT */ 1 , 0 ); /* fffff BLIT_DU_DX_FRACT */ 1 , 1 ); /* 1ffff BLIT_DV_DY_INT */ 1 , 0 ); /* fffff BLIT_DV_DY_FRACT */ if (device->chipset == 0 x50)1 , 0 ); /* 3 BLIT_CONTROL */ else 2 , 0 ); /* 3ff, 1 */ 1 , 0 x2a712488); /* ffffffff SRC_TIC_0 */ 1 , 0 ); /* ffffffff SRC_TIC_1 */ 1 , 0 x4085c000); /* ffffffff SRC_TIC_2 */ 1 , 0 x40); /* ffffffff SRC_TIC_3 */ 1 , 0 x100); /* ffffffff SRC_TIC_4 */ 1 , 0 x10100); /* ffffffff SRC_TIC_5 */ 1 , 0 x02800000); /* ffffffff SRC_TIC_6 */ 1 , 0 ); /* ffffffff SRC_TIC_7 */ if (device->chipset == 0 x50) {1 , 0 ); /* 00000001 turing UNK358 */ 1 , 0 ); /* ffffffff tesla UNK1A34? */ 1 , 0 ); /* 00000003 turing UNK37C tesla UNK1690 */ 1 , 0 ); /* 00000003 BLIT_CONTROL */ 1 , 0 ); /* 00000001 turing UNK32C tesla UNK0F94 */ else if (!IS_NVAAF(device->chipset)) {1 , 0 ); /* ffffffff tesla UNK1A34? */ 1 , 0 ); /* 00000003 */ 1 , 0 ); /* 000003ff */ 1 , 0 ); /* 00000003 */ 1 , 0 ); /* 000003ff */ 1 , 0 ); /* 00000003 tesla UNK1664 / turing UNK03E8 */ 1 , 0 ); /* 00000003 */ 1 , 0 ); /* 000003ff */ else {0 x6, 0 );1 , 0 ); /* ffffffff tesla UNK1A34 */ 1 , 0 ); /* 0000ffff DMA_TEXTURE */ 1 , 0 ); /* 0000ffff DMA_SRC */ static void struct nvkm_grctx *ctx)struct nvkm_device *device = ctx->device;1 , 0 ); /* 00000001 UNK1534 */ 1 , 0 ); /* 7/f MULTISAMPLE_SAMPLES_LOG2 */ 2 , 0 ); /* 7, ffff0ff3 */ 1 , 0 ); /* 00000001 DEPTH_TEST_ENABLE */ 1 , 0 ); /* 00000001 DEPTH_WRITE */ 1 , 0 x04e3bfdf); /* ffffffff UNK0D64 */ 1 , 0 x04e3bfdf); /* ffffffff UNK0DF4 */ 1 , 1 ); /* 00000001 UNK15B4 */ 1 , 0 ); /* 00000001 LINE_STIPPLE_ENABLE */ 1 , 0 x00ffff00); /* 00ffffff LINE_STIPPLE_PATTERN */ 1 , 1 ); /* 00000001 tesla UNK0F98 */ if (IS_NVA3F(device->chipset))1 , 1 ); /* 0000001f tesla UNK169C */ 1 , 0 ); /* 00000003 tesla UNK1668 */ 1 , 0 ); /* 00000001 LINE_STIPPLE_ENABLE */ 1 , 0 x00ffff00); /* 00ffffff LINE_STIPPLE_PATTERN */ 1 , 0 ); /* 00000001 POLYGON_SMOOTH_ENABLE */ 1 , 0 ); /* 00000001 UNK1534 */ 1 , 0 ); /* 7/f MULTISAMPLE_SAMPLES_LOG2 */ 1 , 0 ); /* 00000001 tesla UNK1658 */ 1 , 0 ); /* 00000001 LINE_SMOOTH_ENABLE */ 1 , 0 ); /* ffff0ff3 */ 1 , 0 ); /* 00000001 DEPTH_TEST_ENABLE */ 1 , 0 ); /* 00000001 DEPTH_WRITE */ 1 , 1 ); /* 00000001 UNK15B4 */ 1 , 0 ); /* 00000001 POINT_SPRITE_ENABLE */ 1 , 1 ); /* 00000001 tesla UNK165C */ 1 , 0 x30201000); /* ffffffff tesla UNK1670 */ 1 , 0 x70605040); /* ffffffff tesla UNK1670 */ 1 , 0 xb8a89888); /* ffffffff tesla UNK1670 */ 1 , 0 xf8e8d8c8); /* ffffffff tesla UNK1670 */ 1 , 0 ); /* 00000001 VERTEX_TWO_SIDE_ENABLE */ 1 , 0 x1a); /* 0000001f POLYGON_MODE */ static void struct nvkm_grctx *ctx)struct nvkm_device *device = ctx->device;if (device->chipset < 0 xa0) {else {static void struct nvkm_grctx *ctx)struct nvkm_device *device = ctx->device;int i, mpcnt = 2 ;switch (device->chipset) {case 0 x98:case 0 xaa:1 ;break ;case 0 x50:case 0 x84:case 0 x86:case 0 x92:case 0 x94:case 0 x96:case 0 xa8:case 0 xac:2 ;break ;case 0 xa0:case 0 xa3:case 0 xa5:case 0 xaf:3 ;break ;for (i = 0 ; i < mpcnt; i++) {1 , 0 ); /* ff */ 1 , 0 x80); /* ffffffff tesla UNK1404 */ 1 , 0 x80007004); /* ffffffff tesla UNK12B0 */ 1 , 0 x04000400); /* ffffffff */ if (device->chipset >= 0 xa0)1 , 0 xc0); /* 00007fff tesla UNK152C */ 1 , 0 x1000); /* 0000ffff tesla UNK0D60 */ 1 , 0 ); /* ff/3ff */ 1 , 0 ); /* ffffffff tesla UNK1A30 */ if (device->chipset == 0 x86 || device->chipset == 0 x98 || device->chipset == 0 xa8 || IS_NVAAF(device->chipset)) {1 , 0 xe00); /* 7fff */ 1 , 0 x1e00); /* 7fff */ 1 , 1 ); /* 000000ff VP_REG_ALLOC_TEMP */ 1 , 0 ); /* 00000001 LINKED_TSC */ 1 , 0 ); /* 00000001 GP_ENABLE */ if (device->chipset == 0 x50)2 , 0 x1000); /* 7fff tesla UNK141C */ 1 , 1 ); /* 000000ff GP_REG_ALLOC_TEMP */ 1 , 0 ); /* 00000001 GP_ENABLE */ 1 , 4 ); /* 000000ff FP_REG_ALLOC_TEMP */ 1 , 2 ); /* 00000003 REG_MODE */ if (IS_NVAAF(device->chipset))0 xb, 0 ); /* RO */ else if (device->chipset >= 0 xa0)0 xc, 0 ); /* RO */ else 0 xa, 0 ); /* RO */ 1 , 0 x08100c12); /* 1fffffff FP_INTERPOLANT_CTRL */ 1 , 0 ); /* ff/3ff */ if (device->chipset >= 0 xa0) {1 , 0 x1fe21); /* 0003ffff tesla UNK0FAC */ 3 , 0 ); /* 7fff, 0, 0 */ 1 , 0 ); /* 00000001 tesla UNK1534 */ 1 , 0 ); /* 7/f MULTISAMPLE_SAMPLES_LOG2 */ 4 , 0 xffff); /* 0000ffff MSAA_MASK */ 1 , 1 ); /* 00000001 LANES32 */ 1 , 0 x10001); /* 00ffffff BLOCK_ALLOC */ 1 , 0 x10001); /* ffffffff BLOCKDIM_XY */ 1 , 1 ); /* 0000ffff BLOCKDIM_Z */ 1 , 0 ); /* ffffffff SHARED_SIZE */ 1 , 0 x1fe21); /* 1ffff/3ffff[NVA0+] tesla UNk0FAC */ 1 , 0 ); /* ffffffff tesla UNK1A34 */ if (IS_NVA3F(device->chipset))1 , 1 ); /* 0000001f tesla UNK169C */ 1 , 0 ); /* ff/3ff */ 1 , 0 ); /* 1 LINKED_TSC */ 1 , 0 ); /* ff FP_ADDRESS_HIGH */ 1 , 0 ); /* ffffffff FP_ADDRESS_LOW */ 1 , 0 x08100c12); /* 1fffffff FP_INTERPOLANT_CTRL */ 1 , 4 ); /* 00000007 FP_CONTROL */ 1 , 0 ); /* 000000ff FRAG_COLOR_CLAMP_EN */ 1 , 2 ); /* 00000003 REG_MODE */ 1 , 0 x11); /* 0000007f RT_FORMAT */ 7 , 0 ); /* 0000007f RT_FORMAT */ 1 , 0 ); /* 00000007 */ 1 , 0 xfac6881); /* 0fffffff RT_CONTROL */ 1 , 0 ); /* 00000003 MULTISAMPLE_CTRL */ if (IS_NVA3F(device->chipset))1 , 3 ); /* 00000003 tesla UNK16B4 */ 1 , 0 ); /* 00000001 ALPHA_TEST_ENABLE */ 1 , 0 ); /* 00000007 ALPHA_TEST_FUNC */ 1 , 0 ); /* 00000001 FRAMEBUFFER_SRGB */ 1 , 4 ); /* ffffffff tesla UNK1400 */ 8 , 0 ); /* 00000001 BLEND_ENABLE */ 1 , 0 ); /* 00000001 LOGIC_OP_ENABLE */ 1 , 2 ); /* 0000001f BLEND_FUNC_SRC_RGB */ 1 , 1 ); /* 0000001f BLEND_FUNC_DST_RGB */ 1 , 1 ); /* 00000007 BLEND_EQUATION_RGB */ 1 , 2 ); /* 0000001f BLEND_FUNC_SRC_ALPHA */ 1 , 1 ); /* 0000001f BLEND_FUNC_DST_ALPHA */ 1 , 1 ); /* 00000007 BLEND_EQUATION_ALPHA */ 1 , 1 ); /* 00000001 UNK133C */ if (IS_NVA3F(device->chipset)) {1 , 0 ); /* 00000001 UNK12E4 */ 8 , 2 ); /* 0000001f IBLEND_FUNC_SRC_RGB */ 8 , 1 ); /* 0000001f IBLEND_FUNC_DST_RGB */ 8 , 1 ); /* 00000007 IBLEND_EQUATION_RGB */ 8 , 2 ); /* 0000001f IBLEND_FUNC_SRC_ALPHA */ 8 , 1 ); /* 0000001f IBLEND_FUNC_DST_ALPHA */ 8 , 1 ); /* 00000007 IBLEND_EQUATION_ALPHA */ 8 , 1 ); /* 00000001 IBLEND_UNK00 */ 1 , 0 ); /* 00000003 tesla UNK1928 */ 1 , 0 ); /* 00000001 UNK1140 */ 1 , 0 ); /* 00000003 tesla UNK0F90 */ 1 , 4 ); /* 000000ff FP_RESULT_COUNT */ /* XXX: demagic this part some day */ if (device->chipset == 0 x50)0 x3a0, 0 );else if (device->chipset < 0 x94)0 x3a2, 0 );else if (device->chipset == 0 x98 || device->chipset == 0 xaa)0 x39f, 0 );else 0 x3a3, 0 );1 , 0 x11); /* 3f/7f DST_FORMAT */ 1 , 0 ); /* 7 OPERATION */ 1 , 1 ); /* 1 DST_LINEAR */ 0 x2d, 0 );static void struct nvkm_grctx *ctx)struct nvkm_device *device = ctx->device;int i;0 x1540);int size = 0 ;0 x3f)&~0 x3f;if (device->chipset < 0 xa0) {for (i = 0 ; i < 8 ; i++) {/* that little bugger belongs to csched. No idea if (i == 0 )1 , 0 x08100c12); /* FP_INTERPOLANT_CTRL */ if (units & (1 << i))if ((ctx->ctxvals_pos-offset)/8 > size)8 ;else {/* Strand 0: TPs 0, 1 */ /* that little bugger belongs to csched. No idea 1 , 0 x08100c12); /* FP_INTERPOLANT_CTRL */ if (units & (1 << 0 ))if (units & (1 << 1 ))if ((ctx->ctxvals_pos-offset)/8 > size)8 ;/* Strand 1: TPs 2, 3 */ 1 ;if (units & (1 << 2 ))if (units & (1 << 3 ))if ((ctx->ctxvals_pos-offset)/8 > size)8 ;/* Strand 2: TPs 4, 5, 6 */ 2 ;if (units & (1 << 4 ))if (units & (1 << 5 ))if (units & (1 << 6 ))if ((ctx->ctxvals_pos-offset)/8 > size)8 ;/* Strand 3: TPs 7, 8, 9 */ 3 ;if (units & (1 << 7 ))if (units & (1 << 8 ))if (units & (1 << 9 ))if ((ctx->ctxvals_pos-offset)/8 > size)8 ;8 ;0 x3f)&~0 x3f;
Messung V0.5 in Prozent C=57 H=96 G=78
¤ Dauer der Verarbeitung: 0.78 Sekunden
(vorverarbeitet am 2026-06-07)
¤ *© Formatika GbR, Deutschland
