/* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright (C) 2019-2022 Bootlin * Author: Paul Kocialkowski <paul.kocialkowski@bootlin.com> * * Copyright (C) 2014 Xylon d.o.o. * Author: Davor Joja <davor.joja@logicbricks.com> #ifndef _LOGICVC_REGS_H_#define _LOGICVC_REGS_H_#define LOGICVC_DIMENSIONS_MAX (BIT(16 ) - 1 )#define LOGICVC_HSYNC_FRONT_PORCH_REG 0 x00#define LOGICVC_HSYNC_REG 0 x08#define LOGICVC_HSYNC_BACK_PORCH_REG 0 x10#define LOGICVC_HRES_REG 0 x18#define LOGICVC_VSYNC_FRONT_PORCH_REG 0 x20#define LOGICVC_VSYNC_REG 0 x28#define LOGICVC_VSYNC_BACK_PORCH_REG 0 x30#define LOGICVC_VRES_REG 0 x38#define LOGICVC_CTRL_REG 0 x40#define LOGICVC_CTRL_CLOCK_INVERT BIT(8 )#define LOGICVC_CTRL_PIXEL_INVERT BIT(7 )#define LOGICVC_CTRL_DE_INVERT BIT(5 )#define LOGICVC_CTRL_DE_ENABLE BIT(4 )#define LOGICVC_CTRL_VSYNC_INVERT BIT(3 )#define LOGICVC_CTRL_VSYNC_ENABLE BIT(2 )#define LOGICVC_CTRL_HSYNC_INVERT BIT(1 )#define LOGICVC_CTRL_HSYNC_ENABLE BIT(0 )#define LOGICVC_DTYPE_REG 0 x48#define LOGICVC_BACKGROUND_COLOR_REG 0 x50#define LOGICVC_BUFFER_SEL_REG 0 x58#define LOGICVC_BUFFER_SEL_VALUE(i, v) \10 + (i)) | ((v) << (2 * (i))))#define LOGICVC_BUFFER_SEL_MAX 2 #define LOGICVC_DOUBLE_CLUT_REG 0 x60#define LOGICVC_INT_STAT_REG 0 x68#define LOGICVC_INT_STAT_V_SYNC BIT(5 )#define LOGICVC_INT_MASK_REG 0 x70#define LOGICVC_INT_MASK_V_SYNC BIT(5 )#define LOGICVC_POWER_CTRL_REG 0 x78#define LOGICVC_POWER_CTRL_BACKLIGHT_ENABLE BIT(0 )#define LOGICVC_POWER_CTRL_VDD_ENABLE BIT(1 )#define LOGICVC_POWER_CTRL_VEE_ENABLE BIT(2 )#define LOGICVC_POWER_CTRL_VIDEO_ENABLE BIT(3 )#define LOGICVC_IP_VERSION_REG 0 xf8#define LOGICVC_IP_VERSION_MAJOR_MASK GENMASK(16 , 11 )#define LOGICVC_IP_VERSION_MINOR_MASK GENMASK(10 , 5 )#define LOGICVC_IP_VERSION_LEVEL_MASK GENMASK(4 , 0 )#define LOGICVC_LAYER_ADDRESS_REG(i) (0 x100 + (i) * 0 x80)#define LOGICVC_LAYER_HOFFSET_REG(i) (0 x100 + (i) * 0 x80)#define LOGICVC_LAYER_VOFFSET_REG(i) (0 x108 + (i) * 0 x80)#define LOGICVC_LAYER_VOFFSET_MAX 4095 #define LOGICVC_LAYER_HPOSITION_REG(i) (0 x110 + (i) * 0 x80)#define LOGICVC_LAYER_VPOSITION_REG(i) (0 x118 + (i) * 0 x80)#define LOGICVC_LAYER_WIDTH_REG(i) (0 x120 + (i) * 0 x80)#define LOGICVC_LAYER_HEIGHT_REG(i) (0 x128 + (i) * 0 x80)#define LOGICVC_LAYER_ALPHA_REG(i) (0 x130 + (i) * 0 x80)#define LOGICVC_LAYER_CTRL_REG(i) (0 x138 + (i) * 0 x80)#define LOGICVC_LAYER_CTRL_ENABLE BIT(0 )#define LOGICVC_LAYER_CTRL_COLOR_KEY_DISABLE BIT(1 )#define LOGICVC_LAYER_CTRL_PIXEL_FORMAT_INVERT BIT(4 )#define LOGICVC_LAYER_COLOR_KEY_REG(i) (0 x140 + (i) * 0 x80)#endif
Messung V0.5 in Prozent C=96 H=94 G=94
¤ Dauer der Verarbeitung: 0.9 Sekunden
(vorverarbeitet am 2026-06-07)
¤ *© Formatika GbR, Deutschland
