/* * Copyright 2011 Advanced Micro Devices, Inc. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. * #ifndef PP_SMC_H#define PP_SMC_H#pragma pack (push, 1 )#define PPSMC_SWSTATE_FLAG_DC 0 x01#define PPSMC_SWSTATE_FLAG_UVD 0 x02#define PPSMC_SWSTATE_FLAG_VCE 0 x04#define PPSMC_SWSTATE_FLAG_PCIE_X1 0 x08#define PPSMC_THERMAL_PROTECT_TYPE_INTERNAL 0 x00#define PPSMC_THERMAL_PROTECT_TYPE_EXTERNAL 0 x01#define PPSMC_THERMAL_PROTECT_TYPE_NONE 0 xff#define PPSMC_SYSTEMFLAG_GPIO_DC 0 x01#define PPSMC_SYSTEMFLAG_STEPVDDC 0 x02#define PPSMC_SYSTEMFLAG_GDDR5 0 x04#define PPSMC_SYSTEMFLAG_DISABLE_BABYSTEP 0 x08#define PPSMC_SYSTEMFLAG_REGULATOR_HOT 0 x10#define PPSMC_SYSTEMFLAG_REGULATOR_HOT_ANALOG 0 x20#define PPSMC_SYSTEMFLAG_REGULATOR_HOT_PROG_GPIO 0 x40#define PPSMC_EXTRAFLAGS_AC2DC_ACTION_MASK 0 x07#define PPSMC_EXTRAFLAGS_AC2DC_DONT_WAIT_FOR_VBLANK 0 x08#define PPSMC_EXTRAFLAGS_AC2DC_ACTION_GOTODPMLOWSTATE 0 x00#define PPSMC_EXTRAFLAGS_AC2DC_ACTION_GOTOINITIALSTATE 0 x01#define PPSMC_EXTRAFLAGS_AC2DC_GPIO5_POLARITY_HIGH 0 x02#define PPSMC_DISPLAY_WATERMARK_LOW 0 #define PPSMC_DISPLAY_WATERMARK_HIGH 1 #define PPSMC_STATEFLAG_AUTO_PULSE_SKIP 0 x01#define PPSMC_STATEFLAG_POWERBOOST 0 x02#define PPSMC_STATEFLAG_DEEPSLEEP_THROTTLE 0 x20#define PPSMC_STATEFLAG_DEEPSLEEP_BYPASS 0 x40#define FDO_MODE_HARDWARE 0 #define FDO_MODE_PIECE_WISE_LINEAR 1 enum FAN_CONTROL {#define PPSMC_Result_OK ((uint8_t)0 x01)#define PPSMC_Result_Failed ((uint8_t)0 xFF)typedef uint8_t PPSMC_Result;#define PPSMC_MSG_Halt ((uint8_t)0 x10)#define PPSMC_MSG_Resume ((uint8_t)0 x11)#define PPSMC_MSG_ZeroLevelsDisabled ((uint8_t)0 x13)#define PPSMC_MSG_OneLevelsDisabled ((uint8_t)0 x14)#define PPSMC_MSG_TwoLevelsDisabled ((uint8_t)0 x15)#define PPSMC_MSG_EnableThermalInterrupt ((uint8_t)0 x16)#define PPSMC_MSG_RunningOnAC ((uint8_t)0 x17)#define PPSMC_MSG_SwitchToSwState ((uint8_t)0 x20)#define PPSMC_MSG_SwitchToInitialState ((uint8_t)0 x40)#define PPSMC_MSG_NoForcedLevel ((uint8_t)0 x41)#define PPSMC_MSG_ForceHigh ((uint8_t)0 x42)#define PPSMC_MSG_ForceMediumOrHigh ((uint8_t)0 x43)#define PPSMC_MSG_SwitchToMinimumPower ((uint8_t)0 x51)#define PPSMC_MSG_ResumeFromMinimumPower ((uint8_t)0 x52)#define PPSMC_MSG_EnableCac ((uint8_t)0 x53)#define PPSMC_MSG_DisableCac ((uint8_t)0 x54)#define PPSMC_TDPClampingActive ((uint8_t)0 x59)#define PPSMC_TDPClampingInactive ((uint8_t)0 x5A)#define PPSMC_StartFanControl ((uint8_t)0 x5B)#define PPSMC_StopFanControl ((uint8_t)0 x5C)#define PPSMC_MSG_NoDisplay ((uint8_t)0 x5D)#define PPSMC_NoDisplay ((uint8_t)0 x5D)#define PPSMC_MSG_HasDisplay ((uint8_t)0 x5E)#define PPSMC_HasDisplay ((uint8_t)0 x5E)#define PPSMC_MSG_UVDPowerOFF ((uint8_t)0 x60)#define PPSMC_MSG_UVDPowerON ((uint8_t)0 x61)#define PPSMC_MSG_EnableULV ((uint8_t)0 x62)#define PPSMC_MSG_DisableULV ((uint8_t)0 x63)#define PPSMC_MSG_EnterULV ((uint8_t)0 x64)#define PPSMC_MSG_ExitULV ((uint8_t)0 x65)#define PPSMC_CACLongTermAvgEnable ((uint8_t)0 x6E)#define PPSMC_CACLongTermAvgDisable ((uint8_t)0 x6F)#define PPSMC_MSG_CollectCAC_PowerCorreln ((uint8_t)0 x7A)#define PPSMC_FlushDataCache ((uint8_t)0 x80)#define PPSMC_MSG_SetEnabledLevels ((uint8_t)0 x82)#define PPSMC_MSG_SetForcedLevels ((uint8_t)0 x83)#define PPSMC_MSG_ResetToDefaults ((uint8_t)0 x84)#define PPSMC_MSG_EnableDTE ((uint8_t)0 x87)#define PPSMC_MSG_DisableDTE ((uint8_t)0 x88)#define PPSMC_MSG_ThrottleOVRDSCLKDS ((uint8_t)0 x96)#define PPSMC_MSG_CancelThrottleOVRDSCLKDS ((uint8_t)0 x97)#define PPSMC_MSG_EnableACDCGPIOInterrupt ((uint16_t) 0 x149)/* CI/KV/KB */ #define PPSMC_MSG_UVDDPM_SetEnabledMask ((uint16_t) 0 x12D)#define PPSMC_MSG_VCEDPM_SetEnabledMask ((uint16_t) 0 x12E)#define PPSMC_MSG_ACPDPM_SetEnabledMask ((uint16_t) 0 x12F)#define PPSMC_MSG_SAMUDPM_SetEnabledMask ((uint16_t) 0 x130)#define PPSMC_MSG_MCLKDPM_ForceState ((uint16_t) 0 x131)#define PPSMC_MSG_MCLKDPM_NoForcedLevel ((uint16_t) 0 x132)#define PPSMC_MSG_Thermal_Cntl_Disable ((uint16_t) 0 x133)#define PPSMC_MSG_Voltage_Cntl_Disable ((uint16_t) 0 x135)#define PPSMC_MSG_PCIeDPM_Enable ((uint16_t) 0 x136)#define PPSMC_MSG_PCIeDPM_Disable ((uint16_t) 0 x13d)#define PPSMC_MSG_ACPPowerOFF ((uint16_t) 0 x137)#define PPSMC_MSG_ACPPowerON ((uint16_t) 0 x138)#define PPSMC_MSG_SAMPowerOFF ((uint16_t) 0 x139)#define PPSMC_MSG_SAMPowerON ((uint16_t) 0 x13a)#define PPSMC_MSG_PCIeDPM_Disable ((uint16_t) 0 x13d)#define PPSMC_MSG_NBDPM_Enable ((uint16_t) 0 x140)#define PPSMC_MSG_NBDPM_Disable ((uint16_t) 0 x141)#define PPSMC_MSG_SCLKDPM_SetEnabledMask ((uint16_t) 0 x145)#define PPSMC_MSG_MCLKDPM_SetEnabledMask ((uint16_t) 0 x146)#define PPSMC_MSG_PCIeDPM_ForceLevel ((uint16_t) 0 x147)#define PPSMC_MSG_PCIeDPM_UnForceLevel ((uint16_t) 0 x148)#define PPSMC_MSG_EnableVRHotGPIOInterrupt ((uint16_t) 0 x14a)#define PPSMC_MSG_DPM_Enable ((uint16_t) 0 x14e)#define PPSMC_MSG_DPM_Disable ((uint16_t) 0 x14f)#define PPSMC_MSG_MCLKDPM_Enable ((uint16_t) 0 x150)#define PPSMC_MSG_MCLKDPM_Disable ((uint16_t) 0 x151)#define PPSMC_MSG_UVDDPM_Enable ((uint16_t) 0 x154)#define PPSMC_MSG_UVDDPM_Disable ((uint16_t) 0 x155)#define PPSMC_MSG_SAMUDPM_Enable ((uint16_t) 0 x156)#define PPSMC_MSG_SAMUDPM_Disable ((uint16_t) 0 x157)#define PPSMC_MSG_ACPDPM_Enable ((uint16_t) 0 x158)#define PPSMC_MSG_ACPDPM_Disable ((uint16_t) 0 x159)#define PPSMC_MSG_VCEDPM_Enable ((uint16_t) 0 x15a)#define PPSMC_MSG_VCEDPM_Disable ((uint16_t) 0 x15b)#define PPSMC_MSG_VddC_Request ((uint16_t) 0 x15f)#define PPSMC_MSG_SCLKDPM_GetEnabledMask ((uint16_t) 0 x162)#define PPSMC_MSG_PCIeDPM_SetEnabledMask ((uint16_t) 0 x167)#define PPSMC_MSG_TDCLimitEnable ((uint16_t) 0 x169)#define PPSMC_MSG_TDCLimitDisable ((uint16_t) 0 x16a)#define PPSMC_MSG_PkgPwrLimitEnable ((uint16_t) 0 x185)#define PPSMC_MSG_PkgPwrLimitDisable ((uint16_t) 0 x186)#define PPSMC_MSG_PkgPwrSetLimit ((uint16_t) 0 x187)#define PPSMC_MSG_OverDriveSetTargetTdp ((uint16_t) 0 x188)#define PPSMC_MSG_SCLKDPM_FreezeLevel ((uint16_t) 0 x189)#define PPSMC_MSG_SCLKDPM_UnfreezeLevel ((uint16_t) 0 x18A)#define PPSMC_MSG_MCLKDPM_FreezeLevel ((uint16_t) 0 x18B)#define PPSMC_MSG_MCLKDPM_UnfreezeLevel ((uint16_t) 0 x18C)#define PPSMC_MSG_MASTER_DeepSleep_ON ((uint16_t) 0 x18F)#define PPSMC_MSG_MASTER_DeepSleep_OFF ((uint16_t) 0 x190)#define PPSMC_MSG_Remove_DC_Clamp ((uint16_t) 0 x191)#define PPSMC_MSG_SetFanPwmMax ((uint16_t) 0 x19A)#define PPSMC_MSG_SetFanRpmMax ((uint16_t) 0 x205)#define PPSMC_MSG_ENABLE_THERMAL_DPM ((uint16_t) 0 x19C)#define PPSMC_MSG_DISABLE_THERMAL_DPM ((uint16_t) 0 x19D)#define PPSMC_MSG_API_GetSclkFrequency ((uint16_t) 0 x200)#define PPSMC_MSG_API_GetMclkFrequency ((uint16_t) 0 x201)/* TN */ #define PPSMC_MSG_DPM_Config ((uint32_t) 0 x102)#define PPSMC_MSG_DPM_ForceState ((uint32_t) 0 x104)#define PPSMC_MSG_PG_SIMD_Config ((uint32_t) 0 x108)#define PPSMC_MSG_Voltage_Cntl_Enable ((uint32_t) 0 x109)#define PPSMC_MSG_Thermal_Cntl_Enable ((uint32_t) 0 x10a)#define PPSMC_MSG_VCEPowerOFF ((uint32_t) 0 x10e)#define PPSMC_MSG_VCEPowerON ((uint32_t) 0 x10f)#define PPSMC_MSG_DPM_N_LevelsDisabled ((uint32_t) 0 x112)#define PPSMC_MSG_DCE_RemoveVoltageAdjustment ((uint32_t) 0 x11d)#define PPSMC_MSG_DCE_AllowVoltageAdjustment ((uint32_t) 0 x11e)#define PPSMC_MSG_EnableBAPM ((uint32_t) 0 x120)#define PPSMC_MSG_DisableBAPM ((uint32_t) 0 x121)#define PPSMC_MSG_UVD_DPM_Config ((uint32_t) 0 x124)#define PPSMC_MSG_DRV_DRAM_ADDR_HI ((uint16_t) 0 x250)#define PPSMC_MSG_DRV_DRAM_ADDR_LO ((uint16_t) 0 x251)#define PPSMC_MSG_SMU_DRAM_ADDR_HI ((uint16_t) 0 x252)#define PPSMC_MSG_SMU_DRAM_ADDR_LO ((uint16_t) 0 x253)#define PPSMC_MSG_LoadUcodes ((uint16_t) 0 x254)typedef uint16_t PPSMC_Msg;#pragma pack (pop)#endif
Messung V0.5 in Prozent C=97 H=92 G=94
¤ Dauer der Verarbeitung: 0.9 Sekunden
(vorverarbeitet am 2026-06-07)
¤ *© Formatika GbR, Deutschland
