/* SPDX-License-Identifier: GPL-2.0 */
#ifndef __ATMEL_AES_REGS_H__
#define __ATMEL_AES_REGS_H__
#define AES_CR 0 x00
#define AES_CR_START (1 << 0 )
#define AES_CR_SWRST (1 << 8 )
#define AES_CR_LOADSEED (1 << 16 )
#define AES_MR 0 x04
#define AES_MR_CYPHER_DEC (0 << 0 )
#define AES_MR_CYPHER_ENC (1 << 0 )
#define AES_MR_GTAGEN (1 << 1 )
#define AES_MR_DUALBUFF (1 << 3 )
#define AES_MR_PROCDLY_MASK (0 xF << 4 )
#define AES_MR_PROCDLY_OFFSET 4
#define AES_MR_SMOD_MASK (0 x3 << 8 )
#define AES_MR_SMOD_MANUAL (0 x0 << 8 )
#define AES_MR_SMOD_AUTO (0 x1 << 8 )
#define AES_MR_SMOD_IDATAR0 (0 x2 << 8 )
#define AES_MR_KEYSIZE_MASK (0 x3 << 10 )
#define AES_MR_KEYSIZE_128 (0 x0 << 10 )
#define AES_MR_KEYSIZE_192 (0 x1 << 10 )
#define AES_MR_KEYSIZE_256 (0 x2 << 10 )
#define AES_MR_OPMOD_MASK (0 x7 << 12 )
#define AES_MR_OPMOD_ECB (0 x0 << 12 )
#define AES_MR_OPMOD_CBC (0 x1 << 12 )
#define AES_MR_OPMOD_OFB (0 x2 << 12 )
#define AES_MR_OPMOD_CFB (0 x3 << 12 )
#define AES_MR_OPMOD_CTR (0 x4 << 12 )
#define AES_MR_OPMOD_GCM (0 x5 << 12 )
#define AES_MR_OPMOD_XTS (0 x6 << 12 )
#define AES_MR_LOD (0 x1 << 15 )
#define AES_MR_CFBS_MASK (0 x7 << 16 )
#define AES_MR_CFBS_128b (0 x0 << 16 )
#define AES_MR_CFBS_64b (0 x1 << 16 )
#define AES_MR_CFBS_32b (0 x2 << 16 )
#define AES_MR_CFBS_16b (0 x3 << 16 )
#define AES_MR_CFBS_8b (0 x4 << 16 )
#define AES_MR_CKEY_MASK (0 xF << 20 )
#define AES_MR_CKEY_OFFSET 20
#define AES_MR_CMTYP_MASK (0 x1F << 24 )
#define AES_MR_CMTYP_OFFSET 24
#define AES_IER 0 x10
#define AES_IDR 0 x14
#define AES_IMR 0 x18
#define AES_ISR 0 x1C
#define AES_INT_DATARDY (1 << 0 )
#define AES_INT_URAD (1 << 8 )
#define AES_INT_TAGRDY (1 << 16 )
#define AES_ISR_URAT_MASK (0 xF << 12 )
#define AES_ISR_URAT_IDR_WR_PROC (0 x0 << 12 )
#define AES_ISR_URAT_ODR_RD_PROC (0 x1 << 12 )
#define AES_ISR_URAT_MR_WR_PROC (0 x2 << 12 )
#define AES_ISR_URAT_ODR_RD_SUBK (0 x3 << 12 )
#define AES_ISR_URAT_MR_WR_SUBK (0 x4 << 12 )
#define AES_ISR_URAT_WOR_RD (0 x5 << 12 )
#define AES_KEYWR(x) (0 x20 + ((x) * 0 x04))
#define AES_IDATAR(x) (0 x40 + ((x) * 0 x04))
#define AES_ODATAR(x) (0 x50 + ((x) * 0 x04))
#define AES_IVR(x) (0 x60 + ((x) * 0 x04))
#define AES_AADLENR 0 x70
#define AES_CLENR 0 x74
#define AES_GHASHR(x) (0 x78 + ((x) * 0 x04))
#define AES_TAGR(x) (0 x88 + ((x) * 0 x04))
#define AES_CTRR 0 x98
#define AES_GCMHR(x) (0 x9c + ((x) * 0 x04))
#define AES_EMR 0 xb0
#define AES_EMR_APEN BIT(0 ) /* Auto Padding Enable */
#define AES_EMR_APM BIT(1 ) /* Auto Padding Mode */
#define AES_EMR_APM_IPSEC 0 x0
#define AES_EMR_APM_SSL BIT(1 )
#define AES_EMR_PLIPEN BIT(4 ) /* PLIP Enable */
#define AES_EMR_PLIPD BIT(5 ) /* PLIP Decipher */
#define AES_EMR_PADLEN_MASK (0 xFu << 8 )
#define AES_EMR_PADLEN_OFFSET 8
#define AES_EMR_PADLEN(padlen) (((padlen) << AES_EMR_PADLEN_OFFSET) &\
AES_EMR_PADLEN_MASK)
#define AES_EMR_NHEAD_MASK (0 xFu << 16 )
#define AES_EMR_NHEAD_OFFSET 16
#define AES_EMR_NHEAD(nhead) (((nhead) << AES_EMR_NHEAD_OFFSET) &\
AES_EMR_NHEAD_MASK)
#define AES_TWR(x) (0 xc0 + ((x) * 0 x04))
#define AES_ALPHAR(x) (0 xd0 + ((x) * 0 x04))
#define AES_HW_VERSION 0 xFC
#endif /* __ATMEL_AES_REGS_H__ */
Messung V0.5 in Prozent C=95 H=89 G=91
¤ Dauer der Verarbeitung: 0.8 Sekunden
(vorverarbeitet am 2026-06-07)
¤
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