struct kona_bcm_timers { int tmr_irq; void __iomem *tmr_regs;
};
staticstruct kona_bcm_timers timers;
static u32 arch_timer_rate;
/* * We use the peripheral timers for system tick, the cpu global timer for * profile tick
*/ staticvoid kona_timer_disable_and_clear(void __iomem *base)
{
uint32_t reg;
/* * clear and disable interrupts * We are using compare/match register 0 for our system interrupts
*/
reg = readl(base + KONA_GPTIMER_STCS_OFFSET);
/* * Read 64-bit free running counter * 1. Read hi-word * 2. Read low-word * 3. Read hi-word again * 4.1 * if new hi-word is not equal to previously read hi-word, then * start from #1 * 4.2 * if new hi-word is equal to previously read hi-word then stop.
*/
do {
*msw = readl(timer_base + KONA_GPTIMER_STCHI_OFFSET);
*lsw = readl(timer_base + KONA_GPTIMER_STCLO_OFFSET); if (*msw == readl(timer_base + KONA_GPTIMER_STCHI_OFFSET)) break;
} while (--loop_limit); if (!loop_limit) {
pr_err("bcm_kona_timer: getting counter failed.\n");
pr_err(" Timer will be impacted\n"); return -ETIMEDOUT;
}
return 0;
}
staticint kona_timer_set_next_event(unsignedlong clc, struct clock_event_device *unused)
{ /* * timer (0) is disabled by the timer interrupt already * so, here we reload the next event value and re-enable * the timer. * * This way, we are potentially losing the time between * timer-interrupt->set_next_event. CPU local timers, when * they come in should get rid of skew.
*/
uint32_t lsw, msw;
uint32_t reg; int ret;
ret = kona_timer_get_counter(timers.tmr_regs, &msw, &lsw); if (ret) return ret;
/* Load the "next" event tick value */
writel(lsw + clc, timers.tmr_regs + KONA_GPTIMER_STCM0_OFFSET);
TIMER_OF_DECLARE(brcm_kona, "brcm,kona-timer", kona_timer_init); /* * bcm,kona-timer is deprecated by brcm,kona-timer * being kept here for driver compatibility
*/
TIMER_OF_DECLARE(bcm_kona, "bcm,kona-timer", kona_timer_init);
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