/* * Retrieve the ARM CPU physical identifier (MPIDR)
*/ staticint map_gicc_mpidr(struct acpi_subtable_header *entry, int device_declaration, u32 acpi_id, phys_cpuid_t *mpidr)
{ struct acpi_madt_generic_interrupt *gicc =
container_of(entry, struct acpi_madt_generic_interrupt, header);
if (!(gicc->flags &
(ACPI_MADT_ENABLED | ACPI_MADT_GICC_ONLINE_CAPABLE))) return -ENODEV;
/* device_declaration means Device object in DSDT, in the * GIC interrupt model, logical processors are required to * have a Processor Device object in the DSDT, so we should * check device_declaration here
*/ if (device_declaration && (gicc->uid == acpi_id)) {
*mpidr = gicc->arm_mpidr; return 0;
}
return -EINVAL;
}
/* * Retrieve the RISC-V hartid for the processor
*/ staticint map_rintc_hartid(struct acpi_subtable_header *entry, int device_declaration, u32 acpi_id,
phys_cpuid_t *hartid)
{ struct acpi_madt_rintc *rintc =
container_of(entry, struct acpi_madt_rintc, header);
if (!(rintc->flags & ACPI_MADT_ENABLED)) return -ENODEV;
/* device_declaration means Device object in DSDT, in the * RISC-V, logical processors are required to * have a Processor Device object in the DSDT, so we should * check device_declaration here
*/ if (device_declaration && rintc->uid == acpi_id) {
*hartid = rintc->hart_id; return 0;
}
return -EINVAL;
}
/* * Retrieve LoongArch CPU physical id
*/ staticint map_core_pic_id(struct acpi_subtable_header *entry, int device_declaration, u32 acpi_id, phys_cpuid_t *phys_id)
{ struct acpi_madt_core_pic *core_pic =
container_of(entry, struct acpi_madt_core_pic, header);
if (!(core_pic->flags & ACPI_MADT_ENABLED)) return -ENODEV;
/* device_declaration means Device object in DSDT, in LoongArch * system, logical processor acpi_id is required in _UID property * of DSDT table, so we should check device_declaration here
*/ if (device_declaration && (core_pic->processor_id == acpi_id)) {
*phys_id = core_pic->core_id; return 0;
}
return -EINVAL;
}
static phys_cpuid_t map_madt_entry(struct acpi_table_madt *madt, int type, u32 acpi_id)
{ unsignedlong madt_end, entry;
phys_cpuid_t phys_id = PHYS_CPUID_INVALID; /* CPU hardware ID */
int acpi_map_cpuid(phys_cpuid_t phys_id, u32 acpi_id)
{ #ifdef CONFIG_SMP int i; #endif
if (invalid_phys_cpuid(phys_id)) { /* * On UP processor, there is no _MAT or MADT table. * So above phys_id is always set to PHYS_CPUID_INVALID. * * BIOS may define multiple CPU handles even for UP processor. * For example, * * Scope (_PR) * { * Processor (CPU0, 0x00, 0x00000410, 0x06) {} * Processor (CPU1, 0x01, 0x00000410, 0x06) {} * Processor (CPU2, 0x02, 0x00000410, 0x06) {} * Processor (CPU3, 0x03, 0x00000410, 0x06) {} * } * * Ignores phys_id and always returns 0 for the processor * handle with acpi id 0 if nr_cpu_ids is 1. * This should be the case if SMP tables are not found. * Return -EINVAL for other CPU's handle.
*/ if (nr_cpu_ids <= 1 && acpi_id == 0) return acpi_id; else return -EINVAL;
}
#ifdef CONFIG_SMP
for_each_possible_cpu(i) { if (cpu_physical_id(i) == phys_id) return i;
} #else /* In UP kernel, only processor 0 is valid */ if (phys_id == 0) return phys_id; #endif return -ENODEV;
}
int acpi_get_cpuid(acpi_handle handle, int type, u32 acpi_id)
{
phys_cpuid_t phys_id;
/** * acpi_get_ioapic_id - Get IOAPIC ID and physical address matching @gsi_base * @handle: ACPI object for IOAPIC device * @gsi_base: GSI base to match with * @phys_addr: Pointer to store physical address of matching IOAPIC record * * Walk resources returned by ACPI_MAT method, then ACPI MADT table, to search * for an ACPI IOAPIC record matching @gsi_base. * Return IOAPIC id and store physical address in @phys_addr if found a match, * otherwise return <0.
*/ int acpi_get_ioapic_id(acpi_handle handle, u32 gsi_base, u64 *phys_addr)
{ int apic_id;
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