/* SPDX-License-Identifier: GPL-2.0-only */ /* * arch/arm/include/asm/hardware/iomd.h * * Copyright (C) 1999 Russell King * * This file contains information out the IOMD ASIC used in the * Acorn RiscPC and subsequently integrated into the CLPS7500 chips. #ifndef __ASMARM_HARDWARE_IOMD_H#define __ASMARM_HARDWARE_IOMD_H#ifndef __ASSEMBLY__/* * We use __raw_base variants here so that we give the compiler the * chance to keep IOC_BASE in a register. #define iomd_readb(off) __raw_readb(IOMD_BASE + (off))#define iomd_readl(off) __raw_readl(IOMD_BASE + (off))#define iomd_writeb(val,off) __raw_writeb(val, IOMD_BASE + (off))#define iomd_writel(val,off) __raw_writel(val, IOMD_BASE + (off))#endif #define IOMD_CONTROL (0 x000)#define IOMD_KARTTX (0 x004)#define IOMD_KARTRX (0 x004)#define IOMD_KCTRL (0 x008)#define IOMD_IRQSTATA (0 x010)#define IOMD_IRQREQA (0 x014)#define IOMD_IRQCLRA (0 x014)#define IOMD_IRQMASKA (0 x018)#define IOMD_IRQSTATB (0 x020)#define IOMD_IRQREQB (0 x024)#define IOMD_IRQMASKB (0 x028)#define IOMD_FIQSTAT (0 x030)#define IOMD_FIQREQ (0 x034)#define IOMD_FIQMASK (0 x038)#define IOMD_T0CNTL (0 x040)#define IOMD_T0LTCHL (0 x040)#define IOMD_T0CNTH (0 x044)#define IOMD_T0LTCHH (0 x044)#define IOMD_T0GO (0 x048)#define IOMD_T0LATCH (0 x04c)#define IOMD_T1CNTL (0 x050)#define IOMD_T1LTCHL (0 x050)#define IOMD_T1CNTH (0 x054)#define IOMD_T1LTCHH (0 x054)#define IOMD_T1GO (0 x058)#define IOMD_T1LATCH (0 x05c)#define IOMD_ROMCR0 (0 x080)#define IOMD_ROMCR1 (0 x084)#ifdef CONFIG_ARCH_RPC#define IOMD_DRAMCR (0 x088)#endif #define IOMD_REFCR (0 x08C)#define IOMD_FSIZE (0 x090)#define IOMD_ID0 (0 x094)#define IOMD_ID1 (0 x098)#define IOMD_VERSION (0 x09C)#ifdef CONFIG_ARCH_RPC#define IOMD_MOUSEX (0 x0A0)#define IOMD_MOUSEY (0 x0A4)#endif #ifdef CONFIG_ARCH_RPC#define IOMD_DMATCR (0 x0C0)#endif #define IOMD_IOTCR (0 x0C4)#define IOMD_ECTCR (0 x0C8)#ifdef CONFIG_ARCH_RPC#define IOMD_DMAEXT (0 x0CC)#endif #ifdef CONFIG_ARCH_RPC#define DMA_EXT_IO0 1 #define DMA_EXT_IO1 2 #define DMA_EXT_IO2 4 #define DMA_EXT_IO3 8 #define IOMD_IO0CURA (0 x100)#define IOMD_IO0ENDA (0 x104)#define IOMD_IO0CURB (0 x108)#define IOMD_IO0ENDB (0 x10C)#define IOMD_IO0CR (0 x110)#define IOMD_IO0ST (0 x114)#define IOMD_IO1CURA (0 x120)#define IOMD_IO1ENDA (0 x124)#define IOMD_IO1CURB (0 x128)#define IOMD_IO1ENDB (0 x12C)#define IOMD_IO1CR (0 x130)#define IOMD_IO1ST (0 x134)#define IOMD_IO2CURA (0 x140)#define IOMD_IO2ENDA (0 x144)#define IOMD_IO2CURB (0 x148)#define IOMD_IO2ENDB (0 x14C)#define IOMD_IO2CR (0 x150)#define IOMD_IO2ST (0 x154)#define IOMD_IO3CURA (0 x160)#define IOMD_IO3ENDA (0 x164)#define IOMD_IO3CURB (0 x168)#define IOMD_IO3ENDB (0 x16C)#define IOMD_IO3CR (0 x170)#define IOMD_IO3ST (0 x174)#endif #define IOMD_SD0CURA (0 x180)#define IOMD_SD0ENDA (0 x184)#define IOMD_SD0CURB (0 x188)#define IOMD_SD0ENDB (0 x18C)#define IOMD_SD0CR (0 x190)#define IOMD_SD0ST (0 x194)#ifdef CONFIG_ARCH_RPC#define IOMD_SD1CURA (0 x1A0)#define IOMD_SD1ENDA (0 x1A4)#define IOMD_SD1CURB (0 x1A8)#define IOMD_SD1ENDB (0 x1AC)#define IOMD_SD1CR (0 x1B0)#define IOMD_SD1ST (0 x1B4)#endif #define IOMD_CURSCUR (0 x1C0)#define IOMD_CURSINIT (0 x1C4)#define IOMD_VIDCUR (0 x1D0)#define IOMD_VIDEND (0 x1D4)#define IOMD_VIDSTART (0 x1D8)#define IOMD_VIDINIT (0 x1DC)#define IOMD_VIDCR (0 x1E0)#define IOMD_DMASTAT (0 x1F0)#define IOMD_DMAREQ (0 x1F4)#define IOMD_DMAMASK (0 x1F8)#define DMA_END_S (1 << 31 )#define DMA_END_L (1 << 30 )#define DMA_CR_C 0 x80#define DMA_CR_D 0 x40#define DMA_CR_E 0 x20#define DMA_ST_OFL 4 #define DMA_ST_INT 2 #define DMA_ST_AB 1 /* * DMA (MEMC) compatibility #define HALF_SAM vram_half_sam#define VDMA_ALIGNMENT (HALF_SAM * 2 )#define VDMA_XFERSIZE (HALF_SAM)#define VDMA_INIT IOMD_VIDINIT#define VDMA_START IOMD_VIDSTART#define VDMA_END IOMD_VIDEND#ifndef __ASSEMBLY__extern unsigned int vram_half_sam;#define video_set_dma(start,end,offset) \do { \if (offset >= end - VDMA_XFERSIZE) \0 x40000000; \while (0 )#endif #endif
Messung V0.5 in Prozent C=93 H=87 G=89
¤ Dauer der Verarbeitung: 0.11 Sekunden
(vorverarbeitet am 2026-06-07)
¤ *© Formatika GbR, Deutschland
