Quelle  am335x-evmsk.dts   Sprache: unbekannt

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
 */

/*
 * AM335x Starter Kit
 * https://www.ti.com/tool/tmdssk3358
 */

/dts-v1/;

#include "am33xx.dtsi"
#include <dt-bindings/pwm/pwm.h>
#include <dt-bindings/interrupt-controller/irq.h>

/ {
 model = "TI AM335x EVM-SK";
 compatible = "ti,am335x-evmsk", "ti,am33xx";

 cpus {
  cpu@0 {
   cpu0-supply = <&vdd1_reg>;
  };
 };

 memory@80000000 {
  device_type = "memory";
  reg = <0x80000000 0x10000000>; /* 256 MB */
 };

 chosen {
  stdout-path = &uart0;
 };

 vbat: fixedregulator0 {
  compatible = "regulator-fixed";
  regulator-name = "vbat";
  regulator-min-microvolt = <5000000>;
  regulator-max-microvolt = <5000000>;
  regulator-boot-on;
 };

 lis3_reg: fixedregulator1 {
  compatible = "regulator-fixed";
  regulator-name = "lis3_reg";
  regulator-boot-on;
 };

 wl12xx_vmmc: fixedregulator2 {
  pinctrl-names = "default";
  pinctrl-0 = <&wl12xx_gpio>;
  compatible = "regulator-fixed";
  regulator-name = "vwl1271";
  regulator-min-microvolt = <1800000>;
  regulator-max-microvolt = <1800000>;
  gpio = <&gpio1 29 0>;
  startup-delay-us = <70000>;
  enable-active-high;
 };

 vtt_fixed: fixedregulator3 {
  compatible = "regulator-fixed";
  regulator-name = "vtt";
  regulator-min-microvolt = <1500000>;
  regulator-max-microvolt = <1500000>;
  gpio = <&gpio0 7 GPIO_ACTIVE_HIGH>;
  regulator-always-on;
  regulator-boot-on;
  enable-active-high;
 };

 /* TPS79518 */
 v1_8d_reg: fixedregulator-v1_8d {
  compatible = "regulator-fixed";
  regulator-name = "v1_8d";
  vin-supply = <&vbat>;
  regulator-min-microvolt = <1800000>;
  regulator-max-microvolt = <1800000>;
 };

 /* TPS78633 */
 v3_3d_reg: fixedregulator-v3_3d {
  compatible = "regulator-fixed";
  regulator-name = "v3_3d";
  vin-supply = <&vbat>;
  regulator-min-microvolt = <3300000>;
  regulator-max-microvolt = <3300000>;
 };

 leds {
  pinctrl-names = "default";
  pinctrl-0 = <&user_leds_s0>;

  compatible = "gpio-leds";

  led1 {
   label = "evmsk:green:usr0";
   gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
   default-state = "off";
  };

  led2 {
   label = "evmsk:green:usr1";
   gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
   default-state = "off";
  };

  led3 {
   label = "evmsk:green:mmc0";
   gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
   linux,default-trigger = "mmc0";
   default-state = "off";
  };

  led4 {
   label = "evmsk:green:heartbeat";
   gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
   linux,default-trigger = "heartbeat";
   default-state = "off";
  };
 };

 gpio_buttons: gpio_buttons0 {
  compatible = "gpio-keys";
  #address-cells = <1>;
  #size-cells = <0>;

  switch1 {
   label = "button0";
   linux,code = <0x100>;
   gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
  };

  switch2 {
   label = "button1";
   linux,code = <0x101>;
   gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
  };

  switch3 {
   label = "button2";
   linux,code = <0x102>;
   gpios = <&gpio0 30 GPIO_ACTIVE_HIGH>;
   wakeup-source;
  };

  switch4 {
   label = "button3";
   linux,code = <0x103>;
   gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>;
  };
 };

 lcd_bl: backlight {
  compatible = "pwm-backlight";
  pwms = <&ecap2 0 50000 PWM_POLARITY_INVERTED>;
  brightness-levels = <0 58 61 66 75 90 125 170 255>;
  default-brightness-level = <8>;
 };

 sound {
  compatible = "simple-audio-card";
  simple-audio-card,name = "AM335x-EVMSK";
  simple-audio-card,widgets =
   "Headphone", "Headphone Jack";
  simple-audio-card,routing =
   "Headphone Jack", "HPLOUT",
   "Headphone Jack", "HPROUT";
  simple-audio-card,format = "dsp_b";
  simple-audio-card,bitclock-master = <&sound_master>;
  simple-audio-card,frame-master = <&sound_master>;
  simple-audio-card,bitclock-inversion;

  simple-audio-card,cpu {
   sound-dai = <&mcasp1>;
  };

  sound_master: simple-audio-card,codec {
   sound-dai = <&tlv320aic3106>;
   system-clock-frequency = <24000000>;
  };
 };

 panel {
  compatible = "newhaven,nhd-4.3-480272ef-atxl";

  pinctrl-names = "default", "sleep";
  pinctrl-0 = <&lcd_pins_default>;
  pinctrl-1 = <&lcd_pins_sleep>;
  backlight = <&lcd_bl>;

  port {
   panel_0: endpoint {
    remote-endpoint = <&lcdc_0>;
   };
  };
 };
};

&am33xx_pinmux {
 pinctrl-names = "default";
 pinctrl-0 = <&gpio_keys_s0 &clkout2_pin>;

 lcd_pins_default: lcd-default-pins {
  pinctrl-single,pins = <
   AM33XX_PADCONF(AM335X_PIN_GPMC_AD8, PIN_OUTPUT, MUX_MODE1) /* gpmc_ad8.lcd_data23 */
   AM33XX_PADCONF(AM335X_PIN_GPMC_AD9, PIN_OUTPUT, MUX_MODE1) /* gpmc_ad9.lcd_data22 */
   AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_OUTPUT, MUX_MODE1) /* gpmc_ad10.lcd_data21 */
   AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_OUTPUT, MUX_MODE1) /* gpmc_ad11.lcd_data20 */
   AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_OUTPUT, MUX_MODE1) /* gpmc_ad12.lcd_data19 */
   AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_OUTPUT, MUX_MODE1) /* gpmc_ad13.lcd_data18 */
   AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_OUTPUT, MUX_MODE1) /* gpmc_ad14.lcd_data17 */
   AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_OUTPUT, MUX_MODE1) /* gpmc_ad15.lcd_data16 */
   AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PIN_OUTPUT, MUX_MODE0)
   AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PIN_OUTPUT, MUX_MODE0)
   AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PIN_OUTPUT, MUX_MODE0)
   AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PIN_OUTPUT, MUX_MODE0)
   AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PIN_OUTPUT, MUX_MODE0)
   AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PIN_OUTPUT, MUX_MODE0)
   AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PIN_OUTPUT, MUX_MODE0)
   AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PIN_OUTPUT, MUX_MODE0)
   AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PIN_OUTPUT, MUX_MODE0)
   AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PIN_OUTPUT, MUX_MODE0)
   AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PIN_OUTPUT, MUX_MODE0)
   AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PIN_OUTPUT, MUX_MODE0)
   AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_OUTPUT, MUX_MODE0)
   AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_OUTPUT, MUX_MODE0)
   AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PIN_OUTPUT, MUX_MODE0)
   AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT, MUX_MODE0)
   AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT, MUX_MODE0)
   AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_OUTPUT, MUX_MODE0)
   AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_OUTPUT, MUX_MODE0)
   AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_OUTPUT, MUX_MODE0)
  >;
 };

 lcd_pins_sleep: lcd-sleep-pins {
  pinctrl-single,pins = <
   AM33XX_PADCONF(AM335X_PIN_GPMC_AD8, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad8.lcd_data23 */
   AM33XX_PADCONF(AM335X_PIN_GPMC_AD9, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad9.lcd_data22 */
   AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad10.lcd_data21 */
   AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad11.lcd_data20 */
   AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad12.lcd_data19 */
   AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad13.lcd_data18 */
   AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad14.lcd_data17 */
   AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad15.lcd_data16 */
   AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PULL_DISABLE, MUX_MODE7)
   AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PULL_DISABLE, MUX_MODE7)
   AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PULL_DISABLE, MUX_MODE7)
   AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PULL_DISABLE, MUX_MODE7)
   AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PULL_DISABLE, MUX_MODE7)
   AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PULL_DISABLE, MUX_MODE7)
   AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PULL_DISABLE, MUX_MODE7)
   AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PULL_DISABLE, MUX_MODE7)
   AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PULL_DISABLE, MUX_MODE7)
   AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PULL_DISABLE, MUX_MODE7)
   AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PULL_DISABLE, MUX_MODE7)
   AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PULL_DISABLE, MUX_MODE7)
   AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PULL_DISABLE, MUX_MODE7)
   AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PULL_DISABLE, MUX_MODE7)
   AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PULL_DISABLE, MUX_MODE7)
   AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PULL_DISABLE, MUX_MODE7)
   AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_INPUT_PULLDOWN, MUX_MODE7)
   AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_INPUT_PULLDOWN, MUX_MODE7)
   AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
   AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_INPUT_PULLDOWN, MUX_MODE7)
  >;
 };


 user_leds_s0: user-leds-s0-pins {
  pinctrl-single,pins = <
   AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad4.gpio1_4 */
   AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad5.gpio1_5 */
   AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad6.gpio1_6 */
   AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad7.gpio1_7 */
  >;
 };

 gpio_keys_s0: gpio-keys-s0-pins {
  pinctrl-single,pins = <
   AM33XX_PADCONF(AM335X_PIN_GPMC_OEN_REN, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_oen_ren.gpio2_3 */
   AM33XX_PADCONF(AM335X_PIN_GPMC_ADVN_ALE, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_advn_ale.gpio2_2 */
   AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_wait0.gpio0_30 */
   AM33XX_PADCONF(AM335X_PIN_GPMC_BEN0_CLE, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_ben0_cle.gpio2_5 */
  >;
 };

 i2c0_pins: i2c0-pins {
  pinctrl-single,pins = <
   AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT_PULLUP, MUX_MODE0)
   AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_INPUT_PULLUP, MUX_MODE0)
  >;
 };

 uart0_pins: uart0-pins {
  pinctrl-single,pins = <
   AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
   AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
  >;
 };

 clkout2_pin: clkout2-pins {
  pinctrl-single,pins = <
   AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR1, PIN_OUTPUT_PULLDOWN, MUX_MODE3) /* xdma_event_intr1.clkout2 */
  >;
 };

 ecap2_pins: backlight-pins {
  pinctrl-single,pins = <
   AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKR, 0x0, MUX_MODE4) /* mcasp0_ahclkr.ecap2_in_pwm2_out */
  >;
 };

 cpsw_default: cpsw-default-pins {
  pinctrl-single,pins = <
   /* Slave 1 */
   AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txen.rgmii1_tctl */
   AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
   AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txd3.rgmii1_td3 */
   AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txd2.rgmii1_td2 */
   AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
   AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
   AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txclk.rgmii1_tclk */
   AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */
   AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */
   AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */
   AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
   AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */

   /* Slave 2 */
   AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* gpmc_a0.rgmii2_tctl */
   AM33XX_PADCONF(AM335X_PIN_GPMC_A1, PIN_INPUT_PULLDOWN, MUX_MODE2) /* gpmc_a1.rgmii2_rctl */
   AM33XX_PADCONF(AM335X_PIN_GPMC_A2, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* gpmc_a2.rgmii2_td3 */
   AM33XX_PADCONF(AM335X_PIN_GPMC_A3, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* gpmc_a3.rgmii2_td2 */
   AM33XX_PADCONF(AM335X_PIN_GPMC_A4, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* gpmc_a4.rgmii2_td1 */
   AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* gpmc_a5.rgmii2_td0 */
   AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* gpmc_a6.rgmii2_tclk */
   AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_INPUT_PULLDOWN, MUX_MODE2) /* gpmc_a7.rgmii2_rclk */
   AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_INPUT_PULLDOWN, MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */
   AM33XX_PADCONF(AM335X_PIN_GPMC_A9, PIN_INPUT_PULLDOWN, MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */
   AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT_PULLDOWN, MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */
   AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_INPUT_PULLDOWN, MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */
  >;
 };

 cpsw_sleep: cpsw-sleep-pins {
  pinctrl-single,pins = <
   /* Slave 1 reset value */
   AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7)
   AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7)
   AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
   AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
   AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
   AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
   AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
   AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
   AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
   AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
   AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
   AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)

   /* Slave 2 reset value*/
   AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_INPUT_PULLDOWN, MUX_MODE7)
   AM33XX_PADCONF(AM335X_PIN_GPMC_A1, PIN_INPUT_PULLDOWN, MUX_MODE7)
   AM33XX_PADCONF(AM335X_PIN_GPMC_A2, PIN_INPUT_PULLDOWN, MUX_MODE7)
   AM33XX_PADCONF(AM335X_PIN_GPMC_A3, PIN_INPUT_PULLDOWN, MUX_MODE7)
   AM33XX_PADCONF(AM335X_PIN_GPMC_A4, PIN_INPUT_PULLDOWN, MUX_MODE7)
   AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_INPUT_PULLDOWN, MUX_MODE7)
   AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_INPUT_PULLDOWN, MUX_MODE7)
   AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_INPUT_PULLDOWN, MUX_MODE7)
   AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_INPUT_PULLDOWN, MUX_MODE7)
   AM33XX_PADCONF(AM335X_PIN_GPMC_A9, PIN_INPUT_PULLDOWN, MUX_MODE7)
   AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT_PULLDOWN, MUX_MODE7)
   AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_INPUT_PULLDOWN, MUX_MODE7)
  >;
 };

 davinci_mdio_default: davinci-mdio-default-pins {
  pinctrl-single,pins = <
   /* MDIO */
   AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLUP | SLEWCTRL_FAST, MUX_MODE0)
   AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE0)
  >;
 };

 davinci_mdio_sleep: davinci-mdio-sleep-pins {
  pinctrl-single,pins = <
   /* MDIO reset value */
   AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLDOWN, MUX_MODE7)
   AM33XX_PADCONF(AM335X_PIN_MDC, PIN_INPUT_PULLDOWN, MUX_MODE7)
  >;
 };

 mmc1_pins: mmc1-pins {
  pinctrl-single,pins = <
   AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT, MUX_MODE7)   /* spi0_cs1.gpio0_6 */
   AM33XX_PADCONF(AM335X_PIN_MMC0_DAT0, PIN_INPUT_PULLUP, MUX_MODE0)
   AM33XX_PADCONF(AM335X_PIN_MMC0_DAT1, PIN_INPUT_PULLUP, MUX_MODE0)
   AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT_PULLUP, MUX_MODE0)
   AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0)
   AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLUP, MUX_MODE0)
   AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
   AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKR, PIN_INPUT, MUX_MODE4)  /* mcasp0_aclkr.mmc0_sdwp */
  >;
 };

 mcasp1_pins: mcasp1-pins {
  pinctrl-single,pins = <
   AM33XX_PADCONF(AM335X_PIN_MII1_CRS, PIN_INPUT_PULLDOWN, MUX_MODE4) /* mii1_crs.mcasp1_aclkx */
   AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */
   AM33XX_PADCONF(AM335X_PIN_MII1_COL, PIN_OUTPUT_PULLDOWN, MUX_MODE4) /* mii1_col.mcasp1_axr2 */
   AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_INPUT_PULLDOWN, MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */
  >;
 };

 mcasp1_pins_sleep: mcasp1-sleep-pins {
  pinctrl-single,pins = <
   AM33XX_PADCONF(AM335X_PIN_MII1_CRS, PIN_INPUT_PULLDOWN, MUX_MODE7)
   AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE7)
   AM33XX_PADCONF(AM335X_PIN_MII1_COL, PIN_INPUT_PULLDOWN, MUX_MODE7)
   AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
  >;
 };

 mmc2_pins: mmc2-pins {
  pinctrl-single,pins = <
   AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_INPUT_PULLUP, MUX_MODE7) /* gpmc_wpn.gpio0_31 */
   AM33XX_PADCONF(AM335X_PIN_GPMC_CSN1, PIN_INPUT_PULLUP, MUX_MODE2) /* gpmc_csn1.mmc1_clk */
   AM33XX_PADCONF(AM335X_PIN_GPMC_CSN2, PIN_INPUT_PULLUP, MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
   AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
   AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
   AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
   AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
  >;
 };

 wl12xx_gpio: wl12xx-gpio-pins {
  pinctrl-single,pins = <
   AM33XX_PADCONF(AM335X_PIN_GPMC_CSN0, PIN_OUTPUT_PULLUP, MUX_MODE7) /* gpmc_csn0.gpio1_29 */
  >;
 };
};

&uart0 {
 pinctrl-names = "default";
 pinctrl-0 = <&uart0_pins>;

 status = "okay";
};

&i2c0 {
 pinctrl-names = "default";
 pinctrl-0 = <&i2c0_pins>;

 status = "okay";
 clock-frequency = <400000>;

 tps: tps@2d {
  reg = <0x2d>;
 };

 lis331dlh: lis331dlh@18 {
  compatible = "st,lis331dlh", "st,lis3lv02d";
  reg = <0x18>;
  Vdd-supply = <&lis3_reg>;
  Vdd_IO-supply = <&lis3_reg>;

  st,click-single-x;
  st,click-single-y;
  st,click-single-z;
  st,click-thresh-x = <10>;
  st,click-thresh-y = <10>;
  st,click-thresh-z = <10>;
  st,irq1-click;
  st,irq2-click;
  st,wakeup-x-lo;
  st,wakeup-x-hi;
  st,wakeup-y-lo;
  st,wakeup-y-hi;
  st,wakeup-z-lo;
  st,wakeup-z-hi;
  st,min-limit-x = <120>;
  st,min-limit-y = <120>;
  st,min-limit-z = <140>;
  st,max-limit-x = <550>;
  st,max-limit-y = <550>;
  st,max-limit-z = <750>;
 };

 tlv320aic3106: tlv320aic3106@1b {
  #sound-dai-cells = <0>;
  compatible = "ti,tlv320aic3106";
  reg = <0x1b>;
  status = "okay";

  /* Regulators */
  AVDD-supply = <&v3_3d_reg>;
  IOVDD-supply = <&v3_3d_reg>;
  DRVDD-supply = <&v3_3d_reg>;
  DVDD-supply = <&v1_8d_reg>;
 };
};

&usb1 {
 dr_mode = "host";
};

&epwmss2 {
 status = "okay";

 ecap2: pwm@100 {
  status = "okay";
  pinctrl-names = "default";
  pinctrl-0 = <&ecap2_pins>;
 };
};

#include "../../tps65910.dtsi"

&tps {
 vcc1-supply = <&vbat>;
 vcc2-supply = <&vbat>;
 vcc3-supply = <&vbat>;
 vcc4-supply = <&vbat>;
 vcc5-supply = <&vbat>;
 vcc6-supply = <&vbat>;
 vcc7-supply = <&vbat>;
 vccio-supply = <&vbat>;

 regulators {
  vrtc_reg: regulator@0 {
   regulator-always-on;
  };

  vio_reg: regulator@1 {
   regulator-always-on;
  };

  vdd1_reg: regulator@2 {
   /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
   regulator-name = "vdd_mpu";
   regulator-min-microvolt = <912500>;
   regulator-max-microvolt = <1351500>;
   regulator-boot-on;
   regulator-always-on;
  };

  vdd2_reg: regulator@3 {
   /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
   regulator-name = "vdd_core";
   regulator-min-microvolt = <912500>;
   regulator-max-microvolt = <1150000>;
   regulator-boot-on;
   regulator-always-on;
  };

  vdd3_reg: regulator@4 {
   regulator-always-on;
  };

  vdig1_reg: regulator@5 {
   regulator-always-on;
  };

  vdig2_reg: regulator@6 {
   regulator-always-on;
  };

  vpll_reg: regulator@7 {
   regulator-always-on;
  };

  vdac_reg: regulator@8 {
   regulator-always-on;
  };

  vaux1_reg: regulator@9 {
   regulator-always-on;
  };

  vaux2_reg: regulator@10 {
   regulator-always-on;
  };

  vaux33_reg: regulator@11 {
   regulator-always-on;
  };

  vmmc_reg: regulator@12 {
   regulator-min-microvolt = <1800000>;
   regulator-max-microvolt = <3300000>;
   regulator-always-on;
  };
 };
};

&mac_sw {
 pinctrl-names = "default", "sleep";
 pinctrl-0 = <&cpsw_default>;
 pinctrl-1 = <&cpsw_sleep>;
 status = "okay";
};

&davinci_mdio_sw {
 pinctrl-names = "default", "sleep";
 pinctrl-0 = <&davinci_mdio_default>;
 pinctrl-1 = <&davinci_mdio_sleep>;

 ethphy0: ethernet-phy@0 {
  reg = <0>;
 };

 ethphy1: ethernet-phy@1 {
  reg = <1>;
 };
};

&cpsw_port1 {
 phy-handle = <ðphy0>;
 phy-mode = "rgmii-id";
 ti,dual-emac-pvid = <1>;
};

&cpsw_port2 {
 phy-handle = <ðphy1>;
 phy-mode = "rgmii-id";
 ti,dual-emac-pvid = <2>;
};

&mmc1 {
 status = "okay";
 vmmc-supply = <&vmmc_reg>;
 bus-width = <4>;
 pinctrl-names = "default";
 pinctrl-0 = <&mmc1_pins>;
 cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
};

&sham {
 status = "okay";
};

&aes {
 status = "okay";
};

&gpio0_target {
 ti,no-reset-on-init;
};

&mmc2 {
 status = "okay";
 vmmc-supply = <&wl12xx_vmmc>;
 non-removable;
 bus-width = <4>;
 cap-power-off-card;
 keep-power-in-suspend;
 pinctrl-names = "default";
 pinctrl-0 = <&mmc2_pins>;

 #address-cells = <1>;
 #size-cells = <0>;
 wlcore: wlcore@2 {
  compatible = "ti,wl1271";
  reg = <2>;
  interrupt-parent = <&gpio0>;
  interrupts = <31 IRQ_TYPE_EDGE_RISING>; /* gpio 31 */
  ref-clock-frequency = <38400000>;
 };
};

&mcasp1 {
 #sound-dai-cells = <0>;
 pinctrl-names = "default", "sleep";
 pinctrl-0 = <&mcasp1_pins>;
 pinctrl-1 = <&mcasp1_pins_sleep>;

 status = "okay";

 op-mode = <0>;          /* MCASP_IIS_MODE */
 tdm-slots = <2>;
 /* 4 serializers */
 serial-dir = <  /* 0: INACTIVE, 1: TX, 2: RX */
  0 0 1 2
 >;
 tx-num-evt = <32>;
 rx-num-evt = <32>;
};

&tscadc {
 status = "okay";
 tsc {
  ti,wires = <4>;
  ti,x-plate-resistance = <200>;
  ti,coordinate-readouts = <5>;
  ti,wire-config = <0x00 0x11 0x22 0x33>;
 };
};

&lcdc {
 status = "okay";

 blue-and-red-wiring = "crossed";

 port {
  lcdc_0: endpoint@0 {
   remote-endpoint = <&panel_0>;
  };
 };
};

&rtc {
 clocks = <&clk_32768_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
 clock-names = "ext-clk", "int-clk";
};

&pruss_tm {
 status = "okay";
};

&wkup_m3_ipc {
 firmware-name = "am335x-evm-scale-data.bin";
};