Quelle  qcom-wdt.yaml   Sprache: unbekannt

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/watchdog/qcom-wdt.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Qualcomm Krait Processor Sub-system (KPSS) Watchdog timer

maintainers:
  - Rajendra Nayak <quic_rjendra@quicinc.com>

properties:
  $nodename:
    pattern: "^(watchdog|timer)@[0-9a-f]+$"

  compatible:
    oneOf:
      - items:
          - enum:
              - qcom,kpss-wdt-ipq4019
              - qcom,apss-wdt-ipq5018
              - qcom,apss-wdt-ipq5332
              - qcom,apss-wdt-ipq5424
              - qcom,apss-wdt-ipq9574
              - qcom,apss-wdt-msm8226
              - qcom,apss-wdt-msm8974
              - qcom,apss-wdt-msm8994
              - qcom,apss-wdt-qcm2290
              - qcom,apss-wdt-qcs404
              - qcom,apss-wdt-qcs615
              - qcom,apss-wdt-qcs8300
              - qcom,apss-wdt-sa8255p
              - qcom,apss-wdt-sa8775p
              - qcom,apss-wdt-sc7180
              - qcom,apss-wdt-sc7280
              - qcom,apss-wdt-sc8180x
              - qcom,apss-wdt-sc8280xp
              - qcom,apss-wdt-sdm845
              - qcom,apss-wdt-sdx55
              - qcom,apss-wdt-sdx65
              - qcom,apss-wdt-sm6115
              - qcom,apss-wdt-sm6350
              - qcom,apss-wdt-sm8150
              - qcom,apss-wdt-sm8250
          - const: qcom,kpss-wdt
      - const: qcom,kpss-wdt
        deprecated: true
      - items:
          - const: qcom,scss-timer
          - const: qcom,msm-timer
      - items:
          - enum:
              - qcom,kpss-wdt-apq8064
              - qcom,kpss-wdt-ipq8064
              - qcom,kpss-wdt-mdm9615
              - qcom,kpss-wdt-msm8960
          - const: qcom,kpss-timer
          - const: qcom,msm-timer

  reg:
    maxItems: 1

  clocks:
    maxItems: 1

  clock-names:
    items:
      - const: sleep

  clock-frequency:
    description:
      The frequency of the general purpose timer in Hz.

  cpu-offset:
    $ref: /schemas/types.yaml#/definitions/uint32
    description:
      Per-CPU offset used when the timer is accessed without the CPU remapping
      facilities. The offset is cpu-offset + (0x10000 * cpu-nr).

  interrupts:
    minItems: 1
    maxItems: 5

required:
  - compatible
  - reg
  - clocks

allOf:
  - $ref: watchdog.yaml#

  - if:
      properties:
        compatible:
          contains:
            const: qcom,kpss-wdt
    then:
      properties:
        clock-frequency: false
        cpu-offset: false
        interrupts:
          minItems: 1
          items:
            - description: Bark
            - description: Bite

    else:
      properties:
        interrupts:
          minItems: 3
          items:
            - description: Debug
            - description: First general purpose timer
            - description: Second general purpose timer
            - description: First watchdog
            - description: Second watchdog
      required:
        - clock-frequency

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/arm-gic.h>

    watchdog@17c10000 {
        compatible = "qcom,apss-wdt-sm8150", "qcom,kpss-wdt";
        reg = <0x17c10000 0x1000>;
        clocks = <&sleep_clk>;
        interrupts = <GIC_SPI 0 IRQ_TYPE_EDGE_RISING>;
        timeout-sec = <10>;
    };

  - |
    #include <dt-bindings/interrupt-controller/arm-gic.h>

    watchdog@200a000 {
        compatible = "qcom,kpss-wdt-ipq8064", "qcom,kpss-timer", "qcom,msm-timer";
        interrupts = <GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)>,
                     <GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)>,
                     <GIC_PPI 3 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)>,
                     <GIC_PPI 4 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)>,
                     <GIC_PPI 5 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)>;
        reg = <0x0200a000 0x100>;
        clock-frequency = <25000000>;
        clocks = <&sleep_clk>;
        clock-names = "sleep";
        cpu-offset = <0x80000>;
    };