/* * Copyright © 2012 Raspberry Pi Foundation * Copyright © 2012 RISC OS Open Ltd * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that * the above copyright notice appear in all copies and that both that * copyright notice and this permission notice appear in supporting * documentation, and that the name of the copyright holders not be used in * advertising or publicity pertaining to distribution of the software without * specific, written prior permission. The copyright holders make no * representations about the suitability of this software for any purpose. It * is provided "as is" without express or implied warranty. * * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS * SOFTWARE, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND * FITNESS, IN NO EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY * SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN * AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING * OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS * SOFTWARE. * * Author: Ben Avison (bavison@riscosopen.org) * /* Prevent the stack from becoming executable */ section .note.GNU-stack,"" ,%progbits"pixman-arm-asm.h" "pixman-arm-simd-asm.h" /* A head macro should do all processing which results in an output of up to * 16 bytes, as far as the final load instruction. The corresponding tail macro * should complete the processing of the up-to-16 bytes. The calling macro will * sometimes choose to insert a preload or a decrement of X between them. * cond ARM condition code for code block * numbytes Number of output bytes that should be generated this time * firstreg First WK register in which to place output * unaligned_src Whether to use non-wordaligned loads of source image * unaligned_mask Whether to use non-wordaligned loads of mask image * preload If outputting 16 bytes causes 64 bytes to be read, whether an extra preload should be output adalignmentES_SCRATCH, \/* prefetch distance */ \ /* newline */ \ /* cleanup */ \ /* process tail */ \ ES_SCRATCH, \/* prefetch distance */ \ /* newline */ \ /* cleanup */ \ /* process tail */ \ ES_SCRATCH, \/* prefetch distance */ \ /* newline */ \ /* cleanup */ \ /* process tail */ \ /******************************************************************************/ TORE | FLAG_PROCESS_PRESERVES_SCRATCH \/* prefetch distance doesn't apply */ \ /* newline */ \ /* cleanup */ \ /* process head */ \ TORE | FLAG_PROCESS_PRESERVES_SCRATCH \/* prefetch distance doesn't apply */ \ /* newline */ \ /* cleanup */ \ /* process head */ \ TORE | FLAG_PROCESS_PRESERVES_SCRATCH \/* prefetch distance doesn't apply */ \ /* newline */ \ /* cleanup */ \ /* process head */ \ /******************************************************************************/ d_src, unaligned_mask, preload/* prefetch distance */ \ /* init */ \ /* newline */ \ /* cleanup */ \ /******************************************************************************/ /* Hold loop invariants in MASK and STRIDE_M */ /* Set GE[3:0] to 1010 so SEL instructions do what we want */ /* This version doesn't need STRIDE_M, but is one instruction longer. It would however be preferable for an XRGB target, since we could knock off the last 2 instructions, but is that a common case? and SCRATCH, WK\()\reg1, MASK @ 00000GGGGGG0000000000gggggg00000 bic WK\()\reg1, WK\()\reg1, MASK @ RRRRR000000BBBBBrrrrr000000bbbbb orr SCRATCH, SCRATCH, SCRATCH, lsr #6 @ 00000GGGGGGGGGGGG0000ggggggggggg mov WK\()\reg2, WK\()\reg1, lsr #16 @ 0000000000000000RRRRR000000BBBBB mov SCRATCH, SCRATCH, ror #27 @ GGGGGGGGGGGG0000ggggggggggg00000 bic WK\()\reg1, WK\()\reg1, WK\()\reg2, lsl #16 @ 0000000000000000rrrrr000000bbbbb mov WK\()\reg2, WK\()\reg2, lsl #3 @ 0000000000000RRRRR000000BBBBB000 mov WK\()\reg1, WK\()\reg1, lsl #3 @ 0000000000000rrrrr000000bbbbb000 orr WK\()\reg2, WK\()\reg2, WK\()\reg2, lsr #5 @ 0000000000000RRRRRRRRRR0BBBBBBBB orr WK\()\reg1, WK\()\reg1, WK\()\reg1, lsr #5 @ 0000000000000rrrrrrrrrr0bbbbbbbb pkhbt WK\()\reg2, WK\()\reg2, WK\()\reg2, lsl #5 @ --------RRRRRRRR--------BBBBBBBB pkhbt WK\()\reg1, WK\()\reg1, WK\()\reg1, lsl #5 @ --------rrrrrrrr--------bbbbbbbb sel WK\()\reg2, SCRATCH, WK\()\reg2 @ --------RRRRRRRRGGGGGGGGBBBBBBBB sel WK\()\reg1, SCRATCH, WK\()\reg1 @ --------rrrrrrrrggggggggbbbbbbbb orr WK\()\reg2, WK\()\reg2, #0xFF000000 @ 11111111RRRRRRRRGGGGGGGGBBBBBBBB orr WK\()\reg1, WK\()\reg1, #0xFF000000 @ 11111111rrrrrrrrggggggggbbbbbbbb ask, preloadld ,, 8, \firstreg, %(\firstreg+2),,, SRC, \unaligned_src/* prefetch distance */ \ /* newline */ \ /* cleanup */ \ /******************************************************************************/ /* Hold loop invariant in MASK */ /* Top 16 bits are discarded during the following STRH */ ask, preload| FLAG_PROCESS_CORRUPTS_SCRATCH, \/* prefetch distance */ \ /* newline */ \ /* cleanup */ \ /******************************************************************************/ eload/* prefetch distance */ \ /* init */ \ /* newline */ \ /* cleanup */ \ /******************************************************************************/ /* Hold loop invariant in MASK */ /* Set GE[3:0] to 0101 so SEL instructions do what we want */ mask, preload/* Since these colours a premultiplied by alpha, only 0 indicates transparent (any other colour with 0 in the alpha byte is luminous) */ /* src = destination component multiplier */ /* Split even/odd bytes of dst into SCRATCH/dst */ /* Multiply through, adding 0.5 to the upper byte of result for rounding */ /* Where we would have had a stall between the result of the first MLA and the shifter input, /* Multiply by 257/256 to approximate 256/255 */ /* In this stall, start processing the next pixel */ /* Recombine even/odd bytes of multiplied destination */ /* Saturated add of source to multiplied destination */ streg), %(7+\firstreg)set PROCESS_REG, \firstregset PROCESS_OFF, -\numbytesEG)set PROCESS_REG, PROCESS_REG+1set PROCESS_OFF, PROCESS_OFF+4STORE | FLAG_SPILL_LINE_VARS \/* prefetch distance */ \ /* newline */ \ /* cleanup */ \ /******************************************************************************/ /* Multiply each byte of a word by a byte. * Useful when there aren't any obvious ways to fill the stalls with other instructions. * word Register containing 4 bytes * byte Register containing byte multiplier (bits 8-31 must be 0) * tmp Scratch register * half Register containing the constant 0x00800080 * GE[3:0] bits must contain 0101 word , byte, tmp, half/* Split even/odd bytes of word apart */ word word , \word , ror #8/* Multiply bytes together with rounding, then by 257/256 */ word , \word , \byte, \half /* 1 stall follows */ /* 1 stall follows */ word , \word , \word , ror #8/* Recombine bytes */ word , \tmp, \word /******************************************************************************/ /* Mask is constant */ /* Hold loop invariant in STRIDE_M */ /* We only want the alpha bits of the constant mask */ /* Set GE[3:0] to 0101 so SEL instructions do what we want */ d_mask, preloadsub WK7, WK6, WK\()\src, lsr #24%(6+\firstreg), %(7+\firstreg)set PROCESS_REG, \firstreg/* We're using WK6 and WK7 as temporaries, so half way through * 4 pixels, reload the second two source pixels but this time set PROCESS_REG, PROCESS_REG+1STORE | FLAG_SPILL_LINE_VARS \/* prefetch distance */ \ /* newline */ \ /* cleanup */ \ /******************************************************************************/ /* Source is constant, but splitting it into even/odd bytes is a loop invariant */ /* Not enough registers to hold this constant, but we still use it here to set GE[3:0] */ /* Set GE[3:0] to 0101 so SEL instructions do what we want */ ask, preload/* Trailing part of multiplication of source */ sub ORIG_W, ORIG_W, Y, lsr #24/* Then multiply the destination */ set PROCESS_REG, \firstregset PROCESS_REG, PROCESS_REG+1STORE | FLAG_SPILL_LINE_VARS \/* prefetch distance */ \ /* cleanup */ \ /******************************************************************************/ /* Split source pixel into RB/AG parts */ /* Set GE[3:0] to 0101 so SEL instructions do what we want */ gned_mask, preload/* replace with source */ /* skip store */ /* write same value back */ /* red/blue */ /* alpha/green */ /* skip store if all opaque */ streg+3)STORE | FLAG_SPILL_LINE_VARS | FLAG_PROCESS_CORRUPTS_SCRATCH, \/* prefetch distance */ \ /* cleanup */ \ /******************************************************************************/ /* Set GE[3:0] to 0101 so SEL instructions do what we want */ set DST_PRELOAD_BIAS, 8set DST_PRELOAD_BIAS, 0/* rb_notmask */ /* rb_dest; 1 stall follows */ /* red */ /* blue */ /* ag_notmask */ /* ag_dest; 1 stall follows */ /* alpha */ /* green */ /* rb; 1 stall follows */ /* ag */ /* d is a late result */ naligned_mask, preloadSTORE | FLAG_SPILL_LINE_VARS | FLAG_PROCESS_CORRUPTS_SCRATCH \/* prefetch distance */ \ /* newline */ \ /* Set up constants. RB_SRC and AG_SRC are in registers; * RB_FLDS, A_SRC, and the two HALF values need to go on the /* RB_FLDS (0x00FF00FF) */ /* HALF default value */ /* A_SRC */ /* HALF alternate value (0x00800080) */ set ARGS_STACK_OFFSET, ARGS_STACK_OFFSET+16/* Set GE[3:0] to 0101 so SEL instructions do what we want */ /* the reloaded constants have to be at consecutive registers starting at an even one */ set ARGS_STACK_OFFSET, ARGS_STACK_OFFSET-16/* rb_mask (first step of hard case placed in what would otherwise be a stall) */ /* Zc if transparent, ZC if opaque */ /* Mask is fully opaque (all channels) */ /* get SRC back */ /* Source is also opaque - same as src_8888_8888 */ /* Same as over_8888_8888 */ /* No simplifications possible - do it the hard way */ /* ag_mask */ /* rb_mul; 2 cycles */ /* ag_mul; 2 cycles */ /* rb_dest */ /* ag_dest */ /* red1 */ /* blue1 */ /* rb1 */ /* red2 */ /* blue2 */ /* alpha1 */ /* rb2 */ /* green1 */ /* alpha2 */ /* green2 */ /* ag1 */ /* ag2 */ /* recombine source*mask */ /* recombine dest*(1-source_alpha*mask) */ /* followed by 1 stall */ /* The destination buffer is already in the L1 cache, so gned_mask, preload/* else drop through... */ STORE | FLAG_SPILL_LINE_VARS | FLAG_PROCESS_CORRUPTS_SCRATCH | FLAG_PROCESS_CORRUPTS_WK0 \/* prefetch distance */ \ /* newline */ \ /******************************************************************************/ /* Hold loop invariant in MASK */ /* Set GE[3:0] to 0101 so SEL instructions do what we want */ /* Offset the source pointer: we only need the alpha bytes */ igned_mask, preload!= 1 != 0 /* rb_dest */ /* ag_dest */ /* Last mov d,#0 of the set - used as part of shortcut for /* all 0 or all -1? */ /* all 0 or all -1? */ /* clear C if NE */ /* no writes to dest if source all -1 */ /* set dest to all 0 if source all 0 */ rstreg+3)STORE | FLAG_SPILL_LINE_VARS | FLAG_PROCESS_CORRUPTS_SCRATCH | FLAG_NO_PRELOAD_DST \/* prefetch distance */ \ /* newline */ \ /* cleanup */ \ /******************************************************************************/ /* Hold loop invariant in MASK */ /* Hold multiplier for destination in STRIDE_M */ sub STRIDE_M, STRIDE_M, SRC, lsr #24/* Set GE[3:0] to 0101 so SEL instructions do what we want */ k, preloadset PROCESS_REG, \firstregset PROCESS_REG, PROCESS_REG+1/* prefetch distance */ \ /* newline */ \ /* cleanup */ \ /******************************************************************************/
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