/* * Copyright (c) 1997, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License version 2 only, as * published by the Free Software Foundation. * * This code is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License * version 2 for more details (a copy is included in the LICENSE file that * accompanied this code). * * You should have received a copy of the GNU General Public License version * 2 along with this work; if not, write to the Free Software Foundation, * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. * * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA * or visit www.oracle.com if you need additional information or have any * questions. *
*/
class MultiNode; class PhaseCCP; class PhaseTransform;
//------------------------------MemNode---------------------------------------- // Load or Store, possibly throwing a NULL pointer exception class MemNode : public Node { private: bool _unaligned_access; // Unaligned access from unsafe bool _mismatched_access; // Mismatched access from unsafe: byte read in integer array for instance bool _unsafe_access; // Access of unsafe origin.
uint8_t _barrier_data; // Bit field with barrier information
protected: #ifdef ASSERT const TypePtr* _adr_type; // What kind of memory is being addressed? #endif virtual uint size_of() const; public: enum { Control, // When is it safe to do this load?
Memory, // Chunk of memory is being loaded from
Address, // Actually address, derived from base
ValueIn, // Value to store
OopStore // Preceding oop store, only in StoreCM
}; typedefenum { unordered = 0,
acquire, // Load has to acquire or be succeeded by MemBarAcquire.
release, // Store has to release or be preceded by MemBarRelease.
seqcst, // LoadStore has to have both acquire and release semantics.
unset // The memory ordering is not set (used for testing)
} MemOrd; protected:
MemNode( Node *c0, Node *c1, Node *c2, const TypePtr* at ) :
Node(c0,c1,c2),
_unaligned_access(false),
_mismatched_access(false),
_unsafe_access(false),
_barrier_data(0) {
init_class_id(Class_Mem);
debug_only(_adr_type=at; adr_type();)
}
MemNode( Node *c0, Node *c1, Node *c2, const TypePtr* at, Node *c3 ) :
Node(c0,c1,c2,c3),
_unaligned_access(false),
_mismatched_access(false),
_unsafe_access(false),
_barrier_data(0) {
init_class_id(Class_Mem);
debug_only(_adr_type=at; adr_type();)
}
MemNode( Node *c0, Node *c1, Node *c2, const TypePtr* at, Node *c3, Node *c4) :
Node(c0,c1,c2,c3,c4),
_unaligned_access(false),
_mismatched_access(false),
_unsafe_access(false),
_barrier_data(0) {
init_class_id(Class_Mem);
debug_only(_adr_type=at; adr_type();)
}
public: // Helpers for the optimizer. Documented in memnode.cpp. staticbool detect_ptr_independence(Node* p1, AllocateNode* a1,
Node* p2, AllocateNode* a2,
PhaseTransform* phase); staticbool adr_phi_is_loop_invariant(Node* adr_phi, Node* cast);
static Node *optimize_simple_memory_chain(Node *mchain, const TypeOopPtr *t_oop, Node *load, PhaseGVN *phase); static Node *optimize_memory_chain(Node *mchain, const TypePtr *t_adr, Node *load, PhaseGVN *phase); // This one should probably be a phase-specific function: staticbool all_controls_dominate(Node* dom, Node* sub);
virtualconstclass TypePtr *adr_type() const; // returns bottom_type of address
// Shared code for Ideal methods:
Node *Ideal_common(PhaseGVN *phase, bool can_reshape); // Return -1 for short-circuit NULL.
// Helper function for adr_type() implementations. staticconst TypePtr* calculate_adr_type(const Type* t, const TypePtr* cross_check = NULL);
// Raw access function, to allow copying of adr_type efficiently in // product builds and retain the debug info for debug builds. const TypePtr *raw_adr_type() const { #ifdef ASSERT return _adr_type; #else return 0; #endif
}
// Map a load or store opcode to its corresponding store opcode. // (Return -1 if unknown.) virtualint store_Opcode() const { return -1; }
// What is the type of the value in memory? (T_VOID mean "unspecified".) virtual BasicType memory_type() const = 0; virtualint memory_size() const { #ifdef ASSERT return type2aelembytes(memory_type(), true); #else return type2aelembytes(memory_type()); #endif
}
// Search through memory states which precede this node (load or store). // Look for an exact match for the address, with no intervening // aliased stores.
Node* find_previous_store(PhaseTransform* phase);
// Can this node (load or store) accurately see a stored value in // the given memory state? (The state may or may not be in(Memory).)
Node* can_see_stored_value(Node* st, PhaseTransform* phase) const;
//------------------------------LoadNode--------------------------------------- // Load value; requires Memory and Address class LoadNode : public MemNode { public: // Some loads (from unsafe) should be pinned: they don't depend only // on the dominating test. The field _control_dependency below records // whether that node depends only on the dominating test. // Pinned and UnknownControl are similar, but differ in that Pinned // loads are not allowed to float across safepoints, whereas UnknownControl // loads are allowed to do that. Therefore, Pinned is stricter. enum ControlDependency {
Pinned,
UnknownControl,
DependsOnlyOnTest
};
private: // LoadNode::hash() doesn't take the _control_dependency field // into account: If the graph already has a non-pinned LoadNode and // we add a pinned LoadNode with the same inputs, it's safe for GVN // to replace the pinned LoadNode with the non-pinned LoadNode, // otherwise it wouldn't be safe to have a non pinned LoadNode with // those inputs in the first place. If the graph already has a // pinned LoadNode and we add a non pinned LoadNode with the same // inputs, it's safe (but suboptimal) for GVN to replace the // non-pinned LoadNode by the pinned LoadNode.
ControlDependency _control_dependency;
// On platforms with weak memory ordering (e.g., PPC, Ia64) we distinguish // loads that can be reordered, and such requiring acquire semantics to // adhere to the Java specification. The required behaviour is stored in // this field. const MemOrd _mo;
protected: virtualbool cmp(const Node &n) const; virtual uint size_of() const; // Size is bigger // Should LoadNode::Ideal() attempt to remove control edges? virtualbool can_remove_control() const; const Type* const _type; // What kind of value is loaded?
// Handle algebraic identities here. If we have an identity, return the Node // we are equivalent to. We look for Load of a Store. virtual Node* Identity(PhaseGVN* phase);
// If the load is from Field memory and the pointer is non-null, it might be possible to // zero out the control input. // If the offset is constant and the base is an object allocation, // try to hook me up to the exact initializing store. virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
// Split instance field load through Phi.
Node* split_through_phi(PhaseGVN *phase);
// Recover original value from boxed values
Node *eliminate_autobox(PhaseIterGVN *igvn);
// Compute a new Type for this node. Basically we just do the pre-check, // then call the virtual add() to set the type. virtualconst Type* Value(PhaseGVN* phase) const;
// Common methods for LoadKlass and LoadNKlass nodes. const Type* klass_value_common(PhaseGVN* phase) const;
Node* klass_identity_common(PhaseGVN* phase);
virtual uint ideal_reg() const; virtualconst Type *bottom_type() const; // Following method is copied from TypeNode: void set_type(const Type* t) {
assert(t != NULL, "sanity");
debug_only(uint check_hash = (VerifyHashTableKeys && _hash_lock) ? hash() : NO_HASH);
*(const Type**)&_type = t; // cast away const-ness // If this node is in the hash table, make sure it doesn't need a rehash.
assert(check_hash == NO_HASH || check_hash == hash(), "type change must preserve hash code");
} const Type* type() const { assert(_type != NULL, "sanity"); return _type; };
// Do not match memory edge virtual uint match_edge(uint idx) const;
// Map a load opcode to its corresponding store opcode. virtualint store_Opcode() const = 0;
// Check if the load's memory input is a Phi node with the same control. bool is_instance_field_load_with_local_phi(Node* ctrl);
#ifndef PRODUCT virtualvoid dump_spec(outputStream *st) const; #endif #ifdef ASSERT // Helper function to allow a raw load without control edge for some cases staticbool is_immutable_value(Node* adr); #endif protected: const Type* load_array_final_field(const TypeKlassPtr *tkls,
ciKlass* klass) const;
// depends_only_on_test is almost always true, and needs to be almost always // true to enable key hoisting & commoning optimizations. However, for the // special case of RawPtr loads from TLS top & end, and other loads performed by // GC barriers, the control edge carries the dependence preventing hoisting past // a Safepoint instead of the memory edge. (An unfortunate consequence of having // Safepoints not set Raw Memory; itself an unfortunate consequence of having Nodes // which produce results (new raw memory state) inside of loops preventing all // manner of other optimizations). Basically, it's ugly but so is the alternative. // See comment in macro.cpp, around line 125 expand_allocate_common(). virtualbool depends_only_on_test() const { return adr_type() != TypeRawPtr::BOTTOM && _control_dependency == DependsOnlyOnTest;
}
};
//------------------------------LoadKlassNode---------------------------------- // Load a Klass from an object class LoadKlassNode : public LoadPNode { protected: // In most cases, LoadKlassNode does not have the control input set. If the control // input is set, it must not be removed (by LoadNode::Ideal()). virtualbool can_remove_control() const; public:
LoadKlassNode(Node *c, Node *mem, Node *adr, const TypePtr *at, const TypeKlassPtr *tk, MemOrd mo)
: LoadPNode(c, mem, adr, at, tk, mo) {} virtualint Opcode() const; virtualconst Type* Value(PhaseGVN* phase) const; virtual Node* Identity(PhaseGVN* phase); virtualbool depends_only_on_test() const { returntrue; }
//------------------------------StoreNode-------------------------------------- // Store value; requires Store, Address and Value class StoreNode : public MemNode { private: // On platforms with weak memory ordering (e.g., PPC, Ia64) we distinguish // stores that can be reordered, and such requiring release semantics to // adhere to the Java specification. The required behaviour is stored in // this field. const MemOrd _mo; // Needed for proper cloning. virtual uint size_of() const { returnsizeof(*this); } protected: virtualbool cmp( const Node &n ) const; virtualbool depends_only_on_test() const { returnfalse; }
public: // We must ensure that stores of object references will be visible // only after the object's initialization. So the callers of this // procedure must indicate that the store requires `release' // semantics, if the stored value is an object reference that might // point to a new object and may become externally visible.
StoreNode(Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val, MemOrd mo)
: MemNode(c, mem, adr, at, val), _mo(mo) {
init_class_id(Class_Store);
}
StoreNode(Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val, Node *oop_store, MemOrd mo)
: MemNode(c, mem, adr, at, val, oop_store), _mo(mo) {
init_class_id(Class_Store);
}
// Conservatively release stores of object references in order to // ensure visibility of object initialization. staticinline MemOrd release_if_reference(const BasicType t) { #ifdef AARCH64 // AArch64 doesn't need a release store here because object // initialization contains the necessary barriers. return unordered; #else const MemOrd mo = (t == T_ARRAY ||
t == T_ADDRESS || // Might be the address of an object reference (`boxing').
t == T_OBJECT) ? release : unordered; return mo; #endif
}
// Polymorphic factory method // // We must ensure that stores of object references will be visible // only after the object's initialization. So the callers of this // procedure must indicate that the store requires `release' // semantics, if the stored value is an object reference that might // point to a new object and may become externally visible. static StoreNode* make(PhaseGVN& gvn, Node* c, Node* mem, Node* adr, const TypePtr* at, Node* val, BasicType bt,
MemOrd mo, bool require_atomic_access = false);
virtual uint hash() const; // Check the type
// If the store is to Field memory and the pointer is non-null, we can // zero out the control input. virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
// Compute a new Type for this node. Basically we just do the pre-check, // then call the virtual add() to set the type. virtualconst Type* Value(PhaseGVN* phase) const;
// Check for identity function on memory (Load then Store at same address) virtual Node* Identity(PhaseGVN* phase);
// Do not match memory edge virtual uint match_edge(uint idx) const;
virtualconst Type *bottom_type() const; // returns Type::MEMORY
// Map a store opcode to its corresponding own opcode, trivially. virtualint store_Opcode() const { return Opcode(); }
// have all possible loads of the value stored been optimized away? bool value_never_loaded(PhaseTransform *phase) const;
//------------------------------StoreNKlassNode-------------------------------------- // Store narrow klass to memory class StoreNKlassNode : public StoreNNode { public:
StoreNKlassNode(Node *c, Node *mem, Node *adr, const TypePtr* at, Node *val, MemOrd mo)
: StoreNNode(c, mem, adr, at, val, mo) {} virtualint Opcode() const; virtual BasicType memory_type() const { return T_NARROWKLASS; }
};
//------------------------------StoreCMNode----------------------------------- // Store card-mark byte to memory for CM // The last StoreCM before a SafePoint must be preserved and occur after its "oop" store // Preceding equivalent StoreCMs may be eliminated. class StoreCMNode : public StoreNode { private: virtual uint hash() const { return StoreNode::hash() + _oop_alias_idx; } virtualbool cmp( const Node &n ) const { return _oop_alias_idx == ((StoreCMNode&)n)._oop_alias_idx
&& StoreNode::cmp(n);
} virtual uint size_of() const { returnsizeof(*this); } int _oop_alias_idx; // The alias_idx of OopStore
//------------------------------ClearArray------------------------------------- class ClearArrayNode: public Node { private: bool _is_large; public:
ClearArrayNode( Node *ctrl, Node *arymem, Node *word_cnt, Node *base, bool is_large)
: Node(ctrl,arymem,word_cnt,base), _is_large(is_large) {
init_class_id(Class_ClearArray);
} virtualint Opcode() const; virtualconst Type *bottom_type() const { return Type::MEMORY; } // ClearArray modifies array elements, and so affects only the // array memory addressed by the bottom_type of its base address. virtualconstclass TypePtr *adr_type() const; virtual Node* Identity(PhaseGVN* phase); virtual Node *Ideal(PhaseGVN *phase, bool can_reshape); virtual uint match_edge(uint idx) const; bool is_large() const { return _is_large; }
// Clear the given area of an object or array. // The start offset must always be aligned mod BytesPerInt. // The end offset must always be aligned mod BytesPerLong. // Return the new memory. static Node* clear_memory(Node* control, Node* mem, Node* dest,
intptr_t start_offset,
intptr_t end_offset,
PhaseGVN* phase); static Node* clear_memory(Node* control, Node* mem, Node* dest,
intptr_t start_offset,
Node* end_offset,
PhaseGVN* phase); static Node* clear_memory(Node* control, Node* mem, Node* dest,
Node* start_offset,
Node* end_offset,
PhaseGVN* phase); // Return allocation input memory edge if it is different instance // or itself if it is the one we are looking for. staticbool step_through(Node** np, uint instance_id, PhaseTransform* phase);
};
//------------------------------MemBar----------------------------------------- // There are different flavors of Memory Barriers to match the Java Memory // Model. Monitor-enter and volatile-load act as Acquires: no following ref // can be moved to before them. We insert a MemBar-Acquire after a FastLock or // volatile-load. Monitor-exit and volatile-store act as Release: no // preceding ref can be moved to after them. We insert a MemBar-Release // before a FastUnlock or volatile-store. All volatiles need to be // serialized, so we follow all volatile-stores with a MemBar-Volatile to // separate it from any following volatile-load. class MemBarNode: public MultiNode { virtual uint hash() const ; // { return NO_HASH; } virtualbool cmp( const Node &n ) const ; // Always fail, except on self
virtual uint size_of() const { returnsizeof(*this); } // Memory type this node is serializing. Usually either rawptr or bottom. const TypePtr* _adr_type;
// How is this membar related to a nearby memory access? enum {
Standalone,
TrailingLoad,
TrailingStore,
LeadingStore,
TrailingLoadStore,
LeadingLoadStore,
TrailingPartialArrayCopy
} _kind;
#ifdef ASSERT
uint _pair_idx; #endif
public: enum {
Precedent = TypeFunc::Parms // optional edge to force precedence
};
MemBarNode(Compile* C, int alias_idx, Node* precedent); virtualint Opcode() const = 0; virtualconstclass TypePtr *adr_type() const { return _adr_type; } virtualconst Type* Value(PhaseGVN* phase) const; virtual Node *Ideal(PhaseGVN *phase, bool can_reshape); virtual uint match_edge(uint idx) const { return 0; } virtualconst Type *bottom_type() const { return TypeTuple::MEMBAR; } virtual Node *match( const ProjNode *proj, const Matcher *m ); // Factory method. Builds a wide or narrow membar. // Optional 'precedent' becomes an extra edge if not null. static MemBarNode* make(Compile* C, int opcode, int alias_idx = Compile::AliasIdxBot,
Node* precedent = NULL);
// "Acquire" - no following ref can move before (but earlier refs can // follow, like an early Load stalled in cache). Requires multi-cpu // visibility. Inserted after a volatile load. class MemBarAcquireNode: public MemBarNode { public:
MemBarAcquireNode(Compile* C, int alias_idx, Node* precedent)
: MemBarNode(C, alias_idx, precedent) {} virtualint Opcode() const;
};
// "Acquire" - no following ref can move before (but earlier refs can // follow, like an early Load stalled in cache). Requires multi-cpu // visibility. Inserted independent of any load, as required // for intrinsic Unsafe.loadFence(). class LoadFenceNode: public MemBarNode { public:
LoadFenceNode(Compile* C, int alias_idx, Node* precedent)
: MemBarNode(C, alias_idx, precedent) {} virtualint Opcode() const;
};
// "Release" - no earlier ref can move after (but later refs can move // up, like a speculative pipelined cache-hitting Load). Requires // multi-cpu visibility. Inserted before a volatile store. class MemBarReleaseNode: public MemBarNode { public:
MemBarReleaseNode(Compile* C, int alias_idx, Node* precedent)
: MemBarNode(C, alias_idx, precedent) {} virtualint Opcode() const;
};
// "Release" - no earlier ref can move after (but later refs can move // up, like a speculative pipelined cache-hitting Load). Requires // multi-cpu visibility. Inserted independent of any store, as required // for intrinsic Unsafe.storeFence(). class StoreFenceNode: public MemBarNode { public:
StoreFenceNode(Compile* C, int alias_idx, Node* precedent)
: MemBarNode(C, alias_idx, precedent) {} virtualint Opcode() const;
};
// "Acquire" - no following ref can move before (but earlier refs can // follow, like an early Load stalled in cache). Requires multi-cpu // visibility. Inserted after a FastLock. class MemBarAcquireLockNode: public MemBarNode { public:
MemBarAcquireLockNode(Compile* C, int alias_idx, Node* precedent)
: MemBarNode(C, alias_idx, precedent) {} virtualint Opcode() const;
};
// "Release" - no earlier ref can move after (but later refs can move // up, like a speculative pipelined cache-hitting Load). Requires // multi-cpu visibility. Inserted before a FastUnLock. class MemBarReleaseLockNode: public MemBarNode { public:
MemBarReleaseLockNode(Compile* C, int alias_idx, Node* precedent)
: MemBarNode(C, alias_idx, precedent) {} virtualint Opcode() const;
};
class MemBarStoreStoreNode: public MemBarNode { public:
MemBarStoreStoreNode(Compile* C, int alias_idx, Node* precedent)
: MemBarNode(C, alias_idx, precedent) {
init_class_id(Class_MemBarStoreStore);
} virtualint Opcode() const;
};
class StoreStoreFenceNode: public MemBarNode { public:
StoreStoreFenceNode(Compile* C, int alias_idx, Node* precedent)
: MemBarNode(C, alias_idx, precedent) {} virtualint Opcode() const;
};
// Ordering between a volatile store and a following volatile load. // Requires multi-CPU visibility? class MemBarVolatileNode: public MemBarNode { public:
MemBarVolatileNode(Compile* C, int alias_idx, Node* precedent)
: MemBarNode(C, alias_idx, precedent) {} virtualint Opcode() const;
};
// Ordering within the same CPU. Used to order unsafe memory references // inside the compiler when we lack alias info. Not needed "outside" the // compiler because the CPU does all the ordering for us. class MemBarCPUOrderNode: public MemBarNode { public:
MemBarCPUOrderNode(Compile* C, int alias_idx, Node* precedent)
: MemBarNode(C, alias_idx, precedent) {} virtualint Opcode() const; virtual uint ideal_reg() const { return 0; } // not matched in the AD file
};
class OnSpinWaitNode: public MemBarNode { public:
OnSpinWaitNode(Compile* C, int alias_idx, Node* precedent)
: MemBarNode(C, alias_idx, precedent) {} virtualint Opcode() const;
};
// Isolation of object setup after an AllocateNode and before next safepoint. // (See comment in memnode.cpp near InitializeNode::InitializeNode for semantics.) class InitializeNode: public MemBarNode { friendclass AllocateNode;
public: enum {
Control = TypeFunc::Control,
Memory = TypeFunc::Memory, // MergeMem for states affected by this op
RawAddress = TypeFunc::Parms+0, // the newly-allocated raw address
RawStores = TypeFunc::Parms+1 // zero or more stores (or TOP)
};
InitializeNode(Compile* C, int adr_type, Node* rawoop); virtualint Opcode() const; virtual uint size_of() const { returnsizeof(*this); } virtual uint ideal_reg() const { return 0; } // not matched in the AD file virtualconst RegMask &in_RegMask(uint) const; // mask for RawAddress
// Manage incoming memory edges via a MergeMem on in(Memory):
Node* memory(uint alias_idx);
// The raw memory edge coming directly from the Allocation. // The contents of this memory are *always* all-zero-bits.
Node* zero_memory() { return memory(Compile::AliasIdxRaw); }
// Return the corresponding allocation for this initialization (or null if none). // (Note: Both InitializeNode::allocation and AllocateNode::initialization // are defined in graphKit.cpp, which sets up the bidirectional relation.)
AllocateNode* allocation();
// Anything other than zeroing in this init? bool is_non_zero();
// An InitializeNode must completed before macro expansion is done. // Completion requires that the AllocateNode must be followed by // initialization of the new memory to zero, then to any initializers. bool is_complete() { return _is_complete != Incomplete; } bool is_complete_with_arraycopy() { return (_is_complete & WithArraycopy) != 0; }
// Mark complete. (Must not yet be complete.) void set_complete(PhaseGVN* phase); void set_complete_with_arraycopy() { _is_complete = Complete | WithArraycopy; }
#ifdef ASSERT // ensure all non-degenerate stores are ordered and non-overlapping bool stores_are_sane(PhaseTransform* phase); #endif//ASSERT
// See if this store can be captured; return offset where it initializes. // Return 0 if the store cannot be moved (any sort of problem).
intptr_t can_capture_store(StoreNode* st, PhaseGVN* phase, bool can_reshape);
// Capture another store; reformat it to write my internal raw memory. // Return the captured copy, else NULL if there is some sort of problem.
Node* capture_store(StoreNode* st, intptr_t start, PhaseGVN* phase, bool can_reshape);
// Find captured store which corresponds to the range [start..start+size). // Return my own memory projection (meaning the initial zero bits) // if there is no such store. Return NULL if there is a problem.
Node* find_captured_store(intptr_t start, int size_in_bytes, PhaseTransform* phase);
// Called when the associated AllocateNode is expanded into CFG.
Node* complete_stores(Node* rawctl, Node* rawmem, Node* rawptr,
intptr_t header_size, Node* size_in_bytes,
PhaseIterGVN* phase);
private: void remove_extra_zeroes();
// Find out where a captured store should be placed (or already is placed). int captured_store_insertion_point(intptr_t start, int size_in_bytes,
PhaseTransform* phase);
intptr_t find_next_fullword_store(uint i, PhaseGVN* phase);
};
//------------------------------MergeMem--------------------------------------- // (See comment in memnode.cpp near MergeMemNode::MergeMemNode for semantics.) class MergeMemNode: public Node { virtual uint hash() const ; // { return NO_HASH; } virtualbool cmp( const Node &n ) const ; // Always fail, except on self friendclass MergeMemStream;
MergeMemNode(Node* def); // clients use MergeMemNode::make
public: // If the input is a whole memory state, clone it with all its slices intact. // Otherwise, make a new memory state with just that base memory input. // In either case, the result is a newly created MergeMem. static MergeMemNode* make(Node* base_memory);
virtualint Opcode() const; virtual Node* Identity(PhaseGVN* phase); virtual Node *Ideal(PhaseGVN *phase, bool can_reshape); virtual uint ideal_reg() const { return NotAMachineReg; } virtual uint match_edge(uint idx) const { return 0; } virtualconst RegMask &out_RegMask() const; virtualconst Type *bottom_type() const { return Type::MEMORY; } virtualconst TypePtr *adr_type() const { return TypePtr::BOTTOM; } // sparse accessors // Fetch the previously stored "set_memory_at", or else the base memory. // (Caller should clone it if it is a phi-nest.)
Node* memory_at(uint alias_idx) const; // set the memory, regardless of its previous value void set_memory_at(uint alias_idx, Node* n); // the "base" is the memory that provides the non-finite support
Node* base_memory() const { return in(Compile::AliasIdxBot); } // warning: setting the base can implicitly set any of the other slices too void set_base_memory(Node* def); // sentinel value which denotes a copy of the base memory:
Node* empty_memory() const { return in(Compile::AliasIdxTop); } static Node* make_empty_memory(); // where the sentinel comes from bool is_empty_memory(Node* n) const { assert((n == empty_memory()) == n->is_top(), "sanity"); return n->is_top(); } // hook for the iterator, to perform any necessary setup void iteration_setup(const MergeMemNode* other = NULL); // push sentinels until I am at least as long as the other (semantic no-op) void grow_to_match(const MergeMemNode* other); bool verify_sparse() const PRODUCT_RETURN0; #ifndef PRODUCT virtualvoid dump_spec(outputStream *st) const; #endif
};
class MergeMemStream : public StackObj { private:
MergeMemNode* _mm; const MergeMemNode* _mm2; // optional second guy, contributes non-empty iterations
Node* _mm_base; // loop-invariant base memory of _mm int _idx; int _cnt;
Node* _mem;
Node* _mem2; int _cnt2;
void init(MergeMemNode* mm, const MergeMemNode* mm2 = NULL) { // subsume_node will break sparseness at times, whenever a memory slice // folds down to a copy of the base ("fat") memory. In such a case, // the raw edge will update to base, although it should be top. // This iterator will recognize either top or base_memory as an // "empty" slice. See is_empty, is_empty2, and next below. // // The sparseness property is repaired in MergeMemNode::Ideal. // As long as access to a MergeMem goes through this iterator // or the memory_at accessor, flaws in the sparseness will // never be observed. // // Also, iteration_setup repairs sparseness.
assert(mm->verify_sparse(), "please, no dups of base");
assert(mm2==NULL || mm2->verify_sparse(), "please, no dups of base");
_mm = mm;
_mm_base = mm->base_memory();
_mm2 = mm2;
_cnt = mm->req();
_idx = Compile::AliasIdxBot-1; // start at the base memory
_mem = NULL;
_mem2 = NULL;
}
// iterate over one merge
MergeMemStream(MergeMemNode* mm) {
mm->iteration_setup();
init(mm);
debug_only(_cnt2 = 999);
} // iterate in parallel over two merges // only iterates through non-empty elements of mm2
MergeMemStream(MergeMemNode* mm, const MergeMemNode* mm2) {
assert(mm2, "second argument must be a MergeMem also");
((MergeMemNode*)mm2)->iteration_setup(); // update hidden state
mm->iteration_setup(mm2);
init(mm, mm2);
_cnt2 = mm2->req();
} #ifdef ASSERT
~MergeMemStream() {
assert_synch();
} #endif
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noch Qualität der bereit gestellten Informationen zugesichert.
Bemerkung:
Die farbliche Syntaxdarstellung und die Messung sind noch experimentell.