/* SPDX-License-Identifier: GPL-2.0-or-later */ #ifndef __CRB_H#define __CRB_H#include <linux/types.h>#include "nx.h" /* CCW 842 CI/FC masks * NX P8 workbook, section 4.3.1, figure 4-6 * "CI/FC Boundary by NX CT type" #define CCW_CI_842 (0 x00003ff8)#define CCW_FC_842 (0 x00000007)/* Chapter 6.5.8 Coprocessor-Completion Block (CCB) */ #define CCB_VALUE (0 x3fffffffffffffff)#define CCB_ADDRESS (0 xfffffffffffffff8)#define CCB_CM (0 x0000000000000007)#define CCB_CM0 (0 x0000000000000004)#define CCB_CM12 (0 x0000000000000003)#define CCB_CM0_ALL_COMPLETIONS (0 x0)#define CCB_CM0_LAST_IN_CHAIN (0 x4)#define CCB_CM12_STORE (0 x0)#define CCB_CM12_INTERRUPT (0 x1)#define CCB_SIZE (0 x10)#define CCB_ALIGN CCB_SIZEstruct coprocessor_completion_block {/* Chapter 6.5.7 Coprocessor-Status Block (CSB) */ #define CSB_V (0 x80)#define CSB_F (0 x04)#define CSB_CH (0 x03)#define CSB_CE_INCOMPLETE (0 x80)#define CSB_CE_TERMINATION (0 x40)#define CSB_CE_TPBC (0 x20)#define CSB_CC_SUCCESS (0 )#define CSB_CC_INVALID_ALIGN (1 )#define CSB_CC_OPERAND_OVERLAP (2 )#define CSB_CC_DATA_LENGTH (3 )#define CSB_CC_TRANSLATION (5 )#define CSB_CC_PROTECTION (6 )#define CSB_CC_RD_EXTERNAL (7 )#define CSB_CC_INVALID_OPERAND (8 )#define CSB_CC_PRIVILEGE (9 )#define CSB_CC_INTERNAL (10 )#define CSB_CC_WR_EXTERNAL (12 )#define CSB_CC_NOSPC (13 )#define CSB_CC_EXCESSIVE_DDE (14 )#define CSB_CC_WR_TRANSLATION (15 )#define CSB_CC_WR_PROTECTION (16 )#define CSB_CC_UNKNOWN_CODE (17 )#define CSB_CC_ABORT (18 )#define CSB_CC_TRANSPORT (20 )#define CSB_CC_SEGMENTED_DDL (31 )#define CSB_CC_PROGRESS_POINT (32 )#define CSB_CC_DDE_OVERFLOW (33 )#define CSB_CC_SESSION (34 )#define CSB_CC_PROVISION (36 )#define CSB_CC_CHAIN (37 )#define CSB_CC_SEQUENCE (38 )#define CSB_CC_HW (39 )#define CSB_SIZE (0 x10)#define CSB_ALIGN CSB_SIZEstruct coprocessor_status_block {/* Chapter 6.5.10 Data-Descriptor List (DDL) * each list contains one or more Data-Descriptor Entries (DDE) #define DDE_P (0 x8000)#define DDE_SIZE (0 x10)#define DDE_ALIGN DDE_SIZEstruct data_descriptor_entry {/* Chapter 6.5.2 Coprocessor-Request Block (CRB) */ #define CRB_SIZE (0 x80)#define CRB_ALIGN (0 x100) /* Errata: requires 256 alignment */ /* Coprocessor Status Block field * ADDRESS address of CSB * C CCB is valid * AT 0 = addrs are virtual, 1 = addrs are phys * M enable perf monitor #define CRB_CSB_ADDRESS (0 xfffffffffffffff0)#define CRB_CSB_C (0 x0000000000000008)#define CRB_CSB_AT (0 x0000000000000002)#define CRB_CSB_M (0 x0000000000000001)struct coprocessor_request_block {struct data_descriptor_entry source;struct data_descriptor_entry target;struct coprocessor_completion_block ccb;48 ];struct coprocessor_status_block csb;#define crb_csb_addr(c) __be64_to_cpu(c->csb_addr)#define crb_nx_fault_addr(c) __be64_to_cpu(c->stamp.nx.fault_storage_addr)#define crb_nx_flags(c) c->stamp.nx.flags#define crb_nx_fault_status(c) c->stamp.nx.fault_status#define crb_nx_pswid(c) c->stamp.nx.pswid/* RFC02167 Initiate Coprocessor Instructions document * Chapter 8.2.1.1.1 RS * Chapter 8.2.3 Coprocessor Directive * Chapter 8.2.4 Execution * * The CCW must be converted to BE before passing to icswx() #define CCW_PS (0 xff000000)#define CCW_CT (0 x00ff0000)#define CCW_CD (0 x0000ffff)#define CCW_CL (0 x0000c000)#endif
Messung V0.5 in Prozent C=96 H=91 G=93
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(vorverarbeitet am 2026-06-06)
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