// SPDX-License-Identifier: GPL-2.0 // Copyright (c) 2019, Linaro Limited #include <linux/cleanup.h>#include <linux/clk.h>#include <linux/clk-provider.h>#include <linux/interrupt.h>#include <linux/kernel.h>#include <linux/mfd/wcd934x/registers.h>#include <linux/mfd/wcd934x/wcd934x.h>#include <linux/module.h>#include <linux/mutex.h>#include <linux/of_clk.h>#include <linux/of.h>#include <linux/platform_device.h>#include <linux/regmap.h>#include <linux/slab.h>#include <linux/slimbus.h>#include <sound/pcm_params.h>#include <sound/soc.h>#include <sound/soc-dapm.h>#include <sound/tlv.h>#include "wcd-clsh-v2.h" #include "wcd-mbhc-v2.h" #include <dt-bindings/sound/qcom,wcd934x.h>#define WCD934X_RATES_MASK (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |\/* Fractional Rates */ #define WCD934X_FRAC_RATES_MASK (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_88200 |\#define WCD934X_FORMATS_S16_S24_LE (SNDRV_PCM_FMTBIT_S16_LE | \/* slave port water mark level * ( 0 : 6 bytes , 1 : 9 bytes , 2 : 12 bytes , 3 : 15 bytes ) #define SLAVE_PORT_WATER_MARK_6BYTES 0 #define SLAVE_PORT_WATER_MARK_9BYTES 1 #define SLAVE_PORT_WATER_MARK_12BYTES 2 #define SLAVE_PORT_WATER_MARK_15BYTES 3 #define SLAVE_PORT_WATER_MARK_SHIFT 1 #define SLAVE_PORT_ENABLE 1 #define SLAVE_PORT_DISABLE 0 #define WCD934X_SLIM_WATER_MARK_VAL \#define WCD934X_SLIM_NUM_PORT_REG 3 #define WCD934X_SLIM_PGD_PORT_INT_TX_EN0 (WCD934X_SLIM_PGD_PORT_INT_EN0 + 2 )#define WCD934X_SLIM_IRQ_OVERFLOW BIT(0 )#define WCD934X_SLIM_IRQ_UNDERFLOW BIT(1 )#define WCD934X_SLIM_IRQ_PORT_CLOSED BIT(2 )#define WCD934X_MCLK_CLK_12P288MHZ 12288000 #define WCD934X_MCLK_CLK_9P6MHZ 9600000 /* Only valid for 9.6 MHz mclk */ #define WCD9XXX_DMIC_SAMPLE_RATE_2P4MHZ 2400000 #define WCD9XXX_DMIC_SAMPLE_RATE_4P8MHZ 4800000 /* Only valid for 12.288 MHz mclk */ #define WCD9XXX_DMIC_SAMPLE_RATE_4P096MHZ 4096000 #define WCD934X_DMIC_CLK_DIV_2 0 x0#define WCD934X_DMIC_CLK_DIV_3 0 x1#define WCD934X_DMIC_CLK_DIV_4 0 x2#define WCD934X_DMIC_CLK_DIV_6 0 x3#define WCD934X_DMIC_CLK_DIV_8 0 x4#define WCD934X_DMIC_CLK_DIV_16 0 x5#define WCD934X_DMIC_CLK_DRIVE_DEFAULT 0 x02#define TX_HPF_CUT_OFF_FREQ_MASK 0 x60#define CF_MIN_3DB_4HZ 0 x0#define CF_MIN_3DB_75HZ 0 x1#define CF_MIN_3DB_150HZ 0 x2#define WCD934X_RX_START 16 #define WCD934X_NUM_INTERPOLATORS 9 #define WCD934X_RX_PATH_CTL_OFFSET 20 #define WCD934X_MAX_VALID_ADC_MUX 13 #define WCD934X_INVALID_ADC_MUX 9 #define WCD934X_SLIM_RX_CH(p) \#define WCD934X_SLIM_TX_CH(p) \/* Feature masks to distinguish codec version */ #define DSD_DISABLED_MASK 0 #define SLNQ_DISABLED_MASK 1 #define DSD_DISABLED BIT(DSD_DISABLED_MASK)#define SLNQ_DISABLED BIT(SLNQ_DISABLED_MASK)/* As fine version info cannot be retrieved before wcd probe. * Define three coarse versions for possible future use before wcd probe . #define WCD_VERSION_WCD9340_1_0 0 x400#define WCD_VERSION_WCD9341_1_0 0 x410#define WCD_VERSION_WCD9340_1_1 0 x401#define WCD_VERSION_WCD9341_1_1 0 x411#define WCD934X_AMIC_PWR_LEVEL_LP 0 #define WCD934X_AMIC_PWR_LEVEL_DEFAULT 1 #define WCD934X_AMIC_PWR_LEVEL_HP 2 #define WCD934X_AMIC_PWR_LEVEL_HYBRID 3 #define WCD934X_AMIC_PWR_LVL_MASK 0 x60#define WCD934X_AMIC_PWR_LVL_SHIFT 0 x5#define WCD934X_DEC_PWR_LVL_MASK 0 x06#define WCD934X_DEC_PWR_LVL_LP 0 x02#define WCD934X_DEC_PWR_LVL_HP 0 x04#define WCD934X_DEC_PWR_LVL_DF 0 x00#define WCD934X_DEC_PWR_LVL_HYBRID WCD934X_DEC_PWR_LVL_DF#define WCD934X_DEF_MICBIAS_MV 1800 #define WCD934X_MAX_MICBIAS_MV 2850 #define WCD_IIR_FILTER_SIZE (sizeof (u32) * BAND_MAX)#define WCD_IIR_FILTER_CTL(xname, iidx, bidx) \unsigned long )&(struct wcd_iir_filter_ctl) { \/* Z value defined in milliohm */ #define WCD934X_ZDET_VAL_32 32000 #define WCD934X_ZDET_VAL_400 400000 #define WCD934X_ZDET_VAL_1200 1200000 #define WCD934X_ZDET_VAL_100K 100000000 /* Z floating defined in ohms */ #define WCD934X_ZDET_FLOATING_IMPEDANCE 0 x0FFFFFFE#define WCD934X_ZDET_NUM_MEASUREMENTS 900 #define WCD934X_MBHC_GET_C1(c) ((c & 0 xC000) >> 14 )#define WCD934X_MBHC_GET_X1(x) (x & 0 x3FFF)/* Z value compared in milliOhm */ #define WCD934X_MBHC_IS_SECOND_RAMP_REQUIRED(z) ((z > 400000 ) || (z < 32000 ))#define WCD934X_MBHC_ZDET_CONST (86 * 16384 )#define WCD934X_MBHC_MOISTURE_RREF R_24_KOHM#define WCD934X_MBHC_MAX_BUTTONS (8 )#define WCD_MBHC_HS_V_MAX 1600 #define WCD934X_INTERPOLATOR_PATH(id) \"RX INT" #id "_1 MIX1 INP0" , "RX0" , "SLIM RX0" }, \"RX INT" #id "_1 MIX1 INP0" , "RX1" , "SLIM RX1" }, \"RX INT" #id "_1 MIX1 INP0" , "RX2" , "SLIM RX2" }, \"RX INT" #id "_1 MIX1 INP0" , "RX3" , "SLIM RX3" }, \"RX INT" #id "_1 MIX1 INP0" , "RX4" , "SLIM RX4" }, \"RX INT" #id "_1 MIX1 INP0" , "RX5" , "SLIM RX5" }, \"RX INT" #id "_1 MIX1 INP0" , "RX6" , "SLIM RX6" }, \"RX INT" #id "_1 MIX1 INP0" , "RX7" , "SLIM RX7" }, \"RX INT" #id "_1 MIX1 INP0" , "IIR0" , "IIR0" }, \"RX INT" #id "_1 MIX1 INP0" , "IIR1" , "IIR1" }, \"RX INT" #id "_1 MIX1 INP1" , "RX0" , "SLIM RX0" }, \"RX INT" #id "_1 MIX1 INP1" , "RX1" , "SLIM RX1" }, \"RX INT" #id "_1 MIX1 INP1" , "RX2" , "SLIM RX2" }, \"RX INT" #id "_1 MIX1 INP1" , "RX3" , "SLIM RX3" }, \"RX INT" #id "_1 MIX1 INP1" , "RX4" , "SLIM RX4" }, \"RX INT" #id "_1 MIX1 INP1" , "RX5" , "SLIM RX5" }, \"RX INT" #id "_1 MIX1 INP1" , "RX6" , "SLIM RX6" }, \"RX INT" #id "_1 MIX1 INP1" , "RX7" , "SLIM RX7" }, \"RX INT" #id "_1 MIX1 INP1" , "IIR0" , "IIR0" }, \"RX INT" #id "_1 MIX1 INP1" , "IIR1" , "IIR1" }, \"RX INT" #id "_1 MIX1 INP2" , "RX0" , "SLIM RX0" }, \"RX INT" #id "_1 MIX1 INP2" , "RX1" , "SLIM RX1" }, \"RX INT" #id "_1 MIX1 INP2" , "RX2" , "SLIM RX2" }, \"RX INT" #id "_1 MIX1 INP2" , "RX3" , "SLIM RX3" }, \"RX INT" #id "_1 MIX1 INP2" , "RX4" , "SLIM RX4" }, \"RX INT" #id "_1 MIX1 INP2" , "RX5" , "SLIM RX5" }, \"RX INT" #id "_1 MIX1 INP2" , "RX6" , "SLIM RX6" }, \"RX INT" #id "_1 MIX1 INP2" , "RX7" , "SLIM RX7" }, \"RX INT" #id "_1 MIX1 INP2" , "IIR0" , "IIR0" }, \"RX INT" #id "_1 MIX1 INP2" , "IIR1" , "IIR1" }, \"RX INT" #id "_1 MIX1" , NULL, "RX INT" #id "_1 MIX1 INP0" }, \"RX INT" #id "_1 MIX1" , NULL, "RX INT" #id "_1 MIX1 INP1" }, \"RX INT" #id "_1 MIX1" , NULL, "RX INT" #id "_1 MIX1 INP2" }, \"RX INT" #id "_2 MUX" , "RX0" , "SLIM RX0" }, \"RX INT" #id "_2 MUX" , "RX1" , "SLIM RX1"}, \ "RX INT" #id "_2 MUX" , "RX2" , "SLIM RX2" }, \"RX INT" #id "_2 MUX" , "RX3" , "SLIM RX3" }, \"RX INT" #id "_2 MUX" , "RX4" , "SLIM RX4" }, \"RX INT" #id "_2 MUX" , "RX5" , "SLIM RX5" }, \"RX INT" #id "_2 MUX" , "RX6" , "SLIM RX6" }, \"RX INT" #id "_2 MUX" , "RX7" , "SLIM RX7" }, \"RX INT" #id "_2 MUX" , NULL, "INT" #id "_CLK" }, \"RX INT" #id "_2 MUX" , NULL, "DSMDEM" #id "_CLK" }, \"RX INT" #id "_2 INTERP" , NULL, "RX INT" #id "_2 MUX" }, \"RX INT" #id " SEC MIX" , NULL, "RX INT" #id "_2 INTERP" }, \"RX INT" #id "_1 INTERP" , NULL, "RX INT" #id "_1 MIX1" }, \"RX INT" #id "_1 INTERP" , NULL, "INT" #id "_CLK" }, \"RX INT" #id "_1 INTERP" , NULL, "DSMDEM" #id "_CLK" }, \"RX INT" #id " SEC MIX" , NULL, "RX INT" #id "_1 INTERP" }#define WCD934X_INTERPOLATOR_MIX2(id) \"RX INT" #id " MIX2" , NULL, "RX INT" #id " SEC MIX" }, \"RX INT" #id " MIX2" , NULL, "RX INT" #id " MIX2 INP" }#define WCD934X_SLIM_RX_AIF_PATH(id) \"SLIM RX" #id " MUX" , "AIF1_PB" , "AIF1 PB" }, \"SLIM RX" #id " MUX" , "AIF2_PB" , "AIF2 PB" }, \"SLIM RX" #id " MUX" , "AIF3_PB" , "AIF3 PB" }, \"SLIM RX" #id " MUX" , "AIF4_PB" , "AIF4 PB" }, \"SLIM RX" #id , NULL, "SLIM RX" #id " MUX" }#define WCD934X_ADC_MUX(id) \"ADC MUX" #id , "DMIC" , "DMIC MUX" #id }, \"ADC MUX" #id , "AMIC" , "AMIC MUX" #id }, \"DMIC MUX" #id , "DMIC0" , "DMIC0" }, \"DMIC MUX" #id , "DMIC1" , "DMIC1" }, \"DMIC MUX" #id , "DMIC2" , "DMIC2" }, \"DMIC MUX" #id , "DMIC3" , "DMIC3" }, \"DMIC MUX" #id , "DMIC4" , "DMIC4" }, \"DMIC MUX" #id , "DMIC5" , "DMIC5" }, \"AMIC MUX" #id , "ADC1" , "ADC1" }, \"AMIC MUX" #id , "ADC2" , "ADC2" }, \"AMIC MUX" #id , "ADC3" , "ADC3" }, \"AMIC MUX" #id , "ADC4" , "ADC4" }#define WCD934X_IIR_INP_MUX(id) \"IIR" #id , NULL, "IIR" #id " INP0 MUX" }, \"IIR" #id " INP0 MUX" , "DEC0" , "ADC MUX0" }, \"IIR" #id " INP0 MUX" , "DEC1" , "ADC MUX1" }, \"IIR" #id " INP0 MUX" , "DEC2" , "ADC MUX2" }, \"IIR" #id " INP0 MUX" , "DEC3" , "ADC MUX3" }, \"IIR" #id " INP0 MUX" , "DEC4" , "ADC MUX4" }, \"IIR" #id " INP0 MUX" , "DEC5" , "ADC MUX5" }, \"IIR" #id " INP0 MUX" , "DEC6" , "ADC MUX6" }, \"IIR" #id " INP0 MUX" , "DEC7" , "ADC MUX7" }, \"IIR" #id " INP0 MUX" , "DEC8" , "ADC MUX8" }, \"IIR" #id " INP0 MUX" , "RX0" , "SLIM RX0" }, \"IIR" #id " INP0 MUX" , "RX1" , "SLIM RX1" }, \"IIR" #id " INP0 MUX" , "RX2" , "SLIM RX2" }, \"IIR" #id " INP0 MUX" , "RX3" , "SLIM RX3" }, \"IIR" #id " INP0 MUX" , "RX4" , "SLIM RX4" }, \"IIR" #id " INP0 MUX" , "RX5" , "SLIM RX5" }, \"IIR" #id " INP0 MUX" , "RX6" , "SLIM RX6" }, \"IIR" #id " INP0 MUX" , "RX7" , "SLIM RX7" }, \"IIR" #id , NULL, "IIR" #id " INP1 MUX" }, \"IIR" #id " INP1 MUX" , "DEC0" , "ADC MUX0" }, \"IIR" #id " INP1 MUX" , "DEC1" , "ADC MUX1" }, \"IIR" #id " INP1 MUX" , "DEC2" , "ADC MUX2" }, \"IIR" #id " INP1 MUX" , "DEC3" , "ADC MUX3" }, \"IIR" #id " INP1 MUX" , "DEC4" , "ADC MUX4" }, \"IIR" #id " INP1 MUX" , "DEC5" , "ADC MUX5" }, \"IIR" #id " INP1 MUX" , "DEC6" , "ADC MUX6" }, \"IIR" #id " INP1 MUX" , "DEC7" , "ADC MUX7" }, \"IIR" #id " INP1 MUX" , "DEC8" , "ADC MUX8" }, \"IIR" #id " INP1 MUX" , "RX0" , "SLIM RX0" }, \"IIR" #id " INP1 MUX" , "RX1" , "SLIM RX1" }, \"IIR" #id " INP1 MUX" , "RX2" , "SLIM RX2" }, \"IIR" #id " INP1 MUX" , "RX3" , "SLIM RX3" }, \"IIR" #id " INP1 MUX" , "RX4" , "SLIM RX4" }, \"IIR" #id " INP1 MUX" , "RX5" , "SLIM RX5" }, \"IIR" #id " INP1 MUX" , "RX6" , "SLIM RX6" }, \"IIR" #id " INP1 MUX" , "RX7" , "SLIM RX7" }, \"IIR" #id , NULL, "IIR" #id " INP2 MUX" }, \"IIR" #id " INP2 MUX" , "DEC0" , "ADC MUX0" }, \"IIR" #id " INP2 MUX" , "DEC1" , "ADC MUX1" }, \"IIR" #id " INP2 MUX" , "DEC2" , "ADC MUX2" }, \"IIR" #id " INP2 MUX" , "DEC3" , "ADC MUX3" }, \"IIR" #id " INP2 MUX" , "DEC4" , "ADC MUX4" }, \"IIR" #id " INP2 MUX" , "DEC5" , "ADC MUX5" }, \"IIR" #id " INP2 MUX" , "DEC6" , "ADC MUX6" }, \"IIR" #id " INP2 MUX" , "DEC7" , "ADC MUX7" }, \"IIR" #id " INP2 MUX" , "DEC8" , "ADC MUX8" }, \"IIR" #id " INP2 MUX" , "RX0" , "SLIM RX0" }, \"IIR" #id " INP2 MUX" , "RX1" , "SLIM RX1" }, \"IIR" #id " INP2 MUX" , "RX2" , "SLIM RX2" }, \"IIR" #id " INP2 MUX" , "RX3" , "SLIM RX3" }, \"IIR" #id " INP2 MUX" , "RX4" , "SLIM RX4" }, \"IIR" #id " INP2 MUX" , "RX5" , "SLIM RX5" }, \"IIR" #id " INP2 MUX" , "RX6" , "SLIM RX6" }, \"IIR" #id " INP2 MUX" , "RX7" , "SLIM RX7" }, \"IIR" #id , NULL, "IIR" #id " INP3 MUX" }, \"IIR" #id " INP3 MUX" , "DEC0" , "ADC MUX0" }, \"IIR" #id " INP3 MUX" , "DEC1" , "ADC MUX1" }, \"IIR" #id " INP3 MUX" , "DEC2" , "ADC MUX2" }, \"IIR" #id " INP3 MUX" , "DEC3" , "ADC MUX3" }, \"IIR" #id " INP3 MUX" , "DEC4" , "ADC MUX4" }, \"IIR" #id " INP3 MUX" , "DEC5" , "ADC MUX5" }, \"IIR" #id " INP3 MUX" , "DEC6" , "ADC MUX6" }, \"IIR" #id " INP3 MUX" , "DEC7" , "ADC MUX7" }, \"IIR" #id " INP3 MUX" , "DEC8" , "ADC MUX8" }, \"IIR" #id " INP3 MUX" , "RX0" , "SLIM RX0" }, \"IIR" #id " INP3 MUX" , "RX1" , "SLIM RX1" }, \"IIR" #id " INP3 MUX" , "RX2" , "SLIM RX2" }, \"IIR" #id " INP3 MUX" , "RX3" , "SLIM RX3" }, \"IIR" #id " INP3 MUX" , "RX4" , "SLIM RX4" }, \"IIR" #id " INP3 MUX" , "RX5" , "SLIM RX5" }, \"IIR" #id " INP3 MUX" , "RX6" , "SLIM RX6" }, \"IIR" #id " INP3 MUX" , "RX7" , "SLIM RX7" }#define WCD934X_SLIM_TX_AIF_PATH(id) \"AIF1_CAP Mixer" , "SLIM TX" #id , "SLIM TX" #id }, \"AIF2_CAP Mixer" , "SLIM TX" #id , "SLIM TX" #id }, \"AIF3_CAP Mixer" , "SLIM TX" #id , "SLIM TX" #id }, \"SLIM TX" #id , NULL, "CDC_IF TX" #id " MUX" }#define WCD934X_MAX_MICBIAS MIC_BIAS_4#define NUM_CODEC_DAIS 9 enum {enum {0 ,/* LO3 not avalible in Tavil */ /*INT7 WSA Speakers via soundwire */ /*INT8 WSA Speakers via soundwire */ enum {0 ,enum {0 ,struct wcd934x_slim_ch {struct list_head list;static const struct wcd934x_slim_ch wcd934x_tx_chs[WCD934X_TX_MAX] = {0 ),1 ),2 ),3 ),4 ),5 ),6 ),7 ),8 ),9 ),10 ),11 ),12 ),13 ),14 ),15 ),static const struct wcd934x_slim_ch wcd934x_rx_chs[WCD934X_RX_MAX] = {0 ), /* 16 */ 1 ), /* 17 */ 2 ),3 ),4 ),5 ),6 ),7 ),8 ),9 ),10 ),11 ),12 ),/* Codec supports 2 IIR filters */ enum {0 ,/* Each IIR has 5 Filter Stages */ enum {0 ,enum {/* HPH_L */ /* HPH_R */ /* LO1_DIFF */ /* LO2_DIFF */ /* LO3_SE - not used in Tavil */ /* LO4_SE - not used in Tavil */ /* SWR SPK CH1 */ /* SWR SPK CH2 */ enum {0 ,enum {0 ,struct interp_sample_rate {int sample_rate;int rate_val;static const struct interp_sample_rate sr_val_tbl[] = {8000 , 0 x0},16000 , 0 x1},32000 , 0 x3},48000 , 0 x4},96000 , 0 x5},192000 , 0 x6},384000 , 0 x7},44100 , 0 x9},88200 , 0 xA},176400 , 0 xB},352800 , 0 xC},struct wcd934x_mbhc_zdet_param {struct wcd_slim_codec_dai_data {struct list_head slim_ch_list;struct slim_stream_config sconfig;struct slim_stream_runtime *sruntime;static const struct regmap_range_cfg wcd934x_ifc_ranges[] = {"WCD9335-IFC-DEV" ,0 x0,0 xffff,0 x800,0 xfff,0 ,0 x800,0 x400,static const struct regmap_config wcd934x_ifc_regmap_config = {16 ,8 ,0 xffff,struct wcd934x_codec {struct device *dev;struct clk_hw hw;struct clk *extclk;struct regmap *regmap;struct regmap *if_regmap;struct slim_device *sdev;struct slim_device *sidev;struct wcd_clsh_ctrl *clsh_ctrl;struct snd_soc_component *component;struct wcd934x_slim_ch rx_chs[WCD934X_RX_MAX];struct wcd934x_slim_ch tx_chs[WCD934X_TX_MAX];struct wcd_slim_codec_dai_data dai[NUM_CODEC_DAIS];int rate;int sido_input_src;int dmic_0_1_clk_cnt;int dmic_2_3_clk_cnt;int dmic_4_5_clk_cnt;int dmic_sample_rate;int comp_enabled[COMPANDER_MAX];int sysclk_users;struct mutex sysclk_mutex;/* mbhc module */ struct wcd_mbhc *mbhc;struct wcd_mbhc_config mbhc_cfg;struct wcd_mbhc_intr intr_ids;bool mbhc_started;struct mutex micb_lock;#define to_wcd934x_codec(_hw) container_of(_hw, struct wcd934x_codec, hw)struct wcd_iir_filter_ctl {unsigned int iir_idx;unsigned int band_idx;struct soc_bytes_ext bytes_ext;static const DECLARE_TLV_DB_SCALE(digital_gain, -8400 , 100 , -8400 );static const DECLARE_TLV_DB_SCALE(line_gain, 0 , 7 , 1 );static const DECLARE_TLV_DB_SCALE(analog_gain, 0 , 25 , 1 );static const DECLARE_TLV_DB_SCALE(ear_pa_gain, 0 , 150 , 0 );/* Cutoff frequency for high pass filter */ static const char * const cf_text[] = {"CF_NEG_3DB_4HZ" , "CF_NEG_3DB_75HZ" , "CF_NEG_3DB_150HZ" static const char * const rx_cf_text[] = {"CF_NEG_3DB_4HZ" , "CF_NEG_3DB_75HZ" , "CF_NEG_3DB_150HZ" ,"CF_NEG_3DB_0P48HZ" static const char * const rx_hph_mode_mux_text[] = {"Class H Invalid" , "Class-H Hi-Fi" , "Class-H Low Power" , "Class-AB" ,"Class-H Hi-Fi Low Power" static const char *const slim_rx_mux_text[] = {"ZERO" , "AIF1_PB" , "AIF2_PB" , "AIF3_PB" , "AIF4_PB" ,static const char * const rx_int0_7_mix_mux_text[] = {"ZERO" , "RX0" , "RX1" , "RX2" , "RX3" , "RX4" , "RX5" ,"RX6" , "RX7" , "PROXIMITY" static const char * const rx_int_mix_mux_text[] = {"ZERO" , "RX0" , "RX1" , "RX2" , "RX3" , "RX4" , "RX5" ,"RX6" , "RX7" static const char * const rx_prim_mix_text[] = {"ZERO" , "DEC0" , "DEC1" , "IIR0" , "IIR1" , "RX0" , "RX1" , "RX2" ,"RX3" , "RX4" , "RX5" , "RX6" , "RX7" static const char * const rx_sidetone_mix_text[] = {"ZERO" , "SRC0" , "SRC1" , "SRC_SUM" static const char * const iir_inp_mux_text[] = {"ZERO" , "DEC0" , "DEC1" , "DEC2" , "DEC3" , "DEC4" , "DEC5" , "DEC6" ,"DEC7" , "DEC8" , "RX0" , "RX1" , "RX2" , "RX3" , "RX4" , "RX5" , "RX6" , "RX7" static const char * const rx_int_dem_inp_mux_text[] = {"NORMAL_DSM_OUT" , "CLSH_DSM_OUT" ,static const char * const rx_int0_1_interp_mux_text[] = {"ZERO" , "RX INT0_1 MIX1" ,static const char * const rx_int1_1_interp_mux_text[] = {"ZERO" , "RX INT1_1 MIX1" ,static const char * const rx_int2_1_interp_mux_text[] = {"ZERO" , "RX INT2_1 MIX1" ,static const char * const rx_int3_1_interp_mux_text[] = {"ZERO" , "RX INT3_1 MIX1" ,static const char * const rx_int4_1_interp_mux_text[] = {"ZERO" , "RX INT4_1 MIX1" ,static const char * const rx_int7_1_interp_mux_text[] = {"ZERO" , "RX INT7_1 MIX1" ,static const char * const rx_int8_1_interp_mux_text[] = {"ZERO" , "RX INT8_1 MIX1" ,static const char * const rx_int0_2_interp_mux_text[] = {"ZERO" , "RX INT0_2 MUX" ,static const char * const rx_int1_2_interp_mux_text[] = {"ZERO" , "RX INT1_2 MUX" ,static const char * const rx_int2_2_interp_mux_text[] = {"ZERO" , "RX INT2_2 MUX" ,static const char * const rx_int3_2_interp_mux_text[] = {"ZERO" , "RX INT3_2 MUX" ,static const char * const rx_int4_2_interp_mux_text[] = {"ZERO" , "RX INT4_2 MUX" ,static const char * const rx_int7_2_interp_mux_text[] = {"ZERO" , "RX INT7_2 MUX" ,static const char * const rx_int8_2_interp_mux_text[] = {"ZERO" , "RX INT8_2 MUX" ,static const char * const dmic_mux_text[] = {"ZERO" , "DMIC0" , "DMIC1" , "DMIC2" , "DMIC3" , "DMIC4" , "DMIC5" static const char * const amic_mux_text[] = {"ZERO" , "ADC1" , "ADC2" , "ADC3" , "ADC4" static const char * const amic4_5_sel_text[] = {"AMIC4" , "AMIC5" static const char * const adc_mux_text[] = {"DMIC" , "AMIC" , "ANC_FB_TUNE1" , "ANC_FB_TUNE2" static const char * const cdc_if_tx0_mux_text[] = {"ZERO" , "RX_MIX_TX0" , "DEC0" , "DEC0_192" static const char * const cdc_if_tx1_mux_text[] = {"ZERO" , "RX_MIX_TX1" , "DEC1" , "DEC1_192" static const char * const cdc_if_tx2_mux_text[] = {"ZERO" , "RX_MIX_TX2" , "DEC2" , "DEC2_192" static const char * const cdc_if_tx3_mux_text[] = {"ZERO" , "RX_MIX_TX3" , "DEC3" , "DEC3_192" static const char * const cdc_if_tx4_mux_text[] = {"ZERO" , "RX_MIX_TX4" , "DEC4" , "DEC4_192" static const char * const cdc_if_tx5_mux_text[] = {"ZERO" , "RX_MIX_TX5" , "DEC5" , "DEC5_192" static const char * const cdc_if_tx6_mux_text[] = {"ZERO" , "RX_MIX_TX6" , "DEC6" , "DEC6_192" static const char * const cdc_if_tx7_mux_text[] = {"ZERO" , "RX_MIX_TX7" , "DEC7" , "DEC7_192" static const char * const cdc_if_tx8_mux_text[] = {"ZERO" , "RX_MIX_TX8" , "DEC8" , "DEC8_192" static const char * const cdc_if_tx9_mux_text[] = {"ZERO" , "DEC7" , "DEC7_192" static const char * const cdc_if_tx10_mux_text[] = {"ZERO" , "DEC6" , "DEC6_192" static const char * const cdc_if_tx11_mux_text[] = {"DEC_0_5" , "DEC_9_12" , "MAD_AUDIO" , "MAD_BRDCST" static const char * const cdc_if_tx11_inp1_mux_text[] = {"ZERO" , "DEC0" , "DEC1" , "DEC2" , "DEC3" , "DEC4" ,"DEC5" , "RX_MIX_TX5" , "DEC9_10" , "DEC11_12" static const char * const cdc_if_tx13_mux_text[] = {"CDC_DEC_5" , "MAD_BRDCST" static const char * const cdc_if_tx13_inp1_mux_text[] = {"ZERO" , "DEC5" , "DEC5_192" static const struct soc_enum cf_dec0_enum =5 , 3 , cf_text);static const struct soc_enum cf_dec1_enum =5 , 3 , cf_text);static const struct soc_enum cf_dec2_enum =5 , 3 , cf_text);static const struct soc_enum cf_dec3_enum =5 , 3 , cf_text);static const struct soc_enum cf_dec4_enum =5 , 3 , cf_text);static const struct soc_enum cf_dec5_enum =5 , 3 , cf_text);static const struct soc_enum cf_dec6_enum =5 , 3 , cf_text);static const struct soc_enum cf_dec7_enum =5 , 3 , cf_text);static const struct soc_enum cf_dec8_enum =5 , 3 , cf_text);static const struct soc_enum cf_int0_1_enum =0 , 4 , rx_cf_text);static SOC_ENUM_SINGLE_DECL(cf_int0_2_enum, WCD934X_CDC_RX0_RX_PATH_MIX_CFG, 2 ,static const struct soc_enum cf_int1_1_enum =0 , 4 , rx_cf_text);static SOC_ENUM_SINGLE_DECL(cf_int1_2_enum, WCD934X_CDC_RX1_RX_PATH_MIX_CFG, 2 ,static const struct soc_enum cf_int2_1_enum =0 , 4 , rx_cf_text);static SOC_ENUM_SINGLE_DECL(cf_int2_2_enum, WCD934X_CDC_RX2_RX_PATH_MIX_CFG, 2 ,static const struct soc_enum cf_int3_1_enum =0 , 4 , rx_cf_text);static SOC_ENUM_SINGLE_DECL(cf_int3_2_enum, WCD934X_CDC_RX3_RX_PATH_MIX_CFG, 2 ,static const struct soc_enum cf_int4_1_enum =0 , 4 , rx_cf_text);static SOC_ENUM_SINGLE_DECL(cf_int4_2_enum, WCD934X_CDC_RX4_RX_PATH_MIX_CFG, 2 ,static const struct soc_enum cf_int7_1_enum =0 , 4 , rx_cf_text);static SOC_ENUM_SINGLE_DECL(cf_int7_2_enum, WCD934X_CDC_RX7_RX_PATH_MIX_CFG, 2 ,static const struct soc_enum cf_int8_1_enum =0 , 4 , rx_cf_text);static SOC_ENUM_SINGLE_DECL(cf_int8_2_enum, WCD934X_CDC_RX8_RX_PATH_MIX_CFG, 2 ,static const struct soc_enum rx_hph_mode_mux_enum =static const struct soc_enum slim_rx_mux_enum =static const struct soc_enum rx_int0_2_mux_chain_enum =0 , 10 ,static const struct soc_enum rx_int1_2_mux_chain_enum =0 , 9 ,static const struct soc_enum rx_int2_2_mux_chain_enum =0 , 9 ,static const struct soc_enum rx_int3_2_mux_chain_enum =0 , 9 ,static const struct soc_enum rx_int4_2_mux_chain_enum =0 , 9 ,static const struct soc_enum rx_int7_2_mux_chain_enum =0 , 10 ,static const struct soc_enum rx_int8_2_mux_chain_enum =0 , 9 ,static const struct soc_enum rx_int0_1_mix_inp0_chain_enum =0 , 13 ,static const struct soc_enum rx_int0_1_mix_inp1_chain_enum =4 , 13 ,static const struct soc_enum rx_int0_1_mix_inp2_chain_enum =4 , 13 ,static const struct soc_enum rx_int1_1_mix_inp0_chain_enum =0 , 13 ,static const struct soc_enum rx_int1_1_mix_inp1_chain_enum =4 , 13 ,static const struct soc_enum rx_int1_1_mix_inp2_chain_enum =4 , 13 ,static const struct soc_enum rx_int2_1_mix_inp0_chain_enum =0 , 13 ,static const struct soc_enum rx_int2_1_mix_inp1_chain_enum =4 , 13 ,static const struct soc_enum rx_int2_1_mix_inp2_chain_enum =4 , 13 ,static const struct soc_enum rx_int3_1_mix_inp0_chain_enum =0 , 13 ,static const struct soc_enum rx_int3_1_mix_inp1_chain_enum =4 , 13 ,static const struct soc_enum rx_int3_1_mix_inp2_chain_enum =4 , 13 ,static const struct soc_enum rx_int4_1_mix_inp0_chain_enum =0 , 13 ,static const struct soc_enum rx_int4_1_mix_inp1_chain_enum =4 , 13 ,static const struct soc_enum rx_int4_1_mix_inp2_chain_enum =4 , 13 ,static const struct soc_enum rx_int7_1_mix_inp0_chain_enum =0 , 13 ,static const struct soc_enum rx_int7_1_mix_inp1_chain_enum =4 , 13 ,static const struct soc_enum rx_int7_1_mix_inp2_chain_enum =4 , 13 ,static const struct soc_enum rx_int8_1_mix_inp0_chain_enum =0 , 13 ,static const struct soc_enum rx_int8_1_mix_inp1_chain_enum =4 , 13 ,static const struct soc_enum rx_int8_1_mix_inp2_chain_enum =4 , 13 ,static const struct soc_enum rx_int0_mix2_inp_mux_enum =0 , 4 ,static const struct soc_enum rx_int1_mix2_inp_mux_enum =2 , 4 ,static const struct soc_enum rx_int2_mix2_inp_mux_enum =4 , 4 ,static const struct soc_enum rx_int3_mix2_inp_mux_enum =6 , 4 ,static const struct soc_enum rx_int4_mix2_inp_mux_enum =0 , 4 ,static const struct soc_enum rx_int7_mix2_inp_mux_enum =2 , 4 ,static const struct soc_enum iir0_inp0_mux_enum =0 , 18 , iir_inp_mux_text);static const struct soc_enum iir0_inp1_mux_enum =0 , 18 , iir_inp_mux_text);static const struct soc_enum iir0_inp2_mux_enum =0 , 18 , iir_inp_mux_text);static const struct soc_enum iir0_inp3_mux_enum =0 , 18 , iir_inp_mux_text);static const struct soc_enum iir1_inp0_mux_enum =0 , 18 , iir_inp_mux_text);static const struct soc_enum iir1_inp1_mux_enum =0 , 18 , iir_inp_mux_text);static const struct soc_enum iir1_inp2_mux_enum =0 , 18 , iir_inp_mux_text);static const struct soc_enum iir1_inp3_mux_enum =0 , 18 , iir_inp_mux_text);static const struct soc_enum rx_int0_dem_inp_mux_enum =0 ,static const struct soc_enum rx_int1_dem_inp_mux_enum =0 ,static const struct soc_enum rx_int2_dem_inp_mux_enum =0 ,static const struct soc_enum tx_adc_mux0_enum =0 ,static const struct soc_enum tx_adc_mux1_enum =0 ,static const struct soc_enum tx_adc_mux2_enum =0 ,static const struct soc_enum tx_adc_mux3_enum =0 ,static const struct soc_enum tx_adc_mux4_enum =2 ,static const struct soc_enum tx_adc_mux5_enum =2 ,static const struct soc_enum tx_adc_mux6_enum =2 ,static const struct soc_enum tx_adc_mux7_enum =2 ,static const struct soc_enum tx_adc_mux8_enum =4 ,static const struct soc_enum rx_int0_1_interp_mux_enum =0 , 2 ,static const struct soc_enum rx_int1_1_interp_mux_enum =0 , 2 ,static const struct soc_enum rx_int2_1_interp_mux_enum =0 , 2 ,static const struct soc_enum rx_int3_1_interp_mux_enum =0 , 2 , rx_int3_1_interp_mux_text);static const struct soc_enum rx_int4_1_interp_mux_enum =0 , 2 , rx_int4_1_interp_mux_text);static const struct soc_enum rx_int7_1_interp_mux_enum =0 , 2 , rx_int7_1_interp_mux_text);static const struct soc_enum rx_int8_1_interp_mux_enum =0 , 2 , rx_int8_1_interp_mux_text);static const struct soc_enum rx_int0_2_interp_mux_enum =0 , 2 , rx_int0_2_interp_mux_text);static const struct soc_enum rx_int1_2_interp_mux_enum =0 , 2 , rx_int1_2_interp_mux_text);static const struct soc_enum rx_int2_2_interp_mux_enum =0 , 2 , rx_int2_2_interp_mux_text);static const struct soc_enum rx_int3_2_interp_mux_enum =0 , 2 , rx_int3_2_interp_mux_text);static const struct soc_enum rx_int4_2_interp_mux_enum =0 , 2 , rx_int4_2_interp_mux_text);static const struct soc_enum rx_int7_2_interp_mux_enum =0 , 2 , rx_int7_2_interp_mux_text);static const struct soc_enum rx_int8_2_interp_mux_enum =0 , 2 , rx_int8_2_interp_mux_text);static const struct soc_enum tx_dmic_mux0_enum =3 , 7 ,static const struct soc_enum tx_dmic_mux1_enum =3 , 7 ,static const struct soc_enum tx_dmic_mux2_enum =3 , 7 ,static const struct soc_enum tx_dmic_mux3_enum =3 , 7 ,static const struct soc_enum tx_dmic_mux4_enum =3 , 7 ,static const struct soc_enum tx_dmic_mux5_enum =3 , 7 ,static const struct soc_enum tx_dmic_mux6_enum =3 , 7 ,static const struct soc_enum tx_dmic_mux7_enum =3 , 7 ,static const struct soc_enum tx_dmic_mux8_enum =3 , 7 ,static const struct soc_enum tx_amic_mux0_enum =0 , 5 ,static const struct soc_enum tx_amic_mux1_enum =0 , 5 ,static const struct soc_enum tx_amic_mux2_enum =0 , 5 ,static const struct soc_enum tx_amic_mux3_enum =0 , 5 ,static const struct soc_enum tx_amic_mux4_enum =0 , 5 ,static const struct soc_enum tx_amic_mux5_enum =0 , 5 ,static const struct soc_enum tx_amic_mux6_enum =0 , 5 ,static const struct soc_enum tx_amic_mux7_enum =0 , 5 ,static const struct soc_enum tx_amic_mux8_enum =0 , 5 ,static const struct soc_enum tx_amic4_5_enum =7 , 2 , amic4_5_sel_text);static const struct soc_enum cdc_if_tx0_mux_enum =0 ,static const struct soc_enum cdc_if_tx1_mux_enum =2 ,static const struct soc_enum cdc_if_tx2_mux_enum =4 ,static const struct soc_enum cdc_if_tx3_mux_enum =6 ,static const struct soc_enum cdc_if_tx4_mux_enum =0 ,static const struct soc_enum cdc_if_tx5_mux_enum =2 ,static const struct soc_enum cdc_if_tx6_mux_enum =4 ,static const struct soc_enum cdc_if_tx7_mux_enum =6 ,static const struct soc_enum cdc_if_tx8_mux_enum =0 ,static const struct soc_enum cdc_if_tx9_mux_enum =2 ,static const struct soc_enum cdc_if_tx10_mux_enum =4 ,static const struct soc_enum cdc_if_tx11_inp1_mux_enum =0 ,static const struct soc_enum cdc_if_tx11_mux_enum =0 ,static const struct soc_enum cdc_if_tx13_inp1_mux_enum =4 ,static const struct soc_enum cdc_if_tx13_mux_enum =0 ,static const struct wcd_mbhc_field wcd_mbhc_fields[WCD_MBHC_REG_FUNC_MAX] = {0 x80),0 x40),0 x20),0 x30),0 x08),0 xC0),0 x04),0 x10),0 x08),0 x01),0 x06),0 x80),0 x0F),0 x03),0 x03),0 x08),0 x10),0 x20),0 x80),0 x40),0 x10),0 x07),0 x70),0 xFF),0 xC0),0 xFF),0 x40),0 x80),0 xC0),0 x10),0 x02),0 x01),0 x70),0 x20),0 x40),0 x10),0 x01),0 x01),0 x04),0 x08),0 x08),0 x40),0 x80),0 xFF),0 x3F),0 x10),0 x04),0 x02),static int wcd934x_set_sido_input_src(struct wcd934x_codec *wcd, int sido_src)if (sido_src == wcd->sido_input_src)return 0 ;if (sido_src == SIDO_SOURCE_RCO_BG) {100 , 110 );return 0 ;static int wcd934x_enable_ana_bias_and_sysclk(struct wcd934x_codec *wcd)if (++wcd->sysclk_users != 1 ) {return 0 ;/* * 1 ms delay is required after pre - charge is enabled * as per HW requirement 1000 , 1100 );0 );0 );/* * In data clock contrl register is changed * to CLK_SYS_MCLK_PRG 0 x0);/* * 10 us sleep is required after clock is enabled * as per HW requirement 10 , 15 );return 0 ;static int wcd934x_disable_ana_bias_and_syclk(struct wcd934x_codec *wcd)if (--wcd->sysclk_users != 0 ) {return 0 ;0 x0);0 );0 );return 0 ;static int __wcd934x_cdc_mclk_enable(struct wcd934x_codec *wcd, bool enable)int ret = 0 ;if (enable) {if (ret) {"%s: ext clk enable failed\n" ,return ret;else {int val;/* Don't disable clock if soundwire using it.*/ if (val & WCD934X_CDC_SWR_CLK_EN_MASK)return 0 ;return ret;static int wcd934x_codec_enable_mclk(struct snd_soc_dapm_widget *w,struct snd_kcontrol *kc, int event)struct snd_soc_component *comp = snd_soc_dapm_to_component(w->dapm);struct wcd934x_codec *wcd = dev_get_drvdata(comp->dev);switch (event) {case SND_SOC_DAPM_PRE_PMU:return __wcd934x_cdc_mclk_enable(wcd, true );case SND_SOC_DAPM_POST_PMD:return __wcd934x_cdc_mclk_enable(wcd, false );return 0 ;static int wcd934x_get_version(struct wcd934x_codec *wcd)int val1, val2, ver, ret;struct regmap *regmap;0 ;0 ;sizeof (u16));if (ret)return ret;0 x80)) << DSD_DISABLED_MASK;0 x01)) << SLNQ_DISABLED_MASK;switch (version_mask) {case DSD_DISABLED | SLNQ_DISABLED:if (id_minor == 0 )else if (id_minor == 0 x01)break ;case SLNQ_DISABLED:if (id_minor == 0 )else if (id_minor == 0 x01)break ;"WCD934X Minor:0x%x Version:0x%x\n" , id_minor, ver);return 0 ;static void wcd934x_enable_efuse_sensing(struct wcd934x_codec *wcd)int rc, val;true );/* * 5 ms sleep required after enabling efuse control * before checking the status . 5000 , 5500 );if (rc || (!(val & 0 x01)))1 , "%s: Efuse sense is not complete val=%x, ret=%d\n" ,false );static int wcd934x_swrm_clock(struct wcd934x_codec *wcd, bool enable)if (enable) {true );else {0 );false );return 0 ;static int wcd934x_set_prim_interpolator_rate(struct snd_soc_dai *dai,struct snd_soc_component *comp = dai->component;struct wcd934x_codec *wcd = dev_get_drvdata(comp->dev);struct wcd934x_slim_ch *ch;int inp, j;/* * Loop through all interpolator MUX inputs and find out * to which interpolator input , the slim rx port * is connected for (j = 0 ; j < WCD934X_NUM_INTERPOLATORS; j++) {/* Interpolators 5 and 6 are not aviliable in Tavil */ if (j == INTERP_LO3_NA || j == INTERP_LO4_NA)continue ;4 ) &4 ) &if ((inp0_sel == inp) || (inp1_sel == inp) ||/* rate is in Hz */ /* * Ear and speaker primary path does not support * native sample rates if ((j == INTERP_EAR || j == INTERP_SPKR1 ||44100 )"Cannot set 44.1KHz on INT%d\n" ,else return 0 ;static int wcd934x_set_mix_interpolator_rate(struct snd_soc_dai *dai,int rate_val, u32 rate)struct snd_soc_component *component = dai->component;struct wcd934x_codec *wcd = dev_get_drvdata(component->dev);struct wcd934x_slim_ch *ch;int val, j;for (j = 0 ; j < WCD934X_NUM_INTERPOLATORS; j++) {/* Interpolators 5 and 6 are not aviliable in Tavil */ if (j == INTERP_LO3_NA || j == INTERP_LO4_NA)continue ;if (val == (ch->shift + INTn_2_INP_SEL_RX0)) {/* * Ear mix path supports only 48 , 96 , 192 , * 384 KHz only if ((j == INTERP_EAR) &&0 x4 ||0 x7)) {"Invalid rate for AIF_PB DAI(%d)\n" ,return -EINVAL;return 0 ;static int wcd934x_set_interpolator_rate(struct snd_soc_dai *dai,int rate_val = 0 ;int i, ret;for (i = 0 ; i < ARRAY_SIZE(sr_val_tbl); i++) {if (sample_rate == sr_val_tbl[i].sample_rate) {break ;if ((i == ARRAY_SIZE(sr_val_tbl)) || (rate_val < 0 )) {"Unsupported sample rate: %d\n" , sample_rate);return -EINVAL;if (ret)return ret;return ret;static int wcd934x_set_decimator_rate(struct snd_soc_dai *dai,struct snd_soc_component *comp = dai->component;struct wcd934x_codec *wcd = snd_soc_component_get_drvdata(comp);0 , shift_val = 0 , tx_mux_sel;struct wcd934x_slim_ch *ch;int tx_port, tx_port_reg;int decimator = -1 ;/* Find the SB TX MUX input - which decimator is connected */ switch (tx_port) {case 0 ... 3 :1 );0 x03;break ;case 4 ... 7 :4 ) << 1 );0 x03;break ;case 8 ... 10 :8 ) << 1 );0 x03;break ;case 11 :0 ;0 x0F;break ;case 13 :4 ;0 x03;break ;default :"Invalid SLIM TX%u port DAI ID:%d\n" ,return -EINVAL;switch (tx_port) {case 0 ... 8 :if ((tx_mux_sel == 0 x2) || (tx_mux_sel == 0 x3))break ;case 9 ... 10 :if ((tx_mux_sel == 0 x1) || (tx_mux_sel == 0 x2))9 ) ? 7 : 6 );break ;case 11 :if ((tx_mux_sel >= 1 ) && (tx_mux_sel < 7 ))1 ;break ;case 13 :if ((tx_mux_sel == 0 x1) || (tx_mux_sel == 0 x2))5 ;break ;default :"ERROR: Invalid tx_port: %d\n" ,return -EINVAL;return 0 ;static int wcd934x_slim_set_hw_params(struct wcd934x_codec *wcd,struct wcd_slim_codec_dai_data *dai_data,int direction)struct list_head *slim_ch_list = &dai_data->slim_ch_list;struct slim_stream_config *cfg = &dai_data->sconfig;struct wcd934x_slim_ch *ch;0 ;int ret, i;0 ;0 ;/* Configure slave interface device */ 1 << ch->shift;sizeof (unsigned int ), GFP_KERNEL);if (!cfg->chs)return -ENOMEM;0 ;if (direction == SNDRV_PCM_STREAM_PLAYBACK) {/* write to interface device */ if (ret < 0 )goto err;/* configure the slave port for water mark and enable*/ if (ret < 0 )goto err;else {0 x00FF);if (ret < 0 )goto err;/* ports 8,9 */ 0 xFF00) >> 8 );if (ret < 0 )goto err;/* configure the slave port for water mark and enable*/ if (ret < 0 )goto err;"WCD934x-SLIM" );return 0 ;"Error Setting slim hw params\n" );return ret;static int wcd934x_hw_params(struct snd_pcm_substream *substream,struct snd_pcm_hw_params *params,struct snd_soc_dai *dai)struct wcd934x_codec *wcd;int ret, tx_fs_rate = 0 ;switch (substream->stream) {case SNDRV_PCM_STREAM_PLAYBACK:if (ret) {"cannot set sample rate: %u\n" ,return ret;switch (params_width(params)) {case 16 ... 24 :break ;default :"Invalid format 0x%x\n" ,return -EINVAL;break ;case SNDRV_PCM_STREAM_CAPTURE:switch (params_rate(params)) {case 8000 :0 ;break ;case 16000 :1 ;break ;case 32000 :3 ;break ;case 48000 :4 ;break ;case 96000 :5 ;break ;case 192000 :6 ;break ;case 384000 :7 ;break ;default :"Invalid TX sample rate: %d\n" ,return -EINVAL;if (ret < 0 ) {"Cannot set TX Decimator rate\n" );return ret;switch (params_width(params)) {case 16 ... 32 :break ;default :"Invalid format 0x%x\n" ,return -EINVAL;break ;default :"Invalid stream type %d\n" ,return -EINVAL;return wcd934x_slim_set_hw_params(wcd, &wcd->dai[dai->id], substream->stream);static int wcd934x_hw_free(struct snd_pcm_substream *substream,struct snd_soc_dai *dai)struct wcd_slim_codec_dai_data *dai_data;struct wcd934x_codec *wcd;return 0 ;static int wcd934x_trigger(struct snd_pcm_substream *substream, int cmd,struct snd_soc_dai *dai)struct wcd_slim_codec_dai_data *dai_data;struct wcd934x_codec *wcd;struct slim_stream_config *cfg;switch (cmd) {case SNDRV_PCM_TRIGGER_START:case SNDRV_PCM_TRIGGER_RESUME:case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:break ;case SNDRV_PCM_TRIGGER_STOP:case SNDRV_PCM_TRIGGER_SUSPEND:case SNDRV_PCM_TRIGGER_PAUSE_PUSH:break ;default :break ;return 0 ;static int wcd934x_set_channel_map(struct snd_soc_dai *dai,unsigned int tx_num,const unsigned int *tx_slot,unsigned int rx_num,const unsigned int *rx_slot)struct wcd934x_codec *wcd;int i;if (tx_num > WCD934X_TX_MAX || rx_num > WCD934X_RX_MAX) {"Invalid tx %d or rx %d channel count\n" ,return -EINVAL;if (!tx_slot || !rx_slot) {"Invalid tx_slot=%p, rx_slot=%p\n" ,return -EINVAL;for (i = 0 ; i < rx_num; i++) {for (i = 0 ; i < tx_num; i++) {return 0 ;static int wcd934x_get_channel_map(const struct snd_soc_dai *dai,unsigned int *tx_num, unsigned int *tx_slot,unsigned int *rx_num, unsigned int *rx_slot)struct wcd934x_slim_ch *ch;struct wcd934x_codec *wcd;int i = 0 ;switch (dai->id) {case AIF1_PB:case AIF2_PB:case AIF3_PB:case AIF4_PB:if (!rx_slot || !rx_num) {"Invalid rx_slot %p or rx_num %p\n" ,return -EINVAL;break ;case AIF1_CAP:case AIF2_CAP:case AIF3_CAP:if (!tx_slot || !tx_num) {"Invalid tx_slot %p or tx_num %p\n" ,return -EINVAL;break ;default :"Invalid DAI ID %x\n" , dai->id);break ;return 0 ;static const struct snd_soc_dai_ops wcd934x_dai_ops = {static struct snd_soc_dai_driver wcd934x_slim_dais[] = {0 ] = {"wcd934x_rx1" ,"AIF1 Playback" ,192000 ,8000 ,1 ,2 ,1 ] = {"wcd934x_tx1" ,"AIF1 Capture" ,8000 ,192000 ,1 ,4 ,2 ] = {"wcd934x_rx2" ,"AIF2 Playback" ,8000 ,192000 ,1 ,2 ,3 ] = {"wcd934x_tx2" ,"AIF2 Capture" ,8000 ,192000 ,1 ,4 ,4 ] = {"wcd934x_rx3" ,"AIF3 Playback" ,8000 ,192000 ,1 ,2 ,5 ] = {"wcd934x_tx3" ,"AIF3 Capture" ,8000 ,192000 ,1 ,4 ,6 ] = {"wcd934x_rx4" ,"AIF4 Playback" ,8000 ,192000 ,1 ,2 ,static int swclk_gate_enable(struct clk_hw *hw)return wcd934x_swrm_clock(to_wcd934x_codec(hw), true );static void swclk_gate_disable(struct clk_hw *hw)false );static int swclk_gate_is_enabled(struct clk_hw *hw)struct wcd934x_codec *wcd = to_wcd934x_codec(hw);int ret, val;return ret;static unsigned long swclk_recalc_rate(struct clk_hw *hw,unsigned long parent_rate)return parent_rate / 2 ;static const struct clk_ops swclk_gate_ops = {static struct clk *wcd934x_register_mclk_output(struct wcd934x_codec *wcd)struct clk *parent = wcd->extclk;struct device *dev = wcd->dev;struct device_node *np = dev->parent->of_node;const char *parent_clk_name = NULL;const char *clk_name = "mclk" ;struct clk_hw *hw;struct clk_init_data init;int ret;if (of_property_read_u32(np, "clock-frequency" , &wcd->rate))return NULL;"clock-output-names" , &clk_name);0 ;1 ;if (ret)return ERR_PTR(ret);if (ret)return ERR_PTR(ret);return NULL;static int wcd934x_get_micbias_val(struct device *dev, const char *micbias,int mv;if (of_property_read_u32(dev->parent->of_node, micbias, &mv)) {"%s value not found, using default\n" , micbias);else {/* convert it to milli volts */ 1000 ;if (mv < 1000 || mv > 2850 ) {"%s value not in valid range, using default\n" ,if (micb_mv)return (mv - 1000 ) / 50 ;static int wcd934x_init_dmic(struct snd_soc_component *comp)int vout_ctl_1, vout_ctl_2, vout_ctl_3, vout_ctl_4;struct wcd934x_codec *wcd = dev_get_drvdata(comp->dev);"qcom,micbias1-microvolt" , NULL);"qcom,micbias2-microvolt" ,"qcom,micbias3-microvolt" , NULL);"qcom,micbias4-microvolt" , NULL);if (wcd->rate == WCD934X_MCLK_CLK_9P6MHZ)else 0 ;0 x0C, dmic_clk_drv << 2 );return 0 ;static void wcd934x_hw_init(struct wcd934x_codec *wcd)struct regmap *rm = wcd->regmap;/* set SPKR rate to FS_2P4_3P072 */ 0 x08, 0 x08);0 x08, 0 x08);/* Take DMICs out of reset */ 0 x80, 0 x00);static int wcd934x_comp_init(struct snd_soc_component *component)struct wcd934x_codec *wcd = dev_get_drvdata(component->dev);return 0 ;static irqreturn_t wcd934x_slim_irq_handler(int irq, void *data)struct wcd934x_codec *wcd = data;unsigned long status = 0 ;unsigned int i, j, port_id;unsigned int val, int_val = 0 ;bool tx;unsigned short reg = 0 ;for (i = WCD934X_SLIM_PGD_PORT_INT_STATUS_RX_0, j = 0 ;8 * j));32 ) {false ;if (j >= 16 ) {true ;16 ;if (val) {if (!tx)8 );else 8 );if (val & WCD934X_SLIM_IRQ_OVERFLOW)"overflow error on %s port %d, value %x\n" ,"TX" : "RX" ), port_id, val);if (val & WCD934X_SLIM_IRQ_UNDERFLOW)"underflow error on %s port %d, value %x\n" ,"TX" : "RX" ), port_id, val);if ((val & WCD934X_SLIM_IRQ_OVERFLOW) ||if (!tx)8 );else 8 );if (int_val & (1 << (port_id % 8 ))) {1 << (port_id % 8 ));if (val & WCD934X_SLIM_IRQ_PORT_CLOSED)"Port Closed %s port %d, value %x\n" ,"TX" : "RX" ), port_id, val);8 ),8 ));return ret;static void wcd934x_mbhc_clk_setup(struct snd_soc_component *component,bool enable)static void wcd934x_mbhc_mbhc_bias_control(struct snd_soc_component *component,bool enable)static void wcd934x_mbhc_program_btn_thr(struct snd_soc_component *component,int *btn_low, int *btn_high,int num_btn, bool is_micbias)int i, vth;if (num_btn > WCD_MBHC_DEF_BUTTONS) {"%s: invalid number of buttons: %d\n" ,return ;for (i = 0 ; i < num_btn; i++) {2 ) / 25 ) & 0 x3F;static bool wcd934x_mbhc_micb_en_status(struct snd_soc_component *component, int micb_num)if (micb_num == MIC_BIAS_2) {if (val == WCD934X_MICB_ENABLE)return true ;return false ;static void wcd934x_mbhc_hph_l_pull_up_control(struct snd_soc_component *component,enum mbhc_hs_pullup_iref pull_up_cur)/* Default pull up current to 2uA */ if (pull_up_cur < I_OFF || pull_up_cur > I_3P0_UA ||static int wcd934x_micbias_control(struct snd_soc_component *component,int micb_num, int req, bool is_dapm)struct wcd934x_codec *wcd934x = snd_soc_component_get_drvdata(component);int micb_index = micb_num - 1 ;switch (micb_num) {case MIC_BIAS_1:break ;case MIC_BIAS_2:break ;case MIC_BIAS_3:break ;case MIC_BIAS_4:break ;default :"%s: Invalid micbias number: %d\n" ,return -EINVAL;switch (req) {case MICB_PULLUP_ENABLE:if ((wcd934x->pullup_ref[micb_index] == 1 ) &&0 ))break ;case MICB_PULLUP_DISABLE:if (wcd934x->pullup_ref[micb_index] > 0 )if ((wcd934x->pullup_ref[micb_index] == 0 ) &&0 ))0 );break ;case MICB_ENABLE:if (wcd934x->micb_ref[micb_index] == 1 ) {if (micb_num == MIC_BIAS_2)if (micb_num == MIC_BIAS_2 && is_dapm)break ;case MICB_DISABLE:if (wcd934x->micb_ref[micb_index] > 0 )if ((wcd934x->micb_ref[micb_index] == 0 ) &&0 ))else if ((wcd934x->micb_ref[micb_index] == 0 ) &&0 )) {if (micb_num == MIC_BIAS_2)0 );if (micb_num == MIC_BIAS_2)if (is_dapm && micb_num == MIC_BIAS_2)break ;return 0 ;static int wcd934x_mbhc_request_micbias(struct snd_soc_component *component,int micb_num, int req)struct wcd934x_codec *wcd = dev_get_drvdata(component->dev);int ret;if (req == MICB_ENABLE)true );false );if (req == MICB_DISABLE)false );return ret;static void wcd934x_mbhc_micb_ramp_control(struct snd_soc_component *component,bool enable)if (enable) {0 x3);1 );else {0 );0 );static int wcd934x_get_micb_vout_ctl_val(u32 micb_mv)/* min micbias voltage is 1V and maximum is 2.85V */ if (micb_mv < 1000 || micb_mv > 2850 )return -EINVAL;return (micb_mv - 1000 ) / 50 ;static int wcd934x_mbhc_micb_adjust_voltage(struct snd_soc_component *component,int req_volt, int micb_num)struct wcd934x_codec *wcd934x = snd_soc_component_get_drvdata(component);int cur_vout_ctl, req_vout_ctl, micb_reg, micb_en, ret = 0 ;switch (micb_num) {case MIC_BIAS_1:break ;case MIC_BIAS_2:break ;case MIC_BIAS_3:break ;case MIC_BIAS_4:break ;default :return -EINVAL;/* * If requested micbias voltage is same as current micbias * voltage , then just return . Otherwise , adjust voltage as * per requested value . If micbias is already enabled , then * to avoid slow micbias ramp - up or down enable pull - up * momentarily , change the micbias value and then re - enable * micbias . if (req_vout_ctl < 0 ) {goto exit ;if (cur_vout_ctl == req_vout_ctl) {0 ;goto exit ;if (micb_en == WCD934X_MICB_ENABLE)if (micb_en == WCD934X_MICB_ENABLE) {/* * Add 2 ms delay as per HW requirement after enabling * micbias 2000 , 2100 );exit :return ret;static int wcd934x_mbhc_micb_ctrl_threshold_mic(struct snd_soc_component *component,int micb_num, bool req_en)struct wcd934x_codec *wcd934x = snd_soc_component_get_drvdata(component);int rc, micb_mv;if (micb_num != MIC_BIAS_2)return -EINVAL;/* * If device tree micbias level is already above the minimum * voltage needed to detect threshold microphone , then do * not change the micbias , just return . if (wcd934x->micb2_mv >= WCD_MBHC_THR_HS_MICB_MV)return 0 ;return rc;static void wcd934x_mbhc_get_result_params(struct wcd934x_codec *wcd934x,int i;int val, val1;static const int minCode_param[] = {3277 , 1639 , 820 , 410 , 205 , 103 , 52 , 26 0 x20, 0 x20);for (i = 0 ; i < WCD934X_ZDET_NUM_MEASUREMENTS; i++) {if (val & 0 x80)break ;0 x8;0 x20, 0 x00);/* If ramp is not complete, give additional 5ms */ if ((c1 < 2 ) && x1)5000 , 5050 );if (!c1 || !x1) {"%s: Impedance detect ramp error, c1=%d, x1=0x%x\n" ,goto ramp_down;1 << (14 - noff));if (denom > 0 )1000 ) / denom;else if (x1 < minCode_param[noff])"%s: d1=%d, c1=%d, x1=0x%x, z_val=%di (milliohm)\n" ,0 ;while (x1) {0 x08;if (i == WCD934X_ZDET_NUM_MEASUREMENTS)break ;static void wcd934x_mbhc_zdet_ramp(struct snd_soc_component *component,struct wcd934x_mbhc_zdet_param *zdet_param,struct wcd934x_codec *wcd934x = dev_get_drvdata(component->dev);0 ;0 x0F, zdet_param->nshift);if (!zl)goto z_right;/* Start impedance measurement for HPH_L */ 0 x80, 0 x80);0 x80, 0 x00);if (!zr)return ;/* Start impedance measurement for HPH_R */ 0 x40, 0 x40);0 x40, 0 x00);static void wcd934x_wcd_mbhc_qfuse_cal(struct snd_soc_component *component,int flag_l_r)int q1_cal;if (*z_val < (WCD934X_ZDET_VAL_400/1000 ))2 * flag_l_r));else 2 * flag_l_r));if (q1 & 0 x80)10000 - ((q1 & 0 x7F) * 25 ));else 10000 + (q1 * 25 ));if (q1_cal > 0 )10000 ) / q1_cal;static void wcd934x_wcd_mbhc_calc_impedance(struct snd_soc_component *component,struct wcd934x_codec *wcd934x = dev_get_drvdata(component->dev);int zMono, z_diff1, z_diff2;bool is_fsm_disable = false ;struct wcd934x_mbhc_zdet_param zdet_param[] = {4 , 0 , 4 , 0 x08, 0 x14, 0 x18}, /* < 32ohm */ 2 , 0 , 3 , 0 x18, 0 x7C, 0 x90}, /* 32ohm < Z < 400ohm */ 1 , 4 , 5 , 0 x18, 0 x7C, 0 x90}, /* 400ohm < Z < 1200ohm */ 1 , 6 , 7 , 0 x18, 0 x7C, 0 x90}, /* >1200ohm */ struct wcd934x_mbhc_zdet_param *zdet_param_ptr = NULL;4 ] = {0 , 30 , 90 , 30 },0 , 30 , 30 , 5 },0 , 30 , 30 , 5 },0 , 30 , 30 , 5 },if (snd_soc_component_read(component, WCD934X_ANA_MBHC_ELECT) & 0 x80) {true ;0 x80, 0 x00);/* For NO-jack, disable L_DET_EN before Z-det measurements */ if (wcd934x->mbhc_cfg.hphl_swh)0 x80, 0 x00);/* Turn off 100k pull down on HPHL */ 0 x01, 0 x00);/* First get impedance on Left */ 1 ];1 ];if (!WCD934X_MBHC_IS_SECOND_RAMP_REQUIRED(z1L))goto left_ch_impedance;/* Second ramp for left ch */ if (z1L < WCD934X_ZDET_VAL_32) {0 ];0 ];else if ((z1L > WCD934X_ZDET_VAL_400) &&2 ];2 ];else if (z1L > WCD934X_ZDET_VAL_1200) {3 ];3 ];if ((z1L == WCD934X_ZDET_FLOATING_IMPEDANCE) ||1 ];1 ];else {1000 ;0 );"%s: impedance on HPH_L = %d(ohms)\n" ,/* Start of right impedance ramp and calculation */ if (WCD934X_MBHC_IS_SECOND_RAMP_REQUIRED(z1R)) {if (((z1R > WCD934X_ZDET_VAL_1200) &&0 x6)) ||goto right_ch_impedance;/* Second ramp for right ch */ if (z1R < WCD934X_ZDET_VAL_32) {0 ];0 ];else if ((z1R > WCD934X_ZDET_VAL_400) &&2 ];2 ];else if (z1R > WCD934X_ZDET_VAL_1200) {3 ];3 ];if ((z1R == WCD934X_ZDET_FLOATING_IMPEDANCE) ||else {1000 ;1 );"%s: impedance on HPH_R = %d(ohms)\n" ,/* Mono/stereo detection */ if ((*zl == WCD934X_ZDET_FLOATING_IMPEDANCE) &&"%s: plug type is invalid or extension cable\n" ,goto zdet_complete;if ((*zl == WCD934X_ZDET_FLOATING_IMPEDANCE) ||"%s: Mono plug type with one ch floating or shorted to GND\n" ,goto zdet_complete;1 );1 );if (*zl < (WCD934X_ZDET_VAL_32/1000 ))0 ], &z1Ls, NULL, d1);else 1 ], &z1Ls, NULL, d1);0 );0 );1000 ;0 );/* Parallel of left Z and 9 ohm pull down resistor */ 9 ) / ((*zl) + 9 );if ((z_diff1 * (*zl + z1Ls)) > (z_diff2 * (z1Ls + zMono))) {0 -onlyelse {#nclude init>100 down on *0 0 x01;For jack -L_DET_ENafter Zdetmeasurements if wcd934x-mbhc_cfghphl_swh)0 x80;64 out of bounds for length 64if (is_fsm_disable)0 x80, 0 x80);x ,0023 x0039 ,if { 0 }java.lang.StringIndexOutOfBoundsException: Index 18 out of bounds for length 18{ x0064,0 x0000}else 0 ;0 )0 ,0 ,static 0 0 ,0 }0 0 x0002}0 x0000}static int x0080}0 ,0 x0000,struct snd_soc_component component snd_soc_kcontrol_component();0 ,0 }return 0 ;static int wcd934x_hph_impedance_get(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_value *ucontrol)bool hphr;struct soc_mixer_control *mc;struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);struct wcd934x_codec *wcd = snd_soc_component_get_drvdata(component);struct soc_mixer_control *)(kcontrol->private_value);"%s: zl=%u(ohms), zr=%u(ohms)\n" , __func__, zl, zr);0 ] = hphr ? zr : zl;return 0 ;static const struct snd_kcontrol_new hph_type_detect_controls[] = {"HPH Type" , 0 , 0 , WCD_MBHC_HPH_STEREO, 0 ,static const struct snd_kcontrol_new impedance_detect_controls[] = {"HPHL Impedance" , 0 , 0 , INT_MAX, 0 ,"HPHR Impedance" , 0 , 1 , INT_MAX, 0 ,static int wcd934x_mbhc_init(struct snd_soc_component *component)struct wcd934x_ddata *data = dev_get_drvdata(component->dev->parent);struct wcd934x_codec *wcd = snd_soc_component_get_drvdata(component);struct wcd_mbhc_intr *intr_ids = &wcd->intr_ids;true );if (IS_ERR(wcd->mbhc)) {return -EINVAL;return 0 ;static void wcd934x_mbhc_deinit(struct snd_soc_component *component)struct wcd934x_codec *wcd = snd_soc_component_get_drvdata(component);if (!wcd->mbhc)return ;static int wcd934x_comp_probe(struct snd_soc_component *component)struct wcd934x_codec *wcd = dev_get_drvdata(component->dev);int i;/* Class-H Init*/ if (IS_ERR(wcd->clsh_ctrl))return PTR_ERR(wcd->clsh_ctrl);/* Default HPH Mode to Class-H Low HiFi */ for (i = 0 ; i < NUM_CODEC_DAIS; i++)if (wcd934x_mbhc_init(component))"Failed to Initialize MBHC\n" );return 0 ;static void wcd934x_comp_remove(struct snd_soc_component *comp)struct wcd934x_codec *wcd = dev_get_drvdatastatic int 0 0 ,0 ,struct wcd934x_codec{ 0 ,int val{x01e0,0 ,if 0 ,0 x0000,0 x0048}int 0 ,0 x0005,0 ,0 int ,b2_reg/* Address does not automatically update if reading */ 0 ,0 )java.lang.StringIndexOutOfBoundsException: Range [31, 32) out of bounds for length 310 ,0 }8 ;0 }2 0 ;16 ;case 8 _:24 );return value;static void set_iir_band_coeff(struct snd_soc_component *component,int iir_idx, int band_idx, uint32_t value)int reg = WCD934X_CDC_SIDETONE_IIR0_IIR_COEF_B2_CTL + 16 * iir_idx;0 xFF));8 ) & 0 xFF);16 ) & 0 xFF);/* Mask top 2 bits, 7-8 are reserved */ 24 ) & 0 x3F);static int wcd934x_put_iir_band_audio_mixer(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_value *ucontrol)struct snd_soc_component *component =struct wcd_iir_filter_ctl *ctl =struct wcd_iir_filter_ctl *)kcontrol->private_value;struct soc_bytes_ext *params = &ctl->bytes_ext;int iir_idx = ctl->iir_idx;int band_idx = ctl->band_idx;int reg = WCD934X_CDC_SIDETONE_IIR0_IIR_COEF_B1_CTL + 16 * iir_idx;0 ], ucontrol->value.bytes.data, params->max);/* Mask top bit it is reserved */ /* Updates addr automatically for each B2 write */ sizeof (uint32_t)) & 0 x7F);0 ]);1 ]);2 ]);3 ]);4 ]);return 0 ;static int wcd934x_get_iir_band_audio_mixer(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_value *ucontrol)struct snd_soc_component *component =struct wcd_iir_filter_ctl *ctl =struct wcd_iir_filter_ctl *)kcontrol->private_value;struct soc_bytes_ext *params = &ctl->bytes_ext;int iir_idx = ctl->iir_idx;int band_idx = ctl->band_idx;0 ] = get_iir_band_coeff(component, iir_idx, band_idx, 0 );1 ] = get_iir_band_coeff(component, iir_idx, band_idx, 1 );2 ] = get_iir_band_coeff(component, iir_idx, band_idx, 2 );3 ] = get_iir_band_coeff(component, iir_idx, band_idx, 3 );4 ] = get_iir_band_coeff(component, iir_idx, band_idx, 4 );true return 0 ;static RT5668_HPL_GAIN:case :case case RT5668_PWR_MIXER0 java.lang.StringIndexOutOfBoundsException: Index 10 out of bounds for length 10 1case RT5668_PLL2_CTRL_4:int case RT5668_I2S2_F_DIV_CTRL_2:case RT5668_EQ_CTRL_2:case return 0 ;case struct snd_soc_component *=snd_soc_kcontrol_component()struct case :int compcaseRT5668_DUMMY_3int value=ucontrol>.value0 ]int sel;if (caseRT5668_CHOP_DAC:/* Any specific register configuration for compander */ switch (comp) {case COMPANDER_1:/* Set Gain Source Select based on compander enable/disable */ break ;case COMPANDER_2:break ;case COMPANDER_3:case COMPANDER_4:case COMPANDER_7:case COMPANDER_8:break ;default :return 0 ;return 1 ;static int wcd934x_rx_hph_mode_get(struct snd_kcontrol *kc,struct snd_ctl_elem_value *ucontrol)struct snd_soc_component *component = snd_soc_kcontrol_component(kc);struct wcd934x_codec *wcd = dev_get_drvdata(component->dev);0 ] = wcd->hph_mode;return 0 ;static int wcd934x_rx_hph_mode_put(struct snd_kcontrol *kc,struct snd_ctl_elem_value *ucontrol)struct snd_soc_component *component = snd_soc_kcontrol_component(kc);struct wcd934x_codec *wcd = dev_get_drvdata(component->dev);0 ];if (mode_val == wcd->hph_mode)return 0 ;if (mode_val == 0 ) {"Invalid HPH Mode, default to ClSH HiFi\n" );return 1 ;static int slim_rx_mux_get(struct snd_kcontrol *kc,struct snd_ctl_elem_value *ucontrol)struct snd_soc_dapm_context *dapm = snd_soc_dapm_kcontrol_dapm(kc);struct snd_soc_dapm_widget *w = snd_soc_dapm_kcontrol_widget(kc);struct wcd934x_codec *wcd = dev_get_drvdata(dapm->dev);0 ] = wcd->rx_port_value[w->shift];return 0 ;static int slim_rx_mux_to_dai_id(int mux)int aif_id;switch (mux) {case 1 :break ;case 2 :break ;case 3 :break ;case 4 :break ;default :1 ;break ;return aif_id;static int slim_rx_mux_put(struct snd_kcontrol *kc,struct snd_ctl_elem_value *ucontrol)struct snd_soc_dapm_widget *w = snd_soc_dapm_kcontrol_widget(kc);struct wcd934x_codec *wcd = dev_get_drvdata(w->dapm->dev);struct soc_enum *e = (struct soc_enum *)kc->private_value;struct snd_soc_dapm_update *update = NULL;struct wcd934x_slim_ch *ch, *c;bool found = false ;int mux_idx;int prev_mux_idx = wcd->rx_port_value[port_id];int aif_id;return 0 ;switch (mux_idx) {case 0 :case RT5668_SIL_PSV_CTRL4:case :case RT5668_HP_IMP_SENS_CTRL_15:break caseRT5668_HP_IMP_SENS_CTRL_21:if (!found)return case break ;case case RT5668_HP_IMP_SENS_CTRL_42:if case java.lang.StringIndexOutOfBoundsException: Index 29 out of bounds for length 29return ;if (ist_empty(wcd>[port_id].){"% busy\" )break case default :case :return ;case RT5668_EQ_AUTO_RCV_CTRL11:static int wcd934x_int_dem_inp_mux_put(struct snd_kcontrol *kc,struct snd_ctl_elem_value *ucontrol)struct soc_enum *e = (struct soc_enum *)kc->private_value;struct snd_soc_component *component;int reg, val;0 ];if (e->reg == WCD934X_CDC_RX0_RX_PATH_SEC0)else if (e->reg == WCD934X_CDC_RX1_RX_PATH_SEC0)else if (e->reg == WCD934X_CDC_RX2_RX_PATH_SEC0)else return -EINVAL;/* Set Look Ahead Delay */ if (val)else return snd_soc_dapm_put_enum_double(kc, ucontrol);static int wcd934x_dec_enum_put(struct snd_kcontrol *kcontrol,struct case RT5668_EQ_AUTO_RCV_CTRL:struct struct _:case :unsigned casejava.lang.StringIndexOutOfBoundsException: Index 26 out of bounds for length 26return -EINVAL;case DECLARE_TLV_DB_RANGEb,if 1 ,TLV_DB_SCALE_ITEM( ,0,5 TLV_DB_SCALE_ITEM3000 500 )else , TLV_DB_SCALE_ITEM(,0 ) length 0else (-shift_l= )static rt5668_if2_adc_enum,break SOC_ENUM_SINGLE_DECL(case static SOC_ENUM_SINGLE_DECL(rt5668_if1_23_adc_enum,else if(-shift_l =2 break (I ADCSwap"rt5668_if1_01_adc_enum; case :if (e->shift_l java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0else if static void rt5668_resetstructregmap regmap)break ;if (btn_type x; 1break ;default : c java.lang.StringIndexOutOfBoundsException: Range [64, 65) out of bounds for length 64/* ADC: 0, DMIC: 1 */ 0 x0 : 0 x1;if (mic_sel_reg)7 ),7 );return snd_soc_dapm_put_enum_double(kcontrol, ucontrol);static const struct snd_kcontrol_new rx_int0_2_mux ="RX INT0_2 MUX Mux" , rx_int0_2_mux_chain_enum);static const struct snd_kcontrol_new rx_int1_2_mux ="RX INT1_2 MUX Mux" , rx_int1_2_mux_chain_enum);static const struct snd_kcontrol_new rx_int2_2_mux ="RX INT2_2 MUX Mux" , rx_int2_2_mux_chain_enum);static const struct snd_kcontrol_new rx_int3_2_mux ="RX INT3_2 MUX Mux" , rx_int3_2_mux_chain_enum);static const struct snd_kcontrol_new rx_int4_2_mux ="RX INT4_2 MUX Mux" , rx_int4_2_mux_chain_enum);static const struct snd_kcontrol_new rx_int7_2_mux ="RX INT7_2 MUX Mux" , rx_int7_2_mux_chain_enum);static const struct snd_kcontrol_new rx_int8_2_mux ="RX INT8_2 MUX Mux" , rx_int8_2_mux_chain_enum);static const struct snd_kcontrol_new rx_int0_1_mix_inp0_mux ="RX INT0_1 MIX1 INP0 Mux" , rx_int0_1_mix_inp0_chain_enum);static const struct snd_kcontrol_new rx_int0_1_mix_inp1_mux ="RX INT0_1 MIX1 INP1 Mux" , rx_int0_1_mix_inp1_chain_enum);static const struct snd_kcontrol_new rx_int0_1_mix_inp2_mux ="RX INT0_1 MIX1 INP2 Mux" , rx_int0_1_mix_inp2_chain_enum);static const struct snd_kcontrol_new rx_int1_1_mix_inp0_mux ="RX INT1_1 MIX1 INP0 Mux" , rx_int1_1_mix_inp0_chain_enum);static const struct snd_kcontrol_new rx_int1_1_mix_inp1_mux ="RX INT1_1 MIX1 INP1 Mux" , rx_int1_1_mix_inp1_chain_enum);static const struct snd_kcontrol_new rx_int1_1_mix_inp2_mux ="RX INT1_1 MIX1 INP2 Mux" , rx_int1_1_mix_inp2_chain_enum);static const struct snd_kcontrol_new rx_int2_1_mix_inp0_mux ="RX INT2_1 MIX1 INP0 Mux" , rx_int2_1_mix_inp0_chain_enum);static const struct snd_kcontrol_new rx_int2_1_mix_inp1_mux ="RX INT2_1 MIX1 INP1 Mux" , rx_int2_1_mix_inp1_chain_enum);static const struct snd_kcontrol_new rx_int2_1_mix_inp2_mux ="RX INT2_1 MIX1 INP2 Mux" , rx_int2_1_mix_inp2_chain_enum);static const struct snd_kcontrol_new rx_int3_1_mix_inp0_mux ="RX INT3_1 MIX1 INP0 Mux" , rx_int3_1_mix_inp0_chain_enum);static const struct snd_kcontrol_new rx_int3_1_mix_inp1_mux ="RX INT3_1 MIX1 INP1 Mux" , rx_int3_1_mix_inp1_chain_enum);static const struct snd_kcontrol_new rx_int3_1_mix_inp2_mux ="RX INT3_1 MIX1 INP2 Mux" , rx_int3_1_mix_inp2_chain_enum);static const struct snd_kcontrol_new rx_int4_1_mix_inp0_mux ="RX INT4_1 MIX1 INP0 Mux" , rx_int4_1_mix_inp0_chain_enum);static const struct snd_kcontrol_new rx_int4_1_mix_inp1_mux ="RX INT4_1 MIX1 INP1 Mux" , rx_int4_1_mix_inp1_chain_enum);static const struct snd_kcontrol_new rx_int4_1_mix_inp2_mux =const struct rx_int7_1_mix_inp0_mux /** 2 Mux , ) ; static const struct snd_kcontrol_new snd_soc_dapm_context dapm = SOC_DAPM_ENUM ( " RX static const struct snd_kcontrol_new ; SOC_DAPM_ENUM ( " RX INT8_1 while val = 0 & count ) { static const v ) { SOC_DAPM_ENUM ( " RX INT8_1 rt5668_enable_push_button_irq ( omponent ) ; static const rt5668_enable_push_button_irq ) ( " RX MIX1 INP2 Mux , r x_int8_1_mix_inp2_chain_enum ) ; static const struct snd_kcontrol_new java.lang.StringIndexOutOfBoundsException: Index 38 out of bounds for length 26SOC_DAPM_ENUM ( RX INT0 MIX2 " ; static const struct ( " INT1 INP Mux , rx_int1_mix2_inp_mux_enum ; static const struct snd_kcontrol_new s ( > ) SOC_DAPM_ENUM ( " RX INT2 snd_soc_jack_report(rt5668 > , rt5668 - jack_type , tatic struct rx_int3_mix2_inp_mux INP Mux " , rx_int3_mix2_inp_mux_enum ) static switch ( > . d_src SOC_DAPM_ENUM ( " RX INT4 ) tatic const struct snd_kcontrol_new rx_int7_mix2_inp_mux = SOC_DAPM_ENUM " MIX2 INP " java.lang.StringIndexOutOfBoundsException: Range [66, 64) out of bounds for length 66 snd_kcontrol_new SOC_DAPM_ENUM ( " | RT5668_PWR_JDL ) static const struct snd_kcontrol_new iir0_inp1_mux ( IIR0 INP1 " ; static const struct snd_kcontrol_new RT5668_JD_NULL : SOC_DAPM_ENUM ( " rt5668 , static const struct snd_kcontrol_new d SOC_DAPM_ENUM ( " IIR0 } static const struct snd_kcontrol_new static void rt5668_jack_detect_handler(struct work_s truct * work ) SOC_DAPM_ENUM ( " IIR1 INP0 Mux " , iir1_inp0_mux_enum ) ; static const struct snd_kcontrol_new iir1_inp1_mux = SOC_DAPM_ENUM ( " IIR1 INP1 Mux " , iir1_inp1_mux_enum ) ; static const struct snd_kcontrol_new iir1_inp2_mux = SOC_DAPM_ENUM ( " IIR1 INP2 Mux " , iir1_inp2_mux_enum ) ; static const struct snd_kcontrol_new iir1_inp3_mux = SOC_DAPM_ENUM ( " IIR1 INP3 Mux " , iir1_inp3_mux_enum ) ; static const struct snd_kcontrol_new slim_rx_mux [ WCD934X_RX_MAX ] = { SOC_DAPM_ENUM_EXT ( " SLIM RX0 Mux " , slim_rx_mux_enum , slim_rx_mux_get , slim_rx_mux_put ) , SOC_DAPM_ENUM_EXT ( " SLIM RX1 Mux " , slim_rx_mux_enum , slim_rx_mux_get , slim_rx_mux_put ) , SOC_DAPM_ENUM_EXT ( " SLIM RX2 Mux " , slim_rx_mux_enum , slim_rx_mux_get , slim_rx_mux_put ) , SOC_DAPM_ENUM_EXT ( " SLIM RX3 Mux " , slim_rx_mux_enum , slim_rx_mux_get , slim_rx_mux_put ) , SOC_DAPM_ENUM_EXT ( " SLIM RX4 Mux " , slim_rx_mux_enum , slim_rx_mux_get , slim_rx_mux_put ) , SOC_DAPM_ENUM_EXT ( " SLIM RX5 Mux " , slim_rx_mux_enum , slim_rx_mux_get , slim_rx_mux_put ) , SOC_DAPM_ENUM_EXT ( " SLIM RX6 Mux " , slim_rx_mux_enum , slim_rx_mux_get , slim_rx_mux_put ) , SOC_DAPM_ENUM_EXT ( " SLIM RX7 Mux " , slim_rx_mux_enum , slim_rx_mux_get , slim_rx_mux_put ) , } ; static const struct snd_kcontrol_new rx_int1_asrc_switch [ ] = { SOC_DAPM_SINGLE ( " HPHL Switch " , SND_SOC_NOPM , 0 , 1 , 0 ) , } ; static const struct snd_kcontrol_new rx_int2_asrc_switch [ ] = { SOC_DAPM_SINGLE ( " HPHR Switch " , SND_SOC_NOPM , 0 , 1 , 0 ) , } ; static const struct snd_kcontrol_new rx_int3_asrc_switch [ ] = { SOC_DAPM_SINGLE ( " LO1 Switch " , SND_SOC_NOPM , 0 , 1 , 0 ) , } ; static const struct snd_kcontrol_new rx_int4_asrc_switch [ ] = { SOC_DAPM_SINGLE ( " LO2 Switch " , SND_SOC_NOPM , 0 , 1 , 0 ) , } ; static const struct snd_kcontrol_new rx_int0_dem_inp_mux = SOC_DAPM_ENUM_EXT ( " RX INT0 DEM MUX Mux " , rx_int0_dem_inp_mux_enum , snd_soc_dapm_get_enum_double , wcd934x_int_dem_inp_mux_put ) ; static const struct snd_kcontrol_new rx_int1_dem_inp_mux = SOC_DAPM_ENUM_EXT ( " RX INT1 DEM MUX Mux " , rx_int1_dem_inp_mux_enum , snd_soc_dapm_get_enum_double , wcd934x_int_dem_inp_mux_put ) ; static const struct snd_kcontrol_new rx_int2_dem_inp_mux = SOC_DAPM_ENUM_EXT ( " RX INT2 DEM MUX Mux " , rx_int2_dem_inp_mux_enum , snd_soc_dapm_get_enum_double , wcd934x_int_dem_inp_mux_put ) ; static const struct snd_kcontrol_new rx_int0_1_interp_mux = SOC_DAPM_ENUM ( " RX INT0_1 INTERP Mux " , rx_int0_1_interp_mux_enum ) ; static const struct snd_kcontrol_new rx_int1_1_interp_mux = SOC_DAPM_ENUM ( " RX INT1_1 INTERP Mux " , rx_int1_1_interp_mux_enum ) ; static const struct snd_kcontrol_new rx_int2_1_interp_mux = SOC_DAPM_ENUM ( " RX INT2_1 INTERP Mux " , rx_int2_1_interp_mux_enum ) ; static const struct snd_kcontrol_new rx_int3_1_interp_mux = SOC_DAPM_ENUM ( " RX INT3_1 INTERP Mux " , rx_int3_1_interp_mux_enum ) ; static const struct snd_kcontrol_new rx_int4_1_interp_mux = SOC_DAPM_ENUM ( " RX INT4_1 INTERP Mux " , rx_int4_1_interp_mux_enum ) ; static const struct snd_kcontrol_new rx_int7_1_interp_mux = SOC_DAPM_ENUM ( " RX INT7_1 INTERP Mux " , rx_int7_1_interp_mux_enum ) ; static const struct snd_kcontrol_new rx_int8_1_interp_mux = SOC_DAPM_ENUM ( " RX INT8_1 INTERP Mux " , rx_int8_1_interp_mux_enum ) ; static const struct snd_kcontrol_new rx_int0_2_interp_mux = SOC_DAPM_ENUM ( " RX INT0_2 INTERP Mux " , rx_int0_2_interp_mux_enum ) ; static const struct snd_kcontrol_new rx_int1_2_interp_mux = SOC_DAPM_ENUM ( " RX INT1_2 INTERP Mux " , rx_int1_2_interp_mux_enum ) ; static const struct snd_kcontrol_new rx_int2_2_interp_mux = SOC_DAPM_ENUM ( " RX INT2_2 INTERP Mux " , rx_int2_2_interp_mux_enum ) ; static const struct snd_kcontrol_new rx_int3_2_interp_mux = SOC_DAPM_ENUM ( " RX INT3_2 INTERP Mux " , rx_int3_2_interp_mux_enum ) ; static const struct snd_kcontrol_new rx_int4_2_interp_mux = SOC_DAPM_ENUM ( " RX INT4_2 INTERP Mux " , rx_int4_2_interp_mux_enum ) ; static const struct snd_kcontrol_new rx_int7_2_interp_mux = SOC_DAPM_ENUM ( " RX INT7_2 INTERP Mux " , rx_int7_2_interp_mux_enum ) ; static const struct snd_kcontrol_new rx_int8_2_interp_mux = SOC_DAPM_ENUM ( " RX INT8_2 INTERP Mux " , rx_int8_2_interp_mux_enum ) ; static const struct snd_kcontrol_new tx_dmic_mux0 = SOC_DAPM_ENUM ( " DMIC MUX0 Mux " , tx_dmic_mux0_enum ) ; static const struct snd_kcontrol_new tx_dmic_mux1 = SOC_DAPM_ENUM ( " DMIC MUX1 Mux " , tx_dmic_mux1_enum ) ; static const struct snd_kcontrol_new tx_dmic_mux2 = SOC_DAPM_ENUM ( " DMIC MUX2 Mux " , tx_dmic_mux2_enum ) ; static const struct snd_kcontrol_new tx_dmic_mux3 = SOC_DAPM_ENUM ( " MIC MUX3 Mux " tx_dmic_mux3_enum ) ; static const struct snd_kcontrol_new snd_soc_card_is_instantiated ( "MUX5Mux, ; static rt5668-jack_type static const struct "DMIC MUX7 Mux" , tx_dmic_mux7_enum);static const struct snd_kcontrol_new tx_dmic_mux8 = *currently willreportbutton releasedstruct snd_kcontrol_new ="AMIC MUX0 Mux" x2000:static const tx_amic_mux1 "AMIC java.lang.StringIndexOutOfBoundsException: Range [0, 25) out of bounds for length 15 static java.lang.StringIndexOutOfBoundsException: Range [0, 12) out of bounds for length 11"MUX2Mux" )const tx_amic_mux3="AMIC MUX4 Mux" , tx_amic_mux4_enum |SND_JACK_BTN_3)" MUX5 " ;static const ,0 ," MUX7Mux" )static const /* ADC Boost VolumeControl*static snd_kcontrol_new ="AMIC4_5 SEL Mux" , {const tx_adc_mux0_mux=" return 0 static const target*[ ==rt5668>)"ADC MUX1 Mux" , tx_adc_mux1_enum,static const struct pr_err("sysclk rate %d is too high,"ADC java.lang.StringIndexOutOfBoundsException: Index 28 out of bounds for length 0 static const struct snd_kcontrol_new tx_adc_mux3_mux ="ADC MUX3 Mux" , tx_adc_mux3_enum,static const struct snd_kcontrol_new tx_adc_mux4_mux ="ADC MUX4 Mux" , tx_adc_mux4_enum,static const struct snd_kcontrol_new tx_adc_mux5_mux ="ADC MUX5 Mux" , tx_adc_mux5_enum,static const struct snd_kcontrol_new tx_adc_mux6_mux ="ADC MUX6 Mux" , tx_adc_mux6_enum,static const struct snd_kcontrol_new tx_adc_mux7_mux ="ADC MUX7 Mux" , tx_adc_mux7_enum,static const struct snd_kcontrol_new tx_adc_mux8_mux ="ADC MUX8 Mux" , tx_adc_mux8_enum,static const struct snd_kcontrol_new cdc_if_tx0_mux ="CDC_IF TX0 MUX Mux" , cdc_if_tx0_mux_enum);static const struct snd_kcontrol_new cdc_if_tx1_mux ="CDC_IF TX1 MUX Mux" , cdc_if_tx1_mux_enum);static const struct snd_kcontrol_new cdc_if_tx2_mux ="CDC_IF TX2 MUX Mux" , cdc_if_tx2_mux_enum);static const struct snd_kcontrol_new cdc_if_tx3_mux ="CDC_IF TX3 MUX Mux" , cdc_if_tx3_mux_enum);static const struct snd_kcontrol_new cdc_if_tx4_mux ="CDC_IF TX4 MUX Mux" , cdc_if_tx4_mux_enum);static const struct snd_kcontrol_new cdc_if_tx5_mux ="CDC_IF TX5 MUX Mux" , cdc_if_tx5_mux_enum);static const struct snd_kcontrol_new cdc_if_tx6_mux ="CDC_IF TX6 MUX Mux" , cdc_if_tx6_mux_enum);static const struct snd_kcontrol_new cdc_if_tx7_mux ="CDC_IF TX7 MUX Mux" , cdc_if_tx7_mux_enum);static const struct snd_kcontrol_new cdc_if_tx8_mux ="CDC_IF TX8 MUX Mux" , cdc_if_tx8_mux_enum);static const struct snd_kcontrol_new cdc_if_tx9_mux ="CDC_IF TX9 MUX Mux" , cdc_if_tx9_mux_enum);static const struct snd_kcontrol_new cdc_if_tx10_mux ="CDC_IF TX10 MUX Mux" , cdc_if_tx10_mux_enum);static const struct snd_kcontrol_new cdc_if_tx11_mux ="CDC_IF TX11 MUX Mux" , cdc_if_tx11_mux_enum);static const struct snd_kcontrol_new cdc_if_tx11_inp1_mux ="CDC_IF TX11 INP1 MUX Mux" , cdc_if_tx11_inp1_mux_enum);static const struct snd_kcontrol_new cdc_if_tx13_mux ="CDC_IF TX13 MUX Mux" , cdc_if_tx13_mux_enum);static const struct snd_kcontrol_new cdc_if_tx13_inp1_mux ="CDC_IF TX13 INP1 MUX Mux" , cdc_if_tx13_inp1_mux_enum);static int slim_tx_mixer_get(struct snd_kcontrol *kc,struct snd_ctl_elem_value *ucontrol)struct snd_soc_dapm_context *dapm = snd_soc_dapm_kcontrol_dapm(kc);struct wcd934x_codec *wcd = dev_get_drvdata(dapm->dev);struct soc_mixer_control *mixer =struct soc_mixer_control *)kc->private_value;int port_id 0 ->x_port_valuep;0 java.lang.StringIndexOutOfBoundsException: Index 10 out of bounds for length 10struct < )struct reg = RT5668_PLL_TRACK_3struct soc_mixer_control * ( int enable = ucontrolint dai_id = widget->shift;int port_id = mixer->shift;/* only add to the list if value not set */ if (enable == wcd->tx_port_value[port_id])return 0 ;if (enable) {if (list_empty(&wcd->tx_chs[port_id].list)) {else {"SLIM_TX%d PORT is busy\n" , port_id);return 0 ;else {bool found = false ;if (ch->port == port_id) {true ;break ;if (!found)return 0 ;return 1 ;static const struct snd_kcontrol_new aif1_slim_cap_mixer[] = {"SLIM TX0" , SND_SOC_NOPM, WCD934X_TX0, 1 , 0 ,"SLIM TX1" , SND_SOC_NOPM, WCD934X_TX1, 1 , 0 ,"SLIM TX2" , SND_SOC_NOPM, WCD934X_TX2, 1 , 0 ,"SLIM TX3" , SND_SOC_NOPM, WCD934X_TX3, 1 , 0 ,"SLIM TX4" , SND_SOC_NOPM, WCD934X_TX4, 1 , 0 ,"SLIM TX5" , SND_SOC_NOPM, WCD934X_TX5, 1 , 0 ,"SLIM TX6" , SND_SOC_NOPM, WCD934X_TX6, 1 , 0 ,"SLIM TX7" , SND_SOC_NOPM, WCD934X_TX7, 1 , 0 ,"SLIM TX8" , SND_SOC_NOPM, WCD934X_TX8, 1 , 0 ,"SLIM TX9" , SND_SOC_NOPM, WCD934X_TX9, 1 , 0 ,"SLIM TX10" , SND_SOC_NOPM, WCD934X_TX10, 1 , 0 ,"SLIM TX11" , SND_SOC_NOPM, WCD934X_TX11, 1 , 0 ,"SLIM TX13" , SND_SOC_NOPM, WCD934X_TX13, 1 , 0 ,static const struct snd_kcontrol_new aif2_slim_cap_mixer[] = {"SLIM TX0" , SND_SOC_NOPM, WCD934X_TX0, 1 , 0 ,"SLIM TX1" , SND_SOC_NOPM, WCD934X_TX1, 1 , 0 ,"SLIM TX2" , SND_SOC_NOPM, WCD934X_TX2, 1 , 0 ,"SLIM TX3" , SND_SOC_NOPM, WCD934X_TX3, 1 , 0 ,"SLIM TX4" , SND_SOC_NOPM, WCD934X_TX4, 1 , 0 ,"SLIM TX5" , SND_SOC_NOPM, WCD934X_TX5, 1 , 0 ,"SLIM TX6" , SND_SOC_NOPM, WCD934X_TX6, 1 , 0 ,"SLIM TX7" , SND_SOC_NOPM, WCD934X_TX7, 1 , 0 ,"SLIM TX8" , SND_SOC_NOPM, WCD934X_TX8, 1 , 0 ,"SLIM TX9" , SND_SOC_NOPM, WCD934X_TX9, 1 , 0 ,"SLIM TX10" , SND_SOC_NOPM, WCD934X_TX10, 1 , 0 ,"SLIM TX11" , SND_SOC_NOPM, WCD934X_TX11, 1 , 0 ,"SLIM TX13" , SND_SOC_NOPM, WCD934X_TX13, 1 , 0 ,static const struct snd_kcontrol_new aif3_slim_cap_mixer[] = {"SLIM TX0" , SND_SOC_NOPM, WCD934X_TX0, 1 , 0 ,"SLIM TX1" , SND_SOC_NOPM, WCD934X_TX1, 1 , 0 ,"SLIM TX2" , SND_SOC_NOPM, WCD934X_TX2, 1 , 0 ,"SLIM TX3" , SND_SOC_NOPM, WCD934X_TX3, 1 , 0 ,"SLIM TX4" , SND_SOC_NOPM, WCD934X_TX4, 1 , 0 ,"SLIM TX5" , SND_SOC_NOPM, WCD934X_TX5, 1 , 0 ,"SLIM TX6" , SND_SOC_NOPM, WCD934X_TX6, 1 , 0 ,"SLIM TX7" , SND_SOC_NOPM, WCD934X_TX7, 1 , 0 ,"SLIM TX8" , SND_SOC_NOPM, WCD934X_TX8, 1 , 0 ,"SLIM TX9" , SND_SOC_NOPM, WCD934X_TX9, 1 , 0 ,"SLIM TX10" , SND_SOC_NOPM, WCD934X_TX10, 1 , 0 ,"SLIM TX11" , SND_SOC_NOPM, WCD934X_TX11, 1 , 0 ,"SLIM TX13" , SND_SOC_NOPM, WCD934X_TX13, 1 , 0 ,static const struct snd_kcontrol_new wcd934x_snd_controls[] = {/* Gain Controls */ "EAR PA Volume" , WCD934X_ANA_EAR, 4 , 4 , 1 , ear_pa_gain),"HPHL Volume" , WCD934X_HPH_L_EN, 0 , 24 , 1 , line_gain),"HPHR Volume" , WCD934X_HPH_R_EN, 0 , 24 , 1 , line_gain),"LINEOUT1 Volume" , WCD934X_DIFF_LO_LO1_COMPANDER,3 , 16 , 1 , line_gain),"LINEOUT2 Volume" , WCD934X_DIFF_LO_LO2_COMPANDER,3 , 16 , 1 , line_gain),"ADC1 Volume" , WCD934X_ANA_AMIC1, 0 , 20 , 0 , analog_gain),"ADC2 Volume" , WCD934X_ANA_AMIC2, 0 , 20 , 0 , analog_gain),"ADC3 Volume" , WCD934X_ANA_AMIC3, 0 , 20 , 0 , analog_gain),"ADC4 Volume" , WCD934X_ANA_AMIC4, 0 , 20 , 0 , analog_gain),"RX0 Digital Volume" , WCD934X_CDC_RX0_RX_VOL_CTL,84 , 40 , digital_gain), /* -84dB min - 40dB max */ "RX1 Digital Volume" , WCD934X_CDC_RX1_RX_VOL_CTL,84 , 40 , digital_gain),"RX2 Digital Volume" , WCD934X_CDC_RX2_RX_VOL_CTL,84 , 40 , digital_gain),"RX3 Digital Volume" , WCD934X_CDC_RX3_RX_VOL_CTL,84 , 40 , digital_gain),"RX4 Digital Volume" , WCD934X_CDC_RX4_RX_VOL_CTL,84 , 40 , digital_gain),"RX7 Digital Volume" , WCD934X_CDC_RX7_RX_VOL_CTL,84 , 40 , digital_gain),"RX8 Digital Volume" , WCD934X_CDC_RX8_RX_VOL_CTL,84 , 40 , digital_gain),"RX0 Mix Digital Volume" ,84 , 40 , digital_gain),"RX1 Mix Digital Volume" ,84 , 40 , digital_gain),"RX2 Mix Digital Volume" ,84 , 40 , digital_gain),"RX3 Mix Digital Volume" ,84 , 40 , digital_gain),"RX4 Mix Digital Volume" ,84 , 40 , digital_gain),"RX7 Mix Digital Volume" ,84 , 40 , digital_gain)," 84 , 40 , digital_gain),"DEC0 Volume" , WCD934X_CDC_TX0_TX_VOL_CTL,84 , 40 , digital_gain),"DEC1 Volume" , WCD934X_CDC_TX1_TX_VOL_CTL,84 , 40 , digital_gain),"DEC2 Volume" , WCD934X_CDC_TX2_TX_VOL_CTL,84 , 40 , digital_gain),"DEC3 Volume" , WCD934X_CDC_TX3_TX_VOL_CTL,84 , 40 , digital_gain),"DEC4 Volume" , WCD934X_CDC_TX4_TX_VOL_CTL,84 , 40 , digital_gain),"DEC5 Volume" , WCD934X_CDC_TX5_TX_VOL_CTL,84 , 40 , digital_gain),"DEC6 Volume" , WCD934X_CDC_TX6_TX_VOL_CTL,84 , 40 , digital_gain),"DEC7 Volume" , WCD934X_CDC_TX7_TX_VOL_CTL,84 , 40 , digital_gain),"DEC8 Volume" , WCD934X_CDC_TX8_TX_VOL_CTL,84 , 40 , digital_gain),"IIR0 INP0 Volume" ,84 , 40 ,"IIR0 INP1 Volume" ,84 , 40 ,"IIR0 INP2 Volume" ,84 , 40 ,"IIR0 INP3 Volume" ,84 , 40 ,"IIR1 INP0 Volume" ,84 , 40 ,"IIR1 INP1 Volume" ,84 , 40 ,"IIR1 INP2 Volume" ,84 , 40 ,"IIR1 INP3 Volume" ,84 , 40 ,"TX0 HPF cut off" , cf_dec0_enum),"TX1 HPF cut off" , cf_dec1_enum),"TX2 HPF cut off" , cf_dec2_enum),"TX3 HPF cut off" , cf_dec3_enum),"TX4 HPF cut off" , cf_dec4_enum),"TX5 HPF cut off" , cf_dec5_enum),"TX6 HPF cut off" , cf_dec6_enum),"TX7 HPF cut off" , cf_dec7_enum),"TX8 HPF "XINT0_1 off,cf_int0_1_enum) " ), " cf_int1_1_enum)java.lang.StringIndexOutOfBoundsException: Index 51 out of bounds for length 51 " INT1_2 HPFcutoff" )" INT2_1 HPF cut " cf_int2_1_enum)"XINT2_2HPF cut off" ," cf_int3_1_enum) " INT3_2 HPF cut " cf_int3_2_enum)"RX INT4_2 HPF cut off" , cf_int4_2_enum),"RX INT7_1 HPF cut off" , cf_int7_1_enum),"RX INT7_2 HPF cut off" , cf_int7_2_enum),"RX INT8_1 HPF cut off" , cf_int8_1_enum),"RX INT8_2 HPF cut off" , cf_int8_2_enum),"RX HPH Mode" , rx_hph_mode_mux_enum,"IIR1 Band1 Switch" , WCD934X_CDC_SIDETONE_IIR0_IIR_CTL,0 , 1 , 0 ),"IIR1 Band2 Switch" , WCD934X_CDC_SIDETONE_IIR0_IIR_CTL,1 , 1 , 0 ),"IIR1 Band3 Switch" , WCD934X_CDC_SIDETONE_IIR0_IIR_CTL,2 , 1 , 0 ),"IIR1 Band4 Switch" , WCD934X_CDC_SIDETONE_IIR0_IIR_CTL,3 , 1 , 0 ),"IIR1 Band5 Switch" , WCD934X_CDC_SIDETONE_IIR0_IIR_CTL,4 , 1 , 0 ),"IIR2 Band1 Switch" , WCD934X_CDC_SIDETONE_IIR1_IIR_CTL,0 , 1 , 0 ),"IIR2 Band2 Switch" , WCD934X_CDC_SIDETONE_IIR1_IIR_CTL,1 , 1 , 0 ),"IIR2 Band3 Switch" , WCD934X_CDC_SIDETONE_IIR1_IIR_CTL,2 , 1 , 0 ),"IIR2 Band4 Switch" , WCD934X_CDC_SIDETONE_IIR1_IIR_CTL,out of bounds for length 57" Band5Switch, WCD934X_CDC_SIDETONE_IIR1_IIR_CTL, 4 ,0,struct sigmadsp sigmadsp kcontrol)" ,BAND3, " Band5" ,,BAND5,"IIR1 Band1" , IIR1, BAND1)," Band3, IIR1, , unsigned int " Switch" COMPANDER_1,1 dex 64 out of bounds for length 64 sure that at least one chunk to avoid integer wcd934x_compander_get , wcd934x_compander_set ) , " , SND_SOC_NOPM , COMPANDER_7 , 1 , 0 = sigma_fw_load_data ( , ) SOC_SINGLE_EXT ( " COMP8 Switch " , SND_SOC_NOPM , COMPANDER_8 , 1 , 0 , wcd934x_compander_get , wcd934x_compander_set ) , } ; static void wcd934x_codec_enable_int_port ( struct wcd_slim_codec_dai_data * dai , struct snd_soc_component * component ) { int port_num = 0 ; unsigned short reg = 0 ; unsigned int val = 0 ; struct wcd934x_codec * wcd = dev_get_drvdata ( component - > dev ) ; wcd934x_slim_ch * ; ch dai > ) { ch > = ) { port_num java.lang.StringIndexOutOfBoundsException: Index 42 out of bounds for length 42 reg } else { port_num = ch - > port ; reg = WCD934X_SLIM_PGD_PORT_INT_TX_EN0 } regmap_read ( wcd - > if_regmap , / #def RT5677_VENDOR_ID x fd ( cd - > if_regmap , reg ( ort_num ) ; define RT5677_DAC3_DIG_VOL x18 } wcd934x_codec_enable_slim ( snd_soc_dapm_widget * , snd_kcontrol * , int event ) { nd_soc_component comp = snd_soc_dapm_to_component ( - > apm ; * wcd = ( comp ) struct wcd_slim_codec_dai_data * dai = wcd - > dai [ - shift ; switch ( event ) { case SND_SOC_DAPM_POST_PMU : wcd934x_codec_enable_int_port ( dai , comp ) ; break ; } return 0 ; } static void wcd934x_codec_hd2_control ( struct snd_soc_component * component , u16 interp_idx , int event ) { u16 hd2_scale_reg ; u16 hd2_enable_reg = 0 ; switch ( interp_idx ) { case INTERP_HPHL : hd2_scale_reg = WCD934X_CDC_RX1_RX_PATH_SEC3 ; hd2_enable_reg = WCD934X_CDC_RX1_RX_PATH_CFG0 ; * Auth : Cliff Cai < Cliff . @ c > case INTERP_HPHR java.lang.StringIndexOutOfBoundsException: Index 18 out of bounds for length 18struct device ; hd2_enable_reg = struct regmap * regmap ; define 0 04 default : * Mask value the corresponding ex 58 out of bounds for length 58 return # LINVOL_LRIN_BOTH x100 } if ( SND_SOC_DAPM_EVENT_ON ( event ) ) { # define ROUT1V_ENABLE_RZC x080 WCD934X_CDC_RX_PATH_SEC_HD2_ALPHA_MASK , # define APANA_ENABLE_BYPASS x008 snd_soc_component_update_bits ( component # 0 , ) ; } if ( SND_SOC_DAPM_EVENT_OFF ( event ) ) { snd_soc_component_update_bits ( component , hd2_enable_reg , #define 0 D934X_CDC_RX_PATH_CFG_HD2_DISABLE ) ; ( component hd2_scale_reg , WCD934X_CDC_RX_PATH_SEC_HD2_ALPHA_MASK , # 0 x040 /* Enable/Disable Master Mode */ ) ; } } void struct snd_soc_component comp u16 java.lang.StringIndexOutOfBoundsException: Range [33, 24) out of bounds for length 34{ u u16 hph_lut_bypass_reg = 0 ; case : interp_idx ) { case INTERP_HPHL : ( igmadsp ; break ; case INTERP_HPHR : 2 ; hph_lut_bypass_reg = WCD934X_CDC_TOP_HPHR_COMP_LUT dev device break ; default : return ; if ( SND_SOC_DAPM_EVENT_ON ( event ) ) { snd_soc_component_update_bits ( comp , WCD934X_CDC_CLSH_TEST0 , hph_dly_mask , 0 x0 ) ; snd_soc_component_update_bits ( comp , hph_lut_bypass_reg , WCD934X_HPH_LUT_BYPASS_MASK , WCD934X_HPH_LUT_BYPASS_ENABLE ) ; } if ( SND_SOC_DAPM_EVENT_OFF ( event ) ) { snd_soc_component_update_bits ( comp , WCD934X_CDC_CLSH_TEST0 , hph_dly_mask , hph_dly_mask ) ; snd_soc_component_update_bits ( comp , hph_lut_bypass_reg , WCD934X_HPH_LUT_BYPASS_MASK , WCD934X_HPH_LUT_BYPASS_DISABLE ) ; } } static int wcd934x_config_compander ( struct snd_soc_component * comp , int interp_n , int event ) { struct wcd934x_codec * wcd = dev_get_drvdata ( comp - > dev ) ; int compander ; u16 comp_ctl0_reg , rx_path_cfg0_reg ; 0 java.lang.StringIndexOutOfBoundsException: Index 11 out of bounds for length 11#define java.lang.StringIndexOutOfBoundsException: Range [33, 31) out of bounds for length 38# RT5677_PR_DRC1_CTRL_1 0 x01if (!wcd->comp_enabled[compander])return switch (event) {case unsigned : Index 45 out of bounds for length 45template access =SNDRV_CTL_ELEM_ACCESS_INACTIVE;case SND_SOC_DAPM_POST_PMD:#define RT5677_BST_MASK2 0 < ) 0 < ) 0 x0 << 14 )0 <0 int interp_idx -shift#def switch (#define RT5677_SE java.lang.StringIndexOutOfBoundsException: Index 36 out of bounds for length 36 define RT5677_DAC1_R_VOL_SFT WCD934X_RX_CLK_ENABLE ) ; define RT5677_M_DAC2_L_VOL 0 < 7 wcd934x_codec_hphdelay_lutbypass ( omp , interp_idx ; ( , interp_idx , event ) ; break ; case #define RT5677_MONO_ADC_L_V 9 wcd934x_config_compander ( , interp_idx , event ) interp_idx , event ; wcd934x_codec_hd2_control ( comp # efine RT5677_STO1_ADC_COMP_SFT 10 0 ;/* Reset enable and disable */ defineRT5677_MONO_ADC_L_BST_MASK (x3 <14 /* Reset rate to 48K*/ break ;return 0 ;static int wcd934x_codec_enable_mix_path(struct snd_soc_dapm_widget *w,struct snd_kcontrol *kc, int event)struct snd_soc_component *comp = snd_soc_dapm_to_component(w->dapm);int offset_val = 0 ;int val = 0 ;switch (event) {case SND_SOC_DAPM_PRE_PMU:/* Clk enable */ break ;case SND_SOC_DAPM_POST_PMU:break ;return 0 ;static int wcd934x_codec_set_iir_gain(struct snd_soc_dapm_widget *w,struct snd_kcontrol *kcontrol, int event)struct snd_soc_component *comp = snd_soc_dapm_to_component(w->dapm);int reg = w->reg;switch (event) {case SND_SOC_DAPM_POST_PMU:/* B1 GAIN */ /* B2 GAIN */ /* B3 GAIN */ /* B4 GAIN */ /* B5 GAIN */ break ;default :break ;return 0 ;static int wcd934x_codec_enable_main_path(struct snd_soc_dapm_widget *w,struct snd_kcontrol *kcontrol,int event)struct snd_soc_component *comp = snd_soc_dapm_to_component(w->dapm);switch (event) {case SND_SOC_DAPM_POST_PMU:break ;return 0 ;static int wcd934x_codec_ear_dac_event(struct snd_soc_dapm_widget *w,struct snd_kcontrol *kc, int event)struct snd_soc_component *comp = snd_soc_dapm_to_component(w->dapm);struct wcd934x_codec *wcd = dev_get_drvdata(comp->dev);switch (event) {case SND_SOC_DAPM_PRE_PMU:/* Disable AutoChop timer during power up */ 0 x0);break ;case SND_SOC_DAPM_POST_PMD:break ;return 0 ;static int wcd934x_codec_hphl_dac_event(struct snd_soc_dapm_widget *w,struct snd_kcontrol *kcontrol,int event)struct snd_soc_component *comp = snd_soc_dapm_to_component(w->dapm);struct wcd934x_codec *wcd = dev_get_drvdata(comp->dev);int hph_mode = wcd->hph_mode;switch (event) {case SND_SOC_DAPM_PRE_PMU:/* Read DEM INP Select */ 0 x03;if (((hph_mode == CLS_H_HIFI) || (hph_mode == CLS_H_LOHIFI) ||0 x01)) {return -EINVAL;if (hph_mode != CLS_H_LP)/* Ripple freq control enable */ /* Disable AutoChop timer during power up */ 0 x0);break ;case SND_SOC_DAPM_POST_PMD:/* 1000us required as per HW requirement */ 1000 , 1100 );if (hph_mode != CLS_H_LP)/* Ripple freq control disable */ 0 x0);break ;default :break ;return 0 ;static int wcd934x_codec_hphr_dac_event(struct snd_soc_dapm_widget *w,struct snd_kcontrol *kcontrol,int event)struct snd_soc_component *comp = snd_soc_dapm_to_component(w->dapm);struct wcd934x_codec *wcd = dev_get_drvdata(comp->dev);int hph_mode = wcd->hph_mode;# 0 < 8 )( x1< )0 x1 <150 x01) java.lang.StringIndexOutOfBoundsException: Range [54, 55) out of bounds for length 54#RT5677_M_MONO_ADC_R2_SFT if (hph_mode != CLS_H_LP)/* Ripple freq control enable */ /* Disable AutoChop timer during power up */ 0 x0);break ;case SND_SOC_DAPM_POST_PMD:/* 1000us required as per HW requirement */ 1000 , 1100 );if (hph_mode != CLS_H_LP)/* Ripple freq control disable */ 0 x0);break ;default :break ;return 0 ;static int wcd934x_codec_lineout_dac_event(struct snd_soc_dapm_widget *w,struct snd_kcontrol *kc, int event)struct snd_soc_component *comp = snd_soc_dapm_to_component(w->dapm);struct wcd934x_codec *wcd = dev_get_drvdata(comp->dev);switch (event) {case SND_SOC_DAPM_PRE_PMU:break ;case SND_SOC_DAPM_POST_PMD:break ;return 0 ;static int wcd934x_codec_enable_hphl_pa(struct snd_soc_dapm_widget *w,struct snd_kcontrol *kcontrol,int event)struct snd_soc_component *comp = snd_soc_dapm_to_component(w->dapm);struct define switch (event) {7 /* # RT5677_DAC2_R_MONO_R_VOL_SFT . compander is java.lang.StringIndexOutOfBoundsException: Index 51 out of bounds for length 51 * 20 ms is needed 20000 , 20100 );# java.lang.StringIndexOutOfBoundsException: Range [36, 35) out of bounds for length 38/* Remove Mute on primary path */ defineRT5677_STO_R_DD1_R_VOL_SFT 6 # RT5677_M_DAC3_R_DD1_R_SFT 3 0 );/* Enable GM3 boost */ /* Enable AutoChop timer at the end of power up */ 0 0 x00);break ;case SND_SOC_DAPM_PRE_PMD:/* Enable DSD Mute before PA disable */ case RT5677_IF4_ADC_SEL_MASK 0 <0 /* define # ( x1 < ) 20000 , 20100 );break ;return 0 ;static int wcd934x_codec_enable_hphr_pa(struct snd_soc_dapm_widget *w,struct snd_kcontrol *kcontrol,int event)struct snd_soc_component *comp = snd_soc_dapm_to_component(w->dapm);struct wcd934x_codec *wcd = snd_soc_component_get_drvdata(comp);switch (event) {case SND_SOC_DAPM_POST_PMU:/* * 7 ms sleep is required after PA is enabled as per * HW requirement . If compander is disabled , then * 20 ms delay is needed . 20000 , 20100 );/* Remove mute */ 0 );#define /* Enable AutoChop timer at the end of power up */ /* Remove mix path mute if it is enabled */ if ((snd_soc_component_read(comp,break ;case SND_SOC_DAPM_PRE_PMD:break ;case SND_SOC_DAPM_POST_PMD:/* * 5 ms sleep is required after PA disable . If compander is * disabled , then 20 ms delay is needed after PA disable . 20000 , 20100 );break ;return 0 ;static u32 wcd934x_get_dmic_sample_rate(struct snd_soc_component *comp,signed intdmic0 , adc_mux_sel = 0 ;bool dec_found = false ;while (!dec_found && adc_mux_index < WCD934X_MAX_VALID_ADC_MUX) {if (adc_mux_index < 4 ) {#define (0 x0<<3 )2 );4 ;1 continue ;0 )> )-1 # RT5677_PWR_I2S3_BIT 13 true ;# RT5677_PWR_ADCFED1_BIT if (dec_found &# (x1< )if (tx_stream_fs <= 4 )else else {# (x1 <)6 return dmic_fs#efine 4 static #define (0 x1 << 15 )/* Default value to return in case of error */ if (mclk_rate == WCD934X_MCLK_CLK_9P6MHZ)else if (dmic_clk_rate == 0 ) {"%s: dmic_sample_rate cannot be 0\n" ,goto done;switch (div_factor) {case 2 :break ;case 3 :break ;case 4 :break ;case 6 :break ;case 8 :break ;case 16 :break ;default :"%s: Invalid div_factor %u, clk_rate(%u), dmic_rate(%u)\n" ,break ;0 < )struct snd_kcontrol#efine 6 #define struct wcd934x_codec *wcddefineRT5677_PWR_LDO1 01< java.lang.StringIndexOutOfBoundsException: Index 37 out of bounds for length 37# 0 <4 unsigned int dmic;int ret;char *wname;"012345" );if (!wname) {"%s: widget not found\n" , __func__);return -EINVAL;10 , &dmic);if (ret < 0 ) {"%s: Invalid DMIC line on the codec\n" ,return -EINVAL;switch (dmic) {case 0 :case 1 :break ;case 2 :case 3 :break ;case 4 :case 5 :break ;default :"%s: Invalid DMIC Selection\n" ,return -EINVAL;switch (event) {case SND_SOC_DAPM_PRE_PMU:if (*dmic_clk_cnt == 1 ) {break ;case SND_SOC_DAPM_POST_PMD:0 );break ;return 0 ;0 x1< 0 )int adc_mux_n)bool is_amic;if (adc_mux_n < 0 || adc_mux_n > WCD934X_MAX_VALID_ADC_MUX ||return 0 ;if (adc_mux_n < 3 ) {0 0 ;2 * adc_mux_n;else if (adc_mux_n < 4 ) {0 x03;0 ;2 * adc_mux_n;else if (adc_mux_n < 7 ) {4 );0 x0C;2 ;4 ;else if (adc_mux_n < 8 ) {0 <7 4 )if ( #efine (x4 <)4 else if (adc_mux_n < 13 ) {0 4 4 else { for length 370 xC0;# (x7< )4 ;# (x7< )# RT5677_I2S_PD8_3 0 <0 #efine RT5677_I2S_PD8_60 <0 return snd_soc_component_read(comp, java.lang.StringIndexOutOfBoundsException: Index 52 out of bounds for length 38static u16 #define RT5677_DSP_ASRC_O_1_0 (x0< 6 )int )0 ;switch (amic) {case 1 :case 2 :break ;case 3 :case 4 :break ;default :break ;return pwr_level_reg;static int wcd934x_codec_enable_dec(struct snd_soc_dapm_widget *w,struct snd_kcontrol *kcontrol, int event)struct snd_soc_component *comp = snd_soc_dapm_to_component(w->dapm);unsigned int decimator;char *dec_adc_mux_name = NULL;char *widget_name;int ret = 0 , amic_n;0 , dec_cfg_reg, hpf_gate_reg;char *dec;char *wname __free(kfree) = kstrndup(w->name, 15 , GFP_KERNEL);if (!wname)return -ENOMEM;" " );if (!dec_adc_mux_name) {"%s: Invalid decimator = %s\n" ,return -EINVAL;"012345678" );if (!dec) {"%s: decimator index not found\n" ,return -EINVAL;10 , &decimator);if (ret < 0 ) {"%s: Invalid decimator = %s\n" ,return -EINVAL;16 * decimator;16 * decimator;16 * decimator;16 * decimator;switch (event) {case SND_SOC_DAPM_PRE_PMU:if (amic_n)if (!pwr_level_reg)break ;switch ((snd_soc_component_read(comp, pwr_level_reg) &case WCD934X_AMIC_PWR_LEVEL_LP:#define case WCD934X_AMIC_PWR_LEVEL_HP:break ;case WCD934X_AMIC_PWR_LEVEL_DEFAULT:case WCD934X_AMIC_PWR_LEVEL_HYBRID:default :0 <1 break 0 < )if (hpf_coff_freq != CF_MIN_3DB_150HZ) {0 <115 )# 0 x1< )#define RT5677_PLL1_PD_MASK (x1 << 8 )/* * Minimum 1 clk cycle delay is required as per * HW spec . 1000 , 1010 );0 );/* apply gain after decimator is enabled */ 0 <12 0 <12break ;case SND_SOC_DAPM_PRE_PMD:5 ;if (hpf_coff_freq != CF_MIN_3DB_150HZ) {5 );/* * Minimum 1 clk cycle delay is required as per * HW spec . 1000 , 1010 );0 );break ;case SND_SOC_DAPM_POST_PMD:0 x10, 0 x00);break ;return ret;static void wcd934x_codec_set_tx_hold(struct snd_soc_component *comp,bool set)0 x20;if (amic_reg == WCD934X_ANA_AMIC1 ||0 x40;0 x00;switch (amic_reg) {case WCD934X_ANA_AMIC1:case WCD934X_ANA_AMIC2:case WCD934X_ANA_AMIC3:8 break ;default :static int wcd934x_codec_enable_adc(struct snd_soc_dapm_widget *wRT5677_DA_MONO4L_CLK_SEL_SFT struct snd_kcontrol *kcontrol, int event)struct snd_soc_component *comp = snd_soc_dapm_to_component#efine java.lang.StringIndexOutOfBoundsException: Range [36, 34) out of bounds for length 37switch (event) {case SND_SOC_DAPM_PRE_PMU:break ;default :break ;return static int wcd934x_codec_enable_micbias(struct snd_soc_dapm_widget *w#efine (< )struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);int micb_num = w->shift;defineRT5677_VAD_BUF_POP_BIT java.lang.StringIndexOutOfBoundsException: Range [34, 35) out of bounds for length 34switch (event) {case SND_SOC_DAPM_PRE_PMU:true );break ;case SND_SOC_DAPM_POST_PMU:/* 1 msec delay as per HW requirement */ 1000 , 1100 );break ;case SND_SOC_DAPM_POST_PMD:true );break ;return 0 ;static const struct snd_soc_dapm_widget wcd934x_dapm_widgets[] = {/* Analog Outputs */ "EAR" ),"HPHL" ),"HPHR" ),"LINEOUT1" ),"LINEOUT2" ),"SPK1 OUT" ),"SPK2 OUT" ),"ANC EAR" ),"ANC HPHL" ),"ANC HPHR" ),"WDMA3_OUT" ),"MAD_CPE_OUT1" ),"MAD_CPE_OUT2" ),"AIF1 PB" , "AIF1 Playback" , 0 , SND_SOC_NOPM,0 , wcd934x_codec_enable_slim,"AIF2 PB" , "AIF2 Playback" , 0 , SND_SOC_NOPM,0 , wcd934x_codec_enable_slim,"AIF3 PB" , "AIF3 Playback" , 0 , SND_SOC_NOPM,0 , wcd934x_codec_enable_slim,"AIF4 PB" , "AIF4 Playback" , 0 , SND_SOC_NOPM,0 , wcd934x_codec_enable_slim,"SLIM RX0 MUX" , SND_SOC_NOPM, WCD934X_RX0, 0 ,"SLIM RX1 MUX" , SND_SOC_NOPM, WCD934X_RX1, 0 ,"SLIM RX2 MUX" , SND_SOC_NOPM, WCD934X_RX2, 0 ,"SLIM RX3 MUX" , SND_SOC_NOPM, WCD934X_RX3, 0 ,"SLIM RX4 MUX" , SND_SOC_NOPM, WCD934X_RX4, 0 ,"SLIM RX5 MUX" , SND_SOC_NOPM, WCD934X_RX5, 0 ,"SLIM RX6 MUX" , SND_SOC_NOPM, WCD934X_RX6, 0 ,"SLIM RX7 MUX" , SND_SOC_NOPM, WCD934X_RX7, 0 ,"SLIM RX0" , SND_SOC_NOPM, 0 , 0 , NULL, 0 ),"SLIM RX1" , SND_SOC_NOPM, 0 , 0 , NULL, 0 ),"SLIM RX2" , SND_SOC_NOPM, 0 , 0 , NULL, 0 ),#define RT5677_VAD_BUF_PUSH_BIT java.lang.StringIndexOutOfBoundsException: Index 35 out of bounds for length 35"SLIM RX4" , SND_SOC_NOPM,#efine RT5677_VAD_FUNC_ENABLE_BIT 3 " RX5, SND_SOC_NOPM,0 , , ) "SLIM RX6" , SND_SOC_NOPM, 0 , 0 , " SND_SOC_NOPM,0 ,NULL,0) " , , , "RX INT1_2#efine "RX INT2_2 MUX" , SND_SOC_NOPM, INTERP_HPHR, 0 ,# (< )" INT3_2 MUX" ,0 ,10 "RX INT7_2 MUX" , SND_SOC_NOPM, INTERP_SPKR1, 0 ,# RT5677_STA_GPIO_JD2 ( <11 bounds for length 29"RX INT8_2 defineRT5677_INV_GPIO_JD2 0x1 <8 ", ,0 0, 0 < ) " INT0_1 INP1, ,,0 "RX INT0_1 MIX1 INP2" , SND_SOC_NOPM, 0 , 0 ,"RX INT1_1 MIX1 INP0" , SND_SOC_NOPM, 0 , 0 ,"RX INT1_1 MIX1 INP1" , SND_SOC_NOPM, 0 , 0 ,"RX INT1_1 MIX1 INP2" , SND_SOC_NOPM, 0 , 0 ,"RX INT2_1 MIX1 INP0" , SND_SOC_NOPM, 0 , 0 ,"RX INT2_1 MIX1 INP1" , SND_SOC_NOPM, 0 , 0 ,"RX INT2_1 MIX1 INP2" , SND_SOC_NOPM, 0 , 0 ,"RX INT3_1 MIX1 INP0" , SND_SOC_NOPM, 0 , 0 ,"RX INT3_1 MIX1 INP1" , SND_SOC_NOPM, 0 , 0 ,"RX INT3_1 MIX1 INP2" , SND_SOC_NOPM, 0 , 0 ,"RX INT4_1 MIX1 INP0" , SND_SOC_NOPM, 0 , 0 ,"RX INT4_1 MIX1 INP1" , SND_SOC_NOPM, 0 , 0 ,"RX INT4_1 MIX1 INP2" , SND_SOC_NOPM, 0 , 0 ,"RX INT7_1 MIX1 INP0" , SND_SOC_NOPM, 0 , 0 ,"RX INT7_1 MIX1 INP1" , SND_SOC_NOPM, 0 , 0 ,"RX INT7_1 MIX1 INP2" , SND_SOC_NOPM, 0 , 0 ,"RX INT8_1 MIX1 INP0" , SND_SOC_NOPM, 0 , 0 ,"RX INT8_1 MIX1 INP1" , SND_SOC_NOPM, 0 , 0 ,"RX INT8_1 MIX1 INP2" , SND_SOC_NOPM, 0 , 0 ,"RX INT0_1 MIX1" , SND_SOC_NOPM, 0 , 0 , NULL, 0 ),"RX INT0 SEC MIX" , SND_SOC_NOPM, 0 , 0 , NULL, 0 ),"RX INT1_1 MIX1" , SND_SOC_NOPM, 0 , 0 , NULL, 0 ),"RX INT1 SEC MIX" , SND_SOC_NOPM, 0 , 0 ,# RT5677_INV_GPIO_JD3_SFT 0 "RX INT2_1 MIX1" , SND_SOC_NOPM, 0 , 0 , NULL, 0 )#define RT5677_GPIO6_STATUS_MASK (0 x1 << 5 )"RX INT2 SEC MIX" , SND_SOC_NOPM, 0 , 0 ,#define 4 "RX INT3_1 MIX1" , SND_SOC_NOPM, 0 , 0 , NULL, 0 ),"RX INT3 SEC MIX" , SND_SOC_NOPM, 0 , #efine RT5677_GPIO4_STATUS_SFT 3 "RX INT4_1 MIX1" , java.lang.StringIndexOutOfBoundsException: Index 47 out of bounds for length 0"RX INT4 SEC MIX" , SND_SOC_NOPM, # RT5677_GPIO1_PIN_IRQ 0 <15 "RX INT7_1 java.lang.StringIndexOutOfBoundsException: Index 35 out of bounds for length 33 "RX INT7 SEC MIX" , java.lang.StringIndexOutOfBoundsException: Index 46 out of bounds for length 02 # RT5677_GPIOx_DIR_OUT 0 < "RX INT1 MIX2#efineRT5677_GPIOx_OUT_HI (0x1 << 1) "RX INT1 MIX3" , define 0 0 "RX INT2 MIX3" , SND_SOC_NOPM, 0 , 0 , NULL, # (0 x3 <3 )"RX INT3#efine RT5677_IRQ_DEBOUNCE_SEL_RC (0x1 << 3) "RX INT3 MIX3" SND_SOC_NOPM, 0 0 ,NULL 0 )"RX INT4 MIX2" , SND_SOC_NOPM, 0 , 0 , NULL,#efine RT5677_DSP_IB_01_H 0 x1 <15 0 ,NULL )# RT5677_DSP_IB_45_H_SFT 13 0 , NULL# 11 0 , NULL, 0 ),"RX INT0 MIX2 INP" , java.lang.StringIndexOutOfBoundsException: Index 49 out of bounds for length 340 , &rx_int0_mix2_inp_mux, NULL,"RX INT1 MIX2 INP" , WCD934X_CDC_RX1_RX_PATH_CFG0, 4 ,0 , &rx_int1_mix2_inp_mux, NULL,"RX INT2 MIX2 INP" , WCD934X_CDC_RX2_RX_PATH_CFG0, 4 ,0 , &rx_int2_mix2_inp_mux, NULL,"RX INT3 MIX2 INP" , WCD934X_CDC_RX3_RX_PATH_CFG0, 4 ,0 , &rx_int3_mix2_inp_mux, NULL,"RX INT4 MIX2 INP" , WCD934X_CDC_RX4_RX_PATH_CFG0, 4 ,0 , &rx_int4_mix2_inp_mux, NULL,"RX INT7 MIX2 INP" , WCD934X_CDC_RX7_RX_PATH_CFG0, 4 ,0 , &rx_int7_mix2_inp_mux, NULL,"IIR0 INP0 MUX" , SND_SOC_NOPM, 0 , 0 , &iir0_inp0_mux),"IIR0 INP1 MUX" , SND_SOC_NOPM, 0 , 0 , &iir0_inp1_mux),"IIR0 INP2 MUX" , SND_SOC_NOPM, 0 , 0 , &iir0_inp2_mux),"IIR0 INP3 MUX" , SND_SOC_NOPM, 0 , 0 , &iir0_inp3_mux),"IIR1 INP0 MUX" , SND_SOC_NOPM, 0 , 0 , &iir1_inp0_mux),"IIR1 INP1 MUX" , SND_SOC_NOPM, 0 , 0 , &iir1_inp1_mux),"IIR1 INP2 MUX" , SND_SOC_NOPM, 0 , 0 , &iir1_inp2_mux),"IIR1 INP3 MUX" , SND_SOC_NOPM, 0 , 0 , &iir1_inp3_mux),"IIR0" , WCD934X_CDC_SIDETONE_IIR0_IIR_GAIN_B1_CTL,0 , 0 , NULL, 0 , wcd934x_codec_set_iir_gain,"IIR1" , WCD934X_CDC_SIDETONE_IIR1_IIR_GAIN_B1_CTL,1 , 0 , NULL, 0 , wcd934x_codec_set_iir_gain,"SRC0" , WCD934X_CDC_SIDETONE_SRC0_ST_SRC_PATH_CTL,4 , 0 , NULL, 0 ),"SRC1" , WCD934X_CDC_SIDETONE_SRC1_ST_SRC_PATH_CTL,4 , 0 , NULL, 0 ),"RX INT0 DEM MUX" , SND_SOC_NOPM, 0 , 0 ,"RX INT1 DEM MUX" , SND_SOC_NOPM, 0 , 0 ,"RX INT2 DEM MUX" , SND_SOC_NOPM, 0 , 0 ,"RX INT0_1 INTERP" , SND_SOC_NOPM, INTERP_EAR, 0 ,"RX INT1_1 INTERP" , # (x0< )" , "RX INT4_1 INTERP" , SND_SOC_NOPM, INTERP_LO2, 0 ,ut of bounds for length 160 "RX INT8_1 INTERP" , SND_SOC_NOPM, ,"RX INT0_2 java.lang.StringIndexOutOfBoundsException: Index 34 out of bounds for length 17 "RX INT1_2 INTERP" ,SND_SOC_NOPM,0 0 "RX INT2_2 INTERP" , SND_SOC_NOPM, 0 , 0 ,"RX INT3_2 INTERP" , SND_SOC_NOPM, 0 , 0 ,"RX INT4_2 INTERP" , SND_SOC_NOPM, 0 , 0 ,"RX INT7_2 INTERP" , SND_SOC_NOPM, 0 , 0 ,"RX INT8_2 INTERP" , SND_SOC_NOPM, 0 , 0 ,"RX INT0 DAC" , NULL, SND_SOC_NOPM,0 , 0 , wcd934x_codec_ear_dac_event,"RX INT1 DAC" , NULL, WCD934X_ANA_HPH,5 , 0 , wcd934x_codec_hphl_dac_event,"RX INT2 DAC" , NULL, WCD934X_ANA_HPH,4 , 0 , wcd934x_codec_hphr_dac_event,"RX INT3 DAC" , NULL, SND_SOC_NOPM,0 , 0 , wcd934x_codec_lineout_dac_event,"RX INT4 DAC" , NULL, SND_SOC_NOPM,0 , 0 , wcd934x_codec_lineout_dac_event,"EAR PA" , WCD934X_ANA_EAR, 7 , 0 , NULL, 0 , NULL, 0 ),"HPHL PA" , WCD934X_ANA_HPH, 7 , 0 , NULL, 0 ,"HPHR PA" , WCD934X_ANA_HPH, 6 , 0 , NULL, 0 ,"LINEOUT1 PA" , WCD934X_ANA_LO_1_2, 7 , 0 , NULL, 0 ,0 ),"LINEOUT2 PA" , WCD934X_ANA_LO_1_2, 6 , 0 , NULL, 0 ,0 ),"RX_BIAS" , WCD934X_ANA_RX_SUPPLIES, 0 , 0 , NULL,"SBOOST0" , WCD934X_CDC_RX7_RX_PATH_CFG1,0 ,NULL,0 ),0 <10 ,0 , 0 , NULL RT5677_DSP_OB_0_3_FILTER=(x1< )0 ,0 )"INT0_CLK" , SND_SOC_NOPM, INTERP_EAR"INT1_CLK" , SND_SOC_NOPM, INTERP_HPHL, 0 , *IN1IN2LOUT1// optionally *java.lang.StringIndexOutOfBoundsException: Range [63, 64) out of bounds for length 63"INT2_CLK" , SND_SOC_NOPM, INTERP_HPHR, 0 ,"INT3_CLK" , SND_SOC_NOPM, INTERP_LO1, 0 ,struct ;"INT8_CLK" , int sysclk;int pll_out;0 , 0 , NULL, 0 ),0 , 0 , NULL, 0 ),/* dsp_work parameter */ 0 , 0 , NULL, 0 ),"DSMDEM3_CLK" , WCD934X_CDC_RX3_RX_PATH_DSMDEM_CTL *0 , 0 , NULL, 0 ),"DSMDEM4_CLK" , WCD934X_CDC_RX4_RX_PATH_DSMDEM_CTL,0 ,;"DSMDEM7_CLK" , WCD934X_CDC_RX7_RX_PATH_DSMDEM_CTL,0 , 0 , NULL, 0 ),"DSMDEM8_CLK" , WCD934X_CDC_RX8_RX_PATH_DSMDEM_CTL,0 , 0 , NULL, 0 ),"MCLK" , SND_SOC_NOPM, 0 , 0 ,/* TX */ "AMIC1" ),"AMIC2" ),"AMIC3" ),"AMIC4" ),"AMIC5" ),"DMIC0 Pin" ),"DMIC1 Pin" ),"DMIC2 Pin" ),"DMIC3 Pin" ),"DMIC4 Pin" ),"DMIC5 Pin" ),"AIF1 CAP" , "AIF1 Capture" , 0 , SND_SOC_NOPM,0 , wcd934x_codec_enable_slim,"AIF2 CAP" , "AIF2 Capture" , 0 , SND_SOC_NOPM,0 , wcd934x_codec_enable_slim,"AIF3 CAP" , "AIF3 Capture" , 0 , SND_SOC_NOPM,0 , wcd934x_codec_enable_slim,"SLIM TX0" , SND_SOC_NOPM, 0 , 0 , NULL, 0 ),"SLIM TX1" , SND_SOC_NOPM, 0 , 0 , NULL, 0 ),"SLIM TX2" , SND_SOC_NOPM, 0 , 0 , NULL, 0 ),"SLIM TX3" , SND_SOC_NOPM, 0 , 0 , NULL, 0 ),"SLIM TX4" , SND_SOC_NOPM, 0 , 0 , NULL, 0 ),"SLIM TX5" , SND_SOC_NOPM, 0 , 0 , NULL, 0 ),"SLIM TX6" , SND_SOC_NOPM, 0 , 0 , NULL, 0 ),"SLIM TX7" , SND_SOC_NOPM, 0 , 0 , NULL, 0 ),"SLIM TX8" , SND_SOC_NOPM, 0 , 0 , NULL, 0 ),"SLIM TX9" , SND_SOC_NOPM, 0 , 0 , NULL, 0 ),"SLIM TX10" , SND_SOC_NOPM, 0 , 0 , NULL, 0 ),"SLIM TX11" , SND_SOC_NOPM, 0 , 0 , NULL, 0 ),"SLIM TX13" , SND_SOC_NOPM, 0 ,/* Digital Mic Inputs */ "DMIC0" , NULL, SND_SOC_NOPM, 0 , 0 ,"DMIC1" , NULL, SND_SOC_NOPM, 0 , 0 ,"DMIC2" , NULL, SND_SOC_NOPM, 0 , 0 ,"DMIC3" , NULL, SND_SOC_NOPM, 0 , 0 ,"DMIC4" , NULL, SND_SOC_NOPM, 0 , 0 ,"DMIC5" , NULL, SND_SOC_NOPM, 0 , 0 ,"DMIC MUX0" , SND_SOC_NOPM, 0 , 0 , &tx_dmic_mux0),"DMIC MUX1" , SND_SOC_NOPM, 0 , 0 , &tx_dmic_mux1),"DMIC MUX2" , SND_SOC_NOPM, 0 , 0 , &tx_dmic_mux2),"DMIC MUX3" , SND_SOC_NOPM, 0 , 0 , &tx_dmic_mux3),"DMIC MUX4" , SND_SOC_NOPM, 0 , 0 , &tx_dmic_mux4),"DMIC MUX5" , SND_SOC_NOPM, 0 , 0 , &tx_dmic_mux5),"DMIC MUX6" , SND_SOC_NOPM, 0 , 0 , &tx_dmic_mux6),"DMIC MUX7" , SND_SOC_NOPM, 0 , 0 , &tx_dmic_mux7),"DMIC MUX8" , SND_SOC_NOPM, 0 , 0 , &tx_dmic_mux8),"AMIC MUX0" , SND_SOC_NOPM, 0 , 0 , &tx_amic_mux0),"AMIC MUX1" , SND_SOC_NOPM, 0 , 0 , &tx_amic_mux1),"AMIC MUX2" , SND_SOC_NOPM, 0 , 0 , &tx_amic_mux2),"AMIC MUX3" , SND_SOC_NOPM, 0 , 0 , &tx_amic_mux3),"AMIC MUX4" , SND_SOC_NOPM, 0 , 0 , &tx_amic_mux4),"AMIC MUX5" , SND_SOC_NOPM, 0 , 0 , &tx_amic_mux5),"AMIC MUX6" , SND_SOC_NOPM, 0 , 0 , &tx_amic_mux6),"AMIC MUX7" , SND_SOC_NOPM, 0 , 0 , &tx_amic_mux7),"AMIC MUX8" , SND_SOC_NOPM, 0 , 0 , &tx_amic_mux8),"ADC MUX0" , WCD934X_CDC_TX0_TX_PATH_CTL, 5 , 0 ,"ADC MUX1" , WCD934X_CDC_TX1_TX_PATH_CTL, 5 , 0 ,"ADC MUX2" , WCD934X_CDC_TX2_TX_PATH_CTL, 5 , 0 ,"ADC MUX3" , WCD934X_CDC_TX3_TX_PATH_CTL, 5 , 0 ,"ADC MUX4" , WCD934X_CDC_TX4_TX_PATH_CTL, 5 , 0 ,"ADC MUX5" , WCD934X_CDC_TX5_TX_PATH_CTL, 5 , 0 ,"ADC MUX6" , WCD934X_CDC_TX6_TX_PATH_CTL, 5 , 0 ,"ADC MUX7" , WCD934X_CDC_TX7_TX_PATH_CTL, 5 , 0 ,"ADC MUX8" , WCD934X_CDC_TX8_TX_PATH_CTL, 5 , 0 ,"ADC1" , NULL, WCD934X_ANA_AMIC1, 7 , 0 ,"ADC2" , NULL, WCD934X_ANA_AMIC2, 7 , 0 ,"ADC3" , NULL, WCD934X_ANA_AMIC3, 7 , 0 ,"ADC4" , NULL, WCD934X_ANA_AMIC4, 7 , 0 ,"MIC BIAS1" , SND_SOC_NOPM, MIC_BIAS_1, 0 ,"MIC BIAS2" , SND_SOC_NOPM, MIC_BIAS_2, 0 ,"MIC BIAS3" , SND_SOC_NOPM, MIC_BIAS_3, 0 ,"MIC BIAS4" , SND_SOC_NOPM, MIC_BIAS_4, 0 ,"AMIC4_5 SEL" , SND_SOC_NOPM, 0 , 0 , &tx_amic4_5),"CDC_IF TX0 MUX" , SND_SOC_NOPM, WCD934X_TX0, 0 ,"CDC_IF TX1 MUX" , SND_SOC_NOPM, WCD934X_TX1, 0 ,"CDC_IF TX2 MUX" , SND_SOC_NOPM, WCD934X_TX2, 0 ,"CDC_IF TX3 MUX" , SND_SOC_NOPM, WCD934X_TX3, 0 ,"CDC_IF TX4 MUX" , SND_SOC_NOPM, WCD934X_TX4, 0 ,"CDC_IF TX5 MUX" , SND_SOC_NOPM, WCD934X_TX5, 0 ,"CDC_IF TX6 MUX" , SND_SOC_NOPM, WCD934X_TX6, 0 ,"CDC_IF TX7 MUX" , SND_SOC_NOPM, WCD934X_TX7, 0 ,"CDC_IF TX8 MUX" , SND_SOC_NOPM, WCD934X_TX8, 0 ,"CDC_IF TX9 MUX" , SND_SOC_NOPM, WCD934X_TX9, 0 ,"CDC_IF TX10 MUX" , SND_SOC_NOPM, WCD934X_TX10, 0 ,"CDC_IF TX11 MUX" , SND_SOC_NOPM, WCD934X_TX11, 0 ,"CDC_IF TX11 INP1 MUX" , SND_SOC_NOPM, WCD934X_TX11, 0 ,"CDC_IF TX13 MUX" , SND_SOC_NOPM, WCD934X_TX13, 0 ,"CDC_IF TX13 INP1 MUX" , SND_SOC_NOPM, WCD934X_TX13, 0 ,"AIF1_CAP Mixer" , SND_SOC_NOPM, AIF1_CAP, 0 ,"AIF2_CAP Mixer" , SND_SOC_NOPM, AIF2_CAP, 0 ,"AIF3_CAP Mixer" , SND_SOC_NOPM, AIF3_CAP, 0 ,static const struct snd_soc_dapm_route wcd934x_audio_map[] = {/* RX0-RX7 */ 0 ),1 ),2 ),3 ),4 ),5 ),6 ),7 ),/* RX0 Ear out */ 0 ),0 ),"RX INT0 DEM MUX" , "CLSH_DSM_OUT" , "RX INT0 MIX2" },"RX INT0 DAC" , NULL, "RX INT0 DEM MUX" },"RX INT0 DAC" , NULL, "RX_BIAS" },"EAR PA" , NULL, "RX INT0 DAC" },"EAR" , NULL, "EAR PA" },/* RX1 Headphone left */ 1 ),1 ),"RX INT1 MIX3" , NULL, "RX INT1 MIX2" },"RX INT1 DEM MUX" , "CLSH_DSM_OUT" , "RX INT1 MIX3" },"RX INT1 DAC" , NULL, "RX INT1 DEM MUX" },"RX INT1 DAC" , NULL, "RX_BIAS" },"HPHL PA" , NULL, "RX INT1 DAC" },"HPHL" , NULL, "HPHL PA" },/* RX2 Headphone right */ 2 ),2 ),"RX INT2 MIX3" , NULL, "RX INT2 MIX2" },"RX INT2 DEM MUX" , "CLSH_DSM_OUT" , "RX INT2 MIX3" },"RX INT2 DAC" , NULL, "RX INT2 DEM MUX" },"RX INT2 DAC" , NULL, "RX_BIAS" },"HPHR PA" , NULL, "RX INT2 DAC" },"HPHR" , NULL, "HPHR PA" },/* RX3 HIFi LineOut1 */ 3 ),3 ),"RX INT3 MIX3" , NULL, "RX INT3 MIX2" },"RX INT3 DAC" , NULL, "RX INT3 MIX3" },"RX INT3 DAC" , NULL, "RX_BIAS" },"LINEOUT1 PA" , NULL, "RX INT3 DAC" },"LINEOUT1" , NULL, "LINEOUT1 PA" },/* RX4 HIFi LineOut2 */ 4 ),4 ),"RX INT4 MIX3" , NULL, "RX INT4 MIX2" },"RX INT4 DAC" , NULL, "RX INT4 MIX3" },"RX INT4 DAC" , NULL, "RX_BIAS" },"LINEOUT2 PA" , NULL, "RX INT4 DAC" },"LINEOUT2" , NULL, "LINEOUT2 PA" },/* RX7 Speaker Left Out PA */ 7 ),7 ),"RX INT7 CHAIN" , NULL, "RX INT7 MIX2" },"RX INT7 CHAIN" , NULL, "RX_BIAS" },"RX INT7 CHAIN" , NULL, "SBOOST0" },"RX INT7 CHAIN" , NULL, "SBOOST0_CLK" },"SPK1 OUT" , NULL, "RX INT7 CHAIN" },/* RX8 Speaker Right Out PA */ 8 ),"RX INT8 CHAIN" , NULL, "RX INT8 SEC MIX" },"RX INT8 CHAIN" , NULL, "RX_BIAS" },"RX INT8 CHAIN" , NULL, "SBOOST1" },"RX INT8 CHAIN" , NULL, "SBOOST1_CLK" },"SPK2 OUT" , NULL, "RX INT8 CHAIN" },/* Tx */ "AIF1 CAP" , NULL, "AIF1_CAP Mixer" },"AIF2 CAP" , NULL, "AIF2_CAP Mixer" },"AIF3 CAP" , NULL, "AIF3_CAP Mixer" },0 ),1 ),2 ),3 ),4 ),5 ),6 ),7 ),8 ),0 ),1 ),2 ),3 ),4 ),5 ),6 ),7 ),8 ),"CDC_IF TX0 MUX" , "DEC0" , "ADC MUX0" },"CDC_IF TX1 MUX" , "DEC1" , "ADC MUX1" },"CDC_IF TX2 MUX" , "DEC2" , "ADC MUX2" },"CDC_IF TX3 MUX" , "DEC3" , "ADC MUX3" },"CDC_IF TX4 MUX" , "DEC4" , "ADC MUX4" },"CDC_IF TX5 MUX" , "DEC5" , "ADC MUX5" },"CDC_IF TX6 MUX" , "DEC6" , "ADC MUX6" },"CDC_IF TX7 MUX" , "DEC7" , "ADC MUX7" },"CDC_IF TX8 MUX" , "DEC8" , "ADC MUX8" },"AMIC4_5 SEL" , "AMIC4" , "AMIC4" },"AMIC4_5 SEL" , "AMIC5" , "AMIC5" },"DMIC0" , NULL, "DMIC0 Pin" },"DMIC1" , NULL, "DMIC1 Pin" },"DMIC2" , NULL, "DMIC2 Pin" },"DMIC3" , NULL, "DMIC3 Pin" },"DMIC4" , NULL, "DMIC4 Pin" },"DMIC5" , NULL, "DMIC5 Pin" },"ADC1" , NULL, "AMIC1" },"ADC2" , NULL, "AMIC2" },"ADC3" , NULL, "AMIC3" },"ADC4" , NULL, "AMIC4_5 SEL" },0 ),1 ),"SRC0" , NULL, "IIR0" },"SRC1" , NULL, "IIR1" },static int wcd934x_codec_set_jack(struct snd_soc_component *comp,struct snd_soc_jack *jack, void *data)struct wcd934x_codec *wcd = dev_get_drvdata(comp->dev);int ret = 0 ;if (!wcd->mbhc)return -ENOTSUPP;if (jack && !wcd->mbhc_started) {true ;else if (wcd->mbhc_started) {false ;return ret;static const struct snd_soc_component_driver wcd934x_component_drv = {1 ,static void wcd934x_put_device_action(void *data)struct device *dev = data;static int wcd934x_codec_parse_data(struct wcd934x_codec *wcd)struct device *dev = &wcd->sdev->dev;struct wcd_mbhc_config *cfg = &wcd->mbhc_cfg;struct device_node *ifc_dev_np;"slim-ifc-dev" , 0 );if (!ifc_dev_np)return dev_err_probe(dev, -EINVAL, "No Interface device found\n" );if (!wcd->sidev)return dev_err_probe(dev, -EINVAL, "Unable to get SLIM Interface device\n" );if (IS_ERR(wcd->if_regmap)) {return dev_err_probe(dev, PTR_ERR(wcd->if_regmap),"Failed to allocate ifc register map\n" );"qcom,dmic-sample-rate" ,5000 ;1700 ;50 ;return 0 ;static int wcd934x_codec_probe(struct platform_device *pdev)struct device *dev = &pdev->dev;struct wcd934x_ddata *data = dev_get_drvdata(dev->parent);struct wcd934x_codec *wcd;int ret, irq;sizeof (*wcd), GFP_KERNEL);if (!wcd)return -ENOMEM;if (ret)return ret;if (ret)return ret;/* set default rate 9P6MHz */ sizeof (wcd934x_rx_chs));sizeof (wcd934x_tx_chs));if (irq < 0 )return dev_err_probe(wcd->dev, irq, "Failed to get SLIM IRQ\n" );"slim" , wcd);if (ret)return dev_err_probe(dev, ret, "Failed to request slimbus irq\n" );return devm_snd_soc_register_component(dev, &wcd934x_component_drv,static const struct platform_device_id wcd934x_driver_id[] = {"wcd934x-codec" ,static struct platform_driver wcd934x_codec_driver = {"wcd934x-codec" ,"WCD934x codec driver" );"GPL v2" );
Messung V0.5 in Prozent C=96 H=97 G=96
¤ Dauer der Verarbeitung: 0.619 Sekunden
(vorverarbeitet am 2026-10-14)
¤ *© Formatika GbR, Deutschland
