// SPDX-License-Identifier: GPL-2.0-or-later /* * ALSA driver for RME Hammerfall DSP MADI audio interface ( s ) * * Copyright ( c ) 2003 Winfried Ritsch ( IEM ) * code based on hdsp . c Paul Davis * Marcus Andersson * Thomas Charbonnel * Modified 2006 - 06 - 01 for AES32 support by Remy Bruno * < remy . bruno @ trinnov . com > * * Modified 2009 - 04 - 13 for proper metering by Florian Faber * < faber @ faberman . de > * * Modified 2009 - 04 - 14 for native float support by Florian Faber * < faber @ faberman . de > * * Modified 2009 - 04 - 26 fixed bug in rms metering by Florian Faber * < faber @ faberman . de > * * Modified 2009 - 04 - 30 added hw serial number support by Florian Faber * * Modified 2011 - 01 - 14 added S / PDIF input on RayDATs by Adrian Knoth * * Modified 2011 - 01 - 25 variable period sizes on RayDAT / AIO by Adrian Knoth * * Modified 2019 - 05 - 23 fix AIO single speed ADAT capture and playback * by Philippe . Bekaert @ uhasselt . be /* ************* Register Documentation ******************************************************* * * Work in progress ! Documentation is based on the code in this file . * * - - - - - - - - - HDSPM_controlRegister - - - - - - - - - * : 7654 . 3210 : 7654 . 3210 : 7654 . 3210 : 7654 . 3210 : bit number per byte * : | | | | . | | | | : | | | | . | | | | : | | | | . | | | | : | | | | . | | | | : * : 3322 . 2222 : 2222 . 1111 : 1111 . 1100 : 0000 . 0000 : bit number * : 1098 . 7654 : 3210 . 9876 : 5432 . 1098 : 7654 . 3210 : 0 . . 31 * : | | | | . | | | | : | | | | . | | | | : | | | | . | | | | : | | | | . | | | | : * : 8421 . 8421 : 8421 . 8421 : 8421 . 8421 : 8421 . 8421 : hex digit * : . : . : . : x . : HDSPM_AudioInterruptEnable \ _ setting both bits * : . : . : . : . x : HDSPM_Start / enables audio IO * : . : . : . : x . : HDSPM_ClockModeMaster - 1 : Master , 0 : Slave * : . : . : . : . 210 : HDSPM_LatencyMask - 3 Bit value for latency * : . : . : . : . : 0 : 64 , 1 : 128 , 2 : 256 , 3 : 512 , * : . : . : . : . : 4 : 1024 , 5 : 2048 , 6 : 4096 , 7 : 8192 * : x . : . : . x : xx . : HDSPM_FrequencyMask * : . : . : . : 10 . : HDSPM_Frequency1 | HDSPM_Frequency0 : 1 = 32 K , 2 = 44 . 1 K , 3 = 48 K , 0 = ? ? * : . : . : . x : . : < MADI > HDSPM_DoubleSpeed * : x . : . : . : . : < MADI > HDSPM_QuadSpeed * : . 3 : . 10 : 2 . : . : HDSPM_SyncRefMask : * : . : . x : . : . : HDSPM_SyncRef0 * : . : . x : . : . : HDSPM_SyncRef1 * : . : . : x . : . : < AES32 > HDSPM_SyncRef2 * : . x : . : . : . : < AES32 > HDSPM_SyncRef3 * : . : . 10 : . : . : < MADI > sync ref : 0 : WC , 1 : Madi , 2 : TCO , 3 : SyncIn * : . 3 : . 10 : 2 . : . : < AES32 > 0 : WC , 1 : AES1 . . . 8 : AES8 , 9 : TCO , 10 : SyncIn ? * : . x : . : . : . : < MADIe > HDSPe_FLOAT_FORMAT * : . : . : x . : . : < MADI > HDSPM_InputSelect0 : 0 = optical , 1 = coax * : . : . : x . : . : < MADI > HDSPM_InputSelect1 * : . : . x : . : . : < MADI > HDSPM_clr_tms * : . : . : . x : . : < MADI > HDSPM_TX_64ch * : . : . : . x : . : < AES32 > HDSPM_Emphasis * : . : . : . x : . : < MADI > HDSPM_AutoInp * : . : . x : . : . : < MADI > HDSPM_SMUX * : . : . x : . : . : < MADI > HDSPM_clr_tms * : . : x . : . : . : < MADI > HDSPM_taxi_reset * : . x : . : . : . : < MADI > HDSPM_LineOut * : . x : . : . : . : < AES32 > ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? * : . : x . : . : . : < AES32 > HDSPM_WCK48 * : . : . : . x : . : < AES32 > HDSPM_Dolby * : . : x . : . : . : HDSPM_Midi0InterruptEnable * : . : x . : . : . : HDSPM_Midi1InterruptEnable * : . : x . : . : . : HDSPM_Midi2InterruptEnable * : . x : . : . : . : < MADI > HDSPM_Midi3InterruptEnable * : . x : . : . : . : < AES32 > HDSPM_DS_DoubleWire * : . x : . : . : . : < AES32 > HDSPM_QS_DoubleWire * : x . : . : . : . : < AES32 > HDSPM_QS_QuadWire * : . : . : . x : . : < AES32 > HDSPM_Professional * : x . : . : . : . : HDSPM_wclk_sel * : . : . : . : . : * : 7654 . 3210 : 7654 . 3210 : 7654 . 3210 : 7654 . 3210 : bit number per byte * : | | | | . | | | | : | | | | . | | | | : | | | | . | | | | : | | | | . | | | | : * : 3322 . 2222 : 2222 . 1111 : 1111 . 1100 : 0000 . 0000 : bit number * : 1098 . 7654 : 3210 . 9876 : 5432 . 1098 : 7654 . 3210 : 0 . . 31 * : | | | | . | | | | : | | | | . | | | | : | | | | . | | | | : | | | | . | | | | : * : 8421 . 8421 : 8421 . 8421 : 8421 . 8421 : 8421 . 8421 : hex digit * * * * AIO / RayDAT only * * - - - - - - - - - - - - HDSPM_WR_SETTINGS - - - - - - - - - - * : 3322 . 2222 : 2222 . 1111 : 1111 . 1100 : 0000 . 0000 : bit number per byte * : 1098 . 7654 : 3210 . 9876 : 5432 . 1098 : 7654 . 3210 : * : | | | | . | | | | : | | | | . | | | | : | | | | . | | | | : | | | | . | | | | : bit number * : 7654 . 3210 : 7654 . 3210 : 7654 . 3210 : 7654 . 3210 : 0 . . 31 * : | | | | . | | | | : | | | | . | | | | : | | | | . | | | | : | | | | . | | | | : * : 8421 . 8421 : 8421 . 8421 : 8421 . 8421 : 8421 . 8421 : hex digit * : . : . : . : . x : HDSPM_c0Master 1 : Master , 0 : Slave * : . : . : . : . x : HDSPM_c0_SyncRef0 * : . : . : . : . x : HDSPM_c0_SyncRef1 * : . : . : . : . x : HDSPM_c0_SyncRef2 * : . : . : . : x . : HDSPM_c0_SyncRef3 * : . : . : . : 3 . 210 : HDSPM_c0_SyncRefMask : * : . : . : . : . : RayDat : 0 : WC , 1 : AES , 2 : SPDIF , 3 . . 6 : ADAT1 . . 4 , * : . : . : . : . : 9 : TCO , 10 : SyncIn * : . : . : . : . : AIO : 0 : WC , 1 : AES , 2 : SPDIF , 3 : ATAT , * : . : . : . : . : 9 : TCO , 10 : SyncIn * : . : . : . : . : * : . : . : . : . : * : 3322 . 2222 : 2222 . 1111 : 1111 . 1100 : 0000 . 0000 : bit number per byte * : 1098 . 7654 : 3210 . 9876 : 5432 . 1098 : 7654 . 3210 : * : | | | | . | | | | : | | | | . | | | | : | | | | . | | | | : | | | | . | | | | : bit number * : 7654 . 3210 : 7654 . 3210 : 7654 . 3210 : 7654 . 3210 : 0 . . 31 * : | | | | . | | | | : | | | | . | | | | : | | | | . | | | | : | | | | . | | | | : * : 8421 . 8421 : 8421 . 8421 : 8421 . 8421 : 8421 . 8421 : hex digit * #include <linux/init.h>#include <linux/delay.h>#include <linux/interrupt.h>#include <linux/module.h>#include <linux/slab.h>#include <linux/pci.h>#include <linux/math64.h>#include <linux/io.h>#include <linux/nospec.h>#include <sound/core.h>#include <sound/control.h>#include <sound/pcm.h>#include <sound/pcm_params.h>#include <sound/info.h>#include <sound/asoundef.h>#include <sound/rawmidi.h>#include <sound/hwdep.h>#include <sound/initval.h>#include <sound/hdspm.h>static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;/* Enable this card */ int , NULL, 0444 );"Index value for RME HDSPM interface." );0444 );"ID string for RME HDSPM interface." );bool , NULL, 0444 );"Enable/disable specific HDSPM soundcards." );"Winfried Ritsch <ritsch_AT_iem.at>, " "Paul Davis <paul@linuxaudiosystems.com>, " "Marcus Andersson, Thomas Charbonnel <thomas@undata.org>, " "Remy Bruno <remy.bruno@trinnov.com>, " "Florian Faber <faberman@linuxproaudio.org>, " "Adrian Knoth <adi@drcomp.erfurt.thur.de>" "RME HDSPM" );"GPL" );/* --- Write registers. --- #define HDSPM_WR_SETTINGS 0 #define HDSPM_outputBufferAddress 32 #define HDSPM_inputBufferAddress 36 #define HDSPM_controlRegister 64 #define HDSPM_interruptConfirmation 96 #define HDSPM_control2Reg 256 /* not in specs ???????? */ #define HDSPM_freqReg 256 /* for setting arbitrary clock values (DDS feature) */ #define HDSPM_midiDataOut0 352 /* just believe in old code */ #define HDSPM_midiDataOut1 356 #define HDSPM_eeprom_wr 384 /* for AES32 */ /* DMA enable for 64 channels, only Bit 0 is relevant */ #define HDSPM_outputEnableBase 512 /* 512-767 input DMA */ #define HDSPM_inputEnableBase 768 /* 768-1023 output DMA */ /* 16 page addresses for each of the 64 channels DMA buffer in and out #define HDSPM_pageAddressBufferOut 8192 #define HDSPM_pageAddressBufferIn (HDSPM_pageAddressBufferOut+64 *16 *4 )#define HDSPM_MADI_mixerBase 32768 /* 32768-65535 for 2x64x64 Fader */ #define HDSPM_MATRIX_MIXER_SIZE 8192 /* = 2*64*64 * 4 Byte => 32kB */ /* --- Read registers. --- #define HDSPM_statusRegister 0 /*#define HDSPM_statusRegister2 96 */ /* after RME Windows driver sources, status2 is 4-byte word # 48 = word at * offset 192 , for AES32 * and * MADI #define HDSPM_statusRegister2 192 #define HDSPM_timecodeRegister 128 /* AIO, RayDAT */ #define HDSPM_RD_STATUS_0 0 #define HDSPM_RD_STATUS_1 64 #define HDSPM_RD_STATUS_2 128 #define HDSPM_RD_STATUS_3 192 #define HDSPM_RD_TCO 256 #define HDSPM_RD_PLL_FREQ 512 #define HDSPM_WR_TCO 128 #define HDSPM_TCO1_TCO_lock 0 x00000001#define HDSPM_TCO1_WCK_Input_Range_LSB 0 x00000002#define HDSPM_TCO1_WCK_Input_Range_MSB 0 x00000004#define HDSPM_TCO1_LTC_Input_valid 0 x00000008#define HDSPM_TCO1_WCK_Input_valid 0 x00000010#define HDSPM_TCO1_Video_Input_Format_NTSC 0 x00000020#define HDSPM_TCO1_Video_Input_Format_PAL 0 x00000040#define HDSPM_TCO1_set_TC 0 x00000100#define HDSPM_TCO1_set_drop_frame_flag 0 x00000200#define HDSPM_TCO1_LTC_Format_LSB 0 x00000400#define HDSPM_TCO1_LTC_Format_MSB 0 x00000800#define HDSPM_TCO2_TC_run 0 x00010000#define HDSPM_TCO2_WCK_IO_ratio_LSB 0 x00020000#define HDSPM_TCO2_WCK_IO_ratio_MSB 0 x00040000#define HDSPM_TCO2_set_num_drop_frames_LSB 0 x00080000#define HDSPM_TCO2_set_num_drop_frames_MSB 0 x00100000#define HDSPM_TCO2_set_jam_sync 0 x00200000#define HDSPM_TCO2_set_flywheel 0 x00400000#define HDSPM_TCO2_set_01_4 0 x01000000#define HDSPM_TCO2_set_pull_down 0 x02000000#define HDSPM_TCO2_set_pull_up 0 x04000000#define HDSPM_TCO2_set_freq 0 x08000000#define HDSPM_TCO2_set_term_75R 0 x10000000#define HDSPM_TCO2_set_input_LSB 0 x20000000#define HDSPM_TCO2_set_input_MSB 0 x40000000#define HDSPM_TCO2_set_freq_from_app 0 x80000000#define HDSPM_midiDataOut0 352 #define HDSPM_midiDataOut1 356 #define HDSPM_midiDataOut2 368 #define HDSPM_midiDataIn0 360 #define HDSPM_midiDataIn1 364 #define HDSPM_midiDataIn2 372 #define HDSPM_midiDataIn3 376 /* status is data bytes in MIDI-FIFO (0-128) */ #define HDSPM_midiStatusOut0 384 #define HDSPM_midiStatusOut1 388 #define HDSPM_midiStatusOut2 400 #define HDSPM_midiStatusIn0 392 #define HDSPM_midiStatusIn1 396 #define HDSPM_midiStatusIn2 404 #define HDSPM_midiStatusIn3 408 /* the meters are regular i/o-mapped registers, but offset considerably from the rest . the peak registers are reset when read ; the least - significant 4 bits are full - scale counters ; the actual peak value is in the most - significant 24 bits . #define HDSPM_MADI_INPUT_PEAK 4096 #define HDSPM_MADI_PLAYBACK_PEAK 4352 #define HDSPM_MADI_OUTPUT_PEAK 4608 #define HDSPM_MADI_INPUT_RMS_L 6144 #define HDSPM_MADI_PLAYBACK_RMS_L 6400 #define HDSPM_MADI_OUTPUT_RMS_L 6656 #define HDSPM_MADI_INPUT_RMS_H 7168 #define HDSPM_MADI_PLAYBACK_RMS_H 7424 #define HDSPM_MADI_OUTPUT_RMS_H 7680 /* --- Control Register bits --------- */ #define HDSPM_Start (1 <<0 ) /* start engine */ #define HDSPM_Latency0 (1 <<1 ) /* buffer size = 2^n */ #define HDSPM_Latency1 (1 <<2 ) /* where n is defined */ #define HDSPM_Latency2 (1 <<3 ) /* by Latency{2,1,0} */ #define HDSPM_ClockModeMaster (1 <<4 ) /* 1=Master, 0=Autosync */ #define HDSPM_c0Master 0 x1 /* Master clock bit in settings #define HDSPM_AudioInterruptEnable (1 <<5 ) /* what do you think ? */ #define HDSPM_Frequency0 (1 <<6 ) /* 0=44.1kHz/88.2kHz 1=48kHz/96kHz */ #define HDSPM_Frequency1 (1 <<7 ) /* 0=32kHz/64kHz */ #define HDSPM_DoubleSpeed (1 <<8 ) /* 0=normal speed, 1=double speed */ #define HDSPM_QuadSpeed (1 <<31 ) /* quad speed bit */ #define HDSPM_Professional (1 <<9 ) /* Professional */ /* AES32 ONLY */ #define HDSPM_TX_64ch (1 <<10 ) /* Output 64channel MODE=1, /* MADI ONLY*/ #define HDSPM_Emphasis (1 <<10 ) /* Emphasis */ /* AES32 ONLY */ #define HDSPM_AutoInp (1 <<11 ) /* Auto Input (takeover) == Safe Mode, /* MADI ONLY */ #define HDSPM_Dolby (1 <<11 ) /* Dolby = "NonAudio" ?? */ /* AES32 ONLY */ #define HDSPM_InputSelect0 (1 <<14 ) /* Input select 0= optical, 1=coax * - - MADI ONLY #define HDSPM_InputSelect1 (1 <<15 ) /* should be 0 */ #define HDSPM_SyncRef2 (1 <<13 )#define HDSPM_SyncRef3 (1 <<25 )#define HDSPM_SMUX (1 <<18 ) /* Frame ??? */ /* MADI ONY */ #define HDSPM_clr_tms (1 <<19 ) /* clear track marker, do not use AES additional bits in #define HDSPM_taxi_reset (1 <<20 ) /* ??? */ /* MADI ONLY ? */ #define HDSPM_WCK48 (1 <<20 ) /* Frame ??? = HDSPM_SMUX */ /* AES32 ONLY */ #define HDSPM_Midi0InterruptEnable 0 x0400000#define HDSPM_Midi1InterruptEnable 0 x0800000#define HDSPM_Midi2InterruptEnable 0 x0200000#define HDSPM_Midi3InterruptEnable 0 x4000000#define HDSPM_LineOut (1 <<24 ) /* Analog Out on channel 63/64 on=1, mute=0 */ #define HDSPe_FLOAT_FORMAT 0 x2000000#define HDSPM_DS_DoubleWire (1 <<26 ) /* AES32 ONLY */ #define HDSPM_QS_DoubleWire (1 <<27 ) /* AES32 ONLY */ #define HDSPM_QS_QuadWire (1 <<28 ) /* AES32 ONLY */ #define HDSPM_wclk_sel (1 <<30 )/* additional control register bits for AIO*/ #define HDSPM_c0_Wck48 0 x20 /* also RayDAT */ #define HDSPM_c0_Input0 0 x1000#define HDSPM_c0_Input1 0 x2000#define HDSPM_c0_Spdif_Opt 0 x4000#define HDSPM_c0_Pro 0 x8000#define HDSPM_c0_clr_tms 0 x10000#define HDSPM_c0_AEB1 0 x20000#define HDSPM_c0_AEB2 0 x40000#define HDSPM_c0_LineOut 0 x80000#define HDSPM_c0_AD_GAIN0 0 x100000#define HDSPM_c0_AD_GAIN1 0 x200000#define HDSPM_c0_DA_GAIN0 0 x400000#define HDSPM_c0_DA_GAIN1 0 x800000#define HDSPM_c0_PH_GAIN0 0 x1000000#define HDSPM_c0_PH_GAIN1 0 x2000000#define HDSPM_c0_Sym6db 0 x4000000/* --- bit helper defines */ #define HDSPM_LatencyMask (HDSPM_Latency0|HDSPM_Latency1|HDSPM_Latency2)#define HDSPM_FrequencyMask (HDSPM_Frequency0|HDSPM_Frequency1|\#define HDSPM_InputMask (HDSPM_InputSelect0|HDSPM_InputSelect1)#define HDSPM_InputOptical 0 #define HDSPM_InputCoaxial (HDSPM_InputSelect0)#define HDSPM_SyncRefMask (HDSPM_SyncRef0|HDSPM_SyncRef1|\#define HDSPM_c0_SyncRef0 0 x2#define HDSPM_c0_SyncRef1 0 x4#define HDSPM_c0_SyncRef2 0 x8#define HDSPM_c0_SyncRef3 0 x10#define HDSPM_c0_SyncRefMask (HDSPM_c0_SyncRef0 | HDSPM_c0_SyncRef1 |\#define HDSPM_SYNC_FROM_WORD 0 /* Preferred sync reference */ #define HDSPM_SYNC_FROM_MADI 1 /* choices - used by "pref_sync_ref" */ #define HDSPM_SYNC_FROM_TCO 2 #define HDSPM_SYNC_FROM_SYNC_IN 3 #define HDSPM_Frequency32KHz HDSPM_Frequency0#define HDSPM_Frequency44_1KHz HDSPM_Frequency1#define HDSPM_Frequency48KHz (HDSPM_Frequency1|HDSPM_Frequency0)#define HDSPM_Frequency64KHz (HDSPM_DoubleSpeed|HDSPM_Frequency0)#define HDSPM_Frequency88_2KHz (HDSPM_DoubleSpeed|HDSPM_Frequency1)#define HDSPM_Frequency96KHz (HDSPM_DoubleSpeed|HDSPM_Frequency1|\#define HDSPM_Frequency128KHz (HDSPM_QuadSpeed|HDSPM_Frequency0)#define HDSPM_Frequency176_4KHz (HDSPM_QuadSpeed|HDSPM_Frequency1)#define HDSPM_Frequency192KHz (HDSPM_QuadSpeed|HDSPM_Frequency1|\/* Synccheck Status */ #define HDSPM_SYNC_CHECK_NO_LOCK 0 #define HDSPM_SYNC_CHECK_LOCK 1 #define HDSPM_SYNC_CHECK_SYNC 2 /* AutoSync References - used by "autosync_ref" control switch */ #define HDSPM_AUTOSYNC_FROM_WORD 0 #define HDSPM_AUTOSYNC_FROM_MADI 1 #define HDSPM_AUTOSYNC_FROM_TCO 2 #define HDSPM_AUTOSYNC_FROM_SYNC_IN 3 #define HDSPM_AUTOSYNC_FROM_NONE 4 /* Possible sources of MADI input */ #define HDSPM_OPTICAL 0 /* optical */ #define HDSPM_COAXIAL 1 /* BNC */ #define hdspm_encode_latency(x) (((x)<<1 ) & HDSPM_LatencyMask)#define hdspm_decode_latency(x) ((((x) & HDSPM_LatencyMask)>>1 ))#define hdspm_encode_in(x) (((x)&0 x3)<<14 )#define hdspm_decode_in(x) (((x)>>14 )&0 x3)/* --- control2 register bits --- */ #define HDSPM_TMS (1 <<0 )#define HDSPM_TCK (1 <<1 )#define HDSPM_TDI (1 <<2 )#define HDSPM_JTAG (1 <<3 )#define HDSPM_PWDN (1 <<4 )#define HDSPM_PROGRAM (1 <<5 )#define HDSPM_CONFIG_MODE_0 (1 <<6 )#define HDSPM_CONFIG_MODE_1 (1 <<7 )/*#define HDSPM_VERSION_BIT (1<<8) not defined any more*/ #define HDSPM_BIGENDIAN_MODE (1 <<9 )#define HDSPM_RD_MULTIPLE (1 <<10 )/* --- Status Register bits --- */ /* MADI ONLY */ /* Bits defined here and do not conflict with specific bits for AES32 seem to be valid alsofor the AES32#define HDSPM_audioIRQPending (1 <<0 ) /* IRQ is high and pending */ #define HDSPM_RX_64ch (1 <<1 ) /* Input 64chan. MODE=1, 56chn MODE=0 */ #define HDSPM_AB_int (1 <<2 ) /* InputChannel Opt=0, Coax=1 * ( like inp0 ) #define HDSPM_madiLock (1 <<3 ) /* MADI Locked =1, no=0 */ #define HDSPM_madiSync (1 <<18 ) /* MADI is in sync */ #define HDSPM_tcoLockMadi 0 x00000020 /* Optional TCO locked status for HDSPe MADI*/ #define HDSPM_tcoSync 0 x10000000 /* Optional TCO sync status for HDSPe MADI and AES32!*/ #define HDSPM_syncInLock 0 x00010000 /* Sync In lock status for HDSPe MADI! */ #define HDSPM_syncInSync 0 x00020000 /* Sync In sync status for HDSPe MADI! */ #define HDSPM_BufferPositionMask 0 x000FFC0 /* Bit 6..15 : h/w buffer pointer */ /* since 64byte accurate, last 6 bits are not used */ #define HDSPM_DoubleSpeedStatus (1 <<19 ) /* (input) card in double speed */ #define HDSPM_madiFreq0 (1 <<22 ) /* system freq 0=error */ #define HDSPM_madiFreq1 (1 <<23 ) /* 1=32, 2=44.1 3=48 */ #define HDSPM_madiFreq2 (1 <<24 ) /* 4=64, 5=88.2 6=96 */ #define HDSPM_madiFreq3 (1 <<25 ) /* 7=128, 8=176.4 9=192 */ #define HDSPM_BufferID (1 <<26 ) /* (Double)Buffer ID toggles with * Interrupt #define HDSPM_tco_detect 0 x08000000#define HDSPM_tcoLockAes 0 x20000000 /* Optional TCO locked status for HDSPe AES */ #define HDSPM_s2_tco_detect 0 x00000040#define HDSPM_s2_AEBO_D 0 x00000080#define HDSPM_s2_AEBI_D 0 x00000100#define HDSPM_midi0IRQPending 0 x40000000#define HDSPM_midi1IRQPending 0 x80000000#define HDSPM_midi2IRQPending 0 x20000000#define HDSPM_midi2IRQPendingAES 0 x00000020#define HDSPM_midi3IRQPending 0 x00200000/* --- status bit helpers */ #define HDSPM_madiFreqMask (HDSPM_madiFreq0|HDSPM_madiFreq1|\#define HDSPM_madiFreq32 (HDSPM_madiFreq0)#define HDSPM_madiFreq44_1 (HDSPM_madiFreq1)#define HDSPM_madiFreq48 (HDSPM_madiFreq0|HDSPM_madiFreq1)#define HDSPM_madiFreq64 (HDSPM_madiFreq2)#define HDSPM_madiFreq88_2 (HDSPM_madiFreq0|HDSPM_madiFreq2)#define HDSPM_madiFreq96 (HDSPM_madiFreq1|HDSPM_madiFreq2)#define HDSPM_madiFreq128 (HDSPM_madiFreq0|HDSPM_madiFreq1|HDSPM_madiFreq2)#define HDSPM_madiFreq176_4 (HDSPM_madiFreq3)#define HDSPM_madiFreq192 (HDSPM_madiFreq3|HDSPM_madiFreq0)/* Status2 Register bits */ /* MADI ONLY */ #define HDSPM_version0 (1 <<0 ) /* not really defined but I guess */ #define HDSPM_version1 (1 <<1 ) /* in former cards it was ??? */ #define HDSPM_version2 (1 <<2 )#define HDSPM_wcLock (1 <<3 ) /* Wordclock is detected and locked */ #define HDSPM_wcSync (1 <<4 ) /* Wordclock is in sync with systemclock */ #define HDSPM_wc_freq0 (1 <<5 ) /* input freq detected via autosync */ #define HDSPM_wc_freq1 (1 <<6 ) /* 001=32, 010==44.1, 011=48, */ #define HDSPM_wc_freq2 (1 <<7 ) /* 100=64, 101=88.2, 110=96, 111=128 */ #define HDSPM_wc_freq3 0 x800 /* 1000=176.4, 1001=192 */ #define HDSPM_SyncRef0 0 x10000 /* Sync Reference */ #define HDSPM_SyncRef1 0 x20000#define HDSPM_SelSyncRef0 (1 <<8 ) /* AutoSync Source */ #define HDSPM_SelSyncRef1 (1 <<9 ) /* 000=word, 001=MADI, */ #define HDSPM_SelSyncRef2 (1 <<10 ) /* 111=no valid signal */ #define HDSPM_wc_valid (HDSPM_wcLock|HDSPM_wcSync)#define HDSPM_wcFreqMask (HDSPM_wc_freq0|HDSPM_wc_freq1|HDSPM_wc_freq2|\#define HDSPM_wcFreq32 (HDSPM_wc_freq0)#define HDSPM_wcFreq44_1 (HDSPM_wc_freq1)#define HDSPM_wcFreq48 (HDSPM_wc_freq0|HDSPM_wc_freq1)#define HDSPM_wcFreq64 (HDSPM_wc_freq2)#define HDSPM_wcFreq88_2 (HDSPM_wc_freq0|HDSPM_wc_freq2)#define HDSPM_wcFreq96 (HDSPM_wc_freq1|HDSPM_wc_freq2)#define HDSPM_wcFreq128 (HDSPM_wc_freq0|HDSPM_wc_freq1|HDSPM_wc_freq2)#define HDSPM_wcFreq176_4 (HDSPM_wc_freq3)#define HDSPM_wcFreq192 (HDSPM_wc_freq0|HDSPM_wc_freq3)#define HDSPM_status1_F_0 0 x0400000#define HDSPM_status1_F_1 0 x0800000#define HDSPM_status1_F_2 0 x1000000#define HDSPM_status1_F_3 0 x2000000#define HDSPM_status1_freqMask (HDSPM_status1_F_0|HDSPM_status1_F_1|HDSPM_status1_F_2|HDSPM_status1_F_3)#define HDSPM_SelSyncRefMask (HDSPM_SelSyncRef0|HDSPM_SelSyncRef1|\#define HDSPM_SelSyncRef_WORD 0 #define HDSPM_SelSyncRef_MADI (HDSPM_SelSyncRef0)#define HDSPM_SelSyncRef_TCO (HDSPM_SelSyncRef1)#define HDSPM_SelSyncRef_SyncIn (HDSPM_SelSyncRef0|HDSPM_SelSyncRef1)#define HDSPM_SelSyncRef_NVALID (HDSPM_SelSyncRef0|HDSPM_SelSyncRef1|\/* For AES32 , bits for status , status2 and timecode are different /* status */ #define HDSPM_AES32_wcLock 0 x0200000#define HDSPM_AES32_wcSync 0 x0100000#define HDSPM_AES32_wcFreq_bit 22 /* (status >> HDSPM_AES32_wcFreq_bit) & 0xF gives WC frequency (cf function #define HDSPM_AES32_syncref_bit 16 /* (status >> HDSPM_AES32_syncref_bit) & 0xF gives sync source */ #define HDSPM_AES32_AUTOSYNC_FROM_WORD 0 #define HDSPM_AES32_AUTOSYNC_FROM_AES1 1 #define HDSPM_AES32_AUTOSYNC_FROM_AES2 2 #define HDSPM_AES32_AUTOSYNC_FROM_AES3 3 #define HDSPM_AES32_AUTOSYNC_FROM_AES4 4 #define HDSPM_AES32_AUTOSYNC_FROM_AES5 5 #define HDSPM_AES32_AUTOSYNC_FROM_AES6 6 #define HDSPM_AES32_AUTOSYNC_FROM_AES7 7 #define HDSPM_AES32_AUTOSYNC_FROM_AES8 8 #define HDSPM_AES32_AUTOSYNC_FROM_TCO 9 #define HDSPM_AES32_AUTOSYNC_FROM_SYNC_IN 10 #define HDSPM_AES32_AUTOSYNC_FROM_NONE 11 /* status2 */ /* HDSPM_LockAES_bit is given by HDSPM_LockAES >> (AES# - 1) */ #define HDSPM_LockAES 0 x80#define HDSPM_LockAES1 0 x80#define HDSPM_LockAES2 0 x40#define HDSPM_LockAES3 0 x20#define HDSPM_LockAES4 0 x10#define HDSPM_LockAES5 0 x8#define HDSPM_LockAES6 0 x4#define HDSPM_LockAES7 0 x2#define HDSPM_LockAES8 0 x1/* Timecode After windows driver sources , bits 4 * i to 4 * i + 3 give the input frequency on AES i + 1 bits 3210 0001 32 kHz 0010 44 . 1 kHz 0011 48 kHz 0100 64 kHz 0101 88 . 2 kHz 0110 96 kHz 0111 128 kHz 1000 176 . 4 kHz 1001 192 kHz NB : Timecode register doesn ' t seem to work on AES32 card revision 230 /* Mixer Values */ #define UNITY_GAIN 32768 /* = 65536/2 */ #define MINUS_INFINITY_GAIN 0 /* Number of channels for different Speed Modes */ #define MADI_SS_CHANNELS 64 #define MADI_DS_CHANNELS 32 #define MADI_QS_CHANNELS 16 #define RAYDAT_SS_CHANNELS 36 #define RAYDAT_DS_CHANNELS 20 #define RAYDAT_QS_CHANNELS 12 #define AIO_IN_SS_CHANNELS 14 #define AIO_IN_DS_CHANNELS 10 #define AIO_IN_QS_CHANNELS 8 #define AIO_OUT_SS_CHANNELS 16 #define AIO_OUT_DS_CHANNELS 12 #define AIO_OUT_QS_CHANNELS 10 #define AES32_CHANNELS 16 /* the size of a substream (1 mono data stream) */ #define HDSPM_CHANNEL_BUFFER_SAMPLES (16 *1024 )#define HDSPM_CHANNEL_BUFFER_BYTES (4 *HDSPM_CHANNEL_BUFFER_SAMPLES)/* the size of the area we need to allocate for DMA transfers. the size is the same regardless of the number of channels , and also the latency to use . for one direction ! ! ! #define HDSPM_DMA_AREA_BYTES (HDSPM_MAX_CHANNELS * HDSPM_CHANNEL_BUFFER_BYTES)#define HDSPM_DMA_AREA_KILOBYTES (HDSPM_DMA_AREA_BYTES/1024 )#define HDSPM_RAYDAT_REV 211 #define HDSPM_AIO_REV 212 #define HDSPM_MADIFACE_REV 213 /* speed factor modes */ #define HDSPM_SPEED_SINGLE 0 #define HDSPM_SPEED_DOUBLE 1 #define HDSPM_SPEED_QUAD 2 /* names for speed modes */ static const char * const hdspm_speed_names[] = { "single" , "double" , "quad" };static const char *const texts_autosync_aes_tco[] = { "Word Clock" ,"AES1" , "AES2" , "AES3" , "AES4" ,"AES5" , "AES6" , "AES7" , "AES8" ,"TCO" , "Sync In" static const char *const texts_autosync_aes[] = { "Word Clock" ,"AES1" , "AES2" , "AES3" , "AES4" ,"AES5" , "AES6" , "AES7" , "AES8" ,"Sync In" static const char *const texts_autosync_madi_tco[] = { "Word Clock" ,"MADI" , "TCO" , "Sync In" };static const char *const texts_autosync_madi[] = { "Word Clock" ,"MADI" , "Sync In" };static const char *const texts_autosync_raydat_tco[] = {"Word Clock" ,"ADAT 1" , "ADAT 2" , "ADAT 3" , "ADAT 4" ,"AES" , "SPDIF" , "TCO" , "Sync In" static const char *const texts_autosync_raydat[] = {"Word Clock" ,"ADAT 1" , "ADAT 2" , "ADAT 3" , "ADAT 4" ,"AES" , "SPDIF" , "Sync In" static const char *const texts_autosync_aio_tco[] = {"Word Clock" ,"ADAT" , "AES" , "SPDIF" , "TCO" , "Sync In" static const char *const texts_autosync_aio[] = { "Word Clock" ,"ADAT" , "AES" , "SPDIF" , "Sync In" };static const char *const texts_freq[] = {"No Lock" ,"32 kHz" ,"44.1 kHz" ,"48 kHz" ,"64 kHz" ,"88.2 kHz" ,"96 kHz" ,"128 kHz" ,"176.4 kHz" ,"192 kHz" static const char * const texts_ports_madi[] = {"MADI.1" , "MADI.2" , "MADI.3" , "MADI.4" , "MADI.5" , "MADI.6" ,"MADI.7" , "MADI.8" , "MADI.9" , "MADI.10" , "MADI.11" , "MADI.12" ,"MADI.13" , "MADI.14" , "MADI.15" , "MADI.16" , "MADI.17" , "MADI.18" ,"MADI.19" , "MADI.20" , "MADI.21" , "MADI.22" , "MADI.23" , "MADI.24" ,"MADI.25" , "MADI.26" , "MADI.27" , "MADI.28" , "MADI.29" , "MADI.30" ,"MADI.31" , "MADI.32" , "MADI.33" , "MADI.34" , "MADI.35" , "MADI.36" ,"MADI.37" , "MADI.38" , "MADI.39" , "MADI.40" , "MADI.41" , "MADI.42" ,"MADI.43" , "MADI.44" , "MADI.45" , "MADI.46" , "MADI.47" , "MADI.48" ,"MADI.49" , "MADI.50" , "MADI.51" , "MADI.52" , "MADI.53" , "MADI.54" ,"MADI.55" , "MADI.56" , "MADI.57" , "MADI.58" , "MADI.59" , "MADI.60" ,"MADI.61" , "MADI.62" , "MADI.63" , "MADI.64" ,static const char * const texts_ports_raydat_ss[] = {"ADAT1.1" , "ADAT1.2" , "ADAT1.3" , "ADAT1.4" , "ADAT1.5" , "ADAT1.6" ,"ADAT1.7" , "ADAT1.8" , "ADAT2.1" , "ADAT2.2" , "ADAT2.3" , "ADAT2.4" ,"ADAT2.5" , "ADAT2.6" , "ADAT2.7" , "ADAT2.8" , "ADAT3.1" , "ADAT3.2" ,"ADAT3.3" , "ADAT3.4" , "ADAT3.5" , "ADAT3.6" , "ADAT3.7" , "ADAT3.8" ,"ADAT4.1" , "ADAT4.2" , "ADAT4.3" , "ADAT4.4" , "ADAT4.5" , "ADAT4.6" ,"ADAT4.7" , "ADAT4.8" ,"AES.L" , "AES.R" ,"SPDIF.L" , "SPDIF.R" static const char * const texts_ports_raydat_ds[] = {"ADAT1.1" , "ADAT1.2" , "ADAT1.3" , "ADAT1.4" ,"ADAT2.1" , "ADAT2.2" , "ADAT2.3" , "ADAT2.4" ,"ADAT3.1" , "ADAT3.2" , "ADAT3.3" , "ADAT3.4" ,"ADAT4.1" , "ADAT4.2" , "ADAT4.3" , "ADAT4.4" ,"AES.L" , "AES.R" ,"SPDIF.L" , "SPDIF.R" static const char * const texts_ports_raydat_qs[] = {"ADAT1.1" , "ADAT1.2" ,"ADAT2.1" , "ADAT2.2" ,"ADAT3.1" , "ADAT3.2" ,"ADAT4.1" , "ADAT4.2" ,"AES.L" , "AES.R" ,"SPDIF.L" , "SPDIF.R" static const char * const texts_ports_aio_in_ss[] = {"Analogue.L" , "Analogue.R" ,"AES.L" , "AES.R" ,"SPDIF.L" , "SPDIF.R" ,"ADAT.1" , "ADAT.2" , "ADAT.3" , "ADAT.4" , "ADAT.5" , "ADAT.6" ,"ADAT.7" , "ADAT.8" ,"AEB.1" , "AEB.2" , "AEB.3" , "AEB.4" static const char * const texts_ports_aio_out_ss[] = {"Analogue.L" , "Analogue.R" ,"AES.L" , "AES.R" ,"SPDIF.L" , "SPDIF.R" ,"ADAT.1" , "ADAT.2" , "ADAT.3" , "ADAT.4" , "ADAT.5" , "ADAT.6" ,"ADAT.7" , "ADAT.8" ,"Phone.L" , "Phone.R" ,"AEB.1" , "AEB.2" , "AEB.3" , "AEB.4" static const char * const texts_ports_aio_in_ds[] = {"Analogue.L" , "Analogue.R" ,"AES.L" , "AES.R" ,"SPDIF.L" , "SPDIF.R" ,"ADAT.1" , "ADAT.2" , "ADAT.3" , "ADAT.4" ,"AEB.1" , "AEB.2" , "AEB.3" , "AEB.4" static const char * const texts_ports_aio_out_ds[] = {"Analogue.L" , "Analogue.R" ,"AES.L" , "AES.R" ,"SPDIF.L" , "SPDIF.R" ,"ADAT.1" , "ADAT.2" , "ADAT.3" , "ADAT.4" ,"Phone.L" , "Phone.R" ,"AEB.1" , "AEB.2" , "AEB.3" , "AEB.4" static const char * const texts_ports_aio_in_qs[] = {"Analogue.L" , "Analogue.R" ,"AES.L" , "AES.R" ,"SPDIF.L" , "SPDIF.R" ,"ADAT.1" , "ADAT.2" , "ADAT.3" , "ADAT.4" ,"AEB.1" , "AEB.2" , "AEB.3" , "AEB.4" static const char * const texts_ports_aio_out_qs[] = {"Analogue.L" , "Analogue.R" ,"AES.L" , "AES.R" ,"SPDIF.L" , "SPDIF.R" ,"ADAT.1" , "ADAT.2" , "ADAT.3" , "ADAT.4" ,"Phone.L" , "Phone.R" ,"AEB.1" , "AEB.2" , "AEB.3" , "AEB.4" static const char * const texts_ports_aes32[] = {"AES.1" , "AES.2" , "AES.3" , "AES.4" , "AES.5" , "AES.6" , "AES.7" ,"AES.8" , "AES.9." , "AES.10" , "AES.11" , "AES.12" , "AES.13" , "AES.14" ,"AES.15" , "AES.16" /* These tables map the ALSA channels 1..N to the channels that we need to use in order to find the relevant channel buffer . RME refers to this kind of mapping as between " the ADAT channel and the DMA channel . " We index it using the logical audio channel , and the value is the DMA channel ( i . e . channel buffer number ) where the data for that channel can be read / written from / to . static const char channel_map_unity_ss[HDSPM_MAX_CHANNELS] = {0 , 1 , 2 , 3 , 4 , 5 , 6 , 7 ,8 , 9 , 10 , 11 , 12 , 13 , 14 , 15 ,16 , 17 , 18 , 19 , 20 , 21 , 22 , 23 ,24 , 25 , 26 , 27 , 28 , 29 , 30 , 31 ,32 , 33 , 34 , 35 , 36 , 37 , 38 , 39 ,40 , 41 , 42 , 43 , 44 , 45 , 46 , 47 ,48 , 49 , 50 , 51 , 52 , 53 , 54 , 55 ,56 , 57 , 58 , 59 , 60 , 61 , 62 , 63 static const char channel_map_raydat_ss[HDSPM_MAX_CHANNELS] = {4 , 5 , 6 , 7 , 8 , 9 , 10 , 11 , /* ADAT 1 */ 12 , 13 , 14 , 15 , 16 , 17 , 18 , 19 , /* ADAT 2 */ 20 , 21 , 22 , 23 , 24 , 25 , 26 , 27 , /* ADAT 3 */ 28 , 29 , 30 , 31 , 32 , 33 , 34 , 35 , /* ADAT 4 */ 0 , 1 , /* AES */ 2 , 3 , /* SPDIF */ 1 , -1 , -1 , -1 ,1 , -1 , -1 , -1 , -1 , -1 , -1 , -1 ,1 , -1 , -1 , -1 , -1 , -1 , -1 , -1 ,1 , -1 , -1 , -1 , -1 , -1 , -1 , -1 ,static const char channel_map_raydat_ds[HDSPM_MAX_CHANNELS] = {4 , 5 , 6 , 7 , /* ADAT 1 */ 8 , 9 , 10 , 11 , /* ADAT 2 */ 12 , 13 , 14 , 15 , /* ADAT 3 */ 16 , 17 , 18 , 19 , /* ADAT 4 */ 0 , 1 , /* AES */ 2 , 3 , /* SPDIF */ 1 , -1 , -1 , -1 ,1 , -1 , -1 , -1 , -1 , -1 , -1 , -1 ,1 , -1 , -1 , -1 , -1 , -1 , -1 , -1 ,1 , -1 , -1 , -1 , -1 , -1 , -1 , -1 ,1 , -1 , -1 , -1 , -1 , -1 , -1 , -1 ,1 , -1 , -1 , -1 , -1 , -1 , -1 , -1 ,static const char channel_map_raydat_qs[HDSPM_MAX_CHANNELS] = {4 , 5 , /* ADAT 1 */ 6 , 7 , /* ADAT 2 */ 8 , 9 , /* ADAT 3 */ 10 , 11 , /* ADAT 4 */ 0 , 1 , /* AES */ 2 , 3 , /* SPDIF */ 1 , -1 , -1 , -1 ,1 , -1 , -1 , -1 , -1 , -1 , -1 , -1 ,1 , -1 , -1 , -1 , -1 , -1 , -1 , -1 ,1 , -1 , -1 , -1 , -1 , -1 , -1 , -1 ,1 , -1 , -1 , -1 , -1 , -1 , -1 , -1 ,1 , -1 , -1 , -1 , -1 , -1 , -1 , -1 ,1 , -1 , -1 , -1 , -1 , -1 , -1 , -1 ,static const char channel_map_aio_in_ss[HDSPM_MAX_CHANNELS] = {0 , 1 , /* line in */ 8 , 9 , /* aes in, */ 10 , 11 , /* spdif in */ 12 , 13 , 14 , 15 , 16 , 17 , 18 , 19 , /* ADAT in */ 2 , 3 , 4 , 5 , /* AEB */ 1 , -1 , -1 , -1 , -1 , -1 ,1 , -1 , -1 , -1 , -1 , -1 , -1 , -1 ,1 , -1 , -1 , -1 , -1 , -1 , -1 , -1 ,1 , -1 , -1 , -1 , -1 , -1 , -1 , -1 ,1 , -1 , -1 , -1 , -1 , -1 , -1 , -1 ,1 , -1 , -1 , -1 , -1 , -1 , -1 , -1 ,static const char channel_map_aio_out_ss[HDSPM_MAX_CHANNELS] = {0 , 1 , /* line out */ 8 , 9 , /* aes out */ 10 , 11 , /* spdif out */ 12 , 13 , 14 , 15 , 16 , 17 , 18 , 19 , /* ADAT out */ 6 , 7 , /* phone out */ 2 , 3 , 4 , 5 , /* AEB */ 1 , -1 , -1 , -1 ,1 , -1 , -1 , -1 , -1 , -1 , -1 , -1 ,1 , -1 , -1 , -1 , -1 , -1 , -1 , -1 ,1 , -1 , -1 , -1 , -1 , -1 , -1 , -1 ,1 , -1 , -1 , -1 , -1 , -1 , -1 , -1 ,1 , -1 , -1 , -1 , -1 , -1 , -1 , -1 ,static const char channel_map_aio_in_ds[HDSPM_MAX_CHANNELS] = {0 , 1 , /* line in */ 8 , 9 , /* aes in */ 10 , 11 , /* spdif in */ 12 , 14 , 16 , 18 , /* adat in */ 2 , 3 , 4 , 5 , /* AEB */ 1 , -1 ,1 , -1 , -1 , -1 , -1 , -1 , -1 , -1 ,1 , -1 , -1 , -1 , -1 , -1 , -1 , -1 ,1 , -1 , -1 , -1 , -1 , -1 , -1 , -1 ,1 , -1 , -1 , -1 , -1 , -1 , -1 , -1 ,1 , -1 , -1 , -1 , -1 , -1 , -1 , -1 ,1 , -1 , -1 , -1 , -1 , -1 , -1 , -1 static const char channel_map_aio_out_ds[HDSPM_MAX_CHANNELS] = {0 , 1 , /* line out */ 8 , 9 , /* aes out */ 10 , 11 , /* spdif out */ 12 , 14 , 16 , 18 , /* adat out */ 6 , 7 , /* phone out */ 2 , 3 , 4 , 5 , /* AEB */ 1 , -1 , -1 , -1 , -1 , -1 , -1 , -1 ,1 , -1 , -1 , -1 , -1 , -1 , -1 , -1 ,1 , -1 , -1 , -1 , -1 , -1 , -1 , -1 ,1 , -1 , -1 , -1 , -1 , -1 , -1 , -1 ,1 , -1 , -1 , -1 , -1 , -1 , -1 , -1 ,1 , -1 , -1 , -1 , -1 , -1 , -1 , -1 static const char channel_map_aio_in_qs[HDSPM_MAX_CHANNELS] = {0 , 1 , /* line in */ 8 , 9 , /* aes in */ 10 , 11 , /* spdif in */ 12 , 16 , /* adat in */ 2 , 3 , 4 , 5 , /* AEB */ 1 , -1 , -1 , -1 ,1 , -1 , -1 , -1 , -1 , -1 , -1 , -1 ,1 , -1 , -1 , -1 , -1 , -1 , -1 , -1 ,1 , -1 , -1 , -1 , -1 , -1 , -1 , -1 ,1 , -1 , -1 , -1 , -1 , -1 , -1 , -1 ,1 , -1 , -1 , -1 , -1 , -1 , -1 , -1 ,1 , -1 , -1 , -1 , -1 , -1 , -1 , -1 static const char channel_map_aio_out_qs[HDSPM_MAX_CHANNELS] = {0 , 1 , /* line out */ 8 , 9 , /* aes out */ 10 , 11 , /* spdif out */ 12 , 16 , /* adat out */ 6 , 7 , /* phone out */ 2 , 3 , 4 , 5 , /* AEB */ 1 , -1 ,1 , -1 , -1 , -1 , -1 , -1 , -1 , -1 ,1 , -1 , -1 , -1 , -1 , -1 , -1 , -1 ,1 , -1 , -1 , -1 , -1 , -1 , -1 , -1 ,1 , -1 , -1 , -1 , -1 , -1 , -1 , -1 ,1 , -1 , -1 , -1 , -1 , -1 , -1 , -1 ,1 , -1 , -1 , -1 , -1 , -1 , -1 , -1 static const char channel_map_aes32[HDSPM_MAX_CHANNELS] = {0 , 1 , 2 , 3 , 4 , 5 , 6 , 7 ,8 , 9 , 10 , 11 , 12 , 13 , 14 , 15 ,1 , -1 , -1 , -1 , -1 , -1 , -1 , -1 ,1 , -1 , -1 , -1 , -1 , -1 , -1 , -1 ,1 , -1 , -1 , -1 , -1 , -1 , -1 , -1 ,1 , -1 , -1 , -1 , -1 , -1 , -1 , -1 ,1 , -1 , -1 , -1 , -1 , -1 , -1 , -1 ,1 , -1 , -1 , -1 , -1 , -1 , -1 , -1 struct hdspm_midi {struct hdspm *hdspm;int id;struct snd_rawmidi *rmidi;struct snd_rawmidi_substream *input;struct snd_rawmidi_substream *output;char istimer; /* timer in use */ struct timer_list timer;int pending;int dataIn;int statusIn;int dataOut;int statusOut;int ie;int irq;struct hdspm_tco {int input; /* 0: LTC, 1:Video, 2: WC*/ int framerate; /* 0=24, 1=25, 2=29.97, 3=29.97d, 4=30, 5=30d */ int wordclock; /* 0=1:1, 1=44.1->48, 2=48->44.1 */ int samplerate; /* 0=44.1, 1=48, 2= freq from app */ int pull; /* 0=0, 1=+0.1%, 2=-0.1%, 3=+4%, 4=-4%*/ int term; /* 0 = off, 1 = on */ struct hdspm {/* only one playback and/or capture stream */ struct snd_pcm_substream *capture_substream;struct snd_pcm_substream *playback_substream;char *card_name; /* for procinfo */ unsigned short firmware_rev; /* dont know if relevant (yes if AES32)*/ int monitor_outs; /* set up monitoring outs init flag */ /* cached value */ /* cached value */ /* cached value for AIO / RayDat (sync reference, master/slave) */ struct hdspm_midi midi[4 ];struct work_struct midi_work;unsigned char ss_in_channels;unsigned char ds_in_channels;unsigned char qs_in_channels;unsigned char ss_out_channels;unsigned char ds_out_channels;unsigned char qs_out_channels;unsigned char max_channels_in;unsigned char max_channels_out;const signed char *channel_map_in;const signed char *channel_map_out;const signed char *channel_map_in_ss, *channel_map_in_ds, *channel_map_in_qs;const signed char *channel_map_out_ss, *channel_map_out_ds, *channel_map_out_qs;const char * const *port_names_in;const char * const *port_names_out;const char * const *port_names_in_ss;const char * const *port_names_in_ds;const char * const *port_names_in_qs;const char * const *port_names_out_ss;const char * const *port_names_out_ds;const char * const *port_names_out_qs;unsigned char *playback_buffer; /* suitably aligned address */ unsigned char *capture_buffer; /* suitably aligned address */ /* process id which uses capture */ /* process id which uses capture */ int running; /* running status */ int last_external_sample_rate; /* samplerate mystic ... */ int last_internal_sample_rate;int system_sample_rate;int dev; /* Hardware vars... */ int irq;unsigned long port;void __iomem *iobase;int irq_count; /* for debug */ int midiPorts;struct snd_card *card; /* one card */ struct snd_pcm *pcm; /* has one pcm */ struct snd_hwdep *hwdep; /* and a hwdep for additional ioctl */ struct pci_dev *pci; /* and an pci info */ /* Mixer vars */ /* fast alsa mixer */ struct snd_kcontrol *playback_mixer_ctls[HDSPM_MAX_CHANNELS];/* but input to much, so not used */ struct snd_kcontrol *input_mixer_ctls[HDSPM_MAX_CHANNELS];/* full mixer accessible over mixer ioctl or hwdep-device */ struct hdspm_mixer *mixer;struct hdspm_tco *tco; /* NULL if no TCO detected */ const char *const *texts_autosync;int texts_autosync_items;unsigned int serial;struct hdspm_peak_rms peak_rms;static const struct pci_device_id snd_hdspm_ids[] = {class = 0 ,0 ,0 },0 ,}/* prototypes */ static int snd_hdspm_create_alsa_devices(struct snd_card *card,struct hdspm *hdspm);static int snd_hdspm_create_pcm(struct snd_card *card,struct hdspm *hdspm);static inline void snd_hdspm_initialize_midi_flush(struct hdspm *hdspm);static inline int hdspm_get_pll_freq(struct hdspm *hdspm);static int hdspm_update_simple_mixer_controls(struct hdspm *hdspm);static int hdspm_autosync_ref(struct hdspm *hdspm);static int hdspm_set_toggle_setting(struct hdspm *hdspm, u32 regmask, int out);static int snd_hdspm_set_defaults(struct hdspm *hdspm);static int hdspm_system_clock_mode(struct hdspm *hdspm);static void hdspm_set_channel_dma_addr(struct hdspm *hdspm,struct snd_pcm_substream *substream,unsigned int reg, int channels);static int hdspm_aes_sync_check(struct hdspm *hdspm, int idx);static int hdspm_wc_sync_check(struct hdspm *hdspm);static int hdspm_tco_sync_check(struct hdspm *hdspm);static int hdspm_sync_in_sync_check(struct hdspm *hdspm);static int hdspm_get_aes_sample_rate(struct hdspm *hdspm, int index);static int hdspm_get_tco_sample_rate(struct hdspm *hdspm);static int hdspm_get_wc_sample_rate(struct hdspm *hdspm);static inline int HDSPM_bit2freq(int n)static const int bit2freq_tab[] = {0 , 32000 , 44100 , 48000 , 64000 , 88200 ,96000 , 128000 , 176400 , 192000 };if (n < 1 || n > 9 )return 0 ;return bit2freq_tab[n];static bool hdspm_is_raydat_or_aio(struct hdspm *hdspm)return ((AIO == hdspm->io_type) || (RayDAT == hdspm->io_type));/* Write/read to/from HDSPM with Adresses in Bytes static inline void hdspm_write(struct hdspm * hdspm, unsigned int reg,unsigned int val)static inline unsigned int hdspm_read(struct hdspm * hdspm, unsigned int reg)return readl(hdspm->iobase + reg);/* for each output channel (chan) I have an Input (in) and Playback (pb) Fader mixer is write only on hardware so we have to cache him for read static inline int hdspm_read_in_gain(struct hdspm * hdspm, unsigned int chan,unsigned int in)if (chan >= HDSPM_MIXER_CHANNELS || in >= HDSPM_MIXER_CHANNELS)return 0 ;return hdspm->mixer->ch[chan].in[in];static inline int hdspm_read_pb_gain(struct hdspm * hdspm, unsigned int chan,unsigned int pb)if (chan >= HDSPM_MIXER_CHANNELS || pb >= HDSPM_MIXER_CHANNELS)return 0 ;return hdspm->mixer->ch[chan].pb[pb];static int hdspm_write_in_gain(struct hdspm *hdspm, unsigned int chan,unsigned int in, unsigned short data)if (chan >= HDSPM_MIXER_CHANNELS || in >= HDSPM_MIXER_CHANNELS)return -1 ;128 * chan) * sizeof (u32)),0 xFFFF));return 0 ;static int hdspm_write_pb_gain(struct hdspm *hdspm, unsigned int chan,unsigned int pb, unsigned short data)if (chan >= HDSPM_MIXER_CHANNELS || pb >= HDSPM_MIXER_CHANNELS)return -1 ;64 + pb + 128 * chan) * sizeof (u32)),0 xFFFF));return 0 ;/* enable DMA for specific channels, now available for DSP-MADI */ static inline void snd_hdspm_enable_in(struct hdspm * hdspm, int i, int v)4 * i), v);static inline void snd_hdspm_enable_out(struct hdspm * hdspm, int i, int v)4 * i), v);/* check if same process is writing and reading */ static int snd_hdspm_use_is_exclusive(struct hdspm *hdspm)unsigned long flags;int ret = 1 ;if ((hdspm->playback_pid != hdspm->capture_pid) &&0 ) && (hdspm->capture_pid >= 0 )) {0 ;return ret;/* round arbitrary sample rates to commonly known rates */ static int hdspm_round_frequency(int rate)if (rate < 38050 )return 32000 ;if (rate < 46008 )return 44100 ;else return 48000 ;/* QS and DS rates normally can not be detected * automatically by the card . Only exception is MADI * in 96 k frame mode . * * So if we read SS values ( 32 . . 48 k ) , check for * user - provided DS / QS bits in the control register * and multiply the base frequency accordingly . static int hdspm_rate_multiplier(struct hdspm *hdspm, int rate)if (rate <= 48000 ) {if (hdspm->control_register & HDSPM_QuadSpeed)return rate * 4 ;else if (hdspm->control_register &return rate * 2 ;return rate;/* check for external sample rate, returns the sample rate in Hz*/ static int hdspm_external_sample_rate(struct hdspm *hdspm)unsigned int status, status2;int syncref, rate = 0 , rate_bits;switch (hdspm->io_type) {case AES32:switch (syncref) {case HDSPM_AES32_AUTOSYNC_FROM_WORD:/* Check WC sync and get sample rate */ if (hdspm_wc_sync_check(hdspm))return HDSPM_bit2freq(hdspm_get_wc_sample_rate(hdspm));break ;case HDSPM_AES32_AUTOSYNC_FROM_AES1:case HDSPM_AES32_AUTOSYNC_FROM_AES2:case HDSPM_AES32_AUTOSYNC_FROM_AES3:case HDSPM_AES32_AUTOSYNC_FROM_AES4:case HDSPM_AES32_AUTOSYNC_FROM_AES5:case HDSPM_AES32_AUTOSYNC_FROM_AES6:case HDSPM_AES32_AUTOSYNC_FROM_AES7:case HDSPM_AES32_AUTOSYNC_FROM_AES8:/* Check AES sync and get sample rate */ if (hdspm_aes_sync_check(hdspm, syncref - HDSPM_AES32_AUTOSYNC_FROM_AES1))return HDSPM_bit2freq(hdspm_get_aes_sample_rate(hdspm,break ;case HDSPM_AES32_AUTOSYNC_FROM_TCO:/* Check TCO sync and get sample rate */ if (hdspm_tco_sync_check(hdspm))return HDSPM_bit2freq(hdspm_get_tco_sample_rate(hdspm));break ;default :return 0 ;/* end switch(syncref) */ break ;case MADIface:if (!(status & HDSPM_madiLock)) {0 ; /* no lock */ else {switch (status & (HDSPM_status1_freqMask)) {case HDSPM_status1_F_0*1 :32000 ; break ;case HDSPM_status1_F_0*2 :44100 ; break ;case HDSPM_status1_F_0*3 :48000 ; break ;case HDSPM_status1_F_0*4 :64000 ; break ;case HDSPM_status1_F_0*5 :88200 ; break ;case HDSPM_status1_F_0*6 :96000 ; break ;case HDSPM_status1_F_0*7 :128000 ; break ;case HDSPM_status1_F_0*8 :176400 ; break ;case HDSPM_status1_F_0*9 :192000 ; break ;default :0 ; break ;break ;case MADI:case AIO:case RayDAT:0 ;/* if wordclock has synced freq and wordclock is valid */ if ((status2 & HDSPM_wcLock) != 0 &&0 ) {switch (rate_bits) {case HDSPM_wcFreq32:32000 ;break ;case HDSPM_wcFreq44_1:44100 ;break ;case HDSPM_wcFreq48:48000 ;break ;case HDSPM_wcFreq64:64000 ;break ;case HDSPM_wcFreq88_2:88200 ;break ;case HDSPM_wcFreq96:96000 ;break ;case HDSPM_wcFreq128:128000 ;break ;case HDSPM_wcFreq176_4:176400 ;break ;case HDSPM_wcFreq192:192000 ;break ;default :0 ;break ;/* if rate detected and Syncref is Word than have it, * word has priority to MADI if (rate != 0 &&return hdspm_rate_multiplier(hdspm, rate);/* maybe a madi input (which is taken if sel sync is madi) */ if (status & HDSPM_madiLock) {switch (rate_bits) {case HDSPM_madiFreq32:32000 ;break ;case HDSPM_madiFreq44_1:44100 ;break ;case HDSPM_madiFreq48:48000 ;break ;case HDSPM_madiFreq64:64000 ;break ;case HDSPM_madiFreq88_2:88200 ;break ;case HDSPM_madiFreq96:96000 ;break ;case HDSPM_madiFreq128:128000 ;break ;case HDSPM_madiFreq176_4:176400 ;break ;case HDSPM_madiFreq192:192000 ;break ;default :0 ;break ;/* endif HDSPM_madiLock */ /* check sample rate from TCO or SYNC_IN */ bool is_valid_input = 0 ;bool has_sync = 0 ;if (HDSPM_AUTOSYNC_FROM_TCO == syncref) {1 ;else if (HDSPM_AUTOSYNC_FROM_SYNC_IN == syncref) {1 ;if (is_valid_input && has_sync) {break ;return rate;/* return latency in samples per period */ static int hdspm_get_latency(struct hdspm *hdspm)int n;/* Special case for new RME cards with 32 samples period size. * The three latency bits in the control register * ( HDSP_LatencyMask ) encode latency values of 64 samples as * 0 , 128 samples as 1 . . . 4096 samples as 6 . For old cards , 7 * denotes 8192 samples , but on new cards like RayDAT or AIO , * it corresponds to 32 samples . if ((7 == n) && (RayDAT == hdspm->io_type || AIO == hdspm->io_type))1 ;return 1 << (n + 6 );/* Latency function */ static inline void hdspm_compute_period_size(struct hdspm *hdspm)4 * hdspm_get_latency(hdspm);static snd_pcm_uframes_t hdspm_hw_pointer(struct hdspm *hdspm)int position;switch (hdspm->io_type) {case RayDAT:case AIO:4 ; /* Bytes per sample */ break ;default :4 ) : 0 ;return position;static inline void hdspm_start_audio(struct hdspm * s)static inline void hdspm_stop_audio(struct hdspm * s)/* should I silence all or only opened ones ? doit all for first even is 4MB*/ static void hdspm_silence_playback(struct hdspm *hdspm)int i;int n = hdspm->period_bytes;void *buf = hdspm->playback_buffer;if (!buf)return ;for (i = 0 ; i < HDSPM_MAX_CHANNELS; i++) {0 , n);static int hdspm_set_interrupt_interval(struct hdspm *s, unsigned int frames)int n;if (32 == frames) {/* Special case for new RME cards like RayDAT/AIO which * support period sizes of 32 samples . Since latency is * encoded in the three bits of HDSP_LatencyMask , we can only * have values from 0 . . 7 . While 0 still means 64 samples and * 6 represents 4096 samples on all cards , 7 represents 8192 * on older cards and 32 samples on new cards . * * In other words , period size in samples is calculated by * 2 ^ ( n + 6 ) with n ranging from 0 . . 7 . 7 ;else {7 ;0 ;while (frames) {1 ;return 0 ;static u64 hdspm_calc_dds_value(struct hdspm *hdspm, u64 period)if (period == 0 )return 0 ;switch (hdspm->io_type) {case MADI:case AES32:110069313433624 ULL;break ;case RayDAT:case AIO:104857600000000 ULL;break ;case MADIface:131072000000000 ULL;break ;default :return 0 ;return div_u64(freq_const, period);static void hdspm_set_dds_value(struct hdspm *hdspm, int rate)if (snd_BUG_ON(rate <= 0 ))return ;if (rate >= 112000 )4 ;else if (rate >= 56000 )2 ;switch (hdspm->io_type) {case MADIface:131072000000000 ULL; /* 125 MHz */ break ;case MADI:case AES32:110069313433624 ULL; /* 105 MHz */ break ;case RayDAT:case AIO:104857600000000 ULL; /* 100 MHz */ break ;default :return ;/* n should be less than 2^32 for being written to FREQ register */ 32 );/* dummy set rate lets see what happens */ static int hdspm_set_rate(struct hdspm * hdspm, int rate, int called_internally)int current_rate;int rate_bits;int not_set = 0 ;int current_speed, target_speed;/* ASSUMPTION: hdspm->lock is either set, or there is no need for it ( e . g . during module initialization ) . if (!(hdspm->control_register & HDSPM_ClockModeMaster)) {/* SLAVE --- */ if (called_internally) {/* request from ctl or card initialization just make a warning an remember setting "Warning: device is not running as a clock master.\n" );1 ;else {/* hw_param request while in AutoSync mode */ int external_freq =if (hdspm_autosync_ref(hdspm) =="Detected no External Sync\n" );1 ;else if (rate != external_freq) {"Warning: No AutoSync source for requested rate\n" );1 ;/* Changing between Singe, Double and Quad speed is not allowed if any substreams are open . This is because such a change causes a shift in the location of the DMA buffers and a reduction in the number of available buffers . Note that a similar but essentially insoluble problem exists for externally - driven rate changes . All we can do is to flag rate changes in the read / write routines . if (current_rate <= 48000 )else if (current_rate <= 96000 )else if (rate <= 48000 )else if (rate <= 96000 )else switch (rate) {case 32000 :break ;case 44100 :break ;case 48000 :break ;case 64000 :break ;case 88200 :break ;case 96000 :break ;case 128000 :break ;case 176400 :break ;case 192000 :break ;default :return -EINVAL;if (current_speed != target_speed0 || hdspm->playback_pid >= 0 )) {"cannot change from %s speed to %s speed mode (capture PID = %d, playback PID = %d)\n" ,return -EBUSY;/* For AES32, need to set DDS value in FREQ register if (AES32 == hdspm->io_type && rate != current_rate)0 );if (rate <= 48000 ) {else if (rate <= 96000 ) {else {if (not_set != 0 )return -1 ;return 0 ;/* mainly for init to 0 on load */ static void all_in_all_mixer(struct hdspm * hdspm, int sgain)int i, j;unsigned int gain;if (sgain > UNITY_GAIN)else if (sgain < 0 )0 ;else for (i = 0 ; i < HDSPM_MIXER_CHANNELS; i++)for (j = 0 ; j < HDSPM_MIXER_CHANNELS; j++) {/*---------------------------------------------------------------------------- MIDI static inline unsigned char snd_hdspm_midi_read_byte (struct hdspm *hdspm,int id)/* the hardware already does the relevant bit-mask with 0xff */ return hdspm_read(hdspm, hdspm->midi[id].dataIn);static inline void snd_hdspm_midi_write_byte (struct hdspm *hdspm, int id,int val)/* the hardware already does the relevant bit-mask with 0xff */ return hdspm_write(hdspm, hdspm->midi[id].dataOut, val);static inline int snd_hdspm_midi_input_available (struct hdspm *hdspm, int id)return hdspm_read(hdspm, hdspm->midi[id].statusIn) & 0 xFF;static inline int snd_hdspm_midi_output_possible (struct hdspm *hdspm, int id)int fifo_bytes_used;0 xFF;if (fifo_bytes_used < 128 )return 128 - fifo_bytes_used;else return 0 ;static void snd_hdspm_flush_midi_input(struct hdspm *hdspm, int id)int count = 256 ;while (snd_hdspm_midi_input_available(hdspm, id) && --count)static int snd_hdspm_midi_output_write (struct hdspm_midi *hmidi)unsigned long flags;int n_pending;int to_write;int i;unsigned char buf[128 ];/* Output is not interrupt driven */ if (hmidi->output &&if (n_pending > 0 ) {if (n_pending > (int )sizeof (buf))sizeof (buf);if (to_write > 0 ) {for (i = 0 ; i < to_write; ++i)return 0 ;static int snd_hdspm_midi_input_read (struct hdspm_midi *hmidi)unsigned char buf[128 ]; /* this buffer is designed to match the MIDI * input FIFO size unsigned long flags;int n_pending;int i;if (n_pending > 0 ) {if (hmidi->input) {if (n_pending > (int )sizeof (buf))sizeof (buf);for (i = 0 ; i < n_pending; ++i)if (n_pending)else {/* flush the MIDI input FIFO */ while (n_pending--)0 ;return snd_hdspm_midi_output_write (hmidi);static void struct snd_rawmidi_substream *substream, int up)struct hdspm *hdspm;struct hdspm_midi *hmidi;unsigned long flags;if (up) {if (!(hdspm->control_register & hmidi->ie)) {else {static void snd_hdspm_midi_output_timer(struct timer_list *t)struct hdspm_midi *hmidi = timer_container_of(hmidi, t, timer);unsigned long flags;/* this does not bump hmidi->istimer, because the kernel automatically removed the timer when it expired , and we are now adding it back , thus leaving istimer wherever it was set before . if (hmidi->istimer)1 + jiffies);static void struct snd_rawmidi_substream *substream, int up)struct hdspm_midi *hmidi;unsigned long flags;if (up) {if (!hmidi->istimer) {0 );1 + jiffies);else {if (hmidi->istimer && --hmidi->istimer <= 0 )if (up)static int snd_hdspm_midi_input_open(struct snd_rawmidi_substream *substream)struct hdspm_midi *hmidi;return 0 ;static int snd_hdspm_midi_output_open(struct snd_rawmidi_substream *substream)struct hdspm_midi *hmidi;return 0 ;static int snd_hdspm_midi_input_close(struct snd_rawmidi_substream *substream)struct hdspm_midi *hmidi;0 );return 0 ;static int snd_hdspm_midi_output_close(struct snd_rawmidi_substream *substream)struct hdspm_midi *hmidi;0 );return 0 ;static const struct snd_rawmidi_ops snd_hdspm_midi_output =static const struct snd_rawmidi_ops snd_hdspm_midi_input =static int snd_hdspm_create_midi(struct snd_card *card,struct hdspm *hdspm, int id)int err;char buf[64 ];if (0 == id) {if (MADIface == hdspm->io_type) {/* MIDI-over-MADI on HDSPe MADIface */ 0 ].dataIn = HDSPM_midiDataIn2;0 ].statusIn = HDSPM_midiStatusIn2;0 ].dataOut = HDSPM_midiDataOut2;0 ].statusOut = HDSPM_midiStatusOut2;0 ].ie = HDSPM_Midi2InterruptEnable;0 ].irq = HDSPM_midi2IRQPending;else {0 ].dataIn = HDSPM_midiDataIn0;0 ].statusIn = HDSPM_midiStatusIn0;0 ].dataOut = HDSPM_midiDataOut0;0 ].statusOut = HDSPM_midiStatusOut0;0 ].ie = HDSPM_Midi0InterruptEnable;0 ].irq = HDSPM_midi0IRQPending;else if (1 == id) {1 ].dataIn = HDSPM_midiDataIn1;1 ].statusIn = HDSPM_midiStatusIn1;1 ].dataOut = HDSPM_midiDataOut1;1 ].statusOut = HDSPM_midiStatusOut1;1 ].ie = HDSPM_Midi1InterruptEnable;1 ].irq = HDSPM_midi1IRQPending;else if ((2 == id) && (MADI == hdspm->io_type)) {/* MIDI-over-MADI on HDSPe MADI */ 2 ].dataIn = HDSPM_midiDataIn2;2 ].statusIn = HDSPM_midiStatusIn2;2 ].dataOut = HDSPM_midiDataOut2;2 ].statusOut = HDSPM_midiStatusOut2;2 ].ie = HDSPM_Midi2InterruptEnable;2 ].irq = HDSPM_midi2IRQPending;else if (2 == id) {/* TCO MTC, read only */ 2 ].dataIn = HDSPM_midiDataIn2;2 ].statusIn = HDSPM_midiStatusIn2;2 ].dataOut = -1 ;2 ].statusOut = -1 ;2 ].ie = HDSPM_Midi2InterruptEnable;2 ].irq = HDSPM_midi2IRQPendingAES;else if (3 == id) {/* TCO MTC on HDSPe MADI */ 3 ].dataIn = HDSPM_midiDataIn3;3 ].statusIn = HDSPM_midiStatusIn3;3 ].dataOut = -1 ;3 ].statusOut = -1 ;3 ].ie = HDSPM_Midi3InterruptEnable;3 ].irq = HDSPM_midi3IRQPending;if ((id < 2 ) || ((2 == id) && ((MADI == hdspm->io_type) ||if ((id == 0 ) && (MADIface == hdspm->io_type)) {sizeof (buf), "%s MIDIoverMADI" ,else if ((id == 2 ) && (MADI == hdspm->io_type)) {sizeof (buf), "%s MIDIoverMADI" ,else {sizeof (buf), "%s MIDI %d" ,1 );1 , 1 ,if (err < 0 )return err;sizeof (hdspm->midi[id].rmidi->name),"%s MIDI %d" , card->id, id+1 );else {/* TCO MTC, read only */ sizeof (buf), "%s MTC %d" ,1 );1 , 1 ,if (err < 0 )return err;sizeof (hdspm->midi[id].rmidi->name),"%s MTC %d" , card->id, id+1 );return 0 ;static void hdspm_midi_work(struct work_struct *work)struct hdspm *hdspm = container_of(work, struct hdspm, midi_work);int i = 0 ;while (i < hdspm->midiPorts) {if (hdspm->midi[i].pending)/*----------------------------------------------------------------------------- Status Interface /* get the system sample rate which is set */ static inline int hdspm_get_pll_freq(struct hdspm *hdspm)unsigned int period, rate;return rate;/* * Calculate the real sample rate from the * current DDS value . static int hdspm_get_system_sample_rate(struct hdspm *hdspm)unsigned int rate;if (rate > 207000 ) {/* Unreasonable high sample rate as seen on PCI MADI cards. */ if (0 == hdspm_system_clock_mode(hdspm)) {/* master mode, return internal sample rate */ else {/* slave mode, return external sample rate */ if (!rate)return rate;#define HDSPM_SYSTEM_SAMPLE_RATE(xname, xindex) \static int snd_hdspm_info_system_sample_rate(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_info *uinfo)1 ;27000 ;207000 ;1 ;return 0 ;static int snd_hdspm_get_system_sample_rate(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_value *struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);0 ] = hdspm_get_system_sample_rate(hdspm);return 0 ;static int snd_hdspm_put_system_sample_rate(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_value *struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);int rate = ucontrol->value.integer.value[0 ];if (rate < 27000 || rate > 207000 )return -EINVAL;0 ]);return 0 ;/* * Returns the WordClock sample rate class for the given card . static int hdspm_get_wc_sample_rate(struct hdspm *hdspm)int status;switch (hdspm->io_type) {case RayDAT:case AIO:return (status >> 16 ) & 0 xF;case AES32:return (status >> HDSPM_AES32_wcFreq_bit) & 0 xF;default :break ;return 0 ;/* * Returns the TCO sample rate class for the given card . static int hdspm_get_tco_sample_rate(struct hdspm *hdspm)int status;if (hdspm->tco) {switch (hdspm->io_type) {case RayDAT:case AIO:return (status >> 20 ) & 0 xF;case AES32:return (status >> 1 ) & 0 xF;default :break ;return 0 ;/* * Returns the SYNC_IN sample rate class for the given card . static int hdspm_get_sync_in_sample_rate(struct hdspm *hdspm)int status;if (hdspm->tco) {switch (hdspm->io_type) {case RayDAT:case AIO:return (status >> 12 ) & 0 xF;default :break ;return 0 ;/* * Returns the AES sample rate class for the given card . static int hdspm_get_aes_sample_rate(struct hdspm *hdspm, int index)int timecode;switch (hdspm->io_type) {case AES32:return (timecode >> (4 *index)) & 0 xF;default :break ;return 0 ;/* * Returns the sample rate class for input source < idx > for * ' new style ' cards like the AIO and RayDAT . static int hdspm_get_s1_sample_rate(struct hdspm *hdspm, unsigned int idx)int status = hdspm_read(hdspm, HDSPM_RD_STATUS_2);return (status >> (idx*4 )) & 0 xF;#define ENUMERATED_CTL_INFO(info, texts) \1 , ARRAY_SIZE(texts), texts)/* Helper function to query the external sample rate and return the * corresponding enum to be returned to userspace . static int hdspm_external_rate_to_enum(struct hdspm *hdspm)int rate = hdspm_external_sample_rate(hdspm);int i, selected_rate = 0 ;for (i = 1 ; i < 10 ; i++)if (HDSPM_bit2freq(i) == rate) {break ;return selected_rate;#define HDSPM_AUTOSYNC_SAMPLE_RATE(xname, xindex) \static int snd_hdspm_info_autosync_sample_rate(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_info *uinfo)return 0 ;static int snd_hdspm_get_autosync_sample_rate(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_value *struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);switch (hdspm->io_type) {case RayDAT:switch (kcontrol->private_value) {case 0 :0 ] =break ;case 7 :0 ] =break ;case 8 :0 ] =break ;default :0 ] =1 );break ;case AIO:switch (kcontrol->private_value) {case 0 : /* WC */ 0 ] =break ;case 4 : /* TCO */ 0 ] =break ;case 5 : /* SYNC_IN */ 0 ] =break ;default :0 ] =1 );break ;case AES32:switch (kcontrol->private_value) {case 0 : /* WC */ 0 ] =break ;case 9 : /* TCO */ 0 ] =break ;case 10 : /* SYNC_IN */ 0 ] =break ;case 11 : /* External Rate */ 0 ] =break ;default : /* AES1 to AES8 */ 0 ] =break ;break ;case MADI:case MADIface:0 ] =break ;default :break ;return 0 ;#define HDSPM_SYSTEM_CLOCK_MODE(xname, xindex) \/* * Returns the system clock mode for the given card . * @ returns 0 - master , 1 - slave static int hdspm_system_clock_mode(struct hdspm *hdspm)switch (hdspm->io_type) {case AIO:case RayDAT:if (hdspm->settings_register & HDSPM_c0Master)return 0 ;break ;default :if (hdspm->control_register & HDSPM_ClockModeMaster)return 0 ;return 1 ;/* * Sets the system clock mode . * @ param mode 0 - master , 1 - slave static void hdspm_set_system_clock_mode(struct hdspm *hdspm, int mode)0 == mode));static int snd_hdspm_info_system_clock_mode(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_info *uinfo)static const char *const texts[] = { "Master" , "AutoSync" };return 0 ;static int snd_hdspm_get_system_clock_mode(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_value *ucontrol)struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);0 ] = hdspm_system_clock_mode(hdspm);return 0 ;static int snd_hdspm_put_system_clock_mode(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_value *ucontrol)struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);int val;if (!snd_hdspm_use_is_exclusive(hdspm))return -EBUSY;0 ];if (val < 0 )0 ;else if (val > 1 )1 ;return 0 ;#define HDSPM_INTERNAL_CLOCK(xname, xindex) \static int hdspm_clock_source(struct hdspm * hdspm)switch (hdspm->system_sample_rate) {case 32000 : return 0 ;case 44100 : return 1 ;case 48000 : return 2 ;case 64000 : return 3 ;case 88200 : return 4 ;case 96000 : return 5 ;case 128000 : return 6 ;case 176400 : return 7 ;case 192000 : return 8 ;return -1 ;static int hdspm_set_clock_source(struct hdspm * hdspm, int mode)int rate;switch (mode) {case 0 :32000 ; break ;case 1 :44100 ; break ;case 2 :48000 ; break ;case 3 :64000 ; break ;case 4 :88200 ; break ;case 5 :96000 ; break ;case 6 :128000 ; break ;case 7 :176400 ; break ;case 8 :192000 ; break ;default :48000 ;1 );return 0 ;static int snd_hdspm_info_clock_source(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_info *uinfo)return snd_ctl_enum_info(uinfo, 1 , 9 , texts_freq + 1 );static int snd_hdspm_get_clock_source(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_value *ucontrol)struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);0 ] = hdspm_clock_source(hdspm);return 0 ;static int snd_hdspm_put_clock_source(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_value *ucontrol)struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);int change;int val;if (!snd_hdspm_use_is_exclusive(hdspm))return -EBUSY;0 ];if (val < 0 )0 ;if (val > 9 )9 ;if (val != hdspm_clock_source(hdspm))0 ) ? 1 : 0 ;else 0 ;return change;#define HDSPM_PREF_SYNC_REF(xname, xindex) \/* * Returns the current preferred sync reference setting . * The semantics of the return value are depending on the * card , please see the comments for clarification . static int hdspm_pref_sync_ref(struct hdspm * hdspm)switch (hdspm->io_type) {case AES32:switch (hdspm->control_register & HDSPM_SyncRefMask) {case 0 : return 0 ; /* WC */ case HDSPM_SyncRef0: return 1 ; /* AES 1 */ case HDSPM_SyncRef1: return 2 ; /* AES 2 */ case HDSPM_SyncRef1+HDSPM_SyncRef0: return 3 ; /* AES 3 */ case HDSPM_SyncRef2: return 4 ; /* AES 4 */ case HDSPM_SyncRef2+HDSPM_SyncRef0: return 5 ; /* AES 5 */ case HDSPM_SyncRef2+HDSPM_SyncRef1: return 6 ; /* AES 6 */ case HDSPM_SyncRef2+HDSPM_SyncRef1+HDSPM_SyncRef0:return 7 ; /* AES 7 */ case HDSPM_SyncRef3: return 8 ; /* AES 8 */ case HDSPM_SyncRef3+HDSPM_SyncRef0: return 9 ; /* TCO */ break ;case MADI:case MADIface:if (hdspm->tco) {switch (hdspm->control_register & HDSPM_SyncRefMask) {case 0 : return 0 ; /* WC */ case HDSPM_SyncRef0: return 1 ; /* MADI */ case HDSPM_SyncRef1: return 2 ; /* TCO */ case HDSPM_SyncRef1+HDSPM_SyncRef0:return 3 ; /* SYNC_IN */ else {switch (hdspm->control_register & HDSPM_SyncRefMask) {case 0 : return 0 ; /* WC */ case HDSPM_SyncRef0: return 1 ; /* MADI */ case HDSPM_SyncRef1+HDSPM_SyncRef0:return 2 ; /* SYNC_IN */ break ;case RayDAT:if (hdspm->tco) {switch ((hdspm->settings_register &case 0 : return 0 ; /* WC */ case 3 : return 1 ; /* ADAT 1 */ case 4 : return 2 ; /* ADAT 2 */ case 5 : return 3 ; /* ADAT 3 */ case 6 : return 4 ; /* ADAT 4 */ case 1 : return 5 ; /* AES */ case 2 : return 6 ; /* SPDIF */ case 9 : return 7 ; /* TCO */ case 10 : return 8 ; /* SYNC_IN */ else {switch ((hdspm->settings_register &case 0 : return 0 ; /* WC */ case 3 : return 1 ; /* ADAT 1 */ case 4 : return 2 ; /* ADAT 2 */ case 5 : return 3 ; /* ADAT 3 */ case 6 : return 4 ; /* ADAT 4 */ case 1 : return 5 ; /* AES */ case 2 : return 6 ; /* SPDIF */ case 10 : return 7 ; /* SYNC_IN */ break ;case AIO:if (hdspm->tco) {switch ((hdspm->settings_register &case 0 : return 0 ; /* WC */ case 3 : return 1 ; /* ADAT */ case 1 : return 2 ; /* AES */ case 2 : return 3 ; /* SPDIF */ case 9 : return 4 ; /* TCO */ case 10 : return 5 ; /* SYNC_IN */ else {switch ((hdspm->settings_register &case 0 : return 0 ; /* WC */ case 3 : return 1 ; /* ADAT */ case 1 : return 2 ; /* AES */ case 2 : return 3 ; /* SPDIF */ case 10 : return 4 ; /* SYNC_IN */ break ;return -1 ;/* * Set the preferred sync reference to < pref > . The semantics * of < pref > are depending on the card type , see the comments * for clarification . static int hdspm_set_pref_sync_ref(struct hdspm * hdspm, int pref)int p = 0 ;switch (hdspm->io_type) {case AES32:switch (pref) {case 0 : /* WC */ break ;case 1 : /* AES 1 */ break ;case 2 : /* AES 2 */ break ;case 3 : /* AES 3 */ break ;case 4 : /* AES 4 */ break ;case 5 : /* AES 5 */ break ;case 6 : /* AES 6 */ break ;case 7 : /* AES 7 */ break ;case 8 : /* AES 8 */ break ;case 9 : /* TCO */ break ;default :return -1 ;break ;case MADI:case MADIface:if (hdspm->tco) {switch (pref) {case 0 : /* WC */ break ;case 1 : /* MADI */ break ;case 2 : /* TCO */ break ;case 3 : /* SYNC_IN */ break ;default :return -1 ;else {switch (pref) {case 0 : /* WC */ break ;case 1 : /* MADI */ break ;case 2 : /* SYNC_IN */ break ;default :return -1 ;break ;case RayDAT:if (hdspm->tco) {switch (pref) {case 0 : p = 0 ; break ; /* WC */ case 1 : p = 3 ; break ; /* ADAT 1 */ case 2 : p = 4 ; break ; /* ADAT 2 */ case 3 : p = 5 ; break ; /* ADAT 3 */ case 4 : p = 6 ; break ; /* ADAT 4 */ case 5 : p = 1 ; break ; /* AES */ case 6 : p = 2 ; break ; /* SPDIF */ case 7 : p = 9 ; break ; /* TCO */ case 8 : p = 10 ; break ; /* SYNC_IN */ default : return -1 ;else {switch (pref) {case 0 : p = 0 ; break ; /* WC */ case 1 : p = 3 ; break ; /* ADAT 1 */ case 2 : p = 4 ; break ; /* ADAT 2 */ case 3 : p = 5 ; break ; /* ADAT 3 */ case 4 : p = 6 ; break ; /* ADAT 4 */ case 5 : p = 1 ; break ; /* AES */ case 6 : p = 2 ; break ; /* SPDIF */ case 7 : p = 10 ; break ; /* SYNC_IN */ default : return -1 ;break ;case AIO:if (hdspm->tco) {switch (pref) {case 0 : p = 0 ; break ; /* WC */ case 1 : p = 3 ; break ; /* ADAT */ case 2 : p = 1 ; break ; /* AES */ case 3 : p = 2 ; break ; /* SPDIF */ case 4 : p = 9 ; break ; /* TCO */ case 5 : p = 10 ; break ; /* SYNC_IN */ default : return -1 ;else {switch (pref) {case 0 : p = 0 ; break ; /* WC */ case 1 : p = 3 ; break ; /* ADAT */ case 2 : p = 1 ; break ; /* AES */ case 3 : p = 2 ; break ; /* SPDIF */ case 4 : p = 10 ; break ; /* SYNC_IN */ default : return -1 ;break ;switch (hdspm->io_type) {case RayDAT:case AIO:break ;case MADI:case MADIface:case AES32:return 0 ;static int snd_hdspm_info_pref_sync_ref(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_info *uinfo)struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);1 , hdspm->texts_autosync_items, hdspm->texts_autosync);return 0 ;static int snd_hdspm_get_pref_sync_ref(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_value *ucontrol)struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);int psf = hdspm_pref_sync_ref(hdspm);if (psf >= 0 ) {0 ] = psf;return 0 ;return -1 ;static int snd_hdspm_put_pref_sync_ref(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_value *ucontrol)struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);int val, change = 0 ;if (!snd_hdspm_use_is_exclusive(hdspm))return -EBUSY;0 ];if (val < 0 )0 ;else if (val >= hdspm->texts_autosync_items)1 ;if (val != hdspm_pref_sync_ref(hdspm))0 == hdspm_set_pref_sync_ref(hdspm, val)) ? 1 : 0 ;return change;#define HDSPM_AUTOSYNC_REF(xname, xindex) \static int hdspm_autosync_ref(struct hdspm *hdspm)/* This looks at the autosync selected sync reference */ if (AES32 == hdspm->io_type) {unsigned int status = hdspm_read(hdspm, HDSPM_statusRegister);unsigned int syncref = (status >> HDSPM_AES32_syncref_bit) & 0 xF;/* syncref >= HDSPM_AES32_AUTOSYNC_FROM_WORD is always true */ if (syncref <= HDSPM_AES32_AUTOSYNC_FROM_SYNC_IN) {return syncref;return HDSPM_AES32_AUTOSYNC_FROM_NONE;else if (MADI == hdspm->io_type) {unsigned int status2 = hdspm_read(hdspm, HDSPM_statusRegister2);switch (status2 & HDSPM_SelSyncRefMask) {case HDSPM_SelSyncRef_WORD:return HDSPM_AUTOSYNC_FROM_WORD;case HDSPM_SelSyncRef_MADI:return HDSPM_AUTOSYNC_FROM_MADI;case HDSPM_SelSyncRef_TCO:return HDSPM_AUTOSYNC_FROM_TCO;case HDSPM_SelSyncRef_SyncIn:return HDSPM_AUTOSYNC_FROM_SYNC_IN;case HDSPM_SelSyncRef_NVALID:return HDSPM_AUTOSYNC_FROM_NONE;default :return HDSPM_AUTOSYNC_FROM_NONE;return 0 ;static int snd_hdspm_info_autosync_ref(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_info *uinfo)struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);if (AES32 == hdspm->io_type) {static const char *const texts[] = { "WordClock" , "AES1" , "AES2" , "AES3" ,"AES4" , "AES5" , "AES6" , "AES7" , "AES8" , "TCO" , "Sync In" , "None" };else if (MADI == hdspm->io_type) {static const char *const texts[] = {"Word Clock" , "MADI" , "TCO" ,"Sync In" , "None" };return 0 ;static int snd_hdspm_get_autosync_ref(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_value *ucontrol)struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);0 ] = hdspm_autosync_ref(hdspm);return 0 ;#define HDSPM_TCO_VIDEO_INPUT_FORMAT(xname) \static int snd_hdspm_info_tco_video_input_format(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_info *uinfo)static const char *const texts[] = {"No video" , "NTSC" , "PAL" };return 0 ;static int snd_hdspm_get_tco_video_input_format(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_value *ucontrol)int ret = 0 ;struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);4 );switch (status & (HDSPM_TCO1_Video_Input_Format_NTSC |case HDSPM_TCO1_Video_Input_Format_NTSC:/* ntsc */ 1 ;break ;case HDSPM_TCO1_Video_Input_Format_PAL:/* pal */ 2 ;break ;default :/* no video */ 0 ;break ;0 ] = ret;return 0 ;#define HDSPM_TCO_LTC_FRAMES(xname) \static int snd_hdspm_info_tco_ltc_frames(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_info *uinfo)static const char *const texts[] = {"No lock" , "24 fps" , "25 fps" , "29.97 fps" ,"30 fps" };return 0 ;static int hdspm_tco_ltc_frames(struct hdspm *hdspm)int ret = 0 ;4 );if (status & HDSPM_TCO1_LTC_Input_valid) {switch (status & (HDSPM_TCO1_LTC_Format_LSB |case 0 :/* 24 fps */ break ;case HDSPM_TCO1_LTC_Format_LSB:/* 25 fps */ break ;case HDSPM_TCO1_LTC_Format_MSB:/* 29.97 fps */ break ;default :/* 30 fps */ break ;return ret;static int snd_hdspm_get_tco_ltc_frames(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_value *ucontrol)struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);0 ] = hdspm_tco_ltc_frames(hdspm);return 0 ;#define HDSPM_TOGGLE_SETTING(xname, xindex) \static int hdspm_toggle_setting(struct hdspm *hdspm, u32 regmask)if (hdspm_is_raydat_or_aio(hdspm))else return (reg & regmask) ? 1 : 0 ;static int hdspm_set_toggle_setting(struct hdspm *hdspm, u32 regmask, int out)if (hdspm_is_raydat_or_aio(hdspm)) {else {if (out)else return 0 ;#define snd_hdspm_info_toggle_setting snd_ctl_boolean_mono_infostatic int snd_hdspm_get_toggle_setting(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_value *ucontrol)struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);0 ] = hdspm_toggle_setting(hdspm, regmask);return 0 ;static int snd_hdspm_put_toggle_setting(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_value *ucontrol)struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);int change;unsigned int val;if (!snd_hdspm_use_is_exclusive(hdspm))return -EBUSY;0 ] & 1 ;int ) val != hdspm_toggle_setting(hdspm, regmask);return change;#define HDSPM_INPUT_SELECT(xname, xindex) \static int hdspm_input_select(struct hdspm * hdspm)return (hdspm->control_register & HDSPM_InputSelect0) ? 1 : 0 ;static int hdspm_set_input_select(struct hdspm * hdspm, int out)if (out)else return 0 ;static int snd_hdspm_info_input_select(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_info *uinfo)static const char *const texts[] = { "optical" , "coaxial" };return 0 ;static int snd_hdspm_get_input_select(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_value *ucontrol)struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);0 ] = hdspm_input_select(hdspm);return 0 ;static int snd_hdspm_put_input_select(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_value *ucontrol)struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);int change;unsigned int val;if (!snd_hdspm_use_is_exclusive(hdspm))return -EBUSY;0 ] & 1 ;int ) val != hdspm_input_select(hdspm);return change;#define HDSPM_DS_WIRE(xname, xindex) \static int hdspm_ds_wire(struct hdspm * hdspm)return (hdspm->control_register & HDSPM_DS_DoubleWire) ? 1 : 0 ;static int hdspm_set_ds_wire(struct hdspm * hdspm, int ds)if (ds)else return 0 ;static int snd_hdspm_info_ds_wire(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_info *uinfo)static const char *const texts[] = { "Single" , "Double" };return 0 ;static int snd_hdspm_get_ds_wire(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_value *ucontrol)struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);0 ] = hdspm_ds_wire(hdspm);return 0 ;static int snd_hdspm_put_ds_wire(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_value *ucontrol)struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);int change;unsigned int val;if (!snd_hdspm_use_is_exclusive(hdspm))return -EBUSY;0 ] & 1 ;int ) val != hdspm_ds_wire(hdspm);return change;#define HDSPM_QS_WIRE(xname, xindex) \static int hdspm_qs_wire(struct hdspm * hdspm)if (hdspm->control_register & HDSPM_QS_DoubleWire)return 1 ;if (hdspm->control_register & HDSPM_QS_QuadWire)return 2 ;return 0 ;static int hdspm_set_qs_wire(struct hdspm * hdspm, int mode)switch (mode) {case 0 :break ;case 1 :break ;case 2 :break ;return 0 ;static int snd_hdspm_info_qs_wire(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_info *uinfo)static const char *const texts[] = { "Single" , "Double" , "Quad" };return 0 ;static int snd_hdspm_get_qs_wire(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_value *ucontrol)struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);0 ] = hdspm_qs_wire(hdspm);return 0 ;static int snd_hdspm_put_qs_wire(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_value *ucontrol)struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);int change;int val;if (!snd_hdspm_use_is_exclusive(hdspm))return -EBUSY;0 ];if (val < 0 )0 ;if (val > 2 )2 ;return change;#define HDSPM_CONTROL_TRISTATE(xname, xindex) \static int hdspm_tristate(struct hdspm *hdspm, u32 regmask)3 );return reg / regmask;static int hdspm_set_tristate(struct hdspm *hdspm, int mode, u32 regmask)3 );return 0 ;static int snd_hdspm_info_tristate(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_info *uinfo)static const char *const texts_spdif[] = { "Optical" , "Coaxial" , "Internal" };static const char *const texts_levels[] = { "Hi Gain" , "+4 dBu" , "-10 dBV" };switch (regmask) {case HDSPM_c0_Input0:break ;default :break ;return 0 ;static int snd_hdspm_get_tristate(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_value *ucontrol)struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);0 ] = hdspm_tristate(hdspm, regmask);return 0 ;static int snd_hdspm_put_tristate(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_value *ucontrol)struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);int change;int val;if (!snd_hdspm_use_is_exclusive(hdspm))return -EBUSY;0 ];if (val < 0 )0 ;if (val > 2 )2 ;return change;#define HDSPM_MADI_SPEEDMODE(xname, xindex) \static int hdspm_madi_speedmode(struct hdspm *hdspm)if (hdspm->control_register & HDSPM_QuadSpeed)return 2 ;if (hdspm->control_register & HDSPM_DoubleSpeed)return 1 ;return 0 ;static int hdspm_set_madi_speedmode(struct hdspm *hdspm, int mode)switch (mode) {case 0 :break ;case 1 :break ;case 2 :break ;return 0 ;static int snd_hdspm_info_madi_speedmode(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_info *uinfo)static const char *const texts[] = { "Single" , "Double" , "Quad" };return 0 ;static int snd_hdspm_get_madi_speedmode(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_value *ucontrol)struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);0 ] = hdspm_madi_speedmode(hdspm);return 0 ;static int snd_hdspm_put_madi_speedmode(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_value *ucontrol)struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);int change;int val;if (!snd_hdspm_use_is_exclusive(hdspm))return -EBUSY;0 ];if (val < 0 )0 ;if (val > 2 )2 ;return change;#define HDSPM_MIXER(xname, xindex) \0 , \static int snd_hdspm_info_mixer(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_info *uinfo)3 ;0 ;65535 ;1 ;return 0 ;static int snd_hdspm_get_mixer(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_value *ucontrol)struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);int source;int destination;0 ];if (source < 0 )0 ;else if (source >= 2 * HDSPM_MAX_CHANNELS)2 * HDSPM_MAX_CHANNELS - 1 ;1 ];if (destination < 0 )0 ;else if (destination >= HDSPM_MAX_CHANNELS)1 ;if (source >= HDSPM_MAX_CHANNELS)2 ] =else 2 ] =return 0 ;static int snd_hdspm_put_mixer(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_value *ucontrol)struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);int change;int source;int destination;int gain;if (!snd_hdspm_use_is_exclusive(hdspm))return -EBUSY;0 ];1 ];if (source < 0 || source >= 2 * HDSPM_MAX_CHANNELS)return -1 ;if (destination < 0 || destination >= HDSPM_MAX_CHANNELS)return -1 ;2 ];if (source >= HDSPM_MAX_CHANNELS)else if (change) {if (source >= HDSPM_MAX_CHANNELS)else return change;/* The simple mixer control(s) provide gain control for the basic 1 : 1 mappings of playback streams to output streams . #define HDSPM_PLAYBACK_MIXER \static int snd_hdspm_info_playback_mixer(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_info *uinfo)1 ;0 ;64 ;1 ;return 0 ;static int snd_hdspm_get_playback_mixer(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_value *ucontrol)struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);int channel;1 ;if (snd_BUG_ON(channel < 0 || channel >= HDSPM_MAX_CHANNELS))return -EINVAL;0 ] =64 )/UNITY_GAIN;return 0 ;static int snd_hdspm_put_playback_mixer(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_value *ucontrol)struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);int change;int channel;int gain;if (!snd_hdspm_use_is_exclusive(hdspm))return -EBUSY;1 ;if (snd_BUG_ON(channel < 0 || channel >= HDSPM_MAX_CHANNELS))return -EINVAL;0 ]*UNITY_GAIN/64 ;if (change)return change;#define HDSPM_SYNC_CHECK(xname, xindex) \#define HDSPM_TCO_LOCK_CHECK(xname, xindex) \static int snd_hdspm_info_sync_check(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_info *uinfo)static const char *const texts[] = { "No Lock" , "Lock" , "Sync" , "N/A" };return 0 ;static int snd_hdspm_tco_info_lock_check(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_info *uinfo)static const char *const texts[] = { "No Lock" , "Lock" };return 0 ;static int hdspm_wc_sync_check(struct hdspm *hdspm)int status, status2;switch (hdspm->io_type) {case AES32:if (status & HDSPM_AES32_wcLock) {if (status & HDSPM_AES32_wcSync)return 2 ;else return 1 ;return 0 ;case MADI:if (status2 & HDSPM_wcLock) {if (status2 & HDSPM_wcSync)return 2 ;else return 1 ;return 0 ;case RayDAT:case AIO:if (status & 0 x2000000)return 2 ;else if (status & 0 x1000000)return 1 ;return 0 ;case MADIface:break ;return 3 ;static int hdspm_madi_sync_check(struct hdspm *hdspm)int status = hdspm_read(hdspm, HDSPM_statusRegister);if (status & HDSPM_madiLock) {if (status & HDSPM_madiSync)return 2 ;else return 1 ;return 0 ;static int hdspm_s1_sync_check(struct hdspm *hdspm, int idx)int status, lock, sync;0 x1<<idx)) ? 1 : 0 ;0 x100<<idx)) ? 1 : 0 ;if (lock && sync)return 2 ;else if (lock)return 1 ;return 0 ;static int hdspm_sync_in_sync_check(struct hdspm *hdspm)int status, lock = 0 , sync = 0 ;switch (hdspm->io_type) {case RayDAT:case AIO:0 x400) ? 1 : 0 ;0 x800) ? 1 : 0 ;break ;case MADI:1 : 0 ;1 : 0 ;break ;case AES32:0 x100000) ? 1 : 0 ;0 x200000) ? 1 : 0 ;break ;case MADIface:break ;if (lock && sync)return 2 ;else if (lock)return 1 ;return 0 ;static int hdspm_aes_sync_check(struct hdspm *hdspm, int idx)int status2, lock, sync;0 x0080 >> idx)) ? 1 : 0 ;0 x8000 >> idx)) ? 1 : 0 ;if (sync)return 2 ;else if (lock)return 1 ;return 0 ;static int hdspm_tco_input_check(struct hdspm *hdspm, u32 mask)4 );return (status & mask) ? 1 : 0 ;static int hdspm_tco_sync_check(struct hdspm *hdspm)int status;if (hdspm->tco) {switch (hdspm->io_type) {case MADI:if (status & HDSPM_tcoLockMadi) {if (status & HDSPM_tcoSync)return 2 ;else return 1 ;return 0 ;case AES32:if (status & HDSPM_tcoLockAes) {if (status & HDSPM_tcoSync)return 2 ;else return 1 ;return 0 ;case RayDAT:case AIO:if (status & 0 x8000000)return 2 ; /* Sync */ if (status & 0 x4000000)return 1 ; /* Lock */ return 0 ; /* No signal */ default :break ;return 3 ; /* N/A */ static int snd_hdspm_get_sync_check(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_value *ucontrol)struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);int val = -1 ;switch (hdspm->io_type) {case RayDAT:switch (kcontrol->private_value) {case 0 : /* WC */ break ;case 7 : /* TCO */ break ;case 8 : /* SYNC IN */ break ;default :1 );break ;case AIO:switch (kcontrol->private_value) {case 0 : /* WC */ break ;case 4 : /* TCO */ break ;case 5 : /* SYNC IN */ break ;default :1 );break ;case MADI:switch (kcontrol->private_value) {case 0 : /* WC */ break ;case 1 : /* MADI */ break ;case 2 : /* TCO */ break ;case 3 : /* SYNC_IN */ break ;break ;case MADIface:/* MADI */ break ;case AES32:switch (kcontrol->private_value) {case 0 : /* WC */ break ;case 9 : /* TCO */ break ;case 10 /* SYNC IN */: break ;default : /* AES1 to AES8 */ 1 );break ;if (hdspm->tco) {switch (kcontrol->private_value) {case 11 :/* Check TCO for lock state of its current input */ break ;case 12 :/* Check TCO for valid time code on LTC input. */ break ;default :break ;if (-1 == val)3 ;0 ] = val;return 0 ;/* * TCO controls static void hdspm_tco_write(struct hdspm *hdspm)unsigned int tc[4 ] = { 0 , 0 , 0 , 0 };switch (hdspm->tco->input) {case 0 :2 ] |= HDSPM_TCO2_set_input_MSB;break ;case 1 :2 ] |= HDSPM_TCO2_set_input_LSB;break ;default :break ;switch (hdspm->tco->framerate) {case 1 :1 ] |= HDSPM_TCO1_LTC_Format_LSB;break ;case 2 :1 ] |= HDSPM_TCO1_LTC_Format_MSB;break ;case 3 :1 ] |= HDSPM_TCO1_LTC_Format_MSB +break ;case 4 :1 ] |= HDSPM_TCO1_LTC_Format_LSB +break ;case 5 :1 ] |= HDSPM_TCO1_LTC_Format_LSB +break ;default :break ;switch (hdspm->tco->wordclock) {case 1 :2 ] |= HDSPM_TCO2_WCK_IO_ratio_LSB;break ;case 2 :2 ] |= HDSPM_TCO2_WCK_IO_ratio_MSB;break ;default :break ;switch (hdspm->tco->samplerate) {case 1 :2 ] |= HDSPM_TCO2_set_freq;break ;case 2 :2 ] |= HDSPM_TCO2_set_freq_from_app;break ;default :break ;switch (hdspm->tco->pull) {case 1 :2 ] |= HDSPM_TCO2_set_pull_up;break ;case 2 :2 ] |= HDSPM_TCO2_set_pull_down;break ;case 3 :2 ] |= HDSPM_TCO2_set_pull_up + HDSPM_TCO2_set_01_4;break ;case 4 :2 ] |= HDSPM_TCO2_set_pull_down + HDSPM_TCO2_set_01_4;break ;default :break ;if (1 == hdspm->tco->term) {2 ] |= HDSPM_TCO2_set_term_75R;0 ]);4 , tc[1 ]);8 , tc[2 ]);12 , tc[3 ]);#define HDSPM_TCO_SAMPLE_RATE(xname, xindex) \static int snd_hdspm_info_tco_sample_rate(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_info *uinfo)/* TODO freq from app could be supported here, see tco->samplerate */ static const char *const texts[] = { "44.1 kHz" , "48 kHz" };return 0 ;static int snd_hdspm_get_tco_sample_rate(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_value *ucontrol)struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);0 ] = hdspm->tco->samplerate;return 0 ;static int snd_hdspm_put_tco_sample_rate(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_value *ucontrol)struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);if (hdspm->tco->samplerate != ucontrol->value.enumerated.item[0 ]) {0 ];return 1 ;return 0 ;#define HDSPM_TCO_PULL(xname, xindex) \static int snd_hdspm_info_tco_pull(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_info *uinfo)static const char *const texts[] = { "0" , "+ 0.1 %" , "- 0.1 %" ,"+ 4 %" , "- 4 %" };return 0 ;static int snd_hdspm_get_tco_pull(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_value *ucontrol)struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);0 ] = hdspm->tco->pull;return 0 ;static int snd_hdspm_put_tco_pull(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_value *ucontrol)struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);if (hdspm->tco->pull != ucontrol->value.enumerated.item[0 ]) {0 ];return 1 ;return 0 ;#define HDSPM_TCO_WCK_CONVERSION(xname, xindex) \static int snd_hdspm_info_tco_wck_conversion(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_info *uinfo)static const char *const texts[] = { "1:1" , "44.1 -> 48" , "48 -> 44.1" };return 0 ;static int snd_hdspm_get_tco_wck_conversion(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_value *ucontrol)struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);0 ] = hdspm->tco->wordclock;return 0 ;static int snd_hdspm_put_tco_wck_conversion(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_value *ucontrol)struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);if (hdspm->tco->wordclock != ucontrol->value.enumerated.item[0 ]) {0 ];return 1 ;return 0 ;#define HDSPM_TCO_FRAME_RATE(xname, xindex) \static int snd_hdspm_info_tco_frame_rate(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_info *uinfo)static const char *const texts[] = { "24 fps" , "25 fps" , "29.97fps" ,"29.97 dfps" , "30 fps" , "30 dfps" };return 0 ;static int snd_hdspm_get_tco_frame_rate(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_value *ucontrol)struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);0 ] = hdspm->tco->framerate;return 0 ;static int snd_hdspm_put_tco_frame_rate(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_value *ucontrol)struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);if (hdspm->tco->framerate != ucontrol->value.enumerated.item[0 ]) {0 ];return 1 ;return 0 ;#define HDSPM_TCO_SYNC_SOURCE(xname, xindex) \static int snd_hdspm_info_tco_sync_source(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_info *uinfo)static const char *const texts[] = { "LTC" , "Video" , "WCK" };return 0 ;static int snd_hdspm_get_tco_sync_source(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_value *ucontrol)struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);0 ] = hdspm->tco->input;return 0 ;static int snd_hdspm_put_tco_sync_source(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_value *ucontrol)struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);if (hdspm->tco->input != ucontrol->value.enumerated.item[0 ]) {0 ];return 1 ;return 0 ;#define HDSPM_TCO_WORD_TERM(xname, xindex) \static int snd_hdspm_info_tco_word_term(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_info *uinfo)1 ;0 ;1 ;return 0 ;static int snd_hdspm_get_tco_word_term(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_value *ucontrol)struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);0 ] = hdspm->tco->term;return 0 ;static int snd_hdspm_put_tco_word_term(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_value *ucontrol)struct hdspm *hdspm = snd_kcontrol_chip(kcontrol);if (hdspm->tco->term != ucontrol->value.integer.value[0 ]) {0 ];return 1 ;return 0 ;static const struct snd_kcontrol_new snd_hdspm_controls_madi[] = {"Mixer" , 0 ),"Internal Clock" , 0 ),"System Clock Mode" , 0 ),"Preferred Sync Reference" , 0 ),"AutoSync Reference" , 0 ),"System Sample Rate" , 0 ),"External Rate" , 0 ),"WC SyncCheck" , 0 ),"MADI SyncCheck" , 1 ),"TCO SyncCheck" , 2 ),"SYNC IN SyncCheck" , 3 ),"Line Out" , HDSPM_LineOut),"TX 64 channels mode" , HDSPM_TX_64ch),"Disable 96K frames" , HDSPM_SMUX),"Clear Track Marker" , HDSPM_clr_tms),"Safe Mode" , HDSPM_AutoInp),"Input Select" , 0 ),"MADI Speed Mode" , 0 )static const struct snd_kcontrol_new snd_hdspm_controls_madiface[] = {"Mixer" , 0 ),"Internal Clock" , 0 ),"System Clock Mode" , 0 ),"System Sample Rate" , 0 ),"External Rate" , 0 ),"MADI SyncCheck" , 0 ),"TX 64 channels mode" , HDSPM_TX_64ch),"Clear Track Marker" , HDSPM_clr_tms),"Safe Mode" , HDSPM_AutoInp),"MADI Speed Mode" , 0 )static const struct snd_kcontrol_new snd_hdspm_controls_aio[] = {"Mixer" , 0 ),"Internal Clock" , 0 ),"System Clock Mode" , 0 ),"Preferred Sync Reference" , 0 ),"System Sample Rate" , 0 ),"External Rate" , 0 ),"WC SyncCheck" , 0 ),"AES SyncCheck" , 1 ),"SPDIF SyncCheck" , 2 ),"ADAT SyncCheck" , 3 ),"TCO SyncCheck" , 4 ),"SYNC IN SyncCheck" , 5 ),"WC Frequency" , 0 ),"AES Frequency" , 1 ),"SPDIF Frequency" , 2 ),"ADAT Frequency" , 3 ),"TCO Frequency" , 4 ),"SYNC IN Frequency" , 5 ),"S/PDIF Input" , HDSPM_c0_Input0),"S/PDIF Out Optical" , HDSPM_c0_Spdif_Opt),"S/PDIF Out Professional" , HDSPM_c0_Pro),"ADAT internal (AEB/TEB)" , HDSPM_c0_AEB1),"XLR Breakout Cable" , HDSPM_c0_Sym6db),"Single Speed WordClock Out" , HDSPM_c0_Wck48),"Input Level" , HDSPM_c0_AD_GAIN0),"Output Level" , HDSPM_c0_DA_GAIN0),"Phones Level" , HDSPM_c0_PH_GAIN0)/* HDSPM_INPUT_SELECT ( " Input Select " , 0 ) , HDSPM_SPDIF_OPTICAL ( " SPDIF Out Optical " , 0 ) , HDSPM_PROFESSIONAL ( " SPDIF Out Professional " , 0 ) ; HDSPM_SPDIF_IN ( " SPDIF In " , 0 ) ; HDSPM_BREAKOUT_CABLE ( " Breakout Cable " , 0 ) ; HDSPM_INPUT_LEVEL ( " Input Level " , 0 ) ; HDSPM_OUTPUT_LEVEL ( " Output Level " , 0 ) ; HDSPM_PHONES ( " Phones " , 0 ) ; static const struct snd_kcontrol_new snd_hdspm_controls_raydat[] = {"Mixer" , 0 ),"Internal Clock" , 0 ),"Clock Mode" , 0 ),"Pref Sync Ref" , 0 ),"System Sample Rate" , 0 ),"WC SyncCheck" , 0 ),"AES SyncCheck" , 1 ),"SPDIF SyncCheck" , 2 ),"ADAT1 SyncCheck" , 3 ),"ADAT2 SyncCheck" , 4 ),"ADAT3 SyncCheck" , 5 ),"ADAT4 SyncCheck" , 6 ),"TCO SyncCheck" , 7 ),"SYNC IN SyncCheck" , 8 ),"WC Frequency" , 0 ),"AES Frequency" , 1 ),"SPDIF Frequency" , 2 ),"ADAT1 Frequency" , 3 ),"ADAT2 Frequency" , 4 ),"ADAT3 Frequency" , 5 ),"ADAT4 Frequency" , 6 ),"TCO Frequency" , 7 ),"SYNC IN Frequency" , 8 ),"S/PDIF Out Professional" , HDSPM_c0_Pro),"Single Speed WordClock Out" , HDSPM_c0_Wck48)static const struct snd_kcontrol_new snd_hdspm_controls_aes32[] = {"Mixer" , 0 ),"Internal Clock" , 0 ),"System Clock Mode" , 0 ),"Preferred Sync Reference" , 0 ),"AutoSync Reference" , 0 ),"System Sample Rate" , 0 ),"External Rate" , 11 ),"WC Sync Check" , 0 ),"AES1 Sync Check" , 1 ),"AES2 Sync Check" , 2 ),"AES3 Sync Check" , 3 ),"AES4 Sync Check" , 4 ),"AES5 Sync Check" , 5 ),"AES6 Sync Check" , 6 ),"AES7 Sync Check" , 7 ),"AES8 Sync Check" , 8 ),"TCO Sync Check" , 9 ),"SYNC IN Sync Check" , 10 ),"WC Frequency" , 0 ),"AES1 Frequency" , 1 ),"AES2 Frequency" , 2 ),"AES3 Frequency" , 3 ),"AES4 Frequency" , 4 ),"AES5 Frequency" , 5 ),"AES6 Frequency" , 6 ),"AES7 Frequency" , 7 ),"AES8 Frequency" , 8 ),"TCO Frequency" , 9 ),"SYNC IN Frequency" , 10 ),"Line Out" , HDSPM_LineOut),"Emphasis" , HDSPM_Emphasis),"Non Audio" , HDSPM_Dolby),"Professional" , HDSPM_Professional),"Clear Track Marker" , HDSPM_clr_tms),"Double Speed Wire Mode" , 0 ),"Quad Speed Wire Mode" , 0 ),/* Control elements for the optional TCO module */ static const struct snd_kcontrol_new snd_hdspm_controls_tco[] = {"TCO Sample Rate" , 0 ),"TCO Pull" , 0 ),"TCO WCK Conversion" , 0 ),"TCO Frame Rate" , 0 ),"TCO Sync Source" , 0 ),"TCO Word Term" , 0 ),"TCO Input Check" , 11 ),"TCO LTC Valid" , 12 ),"TCO Detected Frame Rate" ),"Video Input Format" )static struct snd_kcontrol_new snd_hdspm_playback_mixer = HDSPM_PLAYBACK_MIXER;static int hdspm_update_simple_mixer_controls(struct hdspm * hdspm)int i;for (i = hdspm->ds_out_channels; i < hdspm->ss_out_channels; ++i) {if (hdspm->system_sample_rate > 48000 ) {0 ].access =else {0 ].access =return 0 ;static int snd_hdspm_create_controls(struct snd_card *card,struct hdspm *hdspm)unsigned int idx, limit;int err;struct snd_kcontrol *kctl;const struct snd_kcontrol_new *list = NULL;switch (hdspm->io_type) {case MADI:break ;case MADIface:break ;case AIO:break ;case RayDAT:break ;case AES32:break ;if (list) {for (idx = 0 ; idx < limit; idx++) {if (err < 0 )return err;/* create simple 1:1 playback mixer controls */ "Chn" ;if (hdspm->system_sample_rate >= 128000 ) {else if (hdspm->system_sample_rate >= 64000 ) {else {for (idx = 0 ; idx < limit; ++idx) {1 ;if (err < 0 )return err;if (hdspm->tco) {/* add tco control elements */ for (idx = 0 ; idx < limit; idx++) {if (err < 0 )return err;return 0 ;/*------------------------------------------------------------ / proc interface static void struct snd_info_entry *entry,struct snd_info_buffer *buffer)struct hdspm *hdspm = entry->private_data;unsigned int status, control;int a, ltc, frames, seconds, minutes, hours;unsigned int period;0 ;"--- TCO ---\n" );if (status & HDSPM_tco_detect) {"TCO module detected.\n" );4 );if (a & HDSPM_TCO1_LTC_Input_valid) {" LTC valid, " );switch (a & (HDSPM_TCO1_LTC_Format_LSB |case 0 :"24 fps, " );break ;case HDSPM_TCO1_LTC_Format_LSB:"25 fps, " );break ;case HDSPM_TCO1_LTC_Format_MSB:"29.97 fps, " );break ;default :"30 fps, " );break ;if (a & HDSPM_TCO1_set_drop_frame_flag) {"drop frame\n" );else {"full frame\n" );else {" no LTC\n" );if (a & HDSPM_TCO1_Video_Input_Format_NTSC) {" Video: NTSC\n" );else if (a & HDSPM_TCO1_Video_Input_Format_PAL) {" Video: PAL\n" );else {" No video\n" );if (a & HDSPM_TCO1_TCO_lock) {" Sync: lock\n" );else {" Sync: no lock\n" );switch (hdspm->io_type) {case MADI:case AES32:110069313433624 ULL;break ;case RayDAT:case AIO:104857600000000 ULL;break ;case MADIface:break ; /* no TCO possible */ " period: %u\n" , period);/* rate = freq_const/period; */ if (control & HDSPM_QuadSpeed) {4 ;else if (control & HDSPM_DoubleSpeed) {2 ;" Frequency: %u Hz\n" ,unsigned int ) rate);0 xF;4 ;0 x3) * 10 ;4 ;0 xF;4 ;0 x7) * 10 ;4 ;0 xF;4 ;0 x7) * 10 ;4 ;0 xF;4 ;0 x3) * 10 ;" LTC In: %02d:%02d:%02d:%02d\n" ,else {"No TCO module detected.\n" );static void struct snd_info_entry *entry,struct snd_info_buffer *buffer)struct hdspm *hdspm = entry->private_data;unsigned int status, status2;char *pref_sync_ref;char *autosync_ref;char *system_clock_mode;int x, x2;"%s (Card #%d) Rev.%x Status2first3bits: %x\n" ,1 ,"HW Serial: 0x%06x%06x\n" ,8 ) & 0 xFFFFFF,"IRQ: %d Registers bus: 0x%lx VM: 0x%lx\n" ,unsigned long )hdspm->iobase);"--- System ---\n" );"IRQ Pending: Audio=%d, MIDI0=%d, MIDI1=%d, IRQcount=%d\n" ,1 : 0 ,1 : 0 ,"HW pointer: id = %d, rawptr = %d (%d->%d) " "estimated= %ld (bytes)\n" ,1 : 0 ),2 * (int )hdspm->period_bytes),64 ) %2 * (int )hdspm->period_bytes),long ) hdspm_hw_pointer(hdspm) * 4 );"MIDI FIFO: Out1=0x%x, Out2=0x%x, In1=0x%x, In2=0x%x \n" ,0 xFF,0 xFF,0 xFF,0 xFF);"MIDIoverMADI FIFO: In=0x%x, Out=0x%x \n" ,0 xFF,0 xFF);"Register: ctrl1=0x%x, ctrl2=0x%x, status1=0x%x, " "status2=0x%x\n" ,"--- Settings ---\n" );"Size (Latency): %d samples (2 periods of %lu bytes)\n" ,unsigned long ) hdspm->period_bytes);"Line out: %s\n" ,"ClearTrackMarker = %s, Transmit in %s Channel Mode, " "Auto Input %s\n" ,"64" : "56" ,if (!(hdspm->control_register & HDSPM_ClockModeMaster))"AutoSync" ;else "Master" ;"AutoSync Reference: %s\n" , system_clock_mode);switch (hdspm_pref_sync_ref(hdspm)) {case HDSPM_SYNC_FROM_WORD:"Word Clock" ;break ;case HDSPM_SYNC_FROM_MADI:"MADI Sync" ;break ;case HDSPM_SYNC_FROM_TCO:"TCO" ;break ;case HDSPM_SYNC_FROM_SYNC_IN:"Sync In" ;break ;default :"XXXX Clock" ;break ;"Preferred Sync Reference: %s\n" ,"System Clock Frequency: %d\n" ,"--- Status:\n" );"Inputs MADI=%s, WordClock=%s\n" ,"Sync" : "Lock" ) :"NoLock" ,"Sync" : "Lock" ) :"NoLock" );switch (hdspm_autosync_ref(hdspm)) {case HDSPM_AUTOSYNC_FROM_SYNC_IN:"Sync In" ;break ;case HDSPM_AUTOSYNC_FROM_TCO:"TCO" ;break ;case HDSPM_AUTOSYNC_FROM_WORD:"Word Clock" ;break ;case HDSPM_AUTOSYNC_FROM_MADI:"MADI Sync" ;break ;case HDSPM_AUTOSYNC_FROM_NONE:"Input not valid" ;break ;default :"---" ;break ;"AutoSync: Reference= %s, Freq=%d (MADI = %d, Word = %d)\n" ,22 ,5 );"Input: %s, Mode=%s\n" ,"Coax" : "Optical" ,"64 channels" :"56 channels" );/* call readout function for TCO specific status */ "\n" );static void struct snd_info_entry * entry,struct snd_info_buffer *buffer)struct hdspm *hdspm = entry->private_data;unsigned int status;unsigned int status2;unsigned int timecode;unsigned int wcLock, wcSync;int pref_syncref;char *autosync_ref;int x;"%s (Card #%d) Rev.%x\n" ,1 ,"IRQ: %d Registers bus: 0x%lx VM: 0x%lx\n" ,unsigned long )hdspm->iobase);"--- System ---\n" );"IRQ Pending: Audio=%d, MIDI0=%d, MIDI1=%d, IRQcount=%d\n" ,1 : 0 ,1 : 0 ,"HW pointer: id = %d, rawptr = %d (%d->%d) " "estimated= %ld (bytes)\n" ,1 : 0 ),2 * (int )hdspm->period_bytes),64 ) %2 * (int )hdspm->period_bytes),long ) hdspm_hw_pointer(hdspm) * 4 );"MIDI FIFO: Out1=0x%x, Out2=0x%x, In1=0x%x, In2=0x%x \n" ,0 xFF,0 xFF,0 xFF,0 xFF);"MIDIoverMADI FIFO: In=0x%x, Out=0x%x \n" ,0 xFF,0 xFF);"Register: ctrl1=0x%x, ctrl2=0x%x, status1=0x%x, " "status2=0x%x\n" ,"--- Settings ---\n" );"Size (Latency): %d samples (2 periods of %lu bytes)\n" ,unsigned long ) hdspm->period_bytes);"Line out: %s\n" ,"on " : "off" );"ClearTrackMarker %s, Emphasis %s, Dolby %s\n" ,if (pref_syncref == 0 )"Preferred Sync Reference: Word Clock\n" );else "Preferred Sync Reference: AES%d\n" ,"System Clock Frequency: %d\n" ,"Double speed: %s\n" ,"Double wire" : "Single wire" );"Quad speed: %s\n" ,"Double wire" :"Quad wire" : "Single wire" );"--- Status:\n" );"Word: %s Frequency: %d\n" ,"Sync " : "Lock " ) : "No Lock" ,0 xF));for (x = 0 ; x < 8 ; x++) {"AES%d: %s Frequency: %d\n" ,1 ,"Sync " : "No Lock" ,4 *x)) & 0 xF));switch (hdspm_autosync_ref(hdspm)) {case HDSPM_AES32_AUTOSYNC_FROM_NONE:"None" ; break ;case HDSPM_AES32_AUTOSYNC_FROM_WORD:"Word Clock" ; break ;case HDSPM_AES32_AUTOSYNC_FROM_AES1:"AES1" ; break ;case HDSPM_AES32_AUTOSYNC_FROM_AES2:"AES2" ; break ;case HDSPM_AES32_AUTOSYNC_FROM_AES3:"AES3" ; break ;case HDSPM_AES32_AUTOSYNC_FROM_AES4:"AES4" ; break ;case HDSPM_AES32_AUTOSYNC_FROM_AES5:"AES5" ; break ;case HDSPM_AES32_AUTOSYNC_FROM_AES6:"AES6" ; break ;case HDSPM_AES32_AUTOSYNC_FROM_AES7:"AES7" ; break ;case HDSPM_AES32_AUTOSYNC_FROM_AES8:"AES8" ; break ;case HDSPM_AES32_AUTOSYNC_FROM_TCO:"TCO" ; break ;case HDSPM_AES32_AUTOSYNC_FROM_SYNC_IN:"Sync In" ; break ;default :"---" ; break ;"AutoSync ref = %s\n" , autosync_ref);/* call readout function for TCO specific status */ "\n" );static void struct snd_info_entry *entry,struct snd_info_buffer *buffer)struct hdspm *hdspm = entry->private_data;unsigned int status1, status2, status3, i;unsigned int lock, sync;/* s1 */ /* freq */ /* s2 */ "STATUS1: 0x%08x\n" , status1);"STATUS2: 0x%08x\n" , status2);"STATUS3: 0x%08x\n" , status3);"\n*** CLOCK MODE\n\n" );"Clock mode : %s\n" ,0 ) ? "master" : "slave" );"System frequency: %d Hz\n" ,"\n*** INPUT STATUS\n\n" );0 x1;0 x100;for (i = 0 ; i < 8 ; i++) {"s1_input %d: Lock %d, Sync %d, Freq %s\n" ,1 : 0 ,1 : 0 ,4 )) & 0 xF]);1 ;1 ;"WC input: Lock %d, Sync %d, Freq %s\n" ,0 x1000000) ? 1 : 0 ,0 x2000000) ? 1 : 0 ,16 ) & 0 xF]);"TCO input: Lock %d, Sync %d, Freq %s\n" ,0 x4000000) ? 1 : 0 ,0 x8000000) ? 1 : 0 ,20 ) & 0 xF]);"SYNC IN: Lock %d, Sync %d, Freq %s\n" ,0 x400) ? 1 : 0 ,0 x800) ? 1 : 0 ,12 ) & 0 xF]);#ifdef CONFIG_SND_DEBUGstatic void struct snd_info_entry *entry,struct snd_info_buffer *buffer)struct hdspm *hdspm = entry->private_data;int j,i;for (i = 0 ; i < 256 /* 1024*64 */; i += j) { "0x%08X: " , i);for (j = 0 ; j < 16 ; j += 4 )"%08X " , hdspm_read(hdspm, i + j));"\n" );#endif static void snd_hdspm_proc_ports_in(struct snd_info_entry *entry,struct snd_info_buffer *buffer)struct hdspm *hdspm = entry->private_data;int i;"# generated by hdspm\n" );for (i = 0 ; i < hdspm->max_channels_in; i++) {"%d=%s\n" , i+1 , hdspm->port_names_in[i]);static void snd_hdspm_proc_ports_out(struct snd_info_entry *entry,struct snd_info_buffer *buffer)struct hdspm *hdspm = entry->private_data;int i;"# generated by hdspm\n" );for (i = 0 ; i < hdspm->max_channels_out; i++) {"%d=%s\n" , i+1 , hdspm->port_names_out[i]);static void snd_hdspm_proc_init(struct hdspm *hdspm)void (*read)(struct snd_info_entry *, struct snd_info_buffer *) = NULL;switch (hdspm->io_type) {case AES32:break ;case MADI:break ;case MADIface:/* read = snd_hdspm_proc_read_madiface; */ break ;case RayDAT:break ;case AIO:break ;"hdspm" , hdspm, read);"ports.in" , hdspm,"ports.out" , hdspm,#ifdef CONFIG_SND_DEBUG/* debug file to read all hdspm registers */ "debug" , hdspm,#endif /*------------------------------------------------------------ hdspm intitialize static int snd_hdspm_set_defaults(struct hdspm * hdspm)/* ASSUMPTION: hdspm->lock is either held, or there is no need to hold it ( e . g . during module initialization ) . /* set defaults: */ 0 ;switch (hdspm->io_type) {case MADI:case MADIface:0 x2 + 0 x8 + 0 x10 + 0 x80 + 0 x400 + 0 x4000 + 0 x1000000;break ;case RayDAT:case AIO:0 x1 + 0 x1000;/* Magic values are: LAT_0, LAT_2, Master, freq1, tx64ch, inp_0, 0 x2 + 0 x8 + 0 x10 + 0 x80 + 0 x400 + 0 x4000 + 0 x1000000;break ;case AES32:/* Master Clock Mode on */ 7 ) | /* latency max=8192samples */ /* AES1 is syncclock */ /* Analog output in */ /* Professional mode */ break ;if (AES32 == hdspm->io_type) {/* No control2 register for AES32 */ #ifdef SNDRV_BIG_ENDIAN#else 0 ;#endif /* silence everything */ 0 * UNITY_GAIN);if (hdspm_is_raydat_or_aio(hdspm))/* set a default rate so that the channel map is set up. */ 48000 , 1 );return 0 ;/*------------------------------------------------------------ interrupt static irqreturn_t snd_hdspm_interrupt(int irq, void *dev_id)struct hdspm *hdspm = (struct hdspm *) dev_id;unsigned int status;int i, audio, midi, schedule = 0 ;/* cycles_t now; */ /* now = get_cycles(); */ /* * LAT_2 . . LAT_0 period counter ( win ) counter ( mac ) * 6 4096 ~ 256053425 ~ 514672358 * 5 2048 ~ 128024983 ~ 257373821 * 4 1024 ~ 64023706 ~ 128718089 * 3 512 ~ 32005945 ~ 64385999 * 2 256 ~ 16003039 ~ 32260176 * 1 128 ~ 7998738 ~ 16194507 * 0 64 ~ 3998231 ~ 8191558 /* dev_info ( hdspm - > card - > dev , " snd_hdspm_interrupt % llu @ % llx \ n " , now - hdspm - > last_interrupt , status & 0 xFFC0 ) ; hdspm - > last_interrupt = now ; if (!audio && !midi)return IRQ_NONE;0 );if (audio) {if (hdspm->capture_substream)if (hdspm->playback_substream)if (midi) {0 ;while (i < hdspm->midiPorts) {if ((hdspm_read(hdspm,0 xff) &&/* we disable interrupts for this input until * processing is done 1 ;1 ;if (schedule)return IRQ_HANDLED;/*------------------------------------------------------------ pcm interface static snd_pcm_uframes_t snd_hdspm_hw_pointer(struct snd_pcm_substreamstruct hdspm *hdspm = snd_pcm_substream_chip(substream);return hdspm_hw_pointer(hdspm);static int snd_hdspm_reset(struct snd_pcm_substream *substream)struct snd_pcm_runtime *runtime = substream->runtime;struct hdspm *hdspm = snd_pcm_substream_chip(substream);struct snd_pcm_substream *other;if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)else if (hdspm->running)else 0 ;if (other) {struct snd_pcm_substream *s;struct snd_pcm_runtime *oruntime = other->runtime;if (s == other) {break ;return 0 ;static int snd_hdspm_hw_params(struct snd_pcm_substream *substream,struct snd_pcm_hw_params *params)struct hdspm *hdspm = snd_pcm_substream_chip(substream);int err;int i;if (substream->pstr->stream == SNDRV_PCM_STREAM_PLAYBACK) {else {if (other_pid > 0 && this_pid != other_pid) {/* The other stream is open, and not by the same task as this one . Make sure that the parameters that matter are the same . if (params_rate(params) != hdspm->system_sample_rate) {return -EBUSY;if (params_period_size(params) != hdspm->period_bytes / 4 ) {return -EBUSY;/* We're fine. */ /* how to make sure that the rate matches an externally-set one ? */ 0 );if (err < 0 ) {"err on hdspm_set_rate: %d\n" , err);return err;if (err < 0 ) {"err on hdspm_set_interrupt_interval: %d\n" , err);return err;/* Memory allocation, takashi's method, dont know if we should * spinlock /* malloc all buffer even if not enabled to get sure */ /* Update for MADI rev 204: we need to allocate for all channels, if (err < 0 ) {"err on snd_pcm_lib_malloc_pages: %d\n" , err);return err;if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {for (i = 0 ; i < params_channels(params); ++i) {int c = hdspm->channel_map_out[i];if (c < 0 )continue ; /* just make sure */ 1 );unsigned char *) substream->runtime->dma_area;"Allocated sample buffer for playback at %p\n" ,else {for (i = 0 ; i < params_channels(params); ++i) {int c = hdspm->channel_map_in[i];if (c < 0 )continue ;1 );unsigned char *) substream->runtime->dma_area;"Allocated sample buffer for capture at %p\n" ,/* dev_dbg ( hdspm - > card - > dev , " Allocated sample buffer for % s at 0 x % 08 X \ n " , snd_pcm_direction_name ( substream - > stream ) , snd_pcm_sgbuf_get_addr ( substream , 0 ) ) ; /* dev_dbg ( hdspm - > card - > dev , " set_hwparams : % s % d Hz , % d channels , bs = % d \ n " , snd_pcm_direction_name ( substream - > stream ) , params_rate ( params ) , params_channels ( params ) , params_buffer_size ( params ) ) ; /* For AES cards, the float format bit is the same as the * preferred sync reference . Since we don ' t want to break * sync settings , we have to skip the remaining part of this * function . if (hdspm->io_type == AES32) {return 0 ;/* Switch to native float format if requested */ if (SNDRV_PCM_FORMAT_FLOAT_LE == params_format(params)) {if (!(hdspm->control_register & HDSPe_FLOAT_FORMAT))"Switching to native 32bit LE float format.\n" );else if (SNDRV_PCM_FORMAT_S32_LE == params_format(params)) {if (hdspm->control_register & HDSPe_FLOAT_FORMAT)"Switching to native 32bit LE integer format.\n" );return 0 ;static int snd_hdspm_hw_free(struct snd_pcm_substream *substream)int i;struct hdspm *hdspm = snd_pcm_substream_chip(substream);if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {/* Just disable all channels. The saving when disabling a */ /* smaller set is not worth the trouble. */ for (i = 0 ; i < HDSPM_MAX_CHANNELS; ++i)0 );else {for (i = 0 ; i < HDSPM_MAX_CHANNELS; ++i)0 );return 0 ;static int snd_hdspm_channel_info(struct snd_pcm_substream *substream,struct snd_pcm_channel_info *info)struct hdspm *hdspm = snd_pcm_substream_chip(substream);unsigned int channel = info->channel;if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {if (snd_BUG_ON(channel >= hdspm->max_channels_out)) {"snd_hdspm_channel_info: output channel out of range (%d)\n" ,return -EINVAL;if (hdspm->channel_map_out[channel] < 0 ) {"snd_hdspm_channel_info: output channel %d mapped out\n" ,return -EINVAL;else {if (snd_BUG_ON(channel >= hdspm->max_channels_in)) {"snd_hdspm_channel_info: input channel out of range (%d)\n" ,return -EINVAL;if (hdspm->channel_map_in[channel] < 0 ) {"snd_hdspm_channel_info: input channel %d mapped out\n" ,return -EINVAL;0 ;32 ;return 0 ;static int snd_hdspm_ioctl(struct snd_pcm_substream *substream,unsigned int cmd, void *arg)switch (cmd) {case SNDRV_PCM_IOCTL1_RESET:return snd_hdspm_reset(substream);case SNDRV_PCM_IOCTL1_CHANNEL_INFO:struct snd_pcm_channel_info *info = arg;return snd_hdspm_channel_info(substream, info);default :break ;return snd_pcm_lib_ioctl(substream, cmd, arg);static int snd_hdspm_trigger(struct snd_pcm_substream *substream, int cmd)struct hdspm *hdspm = snd_pcm_substream_chip(substream);struct snd_pcm_substream *other;int running;switch (cmd) {case SNDRV_PCM_TRIGGER_START:1 << substream->stream;break ;case SNDRV_PCM_TRIGGER_STOP:1 << substream->stream);break ;default :return -EINVAL;if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)else if (other) {struct snd_pcm_substream *s;if (s == other) {if (cmd == SNDRV_PCM_TRIGGER_START)1 << s->stream;else 1 << s->stream);goto _ok;if (cmd == SNDRV_PCM_TRIGGER_START) {if (!(running & (1 << SNDRV_PCM_STREAM_PLAYBACK))else {if (running &&else {if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)if (!hdspm->running && running)else if (hdspm->running && !running)return 0 ;static int snd_hdspm_prepare(struct snd_pcm_substream *substream)return 0 ;static const struct snd_pcm_hardware snd_hdspm_playback_subinfo = {32000 ,192000 ,1 ,32 * 4 ),8192 * 4 ) * HDSPM_MAX_CHANNELS,2 ,512 ,0 static const struct snd_pcm_hardware snd_hdspm_capture_subinfo = {32000 ,192000 ,1 ,32 * 4 ),8192 * 4 ) * HDSPM_MAX_CHANNELS,2 ,512 ,0 static int snd_hdspm_hw_rule_in_channels_rate(struct snd_pcm_hw_params *params,struct snd_pcm_hw_rule *rule)struct hdspm *hdspm = rule->private ;struct snd_interval *c =struct snd_interval *r =if (r->min > 96000 && r->max <= 192000 ) {struct snd_interval t = {1 ,return snd_interval_refine(c, &t);else if (r->min > 48000 && r->max <= 96000 ) {struct snd_interval t = {1 ,return snd_interval_refine(c, &t);else if (r->max < 64000 ) {struct snd_interval t = {1 ,return snd_interval_refine(c, &t);return 0 ;static int snd_hdspm_hw_rule_out_channels_rate(struct snd_pcm_hw_params *params,struct snd_pcm_hw_rule * rule)struct hdspm *hdspm = rule->private ;struct snd_interval *c =struct snd_interval *r =if (r->min > 96000 && r->max <= 192000 ) {struct snd_interval t = {1 ,return snd_interval_refine(c, &t);else if (r->min > 48000 && r->max <= 96000 ) {struct snd_interval t = {1 ,return snd_interval_refine(c, &t);else if (r->max < 64000 ) {struct snd_interval t = {1 ,return snd_interval_refine(c, &t);else {return 0 ;static int snd_hdspm_hw_rule_rate_in_channels(struct snd_pcm_hw_params *params,struct snd_pcm_hw_rule * rule)struct hdspm *hdspm = rule->private ;struct snd_interval *c =struct snd_interval *r =if (c->min >= hdspm->ss_in_channels) {struct snd_interval t = {32000 ,48000 ,1 ,return snd_interval_refine(r, &t);else if (c->max <= hdspm->qs_in_channels) {struct snd_interval t = {128000 ,192000 ,1 ,return snd_interval_refine(r, &t);else if (c->max <= hdspm->ds_in_channels) {struct snd_interval t = {64000 ,96000 ,1 ,return snd_interval_refine(r, &t);return 0 ;static int snd_hdspm_hw_rule_rate_out_channels(struct snd_pcm_hw_params *params,struct snd_pcm_hw_rule *rule)struct hdspm *hdspm = rule->private ;struct snd_interval *c =struct snd_interval *r =if (c->min >= hdspm->ss_out_channels) {struct snd_interval t = {32000 ,48000 ,1 ,return snd_interval_refine(r, &t);else if (c->max <= hdspm->qs_out_channels) {struct snd_interval t = {128000 ,192000 ,1 ,return snd_interval_refine(r, &t);else if (c->max <= hdspm->ds_out_channels) {struct snd_interval t = {64000 ,96000 ,1 ,return snd_interval_refine(r, &t);return 0 ;static int snd_hdspm_hw_rule_in_channels(struct snd_pcm_hw_params *params,struct snd_pcm_hw_rule *rule)unsigned int list[3 ];struct hdspm *hdspm = rule->private ;struct snd_interval *c = hw_param_interval(params,0 ] = hdspm->qs_in_channels;1 ] = hdspm->ds_in_channels;2 ] = hdspm->ss_in_channels;return snd_interval_list(c, 3 , list, 0 );static int snd_hdspm_hw_rule_out_channels(struct snd_pcm_hw_params *params,struct snd_pcm_hw_rule *rule)unsigned int list[3 ];struct hdspm *hdspm = rule->private ;struct snd_interval *c = hw_param_interval(params,0 ] = hdspm->qs_out_channels;1 ] = hdspm->ds_out_channels;2 ] = hdspm->ss_out_channels;return snd_interval_list(c, 3 , list, 0 );static int snd_hdspm_open(struct snd_pcm_substream *substream)struct hdspm *hdspm = snd_pcm_substream_chip(substream);struct snd_pcm_runtime *runtime = substream->runtime;bool playback = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK);if (playback) {if (!hdspm->capture_substream)else {if (!hdspm->playback_substream)0 , 32 , 24 );0 , SNDRV_PCM_HW_PARAM_PERIOD_SIZE);switch (hdspm->io_type) {case AIO:case RayDAT:32 , 4096 );/* RayDAT & AIO have a fixed buffer of 16384 samples per channel */ 16384 );break ;default :64 , 8192 );2 );break ;if (AES32 == hdspm->io_type) {else {0 , SNDRV_PCM_HW_PARAM_RATE,1 );0 , SNDRV_PCM_HW_PARAM_CHANNELS,1 );0 , SNDRV_PCM_HW_PARAM_CHANNELS,1 );return 0 ;static int snd_hdspm_release(struct snd_pcm_substream *substream)struct hdspm *hdspm = snd_pcm_substream_chip(substream);bool playback = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK);if (playback) {1 ;else {1 ;return 0 ;static int snd_hdspm_hwdep_dummy_op(struct snd_hwdep *hw, struct file *file)/* we have nothing to initialize but the call is required */ return 0 ;static int snd_hdspm_hwdep_ioctl(struct snd_hwdep *hw, struct file *file,unsigned int cmd, unsigned long arg)void __user *argp = (void __user *)arg;struct hdspm *hdspm = hw->private_data;struct hdspm_mixer_ioctl mixer;struct hdspm_config info;struct hdspm_status status;struct hdspm_version hdspm_version;struct hdspm_peak_rms *levels;struct hdspm_ltc ltc;unsigned int statusregister;long unsigned int s;int i = 0 ;switch (cmd) {case SNDRV_HDSPM_IOCTL_GET_PEAK_RMS:for (i = 0 ; i < HDSPM_MAX_CHANNELS; i++) {4 );4 );4 );4 ) << 32 ) |4 );4 ) << 32 ) |4 );4 ) << 32 ) |4 );if (hdspm->system_sample_rate > 96000 ) {else if (hdspm->system_sample_rate > 48000 ) {else {sizeof (*levels));if (0 != s) {/* dev_err(hdspm->card->dev, "copy_to_user(.., .., %lu): %lu [ Levels ] \ n " , sizeof ( struct hdspm_peak_rms ) , s ) ; return -EFAULT;break ;case SNDRV_HDSPM_IOCTL_GET_LTC:4 );if (i & HDSPM_TCO1_LTC_Input_valid) {switch (i & (HDSPM_TCO1_LTC_Format_LSB |case 0 :break ;case HDSPM_TCO1_LTC_Format_LSB:break ;case HDSPM_TCO1_LTC_Format_MSB:break ;default :break ;if (i & HDSPM_TCO1_set_drop_frame_flag) {else {else {if (i & HDSPM_TCO1_Video_Input_Format_NTSC) {else if (i & HDSPM_TCO1_Video_Input_Format_PAL) {else {sizeof (ltc));if (0 != s) {/*m_ltc), s); */ return -EFAULT;break ;case SNDRV_HDSPM_IOCTL_GET_CONFIG:0 , sizeof (info));0 ;if (copy_to_user(argp, &info, sizeof (info)))return -EFAULT;break ;case SNDRV_HDSPM_IOCTL_GET_STATUS:0 , sizeof (status));110069313433624 ULL;switch (hdspm->io_type) {case MADI:case MADIface:1 : 0 ;1 : 0 ;/* TODO: Mac driver sets it when f_s>48kHz */ 0 ;break ;default :break ;if (copy_to_user(argp, &status, sizeof (status)))return -EFAULT;break ;case SNDRV_HDSPM_IOCTL_GET_VERSION:0 , sizeof (hdspm_version));sizeof (hdspm_version.cardname));0 ;if (hdspm->tco)if (copy_to_user(argp, &hdspm_version,sizeof (hdspm_version)))return -EFAULT;break ;case SNDRV_HDSPM_IOCTL_GET_MIXER:if (copy_from_user(&mixer, argp, sizeof (mixer)))return -EFAULT;if (copy_to_user((void __user *)mixer.mixer, hdspm->mixer,sizeof (*mixer.mixer)))return -EFAULT;break ;default :return -EINVAL;return 0 ;static const struct snd_pcm_ops snd_hdspm_ops = {static int snd_hdspm_create_hwdep(struct snd_card *card,struct hdspm *hdspm)struct snd_hwdep *hw;int err;"HDSPM hwdep" , 0 , &hw);if (err < 0 )return err;"HDSPM hwdep interface" );return 0 ;/*------------------------------------------------------------ memory interface static int snd_hdspm_preallocate_memory(struct hdspm *hdspm)struct snd_pcm *pcm;" Preallocated %zd Bytes\n" , wanted);return 0 ;/* Inform the card what DMA addresses to use for the indicated channel. */ /* Each channel got 16 4K pages allocated for DMA transfers. */ static void hdspm_set_channel_dma_addr(struct hdspm *hdspm,struct snd_pcm_substream *substream,unsigned int reg, int channel)int i;for (i = channel * 16 ; i < channel * 16 + 16 ; i++)4 * i,4096 * i));/* ------------- ALSA Devices ---------------------------- */ static int snd_hdspm_create_pcm(struct snd_card *card,struct hdspm *hdspm)struct snd_pcm *pcm;int err;0 , 1 , 1 , &pcm);if (err < 0 )return err;if (err < 0 )return err;return 0 ;static inline void snd_hdspm_initialize_midi_flush(struct hdspm * hdspm)int i;for (i = 0 ; i < hdspm->midiPorts; i++)static int snd_hdspm_create_alsa_devices(struct snd_card *card,struct hdspm *hdspm)int err, i;"Create card...\n" );if (err < 0 )return err;0 ;while (i < hdspm->midiPorts) {if (err < 0 ) {return err;if (err < 0 )return err;if (err < 0 )return err;"proc init...\n" );1 ;1 ;1 ;1 ;1 ;"Set defaults...\n" );if (err < 0 )return err;"Update mixer controls...\n" );"Initializing complete?\n" );if (err < 0 ) {"error registering card\n" );return err;"... yes now\n" );return 0 ;static int snd_hdspm_create(struct snd_card *card,struct hdspm *hdspm)struct pci_dev *pci = hdspm->pci;int err;unsigned long io_extent;1 ;"Xilinx FPGA" );"HDSPM" );switch (hdspm->firmware_rev) {case HDSPM_RAYDAT_REV:"RME RayDAT" ;2 ;break ;case HDSPM_AIO_REV:"RME AIO" ;1 ;break ;case HDSPM_MADIFACE_REV:"RME MADIface" ;1 ;break ;default :if ((hdspm->firmware_rev == 0 xf0) ||0 xe6) &&0 xea))) {"RME AES32" ;2 ;else if ((hdspm->firmware_rev == 0 xd2) ||0 xc8) &&0 xcf))) {"RME MADI" ;3 ;else {"unknown firmware revision %x\n" ,return -ENODEV;if (err < 0 )return err;0 , "hdspm" );if (IS_ERR(hdspm->iobase))return PTR_ERR(hdspm->iobase);0 );0 );"remapped region (0x%lx) 0x%lx-0x%lx\n" ,unsigned long )hdspm->iobase, hdspm->port,1 );if (devm_request_irq(&pci->dev, pci->irq, snd_hdspm_interrupt,"unable to use IRQ %d\n" , pci->irq);return -EBUSY;"use IRQ %d\n" , pci->irq);"kmalloc Mixer memory of %zd Bytes\n" ,sizeof (*hdspm->mixer));sizeof (*hdspm->mixer), GFP_KERNEL);if (!hdspm->mixer)return -ENOMEM;switch (hdspm->io_type) {case AES32:break ;case MADI:case MADIface:break ;case AIO:if (0 == (hdspm_read(hdspm, HDSPM_statusRegister2) & HDSPM_s2_AEBI_D)) {"AEB input board found\n" );4 ;4 ;4 ;if (0 == (hdspm_read(hdspm, HDSPM_statusRegister2) & HDSPM_s2_AEBO_D)) {"AEB output board found\n" );4 ;4 ;4 ;break ;case RayDAT:break ;/* TCO detection */ switch (hdspm->io_type) {case AIO:case RayDAT:if (hdspm_read(hdspm, HDSPM_statusRegister2) &sizeof (*hdspm->tco), GFP_KERNEL);if (hdspm->tco)"AIO/RayDAT TCO module found\n" );else {break ;case MADI:case AES32:if (hdspm_read(hdspm, HDSPM_statusRegister) & HDSPM_tco_detect) {sizeof (*hdspm->tco), GFP_KERNEL);if (hdspm->tco)"MADI/AES TCO module found\n" );else {break ;default :/* texts */ switch (hdspm->io_type) {case AES32:if (hdspm->tco) {else {break ;case MADI:if (hdspm->tco) {4 ;else {3 ;break ;case MADIface:break ;case RayDAT:if (hdspm->tco) {9 ;else {8 ;break ;case AIO:if (hdspm->tco) {6 ;else {5 ;break ;if (hdspm->io_type != MADIface) {8 ) & 0 xFFFFFF;/* id contains either a user-provided value or the default * NULL . If it ' s the default , we ' re safe to * fill card - > id with the serial number . * * If the serial number is 0 xFFFFFF , then we ' re dealing with * an old PCI revision that comes without a sane number . In * this case , we don ' t set card - > id to avoid collisions * when running with multiple cards . if (!id[hdspm->dev] && hdspm->serial != 0 xFFFFFF) {sizeof (card->id),"HDSPMx%06x" , hdspm->serial);"create alsa devices.\n" );if (err < 0 )return err;return 0 ;static void snd_hdspm_card_free(struct snd_card *card)struct hdspm *hdspm = card->private_data;if (hdspm->port) {/* stop th audio, and cancel all interrupts */ static int snd_hdspm_probe(struct pci_dev *pci,const struct pci_device_id *pci_id)static int dev;struct hdspm *hdspm;struct snd_card *card;int err;if (dev >= SNDRV_CARDS)return -ENODEV;if (!enable[dev]) {return -ENOENT;sizeof (*hdspm), &card);if (err < 0 )return err;if (err < 0 )goto error;if (hdspm->io_type != MADIface) {sizeof (card->shortname), "%s_%x" ,sizeof (card->longname),"%s S/N 0x%x at 0x%lx, irq %d" ,else {sizeof (card->shortname), "%s" ,sizeof (card->longname),"%s at 0x%lx, irq %d" ,if (err < 0 )goto error;return 0 ;return err;static struct pci_driver hdspm_driver = {
Messung V0.5 in Prozent C=94 H=98 G=95
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(vorverarbeitet am 2026-09-28)
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