// SPDX-License-Identifier: GPL-2.0+ /* * StarFive JH7110 DPHY RX driver * * Copyright (C) 2023 StarFive Technology Co., Ltd. * Author: Jack Zhu <jack.zhu@starfivetech.com> * Author: Changhuang Liang <changhuang.liang@starfivetech.com> #include <linux/bitfield.h>#include <linux/bitops.h>#include <linux/clk.h>#include <linux/io.h>#include <linux/module.h>#include <linux/of.h>#include <linux/phy/phy.h>#include <linux/platform_device.h>#include <linux/pm_runtime.h>#include <linux/reset.h>#define STF_DPHY_APBCFGSAIF_SYSCFG(x) (x)#define STF_DPHY_ENABLE_CLK BIT(6 )#define STF_DPHY_ENABLE_CLK1 BIT(7 )#define STF_DPHY_ENABLE_LAN0 BIT(8 )#define STF_DPHY_ENABLE_LAN1 BIT(9 )#define STF_DPHY_ENABLE_LAN2 BIT(10 )#define STF_DPHY_ENABLE_LAN3 BIT(11 )#define STF_DPHY_LANE_SWAP_CLK GENMASK(22 , 20 )#define STF_DPHY_LANE_SWAP_CLK1 GENMASK(25 , 23 )#define STF_DPHY_LANE_SWAP_LAN0 GENMASK(28 , 26 )#define STF_DPHY_LANE_SWAP_LAN1 GENMASK(31 , 29 )#define STF_DPHY_LANE_SWAP_LAN2 GENMASK(2 , 0 )#define STF_DPHY_LANE_SWAP_LAN3 GENMASK(5 , 3 )#define STF_DPHY_PLL_CLK_SEL GENMASK(21 , 12 )#define STF_DPHY_PRECOUNTER_IN_CLK GENMASK(29 , 22 )#define STF_DPHY_PRECOUNTER_IN_CLK1 GENMASK(7 , 0 )#define STF_DPHY_PRECOUNTER_IN_LAN0 GENMASK(15 , 8 )#define STF_DPHY_PRECOUNTER_IN_LAN1 GENMASK(23 , 16 )#define STF_DPHY_PRECOUNTER_IN_LAN2 GENMASK(31 , 24 )#define STF_DPHY_PRECOUNTER_IN_LAN3 GENMASK(7 , 0 )#define STF_DPHY_RX_1C2C_SEL BIT(8 )#define STF_MAP_LANES_NUM 6 struct stf_dphy_info {/** * @maps: * * Physical lanes and logic lanes mapping table. * * The default order is: * [clk lane0, data lane 0, data lane 1, data lane 2, date lane 3, clk lane 1] struct stf_dphy {struct device *dev;void __iomem *regs;struct clk *cfg_clk;struct clk *ref_clk;struct clk *tx_clk;struct reset_control *rstc;struct regulator *mipi_0p9;struct phy *phy;const struct stf_dphy_info *info;static int stf_dphy_configure(struct phy *phy, union phy_configure_opts *opts)struct stf_dphy *dphy = phy_get_drvdata(phy);const struct stf_dphy_info *info = dphy->info;1 ) |1 ) |1 ) |1 ) |1 ) |1 ) |0 ]) |5 ]) |1 ]) |2 ]),188 ));3 ]) |4 ]) |8 ),192 ));8 ) |7 ) |7 ) |7 ),196 ));7 ),200 ));return 0 ;static int stf_dphy_power_on(struct phy *phy)struct stf_dphy *dphy = phy_get_drvdata(phy);int ret;if (ret < 0 )return ret;if (ret) {return ret;99000000 );49500000 );19800000 );return 0 ;static int stf_dphy_power_off(struct phy *phy)struct stf_dphy *dphy = phy_get_drvdata(phy);return 0 ;static const struct phy_ops stf_dphy_ops = {static int stf_dphy_probe(struct platform_device *pdev)struct phy_provider *phy_provider;struct stf_dphy *dphy;sizeof (*dphy), GFP_KERNEL);if (!dphy)return -ENOMEM;0 );if (IS_ERR(dphy->regs))return PTR_ERR(dphy->regs);"cfg" );if (IS_ERR(dphy->cfg_clk))return PTR_ERR(dphy->cfg_clk);"ref" );if (IS_ERR(dphy->ref_clk))return PTR_ERR(dphy->ref_clk);"tx" );if (IS_ERR(dphy->tx_clk))return PTR_ERR(dphy->tx_clk);if (IS_ERR(dphy->rstc))return PTR_ERR(dphy->rstc);"mipi_0p9" );if (IS_ERR(dphy->mipi_0p9))return PTR_ERR(dphy->mipi_0p9);if (IS_ERR(dphy->phy)) {"Failed to create PHY\n" );return PTR_ERR(dphy->phy);return PTR_ERR_OR_ZERO(phy_provider);static const struct stf_dphy_info starfive_dphy_info = {4 , 0 , 1 , 2 , 3 , 5 },static const struct of_device_id stf_dphy_dt_ids[] = {"starfive,jh7110-dphy-rx" ,/* sentinel */ }, static struct platform_driver stf_dphy_driver = {"starfive-dphy-rx" ,"Jack Zhu <jack.zhu@starfivetech.com>" );"Changhuang Liang <changhuang.liang@starfivetech.com>" );"StarFive JH7110 DPHY RX driver" );"GPL" );
Messung V0.5 in Prozent C=96 H=96 G=95
¤ Dauer der Verarbeitung: 0.1 Sekunden
(vorverarbeitet am 2026-06-08)
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